1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for FPGA Device Feature List (DFL) Support
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
8 * Kang Luwei <luwei.kang@intel.com>
9 * Zhang Yi <yi.z.zhang@intel.com>
10 * Wu Hao <hao.wu@intel.com>
11 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
13 #include <linux/dfl.h>
14 #include <linux/fpga-dfl.h>
15 #include <linux/module.h>
16 #include <linux/uaccess.h>
20 static DEFINE_MUTEX(dfl_id_mutex
);
23 * when adding a new feature dev support in DFL framework, it's required to
24 * add a new item in enum dfl_id_type and provide related information in below
25 * dfl_devs table which is indexed by dfl_id_type, e.g. name string used for
26 * platform device creation (define name strings in dfl.h, as they could be
27 * reused by platform device drivers).
29 * if the new feature dev needs chardev support, then it's required to add
30 * a new item in dfl_chardevs table and configure dfl_devs[i].devt_type as
31 * index to dfl_chardevs table. If no chardev support just set devt_type
32 * as one invalid index (DFL_FPGA_DEVT_MAX).
34 enum dfl_fpga_devt_type
{
40 static struct lock_class_key dfl_pdata_keys
[DFL_ID_MAX
];
42 static const char *dfl_pdata_key_strings
[DFL_ID_MAX
] = {
48 * dfl_dev_info - dfl feature device information.
49 * @name: name string of the feature platform device.
50 * @dfh_id: id value in Device Feature Header (DFH) register by DFL spec.
51 * @id: idr id of the feature dev.
52 * @devt_type: index to dfl_chrdevs[].
58 enum dfl_fpga_devt_type devt_type
;
61 /* it is indexed by dfl_id_type */
62 static struct dfl_dev_info dfl_devs
[] = {
63 {.name
= DFL_FPGA_FEATURE_DEV_FME
, .dfh_id
= DFH_ID_FIU_FME
,
64 .devt_type
= DFL_FPGA_DEVT_FME
},
65 {.name
= DFL_FPGA_FEATURE_DEV_PORT
, .dfh_id
= DFH_ID_FIU_PORT
,
66 .devt_type
= DFL_FPGA_DEVT_PORT
},
70 * dfl_chardev_info - chardev information of dfl feature device
71 * @name: nmae string of the char device.
72 * @devt: devt of the char device.
74 struct dfl_chardev_info
{
79 /* indexed by enum dfl_fpga_devt_type */
80 static struct dfl_chardev_info dfl_chrdevs
[] = {
81 {.name
= DFL_FPGA_FEATURE_DEV_FME
},
82 {.name
= DFL_FPGA_FEATURE_DEV_PORT
},
85 static void dfl_ids_init(void)
89 for (i
= 0; i
< ARRAY_SIZE(dfl_devs
); i
++)
90 idr_init(&dfl_devs
[i
].id
);
93 static void dfl_ids_destroy(void)
97 for (i
= 0; i
< ARRAY_SIZE(dfl_devs
); i
++)
98 idr_destroy(&dfl_devs
[i
].id
);
101 static int dfl_id_alloc(enum dfl_id_type type
, struct device
*dev
)
105 WARN_ON(type
>= DFL_ID_MAX
);
106 mutex_lock(&dfl_id_mutex
);
107 id
= idr_alloc(&dfl_devs
[type
].id
, dev
, 0, 0, GFP_KERNEL
);
108 mutex_unlock(&dfl_id_mutex
);
113 static void dfl_id_free(enum dfl_id_type type
, int id
)
115 WARN_ON(type
>= DFL_ID_MAX
);
116 mutex_lock(&dfl_id_mutex
);
117 idr_remove(&dfl_devs
[type
].id
, id
);
118 mutex_unlock(&dfl_id_mutex
);
121 static enum dfl_id_type
feature_dev_id_type(struct platform_device
*pdev
)
125 for (i
= 0; i
< ARRAY_SIZE(dfl_devs
); i
++)
126 if (!strcmp(dfl_devs
[i
].name
, pdev
->name
))
132 static enum dfl_id_type
dfh_id_to_type(u16 id
)
136 for (i
= 0; i
< ARRAY_SIZE(dfl_devs
); i
++)
137 if (dfl_devs
[i
].dfh_id
== id
)
144 * introduce a global port_ops list, it allows port drivers to register ops
145 * in such list, then other feature devices (e.g. FME), could use the port
146 * functions even related port platform device is hidden. Below is one example,
147 * in virtualization case of PCIe-based FPGA DFL device, when SRIOV is
148 * enabled, port (and it's AFU) is turned into VF and port platform device
149 * is hidden from system but it's still required to access port to finish FPGA
150 * reconfiguration function in FME.
153 static DEFINE_MUTEX(dfl_port_ops_mutex
);
154 static LIST_HEAD(dfl_port_ops_list
);
157 * dfl_fpga_port_ops_get - get matched port ops from the global list
158 * @pdev: platform device to match with associated port ops.
159 * Return: matched port ops on success, NULL otherwise.
161 * Please note that must dfl_fpga_port_ops_put after use the port_ops.
163 struct dfl_fpga_port_ops
*dfl_fpga_port_ops_get(struct platform_device
*pdev
)
165 struct dfl_fpga_port_ops
*ops
= NULL
;
167 mutex_lock(&dfl_port_ops_mutex
);
168 if (list_empty(&dfl_port_ops_list
))
171 list_for_each_entry(ops
, &dfl_port_ops_list
, node
) {
172 /* match port_ops using the name of platform device */
173 if (!strcmp(pdev
->name
, ops
->name
)) {
174 if (!try_module_get(ops
->owner
))
182 mutex_unlock(&dfl_port_ops_mutex
);
185 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_get
);
188 * dfl_fpga_port_ops_put - put port ops
191 void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops
*ops
)
193 if (ops
&& ops
->owner
)
194 module_put(ops
->owner
);
196 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_put
);
199 * dfl_fpga_port_ops_add - add port_ops to global list
200 * @ops: port ops to add.
202 void dfl_fpga_port_ops_add(struct dfl_fpga_port_ops
*ops
)
204 mutex_lock(&dfl_port_ops_mutex
);
205 list_add_tail(&ops
->node
, &dfl_port_ops_list
);
206 mutex_unlock(&dfl_port_ops_mutex
);
208 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_add
);
211 * dfl_fpga_port_ops_del - remove port_ops from global list
212 * @ops: port ops to del.
214 void dfl_fpga_port_ops_del(struct dfl_fpga_port_ops
*ops
)
216 mutex_lock(&dfl_port_ops_mutex
);
217 list_del(&ops
->node
);
218 mutex_unlock(&dfl_port_ops_mutex
);
220 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del
);
223 * dfl_fpga_check_port_id - check the port id
224 * @pdev: port platform device.
225 * @pport_id: port id to compare.
227 * Return: 1 if port device matches with given port id, otherwise 0.
229 int dfl_fpga_check_port_id(struct platform_device
*pdev
, void *pport_id
)
231 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
232 struct dfl_fpga_port_ops
*port_ops
;
234 if (pdata
->id
!= FEATURE_DEV_ID_UNUSED
)
235 return pdata
->id
== *(int *)pport_id
;
237 port_ops
= dfl_fpga_port_ops_get(pdev
);
238 if (!port_ops
|| !port_ops
->get_id
)
241 pdata
->id
= port_ops
->get_id(pdev
);
242 dfl_fpga_port_ops_put(port_ops
);
244 return pdata
->id
== *(int *)pport_id
;
246 EXPORT_SYMBOL_GPL(dfl_fpga_check_port_id
);
248 static DEFINE_IDA(dfl_device_ida
);
250 static const struct dfl_device_id
*
251 dfl_match_one_device(const struct dfl_device_id
*id
, struct dfl_device
*ddev
)
253 if (id
->type
== ddev
->type
&& id
->feature_id
== ddev
->feature_id
)
259 static int dfl_bus_match(struct device
*dev
, struct device_driver
*drv
)
261 struct dfl_device
*ddev
= to_dfl_dev(dev
);
262 struct dfl_driver
*ddrv
= to_dfl_drv(drv
);
263 const struct dfl_device_id
*id_entry
;
265 id_entry
= ddrv
->id_table
;
267 while (id_entry
->feature_id
) {
268 if (dfl_match_one_device(id_entry
, ddev
)) {
269 ddev
->id_entry
= id_entry
;
279 static int dfl_bus_probe(struct device
*dev
)
281 struct dfl_driver
*ddrv
= to_dfl_drv(dev
->driver
);
282 struct dfl_device
*ddev
= to_dfl_dev(dev
);
284 return ddrv
->probe(ddev
);
287 static void dfl_bus_remove(struct device
*dev
)
289 struct dfl_driver
*ddrv
= to_dfl_drv(dev
->driver
);
290 struct dfl_device
*ddev
= to_dfl_dev(dev
);
296 static int dfl_bus_uevent(struct device
*dev
, struct kobj_uevent_env
*env
)
298 struct dfl_device
*ddev
= to_dfl_dev(dev
);
300 return add_uevent_var(env
, "MODALIAS=dfl:t%04Xf%04X",
301 ddev
->type
, ddev
->feature_id
);
305 type_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
307 struct dfl_device
*ddev
= to_dfl_dev(dev
);
309 return sprintf(buf
, "0x%x\n", ddev
->type
);
311 static DEVICE_ATTR_RO(type
);
314 feature_id_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
316 struct dfl_device
*ddev
= to_dfl_dev(dev
);
318 return sprintf(buf
, "0x%x\n", ddev
->feature_id
);
320 static DEVICE_ATTR_RO(feature_id
);
322 static struct attribute
*dfl_dev_attrs
[] = {
324 &dev_attr_feature_id
.attr
,
327 ATTRIBUTE_GROUPS(dfl_dev
);
329 static struct bus_type dfl_bus_type
= {
331 .match
= dfl_bus_match
,
332 .probe
= dfl_bus_probe
,
333 .remove
= dfl_bus_remove
,
334 .uevent
= dfl_bus_uevent
,
335 .dev_groups
= dfl_dev_groups
,
338 static void release_dfl_dev(struct device
*dev
)
340 struct dfl_device
*ddev
= to_dfl_dev(dev
);
342 if (ddev
->mmio_res
.parent
)
343 release_resource(&ddev
->mmio_res
);
345 ida_simple_remove(&dfl_device_ida
, ddev
->id
);
350 static struct dfl_device
*
351 dfl_dev_add(struct dfl_feature_platform_data
*pdata
,
352 struct dfl_feature
*feature
)
354 struct platform_device
*pdev
= pdata
->dev
;
355 struct resource
*parent_res
;
356 struct dfl_device
*ddev
;
359 ddev
= kzalloc(sizeof(*ddev
), GFP_KERNEL
);
361 return ERR_PTR(-ENOMEM
);
363 id
= ida_simple_get(&dfl_device_ida
, 0, 0, GFP_KERNEL
);
365 dev_err(&pdev
->dev
, "unable to get id\n");
370 /* freeing resources by put_device() after device_initialize() */
371 device_initialize(&ddev
->dev
);
372 ddev
->dev
.parent
= &pdev
->dev
;
373 ddev
->dev
.bus
= &dfl_bus_type
;
374 ddev
->dev
.release
= release_dfl_dev
;
376 ret
= dev_set_name(&ddev
->dev
, "dfl_dev.%d", id
);
380 ddev
->type
= feature_dev_id_type(pdev
);
381 ddev
->feature_id
= feature
->id
;
382 ddev
->revision
= feature
->revision
;
383 ddev
->cdev
= pdata
->dfl_cdev
;
385 /* add mmio resource */
386 parent_res
= &pdev
->resource
[feature
->resource_index
];
387 ddev
->mmio_res
.flags
= IORESOURCE_MEM
;
388 ddev
->mmio_res
.start
= parent_res
->start
;
389 ddev
->mmio_res
.end
= parent_res
->end
;
390 ddev
->mmio_res
.name
= dev_name(&ddev
->dev
);
391 ret
= insert_resource(parent_res
, &ddev
->mmio_res
);
393 dev_err(&pdev
->dev
, "%s failed to claim resource: %pR\n",
394 dev_name(&ddev
->dev
), &ddev
->mmio_res
);
398 /* then add irq resource */
399 if (feature
->nr_irqs
) {
400 ddev
->irqs
= kcalloc(feature
->nr_irqs
,
401 sizeof(*ddev
->irqs
), GFP_KERNEL
);
407 for (i
= 0; i
< feature
->nr_irqs
; i
++)
408 ddev
->irqs
[i
] = feature
->irq_ctx
[i
].irq
;
410 ddev
->num_irqs
= feature
->nr_irqs
;
413 ret
= device_add(&ddev
->dev
);
417 dev_dbg(&pdev
->dev
, "add dfl_dev: %s\n", dev_name(&ddev
->dev
));
421 /* calls release_dfl_dev() which does the clean up */
422 put_device(&ddev
->dev
);
426 static void dfl_devs_remove(struct dfl_feature_platform_data
*pdata
)
428 struct dfl_feature
*feature
;
430 dfl_fpga_dev_for_each_feature(pdata
, feature
) {
432 device_unregister(&feature
->ddev
->dev
);
433 feature
->ddev
= NULL
;
438 static int dfl_devs_add(struct dfl_feature_platform_data
*pdata
)
440 struct dfl_feature
*feature
;
441 struct dfl_device
*ddev
;
444 dfl_fpga_dev_for_each_feature(pdata
, feature
) {
453 ddev
= dfl_dev_add(pdata
, feature
);
459 feature
->ddev
= ddev
;
465 dfl_devs_remove(pdata
);
469 int __dfl_driver_register(struct dfl_driver
*dfl_drv
, struct module
*owner
)
471 if (!dfl_drv
|| !dfl_drv
->probe
|| !dfl_drv
->id_table
)
474 dfl_drv
->drv
.owner
= owner
;
475 dfl_drv
->drv
.bus
= &dfl_bus_type
;
477 return driver_register(&dfl_drv
->drv
);
479 EXPORT_SYMBOL(__dfl_driver_register
);
481 void dfl_driver_unregister(struct dfl_driver
*dfl_drv
)
483 driver_unregister(&dfl_drv
->drv
);
485 EXPORT_SYMBOL(dfl_driver_unregister
);
487 #define is_header_feature(feature) ((feature)->id == FEATURE_ID_FIU_HEADER)
490 * dfl_fpga_dev_feature_uinit - uinit for sub features of dfl feature device
491 * @pdev: feature device.
493 void dfl_fpga_dev_feature_uinit(struct platform_device
*pdev
)
495 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
496 struct dfl_feature
*feature
;
498 dfl_devs_remove(pdata
);
500 dfl_fpga_dev_for_each_feature(pdata
, feature
) {
502 if (feature
->ops
->uinit
)
503 feature
->ops
->uinit(pdev
, feature
);
508 EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_uinit
);
510 static int dfl_feature_instance_init(struct platform_device
*pdev
,
511 struct dfl_feature_platform_data
*pdata
,
512 struct dfl_feature
*feature
,
513 struct dfl_feature_driver
*drv
)
518 if (!is_header_feature(feature
)) {
519 base
= devm_platform_ioremap_resource(pdev
,
520 feature
->resource_index
);
523 "ioremap failed for feature 0x%x!\n",
525 return PTR_ERR(base
);
528 feature
->ioaddr
= base
;
531 if (drv
->ops
->init
) {
532 ret
= drv
->ops
->init(pdev
, feature
);
537 feature
->ops
= drv
->ops
;
542 static bool dfl_feature_drv_match(struct dfl_feature
*feature
,
543 struct dfl_feature_driver
*driver
)
545 const struct dfl_feature_id
*ids
= driver
->id_table
;
549 if (ids
->id
== feature
->id
)
558 * dfl_fpga_dev_feature_init - init for sub features of dfl feature device
559 * @pdev: feature device.
560 * @feature_drvs: drvs for sub features.
562 * This function will match sub features with given feature drvs list and
563 * use matched drv to init related sub feature.
565 * Return: 0 on success, negative error code otherwise.
567 int dfl_fpga_dev_feature_init(struct platform_device
*pdev
,
568 struct dfl_feature_driver
*feature_drvs
)
570 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
571 struct dfl_feature_driver
*drv
= feature_drvs
;
572 struct dfl_feature
*feature
;
576 dfl_fpga_dev_for_each_feature(pdata
, feature
) {
577 if (dfl_feature_drv_match(feature
, drv
)) {
578 ret
= dfl_feature_instance_init(pdev
, pdata
,
587 ret
= dfl_devs_add(pdata
);
593 dfl_fpga_dev_feature_uinit(pdev
);
596 EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_init
);
598 static void dfl_chardev_uinit(void)
602 for (i
= 0; i
< DFL_FPGA_DEVT_MAX
; i
++)
603 if (MAJOR(dfl_chrdevs
[i
].devt
)) {
604 unregister_chrdev_region(dfl_chrdevs
[i
].devt
,
606 dfl_chrdevs
[i
].devt
= MKDEV(0, 0);
610 static int dfl_chardev_init(void)
614 for (i
= 0; i
< DFL_FPGA_DEVT_MAX
; i
++) {
615 ret
= alloc_chrdev_region(&dfl_chrdevs
[i
].devt
, 0,
616 MINORMASK
+ 1, dfl_chrdevs
[i
].name
);
628 static dev_t
dfl_get_devt(enum dfl_fpga_devt_type type
, int id
)
630 if (type
>= DFL_FPGA_DEVT_MAX
)
633 return MKDEV(MAJOR(dfl_chrdevs
[type
].devt
), id
);
637 * dfl_fpga_dev_ops_register - register cdev ops for feature dev
639 * @pdev: feature dev.
640 * @fops: file operations for feature dev's cdev.
641 * @owner: owning module/driver.
643 * Return: 0 on success, negative error code otherwise.
645 int dfl_fpga_dev_ops_register(struct platform_device
*pdev
,
646 const struct file_operations
*fops
,
647 struct module
*owner
)
649 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
651 cdev_init(&pdata
->cdev
, fops
);
652 pdata
->cdev
.owner
= owner
;
655 * set parent to the feature device so that its refcount is
656 * decreased after the last refcount of cdev is gone, that
657 * makes sure the feature device is valid during device
660 pdata
->cdev
.kobj
.parent
= &pdev
->dev
.kobj
;
662 return cdev_add(&pdata
->cdev
, pdev
->dev
.devt
, 1);
664 EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_register
);
667 * dfl_fpga_dev_ops_unregister - unregister cdev ops for feature dev
668 * @pdev: feature dev.
670 void dfl_fpga_dev_ops_unregister(struct platform_device
*pdev
)
672 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
674 cdev_del(&pdata
->cdev
);
676 EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister
);
679 * struct build_feature_devs_info - info collected during feature dev build.
681 * @dev: device to enumerate.
682 * @cdev: the container device for all feature devices.
683 * @nr_irqs: number of irqs for all feature devices.
684 * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
686 * @feature_dev: current feature device.
687 * @ioaddr: header register region address of current FIU in enumeration.
688 * @start: register resource start of current FIU.
689 * @len: max register resource length of current FIU.
690 * @sub_features: a sub features linked list for feature device in enumeration.
691 * @feature_num: number of sub features for feature device in enumeration.
693 struct build_feature_devs_info
{
695 struct dfl_fpga_cdev
*cdev
;
696 unsigned int nr_irqs
;
699 struct platform_device
*feature_dev
;
700 void __iomem
*ioaddr
;
701 resource_size_t start
;
703 struct list_head sub_features
;
708 * struct dfl_feature_info - sub feature info collected during feature dev build
710 * @fid: id of this sub feature.
711 * @mmio_res: mmio resource of this sub feature.
712 * @ioaddr: mapped base address of mmio resource.
713 * @node: node in sub_features linked list.
714 * @irq_base: start of irq index in this sub feature.
715 * @nr_irqs: number of irqs of this sub feature.
717 struct dfl_feature_info
{
720 struct resource mmio_res
;
721 void __iomem
*ioaddr
;
722 struct list_head node
;
723 unsigned int irq_base
;
724 unsigned int nr_irqs
;
727 static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev
*cdev
,
728 struct platform_device
*port
)
730 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(&port
->dev
);
732 mutex_lock(&cdev
->lock
);
733 list_add(&pdata
->node
, &cdev
->port_dev_list
);
734 get_device(&pdata
->dev
->dev
);
735 mutex_unlock(&cdev
->lock
);
739 * register current feature device, it is called when we need to switch to
740 * another feature parsing or we have parsed all features on given device
743 static int build_info_commit_dev(struct build_feature_devs_info
*binfo
)
745 struct platform_device
*fdev
= binfo
->feature_dev
;
746 struct dfl_feature_platform_data
*pdata
;
747 struct dfl_feature_info
*finfo
, *p
;
748 enum dfl_id_type type
;
749 int ret
, index
= 0, res_idx
= 0;
751 type
= feature_dev_id_type(fdev
);
752 if (WARN_ON_ONCE(type
>= DFL_ID_MAX
))
756 * we do not need to care for the memory which is associated with
757 * the platform device. After calling platform_device_unregister(),
758 * it will be automatically freed by device's release() callback,
759 * platform_device_release().
761 pdata
= kzalloc(struct_size(pdata
, features
, binfo
->feature_num
), GFP_KERNEL
);
766 pdata
->num
= binfo
->feature_num
;
767 pdata
->dfl_cdev
= binfo
->cdev
;
768 pdata
->id
= FEATURE_DEV_ID_UNUSED
;
769 mutex_init(&pdata
->lock
);
770 lockdep_set_class_and_name(&pdata
->lock
, &dfl_pdata_keys
[type
],
771 dfl_pdata_key_strings
[type
]);
774 * the count should be initialized to 0 to make sure
775 *__fpga_port_enable() following __fpga_port_disable()
776 * works properly for port device.
777 * and it should always be 0 for fme device.
779 WARN_ON(pdata
->disable_count
);
781 fdev
->dev
.platform_data
= pdata
;
783 /* each sub feature has one MMIO resource */
784 fdev
->num_resources
= binfo
->feature_num
;
785 fdev
->resource
= kcalloc(binfo
->feature_num
, sizeof(*fdev
->resource
),
790 /* fill features and resource information for feature dev */
791 list_for_each_entry_safe(finfo
, p
, &binfo
->sub_features
, node
) {
792 struct dfl_feature
*feature
= &pdata
->features
[index
++];
793 struct dfl_feature_irq_ctx
*ctx
;
796 /* save resource information for each feature */
798 feature
->id
= finfo
->fid
;
799 feature
->revision
= finfo
->revision
;
802 * the FIU header feature has some fundamental functions (sriov
803 * set, port enable/disable) needed for the dfl bus device and
804 * other sub features. So its mmio resource should be mapped by
805 * DFL bus device. And we should not assign it to feature
806 * devices (dfl-fme/afu) again.
808 if (is_header_feature(feature
)) {
809 feature
->resource_index
= -1;
811 devm_ioremap_resource(binfo
->dev
,
813 if (IS_ERR(feature
->ioaddr
))
814 return PTR_ERR(feature
->ioaddr
);
816 feature
->resource_index
= res_idx
;
817 fdev
->resource
[res_idx
++] = finfo
->mmio_res
;
820 if (finfo
->nr_irqs
) {
821 ctx
= devm_kcalloc(binfo
->dev
, finfo
->nr_irqs
,
822 sizeof(*ctx
), GFP_KERNEL
);
826 for (i
= 0; i
< finfo
->nr_irqs
; i
++)
828 binfo
->irq_table
[finfo
->irq_base
+ i
];
830 feature
->irq_ctx
= ctx
;
831 feature
->nr_irqs
= finfo
->nr_irqs
;
834 list_del(&finfo
->node
);
838 ret
= platform_device_add(binfo
->feature_dev
);
841 dfl_fpga_cdev_add_port_dev(binfo
->cdev
,
844 binfo
->cdev
->fme_dev
=
845 get_device(&binfo
->feature_dev
->dev
);
847 * reset it to avoid build_info_free() freeing their resource.
849 * The resource of successfully registered feature devices
850 * will be freed by platform_device_unregister(). See the
851 * comments in build_info_create_dev().
853 binfo
->feature_dev
= NULL
;
860 build_info_create_dev(struct build_feature_devs_info
*binfo
,
861 enum dfl_id_type type
)
863 struct platform_device
*fdev
;
865 if (type
>= DFL_ID_MAX
)
869 * we use -ENODEV as the initialization indicator which indicates
870 * whether the id need to be reclaimed
872 fdev
= platform_device_alloc(dfl_devs
[type
].name
, -ENODEV
);
876 binfo
->feature_dev
= fdev
;
877 binfo
->feature_num
= 0;
879 INIT_LIST_HEAD(&binfo
->sub_features
);
881 fdev
->id
= dfl_id_alloc(type
, &fdev
->dev
);
885 fdev
->dev
.parent
= &binfo
->cdev
->region
->dev
;
886 fdev
->dev
.devt
= dfl_get_devt(dfl_devs
[type
].devt_type
, fdev
->id
);
891 static void build_info_free(struct build_feature_devs_info
*binfo
)
893 struct dfl_feature_info
*finfo
, *p
;
896 * it is a valid id, free it. See comments in
897 * build_info_create_dev()
899 if (binfo
->feature_dev
&& binfo
->feature_dev
->id
>= 0) {
900 dfl_id_free(feature_dev_id_type(binfo
->feature_dev
),
901 binfo
->feature_dev
->id
);
903 list_for_each_entry_safe(finfo
, p
, &binfo
->sub_features
, node
) {
904 list_del(&finfo
->node
);
909 platform_device_put(binfo
->feature_dev
);
911 devm_kfree(binfo
->dev
, binfo
);
914 static inline u32
feature_size(u64 value
)
916 u32 ofst
= FIELD_GET(DFH_NEXT_HDR_OFST
, value
);
917 /* workaround for private features with invalid size, use 4K instead */
918 return ofst
? ofst
: 4096;
921 static u16
feature_id(u64 value
)
923 u16 id
= FIELD_GET(DFH_ID
, value
);
924 u8 type
= FIELD_GET(DFH_TYPE
, value
);
926 if (type
== DFH_TYPE_FIU
)
927 return FEATURE_ID_FIU_HEADER
;
928 else if (type
== DFH_TYPE_PRIVATE
)
930 else if (type
== DFH_TYPE_AFU
)
931 return FEATURE_ID_AFU
;
937 static int parse_feature_irqs(struct build_feature_devs_info
*binfo
,
938 resource_size_t ofst
, u16 fid
,
939 unsigned int *irq_base
, unsigned int *nr_irqs
)
941 void __iomem
*base
= binfo
->ioaddr
+ ofst
;
942 unsigned int i
, ibase
, inr
= 0;
947 * Ideally DFL framework should only read info from DFL header, but
948 * current version DFL only provides mmio resources information for
949 * each feature in DFL Header, no field for interrupt resources.
950 * Interrupt resource information is provided by specific mmio
951 * registers of each private feature which supports interrupt. So in
952 * order to parse and assign irq resources, DFL framework has to look
953 * into specific capability registers of these private features.
955 * Once future DFL version supports generic interrupt resource
956 * information in common DFL headers, the generic interrupt parsing
957 * code will be added. But in order to be compatible to old version
958 * DFL, the driver may still fall back to these quirks.
961 case PORT_FEATURE_ID_UINT
:
962 v
= readq(base
+ PORT_UINT_CAP
);
963 ibase
= FIELD_GET(PORT_UINT_CAP_FST_VECT
, v
);
964 inr
= FIELD_GET(PORT_UINT_CAP_INT_NUM
, v
);
966 case PORT_FEATURE_ID_ERROR
:
967 v
= readq(base
+ PORT_ERROR_CAP
);
968 ibase
= FIELD_GET(PORT_ERROR_CAP_INT_VECT
, v
);
969 inr
= FIELD_GET(PORT_ERROR_CAP_SUPP_INT
, v
);
971 case FME_FEATURE_ID_GLOBAL_ERR
:
972 v
= readq(base
+ FME_ERROR_CAP
);
973 ibase
= FIELD_GET(FME_ERROR_CAP_INT_VECT
, v
);
974 inr
= FIELD_GET(FME_ERROR_CAP_SUPP_INT
, v
);
984 dev_dbg(binfo
->dev
, "feature: 0x%x, irq_base: %u, nr_irqs: %u\n",
987 if (ibase
+ inr
> binfo
->nr_irqs
) {
989 "Invalid interrupt number in feature 0x%x\n", fid
);
993 for (i
= 0; i
< inr
; i
++) {
994 virq
= binfo
->irq_table
[ibase
+ i
];
995 if (virq
< 0 || virq
> NR_IRQS
) {
997 "Invalid irq table entry for feature 0x%x\n",
1010 * when create sub feature instances, for private features, it doesn't need
1011 * to provide resource size and feature id as they could be read from DFH
1012 * register. For afu sub feature, its register region only contains user
1013 * defined registers, so never trust any information from it, just use the
1014 * resource size information provided by its parent FIU.
1017 create_feature_instance(struct build_feature_devs_info
*binfo
,
1018 resource_size_t ofst
, resource_size_t size
, u16 fid
)
1020 unsigned int irq_base
, nr_irqs
;
1021 struct dfl_feature_info
*finfo
;
1026 if (fid
!= FEATURE_ID_AFU
) {
1027 v
= readq(binfo
->ioaddr
+ ofst
);
1028 revision
= FIELD_GET(DFH_REVISION
, v
);
1030 /* read feature size and id if inputs are invalid */
1031 size
= size
? size
: feature_size(v
);
1032 fid
= fid
? fid
: feature_id(v
);
1035 if (binfo
->len
- ofst
< size
)
1038 ret
= parse_feature_irqs(binfo
, ofst
, fid
, &irq_base
, &nr_irqs
);
1042 finfo
= kzalloc(sizeof(*finfo
), GFP_KERNEL
);
1047 finfo
->revision
= revision
;
1048 finfo
->mmio_res
.start
= binfo
->start
+ ofst
;
1049 finfo
->mmio_res
.end
= finfo
->mmio_res
.start
+ size
- 1;
1050 finfo
->mmio_res
.flags
= IORESOURCE_MEM
;
1051 finfo
->irq_base
= irq_base
;
1052 finfo
->nr_irqs
= nr_irqs
;
1054 list_add_tail(&finfo
->node
, &binfo
->sub_features
);
1055 binfo
->feature_num
++;
1060 static int parse_feature_port_afu(struct build_feature_devs_info
*binfo
,
1061 resource_size_t ofst
)
1063 u64 v
= readq(binfo
->ioaddr
+ PORT_HDR_CAP
);
1064 u32 size
= FIELD_GET(PORT_CAP_MMIO_SIZE
, v
) << 10;
1068 return create_feature_instance(binfo
, ofst
, size
, FEATURE_ID_AFU
);
1071 #define is_feature_dev_detected(binfo) (!!(binfo)->feature_dev)
1073 static int parse_feature_afu(struct build_feature_devs_info
*binfo
,
1074 resource_size_t ofst
)
1076 if (!is_feature_dev_detected(binfo
)) {
1077 dev_err(binfo
->dev
, "this AFU does not belong to any FIU.\n");
1081 switch (feature_dev_id_type(binfo
->feature_dev
)) {
1083 return parse_feature_port_afu(binfo
, ofst
);
1085 dev_info(binfo
->dev
, "AFU belonging to FIU %s is not supported yet.\n",
1086 binfo
->feature_dev
->name
);
1092 static int build_info_prepare(struct build_feature_devs_info
*binfo
,
1093 resource_size_t start
, resource_size_t len
)
1095 struct device
*dev
= binfo
->dev
;
1096 void __iomem
*ioaddr
;
1098 if (!devm_request_mem_region(dev
, start
, len
, dev_name(dev
))) {
1099 dev_err(dev
, "request region fail, start:%pa, len:%pa\n",
1104 ioaddr
= devm_ioremap(dev
, start
, len
);
1106 dev_err(dev
, "ioremap region fail, start:%pa, len:%pa\n",
1111 binfo
->start
= start
;
1113 binfo
->ioaddr
= ioaddr
;
1118 static void build_info_complete(struct build_feature_devs_info
*binfo
)
1120 devm_iounmap(binfo
->dev
, binfo
->ioaddr
);
1121 devm_release_mem_region(binfo
->dev
, binfo
->start
, binfo
->len
);
1124 static int parse_feature_fiu(struct build_feature_devs_info
*binfo
,
1125 resource_size_t ofst
)
1132 if (is_feature_dev_detected(binfo
)) {
1133 build_info_complete(binfo
);
1135 ret
= build_info_commit_dev(binfo
);
1139 ret
= build_info_prepare(binfo
, binfo
->start
+ ofst
,
1145 v
= readq(binfo
->ioaddr
+ DFH
);
1146 id
= FIELD_GET(DFH_ID
, v
);
1148 /* create platform device for dfl feature dev */
1149 ret
= build_info_create_dev(binfo
, dfh_id_to_type(id
));
1153 ret
= create_feature_instance(binfo
, 0, 0, 0);
1157 * find and parse FIU's child AFU via its NEXT_AFU register.
1158 * please note that only Port has valid NEXT_AFU pointer per spec.
1160 v
= readq(binfo
->ioaddr
+ NEXT_AFU
);
1162 offset
= FIELD_GET(NEXT_AFU_NEXT_DFH_OFST
, v
);
1164 return parse_feature_afu(binfo
, offset
);
1166 dev_dbg(binfo
->dev
, "No AFUs detected on FIU %d\n", id
);
1171 static int parse_feature_private(struct build_feature_devs_info
*binfo
,
1172 resource_size_t ofst
)
1174 if (!is_feature_dev_detected(binfo
)) {
1175 dev_err(binfo
->dev
, "the private feature 0x%x does not belong to any AFU.\n",
1176 feature_id(readq(binfo
->ioaddr
+ ofst
)));
1180 return create_feature_instance(binfo
, ofst
, 0, 0);
1184 * parse_feature - parse a feature on given device feature list
1186 * @binfo: build feature devices information.
1187 * @ofst: offset to current FIU header
1189 static int parse_feature(struct build_feature_devs_info
*binfo
,
1190 resource_size_t ofst
)
1195 v
= readq(binfo
->ioaddr
+ ofst
+ DFH
);
1196 type
= FIELD_GET(DFH_TYPE
, v
);
1200 return parse_feature_afu(binfo
, ofst
);
1201 case DFH_TYPE_PRIVATE
:
1202 return parse_feature_private(binfo
, ofst
);
1204 return parse_feature_fiu(binfo
, ofst
);
1206 dev_info(binfo
->dev
,
1207 "Feature Type %x is not supported.\n", type
);
1213 static int parse_feature_list(struct build_feature_devs_info
*binfo
,
1214 resource_size_t start
, resource_size_t len
)
1216 resource_size_t end
= start
+ len
;
1221 ret
= build_info_prepare(binfo
, start
, len
);
1225 /* walk through the device feature list via DFH's next DFH pointer. */
1226 for (; start
< end
; start
+= ofst
) {
1227 if (end
- start
< DFH_SIZE
) {
1228 dev_err(binfo
->dev
, "The region is too small to contain a feature.\n");
1232 ret
= parse_feature(binfo
, start
- binfo
->start
);
1236 v
= readq(binfo
->ioaddr
+ start
- binfo
->start
+ DFH
);
1237 ofst
= FIELD_GET(DFH_NEXT_HDR_OFST
, v
);
1239 /* stop parsing if EOL(End of List) is set or offset is 0 */
1240 if ((v
& DFH_EOL
) || !ofst
)
1244 /* commit current feature device when reach the end of list */
1245 build_info_complete(binfo
);
1247 if (is_feature_dev_detected(binfo
))
1248 ret
= build_info_commit_dev(binfo
);
1253 struct dfl_fpga_enum_info
*dfl_fpga_enum_info_alloc(struct device
*dev
)
1255 struct dfl_fpga_enum_info
*info
;
1259 info
= devm_kzalloc(dev
, sizeof(*info
), GFP_KERNEL
);
1266 INIT_LIST_HEAD(&info
->dfls
);
1270 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_alloc
);
1272 void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info
*info
)
1274 struct dfl_fpga_enum_dfl
*tmp
, *dfl
;
1282 /* remove all device feature lists in the list. */
1283 list_for_each_entry_safe(dfl
, tmp
, &info
->dfls
, node
) {
1284 list_del(&dfl
->node
);
1285 devm_kfree(dev
, dfl
);
1288 /* remove irq table */
1289 if (info
->irq_table
)
1290 devm_kfree(dev
, info
->irq_table
);
1292 devm_kfree(dev
, info
);
1295 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_free
);
1298 * dfl_fpga_enum_info_add_dfl - add info of a device feature list to enum info
1300 * @info: ptr to dfl_fpga_enum_info
1301 * @start: mmio resource address of the device feature list.
1302 * @len: mmio resource length of the device feature list.
1304 * One FPGA device may have one or more Device Feature Lists (DFLs), use this
1305 * function to add information of each DFL to common data structure for next
1308 * Return: 0 on success, negative error code otherwise.
1310 int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info
*info
,
1311 resource_size_t start
, resource_size_t len
)
1313 struct dfl_fpga_enum_dfl
*dfl
;
1315 dfl
= devm_kzalloc(info
->dev
, sizeof(*dfl
), GFP_KERNEL
);
1322 list_add_tail(&dfl
->node
, &info
->dfls
);
1326 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl
);
1329 * dfl_fpga_enum_info_add_irq - add irq table to enum info
1331 * @info: ptr to dfl_fpga_enum_info
1332 * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
1333 * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
1336 * One FPGA device may have several interrupts. This function adds irq
1337 * information of the DFL fpga device to enum info for next step enumeration.
1338 * This function should be called before dfl_fpga_feature_devs_enumerate().
1339 * As we only support one irq domain for all DFLs in the same enum info, adding
1340 * irq table a second time for the same enum info will return error.
1342 * If we need to enumerate DFLs which belong to different irq domains, we
1343 * should fill more enum info and enumerate them one by one.
1345 * Return: 0 on success, negative error code otherwise.
1347 int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info
*info
,
1348 unsigned int nr_irqs
, int *irq_table
)
1350 if (!nr_irqs
|| !irq_table
)
1353 if (info
->irq_table
)
1356 info
->irq_table
= devm_kmemdup(info
->dev
, irq_table
,
1357 sizeof(int) * nr_irqs
, GFP_KERNEL
);
1358 if (!info
->irq_table
)
1361 info
->nr_irqs
= nr_irqs
;
1365 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq
);
1367 static int remove_feature_dev(struct device
*dev
, void *data
)
1369 struct platform_device
*pdev
= to_platform_device(dev
);
1370 enum dfl_id_type type
= feature_dev_id_type(pdev
);
1373 platform_device_unregister(pdev
);
1375 dfl_id_free(type
, id
);
1380 static void remove_feature_devs(struct dfl_fpga_cdev
*cdev
)
1382 device_for_each_child(&cdev
->region
->dev
, NULL
, remove_feature_dev
);
1386 * dfl_fpga_feature_devs_enumerate - enumerate feature devices
1387 * @info: information for enumeration.
1389 * This function creates a container device (base FPGA region), enumerates
1390 * feature devices based on the enumeration info and creates platform devices
1391 * under the container device.
1393 * Return: dfl_fpga_cdev struct on success, -errno on failure
1395 struct dfl_fpga_cdev
*
1396 dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info
*info
)
1398 struct build_feature_devs_info
*binfo
;
1399 struct dfl_fpga_enum_dfl
*dfl
;
1400 struct dfl_fpga_cdev
*cdev
;
1404 return ERR_PTR(-ENODEV
);
1406 cdev
= devm_kzalloc(info
->dev
, sizeof(*cdev
), GFP_KERNEL
);
1408 return ERR_PTR(-ENOMEM
);
1410 cdev
->region
= devm_fpga_region_create(info
->dev
, NULL
, NULL
);
1411 if (!cdev
->region
) {
1413 goto free_cdev_exit
;
1416 cdev
->parent
= info
->dev
;
1417 mutex_init(&cdev
->lock
);
1418 INIT_LIST_HEAD(&cdev
->port_dev_list
);
1420 ret
= fpga_region_register(cdev
->region
);
1422 goto free_cdev_exit
;
1424 /* create and init build info for enumeration */
1425 binfo
= devm_kzalloc(info
->dev
, sizeof(*binfo
), GFP_KERNEL
);
1428 goto unregister_region_exit
;
1431 binfo
->dev
= info
->dev
;
1434 binfo
->nr_irqs
= info
->nr_irqs
;
1436 binfo
->irq_table
= info
->irq_table
;
1439 * start enumeration for all feature devices based on Device Feature
1442 list_for_each_entry(dfl
, &info
->dfls
, node
) {
1443 ret
= parse_feature_list(binfo
, dfl
->start
, dfl
->len
);
1445 remove_feature_devs(cdev
);
1446 build_info_free(binfo
);
1447 goto unregister_region_exit
;
1451 build_info_free(binfo
);
1455 unregister_region_exit
:
1456 fpga_region_unregister(cdev
->region
);
1458 devm_kfree(info
->dev
, cdev
);
1459 return ERR_PTR(ret
);
1461 EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_enumerate
);
1464 * dfl_fpga_feature_devs_remove - remove all feature devices
1465 * @cdev: fpga container device.
1467 * Remove the container device and all feature devices under given container
1470 void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev
*cdev
)
1472 struct dfl_feature_platform_data
*pdata
, *ptmp
;
1474 mutex_lock(&cdev
->lock
);
1476 put_device(cdev
->fme_dev
);
1478 list_for_each_entry_safe(pdata
, ptmp
, &cdev
->port_dev_list
, node
) {
1479 struct platform_device
*port_dev
= pdata
->dev
;
1481 /* remove released ports */
1482 if (!device_is_registered(&port_dev
->dev
)) {
1483 dfl_id_free(feature_dev_id_type(port_dev
),
1485 platform_device_put(port_dev
);
1488 list_del(&pdata
->node
);
1489 put_device(&port_dev
->dev
);
1491 mutex_unlock(&cdev
->lock
);
1493 remove_feature_devs(cdev
);
1495 fpga_region_unregister(cdev
->region
);
1496 devm_kfree(cdev
->parent
, cdev
);
1498 EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove
);
1501 * __dfl_fpga_cdev_find_port - find a port under given container device
1503 * @cdev: container device
1504 * @data: data passed to match function
1505 * @match: match function used to find specific port from the port device list
1507 * Find a port device under container device. This function needs to be
1508 * invoked with lock held.
1510 * Return: pointer to port's platform device if successful, NULL otherwise.
1512 * NOTE: you will need to drop the device reference with put_device() after use.
1514 struct platform_device
*
1515 __dfl_fpga_cdev_find_port(struct dfl_fpga_cdev
*cdev
, void *data
,
1516 int (*match
)(struct platform_device
*, void *))
1518 struct dfl_feature_platform_data
*pdata
;
1519 struct platform_device
*port_dev
;
1521 list_for_each_entry(pdata
, &cdev
->port_dev_list
, node
) {
1522 port_dev
= pdata
->dev
;
1524 if (match(port_dev
, data
) && get_device(&port_dev
->dev
))
1530 EXPORT_SYMBOL_GPL(__dfl_fpga_cdev_find_port
);
1532 static int __init
dfl_fpga_init(void)
1536 ret
= bus_register(&dfl_bus_type
);
1542 ret
= dfl_chardev_init();
1545 bus_unregister(&dfl_bus_type
);
1552 * dfl_fpga_cdev_release_port - release a port platform device
1554 * @cdev: parent container device.
1555 * @port_id: id of the port platform device.
1557 * This function allows user to release a port platform device. This is a
1558 * mandatory step before turn a port from PF into VF for SRIOV support.
1560 * Return: 0 on success, negative error code otherwise.
1562 int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev
*cdev
, int port_id
)
1564 struct dfl_feature_platform_data
*pdata
;
1565 struct platform_device
*port_pdev
;
1568 mutex_lock(&cdev
->lock
);
1569 port_pdev
= __dfl_fpga_cdev_find_port(cdev
, &port_id
,
1570 dfl_fpga_check_port_id
);
1574 if (!device_is_registered(&port_pdev
->dev
)) {
1579 pdata
= dev_get_platdata(&port_pdev
->dev
);
1581 mutex_lock(&pdata
->lock
);
1582 ret
= dfl_feature_dev_use_begin(pdata
, true);
1583 mutex_unlock(&pdata
->lock
);
1587 platform_device_del(port_pdev
);
1588 cdev
->released_port_num
++;
1590 put_device(&port_pdev
->dev
);
1592 mutex_unlock(&cdev
->lock
);
1595 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port
);
1598 * dfl_fpga_cdev_assign_port - assign a port platform device back
1600 * @cdev: parent container device.
1601 * @port_id: id of the port platform device.
1603 * This function allows user to assign a port platform device back. This is
1604 * a mandatory step after disable SRIOV support.
1606 * Return: 0 on success, negative error code otherwise.
1608 int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev
*cdev
, int port_id
)
1610 struct dfl_feature_platform_data
*pdata
;
1611 struct platform_device
*port_pdev
;
1614 mutex_lock(&cdev
->lock
);
1615 port_pdev
= __dfl_fpga_cdev_find_port(cdev
, &port_id
,
1616 dfl_fpga_check_port_id
);
1620 if (device_is_registered(&port_pdev
->dev
)) {
1625 ret
= platform_device_add(port_pdev
);
1629 pdata
= dev_get_platdata(&port_pdev
->dev
);
1631 mutex_lock(&pdata
->lock
);
1632 dfl_feature_dev_use_end(pdata
);
1633 mutex_unlock(&pdata
->lock
);
1635 cdev
->released_port_num
--;
1637 put_device(&port_pdev
->dev
);
1639 mutex_unlock(&cdev
->lock
);
1642 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port
);
1644 static void config_port_access_mode(struct device
*fme_dev
, int port_id
,
1650 base
= dfl_get_feature_ioaddr_by_id(fme_dev
, FME_FEATURE_ID_HEADER
);
1652 v
= readq(base
+ FME_HDR_PORT_OFST(port_id
));
1654 v
&= ~FME_PORT_OFST_ACC_CTRL
;
1655 v
|= FIELD_PREP(FME_PORT_OFST_ACC_CTRL
,
1656 is_vf
? FME_PORT_OFST_ACC_VF
: FME_PORT_OFST_ACC_PF
);
1658 writeq(v
, base
+ FME_HDR_PORT_OFST(port_id
));
1661 #define config_port_vf_mode(dev, id) config_port_access_mode(dev, id, true)
1662 #define config_port_pf_mode(dev, id) config_port_access_mode(dev, id, false)
1665 * dfl_fpga_cdev_config_ports_pf - configure ports to PF access mode
1667 * @cdev: parent container device.
1669 * This function is needed in sriov configuration routine. It could be used to
1670 * configure the all released ports from VF access mode to PF.
1672 void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev
*cdev
)
1674 struct dfl_feature_platform_data
*pdata
;
1676 mutex_lock(&cdev
->lock
);
1677 list_for_each_entry(pdata
, &cdev
->port_dev_list
, node
) {
1678 if (device_is_registered(&pdata
->dev
->dev
))
1681 config_port_pf_mode(cdev
->fme_dev
, pdata
->id
);
1683 mutex_unlock(&cdev
->lock
);
1685 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_pf
);
1688 * dfl_fpga_cdev_config_ports_vf - configure ports to VF access mode
1690 * @cdev: parent container device.
1691 * @num_vfs: VF device number.
1693 * This function is needed in sriov configuration routine. It could be used to
1694 * configure the released ports from PF access mode to VF.
1696 * Return: 0 on success, negative error code otherwise.
1698 int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev
*cdev
, int num_vfs
)
1700 struct dfl_feature_platform_data
*pdata
;
1703 mutex_lock(&cdev
->lock
);
1705 * can't turn multiple ports into 1 VF device, only 1 port for 1 VF
1706 * device, so if released port number doesn't match VF device number,
1707 * then reject the request with -EINVAL error code.
1709 if (cdev
->released_port_num
!= num_vfs
) {
1714 list_for_each_entry(pdata
, &cdev
->port_dev_list
, node
) {
1715 if (device_is_registered(&pdata
->dev
->dev
))
1718 config_port_vf_mode(cdev
->fme_dev
, pdata
->id
);
1721 mutex_unlock(&cdev
->lock
);
1724 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf
);
1726 static irqreturn_t
dfl_irq_handler(int irq
, void *arg
)
1728 struct eventfd_ctx
*trigger
= arg
;
1730 eventfd_signal(trigger
, 1);
1734 static int do_set_irq_trigger(struct dfl_feature
*feature
, unsigned int idx
,
1737 struct platform_device
*pdev
= feature
->dev
;
1738 struct eventfd_ctx
*trigger
;
1741 irq
= feature
->irq_ctx
[idx
].irq
;
1743 if (feature
->irq_ctx
[idx
].trigger
) {
1744 free_irq(irq
, feature
->irq_ctx
[idx
].trigger
);
1745 kfree(feature
->irq_ctx
[idx
].name
);
1746 eventfd_ctx_put(feature
->irq_ctx
[idx
].trigger
);
1747 feature
->irq_ctx
[idx
].trigger
= NULL
;
1753 feature
->irq_ctx
[idx
].name
=
1754 kasprintf(GFP_KERNEL
, "fpga-irq[%u](%s-%x)", idx
,
1755 dev_name(&pdev
->dev
), feature
->id
);
1756 if (!feature
->irq_ctx
[idx
].name
)
1759 trigger
= eventfd_ctx_fdget(fd
);
1760 if (IS_ERR(trigger
)) {
1761 ret
= PTR_ERR(trigger
);
1765 ret
= request_irq(irq
, dfl_irq_handler
, 0,
1766 feature
->irq_ctx
[idx
].name
, trigger
);
1768 feature
->irq_ctx
[idx
].trigger
= trigger
;
1772 eventfd_ctx_put(trigger
);
1774 kfree(feature
->irq_ctx
[idx
].name
);
1780 * dfl_fpga_set_irq_triggers - set eventfd triggers for dfl feature interrupts
1782 * @feature: dfl sub feature.
1783 * @start: start of irq index in this dfl sub feature.
1784 * @count: number of irqs.
1785 * @fds: eventfds to bind with irqs. unbind related irq if fds[n] is negative.
1786 * unbind "count" specified number of irqs if fds ptr is NULL.
1788 * Bind given eventfds with irqs in this dfl sub feature. Unbind related irq if
1789 * fds[n] is negative. Unbind "count" specified number of irqs if fds ptr is
1792 * Return: 0 on success, negative error code otherwise.
1794 int dfl_fpga_set_irq_triggers(struct dfl_feature
*feature
, unsigned int start
,
1795 unsigned int count
, int32_t *fds
)
1801 if (unlikely(start
+ count
< start
))
1804 /* exceeds nr_irqs */
1805 if (start
+ count
> feature
->nr_irqs
)
1808 for (i
= 0; i
< count
; i
++) {
1809 int fd
= fds
? fds
[i
] : -1;
1811 ret
= do_set_irq_trigger(feature
, start
+ i
, fd
);
1814 do_set_irq_trigger(feature
, start
+ i
, -1);
1821 EXPORT_SYMBOL_GPL(dfl_fpga_set_irq_triggers
);
1824 * dfl_feature_ioctl_get_num_irqs - dfl feature _GET_IRQ_NUM ioctl interface.
1825 * @pdev: the feature device which has the sub feature
1826 * @feature: the dfl sub feature
1827 * @arg: ioctl argument
1829 * Return: 0 on success, negative error code otherwise.
1831 long dfl_feature_ioctl_get_num_irqs(struct platform_device
*pdev
,
1832 struct dfl_feature
*feature
,
1835 return put_user(feature
->nr_irqs
, (__u32 __user
*)arg
);
1837 EXPORT_SYMBOL_GPL(dfl_feature_ioctl_get_num_irqs
);
1840 * dfl_feature_ioctl_set_irq - dfl feature _SET_IRQ ioctl interface.
1841 * @pdev: the feature device which has the sub feature
1842 * @feature: the dfl sub feature
1843 * @arg: ioctl argument
1845 * Return: 0 on success, negative error code otherwise.
1847 long dfl_feature_ioctl_set_irq(struct platform_device
*pdev
,
1848 struct dfl_feature
*feature
,
1851 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
1852 struct dfl_fpga_irq_set hdr
;
1856 if (!feature
->nr_irqs
)
1859 if (copy_from_user(&hdr
, (void __user
*)arg
, sizeof(hdr
)))
1862 if (!hdr
.count
|| (hdr
.start
+ hdr
.count
> feature
->nr_irqs
) ||
1863 (hdr
.start
+ hdr
.count
< hdr
.start
))
1866 fds
= memdup_user((void __user
*)(arg
+ sizeof(hdr
)),
1867 hdr
.count
* sizeof(s32
));
1869 return PTR_ERR(fds
);
1871 mutex_lock(&pdata
->lock
);
1872 ret
= dfl_fpga_set_irq_triggers(feature
, hdr
.start
, hdr
.count
, fds
);
1873 mutex_unlock(&pdata
->lock
);
1878 EXPORT_SYMBOL_GPL(dfl_feature_ioctl_set_irq
);
1880 static void __exit
dfl_fpga_exit(void)
1882 dfl_chardev_uinit();
1884 bus_unregister(&dfl_bus_type
);
1887 module_init(dfl_fpga_init
);
1888 module_exit(dfl_fpga_exit
);
1890 MODULE_DESCRIPTION("FPGA Device Feature List (DFL) Support");
1891 MODULE_AUTHOR("Intel Corporation");
1892 MODULE_LICENSE("GPL v2");