2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 * Bandwidth and Watermark calculations interface.
28 * (Refer to "DCEx_mode_support.xlsm" from Perforce.)
30 #ifndef __BANDWIDTH_CALCS_H__
31 #define __BANDWIDTH_CALCS_H__
37 enum bw_calcs_version
{
38 BW_CALCS_VERSION_INVALID
,
39 BW_CALCS_VERSION_CARRIZO
,
40 BW_CALCS_VERSION_POLARIS10
,
41 BW_CALCS_VERSION_POLARIS11
,
42 BW_CALCS_VERSION_STONEY
,
45 /*******************************************************************************
46 * There are three types of input into Calculations:
47 * 1. per-DCE static values - these are "hardcoded" properties of the DCEIP
48 * 2. board-level values - these are generally coming from VBIOS parser
49 * 3. mode/configuration values - depending Mode, Scaling number of Displays etc.
50 ******************************************************************************/
65 bw_def_underlay420_luma
,
66 bw_def_underlay420_chroma
,
69 bw_def_display_write_back420_luma
,
70 bw_def_display_write_back420_chroma
,
73 bw_def_hsr_mtn_h_taps
,
74 bw_def_ceiling__h_taps_div_4___meq_hsr
,
75 bw_def_invalid_linear_or_stereo_mode
,
76 bw_def_invalid_rotation_or_bpp_or_stereo
,
77 bw_def_vsr_mtn_v_taps
,
81 bw_def_exceeded_allowed_maximum_sclk
,
82 bw_def_exceeded_allowed_page_close_open
,
83 bw_def_exceeded_allowed_outstanding_pte_req_queue_size
,
84 bw_def_exceeded_allowed_maximum_bw
,
100 //Underlay surface type
108 bw_def_array_linear_general
,
109 bw_def_array_linear_aligned
,
110 bw_def_rotated_micro_tiling
,
111 bw_def_display_micro_tiling
,
118 bw_def_high_no_nbp_state_change
,
127 struct bw_calcs_dceip
{
128 enum bw_calcs_version version
;
130 uint32_t cursor_max_outstanding_group_num
;
131 bool dmif_pipe_en_fbc_chunk_tracker
;
132 struct bw_fixed dmif_request_buffer_size
;
133 uint32_t lines_interleaved_into_lb
;
134 uint32_t low_power_tiling_mode
;
135 uint32_t chunk_width
;
136 uint32_t number_of_graphics_pipes
;
137 uint32_t number_of_underlay_pipes
;
138 bool display_write_back_supported
;
139 bool argb_compression_support
;
140 struct bw_fixed underlay_vscaler_efficiency6_bit_per_component
;
141 struct bw_fixed underlay_vscaler_efficiency8_bit_per_component
;
142 struct bw_fixed underlay_vscaler_efficiency10_bit_per_component
;
143 struct bw_fixed underlay_vscaler_efficiency12_bit_per_component
;
144 struct bw_fixed graphics_vscaler_efficiency6_bit_per_component
;
145 struct bw_fixed graphics_vscaler_efficiency8_bit_per_component
;
146 struct bw_fixed graphics_vscaler_efficiency10_bit_per_component
;
147 struct bw_fixed graphics_vscaler_efficiency12_bit_per_component
;
148 struct bw_fixed alpha_vscaler_efficiency
;
149 uint32_t max_dmif_buffer_allocated
;
150 uint32_t graphics_dmif_size
;
151 uint32_t underlay_luma_dmif_size
;
152 uint32_t underlay_chroma_dmif_size
;
153 bool pre_downscaler_enabled
;
154 bool underlay_downscale_prefetch_enabled
;
155 struct bw_fixed lb_write_pixels_per_dispclk
;
156 struct bw_fixed lb_size_per_component444
;
157 bool graphics_lb_nodownscaling_multi_line_prefetching
;
158 struct bw_fixed stutter_and_dram_clock_state_change_gated_before_cursor
;
159 struct bw_fixed underlay420_luma_lb_size_per_component
;
160 struct bw_fixed underlay420_chroma_lb_size_per_component
;
161 struct bw_fixed underlay422_lb_size_per_component
;
162 struct bw_fixed cursor_chunk_width
;
163 struct bw_fixed cursor_dcp_buffer_lines
;
164 struct bw_fixed underlay_maximum_width_efficient_for_tiling
;
165 struct bw_fixed underlay_maximum_height_efficient_for_tiling
;
166 struct bw_fixed peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display
;
167 struct bw_fixed peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation
;
168 struct bw_fixed minimum_outstanding_pte_request_limit
;
169 struct bw_fixed maximum_total_outstanding_pte_requests_allowed_by_saw
;
170 bool limit_excessive_outstanding_dmif_requests
;
171 struct bw_fixed linear_mode_line_request_alternation_slice
;
172 uint32_t scatter_gather_lines_of_pte_prefetching_in_linear_mode
;
173 uint32_t display_write_back420_luma_mcifwr_buffer_size
;
174 uint32_t display_write_back420_chroma_mcifwr_buffer_size
;
175 struct bw_fixed request_efficiency
;
176 struct bw_fixed dispclk_per_request
;
177 struct bw_fixed dispclk_ramping_factor
;
178 struct bw_fixed display_pipe_throughput_factor
;
179 uint32_t scatter_gather_pte_request_rows_in_tiling_mode
;
180 struct bw_fixed mcifwr_all_surfaces_burst_time
;
183 struct bw_calcs_vbios
{
184 enum bw_defines memory_type
;
185 uint32_t dram_channel_width_in_bits
;
186 uint32_t number_of_dram_channels
;
187 uint32_t number_of_dram_banks
;
188 struct bw_fixed low_yclk
; /*m_hz*/
189 struct bw_fixed mid_yclk
; /*m_hz*/
190 struct bw_fixed high_yclk
; /*m_hz*/
191 struct bw_fixed low_sclk
; /*m_hz*/
192 struct bw_fixed mid1_sclk
; /*m_hz*/
193 struct bw_fixed mid2_sclk
; /*m_hz*/
194 struct bw_fixed mid3_sclk
; /*m_hz*/
195 struct bw_fixed mid4_sclk
; /*m_hz*/
196 struct bw_fixed mid5_sclk
; /*m_hz*/
197 struct bw_fixed mid6_sclk
; /*m_hz*/
198 struct bw_fixed high_sclk
; /*m_hz*/
199 struct bw_fixed low_voltage_max_dispclk
; /*m_hz*/
200 struct bw_fixed mid_voltage_max_dispclk
; /*m_hz*/
201 struct bw_fixed high_voltage_max_dispclk
; /*m_hz*/
202 struct bw_fixed low_voltage_max_phyclk
;
203 struct bw_fixed mid_voltage_max_phyclk
;
204 struct bw_fixed high_voltage_max_phyclk
;
205 struct bw_fixed data_return_bus_width
;
207 struct bw_fixed dmifmc_urgent_latency
;
208 struct bw_fixed stutter_self_refresh_exit_latency
;
209 struct bw_fixed stutter_self_refresh_entry_latency
;
210 struct bw_fixed nbp_state_change_latency
;
211 struct bw_fixed mcifwrmc_urgent_latency
;
212 bool scatter_gather_enable
;
213 struct bw_fixed down_spread_percentage
;
214 uint32_t cursor_width
;
215 uint32_t average_compression_rate
;
216 uint32_t number_of_request_slots_gmc_reserves_for_dmif_per_channel
;
217 struct bw_fixed blackout_duration
;
218 struct bw_fixed maximum_blackout_recovery_time
;
221 /*******************************************************************************
222 * Temporary data structure(s).
223 ******************************************************************************/
224 #define maximum_number_of_surfaces 12
227 struct bw_calcs_data
{
228 /* data for all displays */
229 uint32_t number_of_displays
;
230 enum bw_defines underlay_surface_type
;
231 enum bw_defines panning_and_bezel_adjustment
;
232 enum bw_defines graphics_tiling_mode
;
233 uint32_t graphics_lb_bpc
;
234 uint32_t underlay_lb_bpc
;
235 enum bw_defines underlay_tiling_mode
;
236 enum bw_defines d0_underlay_mode
;
237 bool d1_display_write_back_dwb_enable
;
238 enum bw_defines d1_underlay_mode
;
240 bool cpup_state_change_enable
;
241 bool cpuc_state_change_enable
;
242 bool nbp_state_change_enable
;
243 bool stutter_mode_enable
;
244 uint32_t y_clk_level
;
246 uint32_t number_of_underlay_surfaces
;
247 uint32_t number_of_dram_wrchannels
;
248 uint32_t chunk_request_delay
;
249 uint32_t number_of_dram_channels
;
250 enum bw_defines underlay_micro_tile_mode
;
251 enum bw_defines graphics_micro_tile_mode
;
252 struct bw_fixed max_phyclk
;
253 struct bw_fixed dram_efficiency
;
254 struct bw_fixed src_width_after_surface_type
;
255 struct bw_fixed src_height_after_surface_type
;
256 struct bw_fixed hsr_after_surface_type
;
257 struct bw_fixed vsr_after_surface_type
;
258 struct bw_fixed src_width_after_rotation
;
259 struct bw_fixed src_height_after_rotation
;
260 struct bw_fixed hsr_after_rotation
;
261 struct bw_fixed vsr_after_rotation
;
262 struct bw_fixed source_height_pixels
;
263 struct bw_fixed hsr_after_stereo
;
264 struct bw_fixed vsr_after_stereo
;
265 struct bw_fixed source_width_in_lb
;
266 struct bw_fixed lb_line_pitch
;
267 struct bw_fixed underlay_maximum_source_efficient_for_tiling
;
268 struct bw_fixed num_lines_at_frame_start
;
269 struct bw_fixed min_dmif_size_in_time
;
270 struct bw_fixed min_mcifwr_size_in_time
;
271 struct bw_fixed total_requests_for_dmif_size
;
272 struct bw_fixed peak_pte_request_to_eviction_ratio_limiting
;
273 struct bw_fixed useful_pte_per_pte_request
;
274 struct bw_fixed scatter_gather_pte_request_rows
;
275 struct bw_fixed scatter_gather_row_height
;
276 struct bw_fixed scatter_gather_pte_requests_in_vblank
;
277 struct bw_fixed inefficient_linear_pitch_in_bytes
;
278 struct bw_fixed cursor_total_data
;
279 struct bw_fixed cursor_total_request_groups
;
280 struct bw_fixed scatter_gather_total_pte_requests
;
281 struct bw_fixed scatter_gather_total_pte_request_groups
;
282 struct bw_fixed tile_width_in_pixels
;
283 struct bw_fixed dmif_total_number_of_data_request_page_close_open
;
284 struct bw_fixed mcifwr_total_number_of_data_request_page_close_open
;
285 struct bw_fixed bytes_per_page_close_open
;
286 struct bw_fixed mcifwr_total_page_close_open_time
;
287 struct bw_fixed total_requests_for_adjusted_dmif_size
;
288 struct bw_fixed total_dmifmc_urgent_trips
;
289 struct bw_fixed total_dmifmc_urgent_latency
;
290 struct bw_fixed total_display_reads_required_data
;
291 struct bw_fixed total_display_reads_required_dram_access_data
;
292 struct bw_fixed total_display_writes_required_data
;
293 struct bw_fixed total_display_writes_required_dram_access_data
;
294 struct bw_fixed display_reads_required_data
;
295 struct bw_fixed display_reads_required_dram_access_data
;
296 struct bw_fixed dmif_total_page_close_open_time
;
297 struct bw_fixed min_cursor_memory_interface_buffer_size_in_time
;
298 struct bw_fixed min_read_buffer_size_in_time
;
299 struct bw_fixed display_reads_time_for_data_transfer
;
300 struct bw_fixed display_writes_time_for_data_transfer
;
301 struct bw_fixed dmif_required_dram_bandwidth
;
302 struct bw_fixed mcifwr_required_dram_bandwidth
;
303 struct bw_fixed required_dmifmc_urgent_latency_for_page_close_open
;
304 struct bw_fixed required_mcifmcwr_urgent_latency
;
305 struct bw_fixed required_dram_bandwidth_gbyte_per_second
;
306 struct bw_fixed dram_bandwidth
;
307 struct bw_fixed dmif_required_sclk
;
308 struct bw_fixed mcifwr_required_sclk
;
309 struct bw_fixed required_sclk
;
310 struct bw_fixed downspread_factor
;
311 struct bw_fixed v_scaler_efficiency
;
312 struct bw_fixed scaler_limits_factor
;
313 struct bw_fixed display_pipe_pixel_throughput
;
314 struct bw_fixed total_dispclk_required_with_ramping
;
315 struct bw_fixed total_dispclk_required_without_ramping
;
316 struct bw_fixed total_read_request_bandwidth
;
317 struct bw_fixed total_write_request_bandwidth
;
318 struct bw_fixed dispclk_required_for_total_read_request_bandwidth
;
319 struct bw_fixed total_dispclk_required_with_ramping_with_request_bandwidth
;
320 struct bw_fixed total_dispclk_required_without_ramping_with_request_bandwidth
;
321 struct bw_fixed dispclk
;
322 struct bw_fixed blackout_recovery_time
;
323 struct bw_fixed min_pixels_per_data_fifo_entry
;
324 struct bw_fixed sclk_deep_sleep
;
325 struct bw_fixed chunk_request_time
;
326 struct bw_fixed cursor_request_time
;
327 struct bw_fixed line_source_pixels_transfer_time
;
328 struct bw_fixed dmifdram_access_efficiency
;
329 struct bw_fixed mcifwrdram_access_efficiency
;
330 struct bw_fixed total_average_bandwidth_no_compression
;
331 struct bw_fixed total_average_bandwidth
;
332 struct bw_fixed total_stutter_cycle_duration
;
333 struct bw_fixed stutter_burst_time
;
334 struct bw_fixed time_in_self_refresh
;
335 struct bw_fixed stutter_efficiency
;
336 struct bw_fixed worst_number_of_trips_to_memory
;
337 struct bw_fixed immediate_flip_time
;
338 struct bw_fixed latency_for_non_dmif_clients
;
339 struct bw_fixed latency_for_non_mcifwr_clients
;
340 struct bw_fixed dmifmc_urgent_latency_supported_in_high_sclk_and_yclk
;
341 struct bw_fixed nbp_state_dram_speed_change_margin
;
342 struct bw_fixed display_reads_time_for_data_transfer_and_urgent_latency
;
343 struct bw_fixed dram_speed_change_margin
;
344 struct bw_fixed min_vblank_dram_speed_change_margin
;
345 struct bw_fixed min_stutter_refresh_duration
;
346 uint32_t total_stutter_dmif_buffer_size
;
347 uint32_t total_bytes_requested
;
348 uint32_t min_stutter_dmif_buffer_size
;
349 uint32_t num_stutter_bursts
;
350 struct bw_fixed v_blank_nbp_state_dram_speed_change_latency_supported
;
351 struct bw_fixed nbp_state_dram_speed_change_latency_supported
;
352 bool fbc_en
[maximum_number_of_surfaces
];
353 bool lpt_en
[maximum_number_of_surfaces
];
354 bool displays_match_flag
[maximum_number_of_surfaces
];
355 bool use_alpha
[maximum_number_of_surfaces
];
356 bool orthogonal_rotation
[maximum_number_of_surfaces
];
357 bool enable
[maximum_number_of_surfaces
];
358 bool access_one_channel_only
[maximum_number_of_surfaces
];
359 bool scatter_gather_enable_for_pipe
[maximum_number_of_surfaces
];
360 bool interlace_mode
[maximum_number_of_surfaces
];
361 bool display_pstate_change_enable
[maximum_number_of_surfaces
];
362 bool line_buffer_prefetch
[maximum_number_of_surfaces
];
363 uint32_t bytes_per_pixel
[maximum_number_of_surfaces
];
364 uint32_t max_chunks_non_fbc_mode
[maximum_number_of_surfaces
];
365 uint32_t lb_bpc
[maximum_number_of_surfaces
];
366 uint32_t output_bpphdmi
[maximum_number_of_surfaces
];
367 uint32_t output_bppdp4_lane_hbr
[maximum_number_of_surfaces
];
368 uint32_t output_bppdp4_lane_hbr2
[maximum_number_of_surfaces
];
369 uint32_t output_bppdp4_lane_hbr3
[maximum_number_of_surfaces
];
370 enum bw_defines stereo_mode
[maximum_number_of_surfaces
];
371 struct bw_fixed dmif_buffer_transfer_time
[maximum_number_of_surfaces
];
372 struct bw_fixed displays_with_same_mode
[maximum_number_of_surfaces
];
373 struct bw_fixed stutter_dmif_buffer_size
[maximum_number_of_surfaces
];
374 struct bw_fixed stutter_refresh_duration
[maximum_number_of_surfaces
];
375 struct bw_fixed stutter_exit_watermark
[maximum_number_of_surfaces
];
376 struct bw_fixed stutter_entry_watermark
[maximum_number_of_surfaces
];
377 struct bw_fixed h_total
[maximum_number_of_surfaces
];
378 struct bw_fixed v_total
[maximum_number_of_surfaces
];
379 struct bw_fixed pixel_rate
[maximum_number_of_surfaces
];
380 struct bw_fixed src_width
[maximum_number_of_surfaces
];
381 struct bw_fixed pitch_in_pixels
[maximum_number_of_surfaces
];
382 struct bw_fixed pitch_in_pixels_after_surface_type
[maximum_number_of_surfaces
];
383 struct bw_fixed src_height
[maximum_number_of_surfaces
];
384 struct bw_fixed scale_ratio
[maximum_number_of_surfaces
];
385 struct bw_fixed h_taps
[maximum_number_of_surfaces
];
386 struct bw_fixed v_taps
[maximum_number_of_surfaces
];
387 struct bw_fixed h_scale_ratio
[maximum_number_of_surfaces
];
388 struct bw_fixed v_scale_ratio
[maximum_number_of_surfaces
];
389 struct bw_fixed rotation_angle
[maximum_number_of_surfaces
];
390 struct bw_fixed compression_rate
[maximum_number_of_surfaces
];
391 struct bw_fixed hsr
[maximum_number_of_surfaces
];
392 struct bw_fixed vsr
[maximum_number_of_surfaces
];
393 struct bw_fixed source_width_rounded_up_to_chunks
[maximum_number_of_surfaces
];
394 struct bw_fixed source_width_pixels
[maximum_number_of_surfaces
];
395 struct bw_fixed source_height_rounded_up_to_chunks
[maximum_number_of_surfaces
];
396 struct bw_fixed display_bandwidth
[maximum_number_of_surfaces
];
397 struct bw_fixed request_bandwidth
[maximum_number_of_surfaces
];
398 struct bw_fixed bytes_per_request
[maximum_number_of_surfaces
];
399 struct bw_fixed useful_bytes_per_request
[maximum_number_of_surfaces
];
400 struct bw_fixed lines_interleaved_in_mem_access
[maximum_number_of_surfaces
];
401 struct bw_fixed latency_hiding_lines
[maximum_number_of_surfaces
];
402 struct bw_fixed lb_partitions
[maximum_number_of_surfaces
];
403 struct bw_fixed lb_partitions_max
[maximum_number_of_surfaces
];
404 struct bw_fixed dispclk_required_with_ramping
[maximum_number_of_surfaces
];
405 struct bw_fixed dispclk_required_without_ramping
[maximum_number_of_surfaces
];
406 struct bw_fixed data_buffer_size
[maximum_number_of_surfaces
];
407 struct bw_fixed outstanding_chunk_request_limit
[maximum_number_of_surfaces
];
408 struct bw_fixed urgent_watermark
[maximum_number_of_surfaces
];
409 struct bw_fixed nbp_state_change_watermark
[maximum_number_of_surfaces
];
410 struct bw_fixed v_filter_init
[maximum_number_of_surfaces
];
411 struct bw_fixed stutter_cycle_duration
[maximum_number_of_surfaces
];
412 struct bw_fixed average_bandwidth
[maximum_number_of_surfaces
];
413 struct bw_fixed average_bandwidth_no_compression
[maximum_number_of_surfaces
];
414 struct bw_fixed scatter_gather_pte_request_limit
[maximum_number_of_surfaces
];
415 struct bw_fixed lb_size_per_component
[maximum_number_of_surfaces
];
416 struct bw_fixed memory_chunk_size_in_bytes
[maximum_number_of_surfaces
];
417 struct bw_fixed pipe_chunk_size_in_bytes
[maximum_number_of_surfaces
];
418 struct bw_fixed number_of_trips_to_memory_for_getting_apte_row
[maximum_number_of_surfaces
];
419 struct bw_fixed adjusted_data_buffer_size
[maximum_number_of_surfaces
];
420 struct bw_fixed adjusted_data_buffer_size_in_memory
[maximum_number_of_surfaces
];
421 struct bw_fixed pixels_per_data_fifo_entry
[maximum_number_of_surfaces
];
422 struct bw_fixed scatter_gather_pte_requests_in_row
[maximum_number_of_surfaces
];
423 struct bw_fixed pte_request_per_chunk
[maximum_number_of_surfaces
];
424 struct bw_fixed scatter_gather_page_width
[maximum_number_of_surfaces
];
425 struct bw_fixed scatter_gather_page_height
[maximum_number_of_surfaces
];
426 struct bw_fixed lb_lines_in_per_line_out_in_beginning_of_frame
[maximum_number_of_surfaces
];
427 struct bw_fixed lb_lines_in_per_line_out_in_middle_of_frame
[maximum_number_of_surfaces
];
428 struct bw_fixed cursor_width_pixels
[maximum_number_of_surfaces
];
429 struct bw_fixed minimum_latency_hiding
[maximum_number_of_surfaces
];
430 struct bw_fixed maximum_latency_hiding
[maximum_number_of_surfaces
];
431 struct bw_fixed minimum_latency_hiding_with_cursor
[maximum_number_of_surfaces
];
432 struct bw_fixed maximum_latency_hiding_with_cursor
[maximum_number_of_surfaces
];
433 struct bw_fixed src_pixels_for_first_output_pixel
[maximum_number_of_surfaces
];
434 struct bw_fixed src_pixels_for_last_output_pixel
[maximum_number_of_surfaces
];
435 struct bw_fixed src_data_for_first_output_pixel
[maximum_number_of_surfaces
];
436 struct bw_fixed src_data_for_last_output_pixel
[maximum_number_of_surfaces
];
437 struct bw_fixed active_time
[maximum_number_of_surfaces
];
438 struct bw_fixed horizontal_blank_and_chunk_granularity_factor
[maximum_number_of_surfaces
];
439 struct bw_fixed cursor_latency_hiding
[maximum_number_of_surfaces
];
440 struct bw_fixed v_blank_dram_speed_change_margin
[maximum_number_of_surfaces
];
441 uint32_t num_displays_with_margin
[3][8];
442 struct bw_fixed dmif_burst_time
[3][8];
443 struct bw_fixed mcifwr_burst_time
[3][8];
444 struct bw_fixed line_source_transfer_time
[maximum_number_of_surfaces
][3][8];
445 struct bw_fixed dram_speed_change_line_source_transfer_time
[maximum_number_of_surfaces
][3][8];
446 struct bw_fixed min_dram_speed_change_margin
[3][8];
447 struct bw_fixed dispclk_required_for_dram_speed_change
[3][8];
448 struct bw_fixed blackout_duration_margin
[3][8];
449 struct bw_fixed dispclk_required_for_blackout_duration
[3][8];
450 struct bw_fixed dispclk_required_for_blackout_recovery
[3][8];
451 struct bw_fixed dmif_required_sclk_for_urgent_latency
[6];
454 /*******************************************************************************
455 * Output data structures.
456 ******************************************************************************/
457 struct bw_watermarks
{
464 struct bw_calcs_output
{
465 bool cpuc_state_change_enable
;
466 bool cpup_state_change_enable
;
467 bool stutter_mode_enable
;
468 bool nbp_state_change_enable
;
469 bool all_displays_in_sync
;
470 struct bw_watermarks urgent_wm_ns
[6];
471 struct bw_watermarks stutter_exit_wm_ns
[6];
472 struct bw_watermarks nbp_state_change_wm_ns
[6];
473 uint32_t required_sclk
;
474 uint32_t required_sclk_deep_sleep
;
475 uint32_t required_yclk
;
476 uint32_t dispclk_khz
;
477 int blackout_recovery_time_us
;
481 * Initialize structures with data which will NOT change at runtime.
484 struct bw_calcs_dceip
*bw_dceip
,
485 struct bw_calcs_vbios
*bw_vbios
,
486 struct hw_asic_id asic_id
);
490 * true - Display(s) configuration supported.
491 * In this case 'calcs_output' contains data for HW programming
492 * false - Display(s) configuration not supported (not enough bandwidth).
495 struct dc_context
*ctx
,
496 const struct bw_calcs_dceip
*dceip
,
497 const struct bw_calcs_vbios
*vbios
,
498 const struct pipe_ctx
*pipe
,
500 struct bw_calcs_output
*calcs_output
);
502 #endif /* __BANDWIDTH_CALCS_H__ */