drivers/gpu/drm/amd/display/include/display_clock_interface.h

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef __DISPLAY_CLOCK_INTERFACE_H__
  27 #define __DISPLAY_CLOCK_INTERFACE_H__
  28
  29 #include "hw_sequencer_types.h"
  30 #include "grph_object_defs.h"
  31 #include "signal_types.h"
  32
  33 /* Enumeration of all clocks states */
  34 enum clocks_state {
  35         CLOCKS_STATE_INVALID = 0,
  36         CLOCKS_STATE_ULTRA_LOW,
  37         CLOCKS_STATE_LOW,
  38         CLOCKS_STATE_NOMINAL,
  39         CLOCKS_STATE_PERFORMANCE,
  40         /* Starting from DCE11, Max 8 level DPM state supported */
  41         CLOCKS_DPM_STATE_LEVEL_INVALID = CLOCKS_STATE_INVALID,
  42         CLOCKS_DPM_STATE_LEVEL_0 = CLOCKS_STATE_ULTRA_LOW,
  43         CLOCKS_DPM_STATE_LEVEL_1 = CLOCKS_STATE_LOW,
  44         CLOCKS_DPM_STATE_LEVEL_2 = CLOCKS_STATE_NOMINAL,
  45         CLOCKS_DPM_STATE_LEVEL_3 = CLOCKS_STATE_PERFORMANCE,
  46         CLOCKS_DPM_STATE_LEVEL_4 = CLOCKS_DPM_STATE_LEVEL_3 + 1,
  47         CLOCKS_DPM_STATE_LEVEL_5 = CLOCKS_DPM_STATE_LEVEL_4 + 1,
  48         CLOCKS_DPM_STATE_LEVEL_6 = CLOCKS_DPM_STATE_LEVEL_5 + 1,
  49         CLOCKS_DPM_STATE_LEVEL_7 = CLOCKS_DPM_STATE_LEVEL_6 + 1,
  50 };
  51
  52 /* Structure containing all state-dependent clocks
  53  * (dependent on "enum clocks_state") */
  54 struct state_dependent_clocks {
  55         uint32_t display_clk_khz;
  56         uint32_t pixel_clk_khz;
  57 };
  58
  59 struct display_clock {
  60         struct dc_context *ctx;
  61         const struct display_clock_funcs *funcs;
  62         uint32_t min_display_clk_threshold_khz;
  63         enum clock_source_id id;
  64
  65         enum clocks_state cur_min_clks_state;
  66 };
  67
  68 struct display_clock_funcs {
  69         void (*destroy)(struct display_clock **to_destroy);
  70         void (*set_clock)(struct display_clock *disp_clk,
  71                 uint32_t requested_clock_khz);
  72         enum clocks_state (*get_min_clocks_state)(
  73                 struct display_clock *disp_clk);
  74         enum clocks_state (*get_required_clocks_state)(
  75                 struct display_clock *disp_clk,
  76                 struct state_dependent_clocks *req_clocks);
  77         bool (*set_min_clocks_state)(struct display_clock *disp_clk,
  78                 enum clocks_state clocks_state);
  79         uint32_t (*get_dp_ref_clk_frequency)(struct display_clock *disp_clk);
  80         void (*store_max_clocks_state)(struct display_clock *disp_clk,
  81                 enum clocks_state max_clocks_state);
  82
  83 };
  84
  85 struct display_clock *dal_display_clock_dce112_create(
  86         struct dc_context *ctx);
  87
  88 struct display_clock *dal_display_clock_dce110_create(
  89         struct dc_context *ctx);
  90
  91 struct display_clock *dal_display_clock_dce80_create(
  92         struct dc_context *ctx);
  93
  94 void dal_display_clock_destroy(struct display_clock **to_destroy);
  95
  96 #endif /* __DISPLAY_CLOCK_INTERFACE_H__ */