drivers/gpu/drm/i915/intel_audio.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/component.h>
  26 #include <drm/i915_component.h>
  27 #include "intel_drv.h"
  28
  29 #include <drm/drmP.h>
  30 #include <drm/drm_edid.h>
  31 #include "i915_drv.h"
  32
  33 /**
  34  * DOC: High Definition Audio over HDMI and Display Port
  35  *
  36  * The graphics and audio drivers together support High Definition Audio over
  37  * HDMI and Display Port. The audio programming sequences are divided into audio
  38  * codec and controller enable and disable sequences. The graphics driver
  39  * handles the audio codec sequences, while the audio driver handles the audio
  40  * controller sequences.
  41  *
  42  * The disable sequences must be performed before disabling the transcoder or
  43  * port. The enable sequences may only be performed after enabling the
  44  * transcoder and port, and after completed link training. Therefore the audio
  45  * enable/disable sequences are part of the modeset sequence.
  46  *
  47  * The codec and controller sequences could be done either parallel or serial,
  48  * but generally the ELDV/PD change in the codec sequence indicates to the audio
  49  * driver that the controller sequence should start. Indeed, most of the
  50  * co-operation between the graphics and audio drivers is handled via audio
  51  * related registers. (The notable exception is the power management, not
  52  * covered here.)
  53  *
  54  * The struct &i915_audio_component is used to interact between the graphics
  55  * and audio drivers. The struct &i915_audio_component_ops @ops in it is
  56  * defined in graphics driver and called in audio driver. The
  57  * struct &i915_audio_component_audio_ops @audio_ops is called from i915 driver.
  58  */
  59
  60 static const struct {
  61         int clock;
  62         u32 config;
  63 } hdmi_audio_clock[] = {
  64         { 25175, AUD_CONFIG_PIXEL_CLOCK_HDMI_25175 },
  65         { 25200, AUD_CONFIG_PIXEL_CLOCK_HDMI_25200 }, /* default per bspec */
  66         { 27000, AUD_CONFIG_PIXEL_CLOCK_HDMI_27000 },
  67         { 27027, AUD_CONFIG_PIXEL_CLOCK_HDMI_27027 },
  68         { 54000, AUD_CONFIG_PIXEL_CLOCK_HDMI_54000 },
  69         { 54054, AUD_CONFIG_PIXEL_CLOCK_HDMI_54054 },
  70         { 74176, AUD_CONFIG_PIXEL_CLOCK_HDMI_74176 },
  71         { 74250, AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 },
  72         { 148352, AUD_CONFIG_PIXEL_CLOCK_HDMI_148352 },
  73         { 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 },
  74 };
  75
  76 /* HDMI N/CTS table */
  77 #define TMDS_297M 297000
  78 #define TMDS_296M 296703
  79 static const struct {
  80         int sample_rate;
  81         int clock;
  82         int n;
  83         int cts;
  84 } hdmi_aud_ncts[] = {
  85         { 44100, TMDS_296M, 4459, 234375 },
  86         { 44100, TMDS_297M, 4704, 247500 },
  87         { 48000, TMDS_296M, 5824, 281250 },
  88         { 48000, TMDS_297M, 5120, 247500 },
  89         { 32000, TMDS_296M, 5824, 421875 },
  90         { 32000, TMDS_297M, 3072, 222750 },
  91         { 88200, TMDS_296M, 8918, 234375 },
  92         { 88200, TMDS_297M, 9408, 247500 },
  93         { 96000, TMDS_296M, 11648, 281250 },
  94         { 96000, TMDS_297M, 10240, 247500 },
  95         { 176400, TMDS_296M, 17836, 234375 },
  96         { 176400, TMDS_297M, 18816, 247500 },
  97         { 192000, TMDS_296M, 23296, 281250 },
  98         { 192000, TMDS_297M, 20480, 247500 },
  99 };
 100
 101 /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
 102 static u32 audio_config_hdmi_pixel_clock(const struct drm_display_mode *adjusted_mode)
 103 {
 104         int i;
 105
 106         for (i = 0; i < ARRAY_SIZE(hdmi_audio_clock); i++) {
 107                 if (adjusted_mode->crtc_clock == hdmi_audio_clock[i].clock)
 108                         break;
 109         }
 110
 111         if (i == ARRAY_SIZE(hdmi_audio_clock)) {
 112                 DRM_DEBUG_KMS("HDMI audio pixel clock setting for %d not found, falling back to defaults\n",
 113                               adjusted_mode->crtc_clock);
 114                 i = 1;
 115         }
 116
 117         DRM_DEBUG_KMS("Configuring HDMI audio for pixel clock %d (0x%08x)\n",
 118                       hdmi_audio_clock[i].clock,
 119                       hdmi_audio_clock[i].config);
 120
 121         return hdmi_audio_clock[i].config;
 122 }
 123
 124 static int audio_config_hdmi_get_n(const struct drm_display_mode *adjusted_mode,
 125                                    int rate)
 126 {
 127         int i;
 128
 129         for (i = 0; i < ARRAY_SIZE(hdmi_aud_ncts); i++) {
 130                 if (rate == hdmi_aud_ncts[i].sample_rate &&
 131                     adjusted_mode->crtc_clock == hdmi_aud_ncts[i].clock) {
 132                         return hdmi_aud_ncts[i].n;
 133                 }
 134         }
 135         return 0;
 136 }
 137
 138 static bool intel_eld_uptodate(struct drm_connector *connector,
 139                                i915_reg_t reg_eldv, uint32_t bits_eldv,
 140                                i915_reg_t reg_elda, uint32_t bits_elda,
 141                                i915_reg_t reg_edid)
 142 {
 143         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 144         uint8_t *eld = connector->eld;
 145         uint32_t tmp;
 146         int i;
 147
 148         tmp = I915_READ(reg_eldv);
 149         tmp &= bits_eldv;
 150
 151         if (!tmp)
 152                 return false;
 153
 154         tmp = I915_READ(reg_elda);
 155         tmp &= ~bits_elda;
 156         I915_WRITE(reg_elda, tmp);
 157
 158         for (i = 0; i < drm_eld_size(eld) / 4; i++)
 159                 if (I915_READ(reg_edid) != *((uint32_t *)eld + i))
 160                         return false;
 161
 162         return true;
 163 }
 164
 165 static void g4x_audio_codec_disable(struct intel_encoder *encoder)
 166 {
 167         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 168         uint32_t eldv, tmp;
 169
 170         DRM_DEBUG_KMS("Disable audio codec\n");
 171
 172         tmp = I915_READ(G4X_AUD_VID_DID);
 173         if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL)
 174                 eldv = G4X_ELDV_DEVCL_DEVBLC;
 175         else
 176                 eldv = G4X_ELDV_DEVCTG;
 177
 178         /* Invalidate ELD */
 179         tmp = I915_READ(G4X_AUD_CNTL_ST);
 180         tmp &= ~eldv;
 181         I915_WRITE(G4X_AUD_CNTL_ST, tmp);
 182 }
 183
 184 static void g4x_audio_codec_enable(struct drm_connector *connector,
 185                                    struct intel_encoder *encoder,
 186                                    const struct drm_display_mode *adjusted_mode)
 187 {
 188         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 189         uint8_t *eld = connector->eld;
 190         uint32_t eldv;
 191         uint32_t tmp;
 192         int len, i;
 193
 194         DRM_DEBUG_KMS("Enable audio codec, %u bytes ELD\n", eld[2]);
 195
 196         tmp = I915_READ(G4X_AUD_VID_DID);
 197         if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL)
 198                 eldv = G4X_ELDV_DEVCL_DEVBLC;
 199         else
 200                 eldv = G4X_ELDV_DEVCTG;
 201
 202         if (intel_eld_uptodate(connector,
 203                                G4X_AUD_CNTL_ST, eldv,
 204                                G4X_AUD_CNTL_ST, G4X_ELD_ADDR_MASK,
 205                                G4X_HDMIW_HDMIEDID))
 206                 return;
 207
 208         tmp = I915_READ(G4X_AUD_CNTL_ST);
 209         tmp &= ~(eldv | G4X_ELD_ADDR_MASK);
 210         len = (tmp >> 9) & 0x1f;                /* ELD buffer size */
 211         I915_WRITE(G4X_AUD_CNTL_ST, tmp);
 212
 213         len = min(drm_eld_size(eld) / 4, len);
 214         DRM_DEBUG_DRIVER("ELD size %d\n", len);
 215         for (i = 0; i < len; i++)
 216                 I915_WRITE(G4X_HDMIW_HDMIEDID, *((uint32_t *)eld + i));
 217
 218         tmp = I915_READ(G4X_AUD_CNTL_ST);
 219         tmp |= eldv;
 220         I915_WRITE(G4X_AUD_CNTL_ST, tmp);
 221 }
 222
 223 static void
 224 hsw_dp_audio_config_update(struct intel_crtc *intel_crtc, enum port port,
 225                            const struct drm_display_mode *adjusted_mode)
 226 {
 227         struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
 228         enum pipe pipe = intel_crtc->pipe;
 229         u32 tmp;
 230
 231         tmp = I915_READ(HSW_AUD_CFG(pipe));
 232         tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
 233         tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
 234         tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
 235         tmp |= AUD_CONFIG_N_VALUE_INDEX;
 236
 237         I915_WRITE(HSW_AUD_CFG(pipe), tmp);
 238 }
 239
 240 static void
 241 hsw_hdmi_audio_config_update(struct intel_crtc *intel_crtc, enum port port,
 242                              const struct drm_display_mode *adjusted_mode)
 243 {
 244         struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
 245         struct i915_audio_component *acomp = dev_priv->audio_component;
 246         int rate = acomp ? acomp->aud_sample_rate[port] : 0;
 247         enum pipe pipe = intel_crtc->pipe;
 248         int n;
 249         u32 tmp;
 250
 251         tmp = I915_READ(HSW_AUD_CFG(pipe));
 252         tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
 253         tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
 254         tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
 255         tmp |= audio_config_hdmi_pixel_clock(adjusted_mode);
 256
 257         if (adjusted_mode->crtc_clock == TMDS_296M ||
 258             adjusted_mode->crtc_clock == TMDS_297M) {
 259                 n = audio_config_hdmi_get_n(adjusted_mode, rate);
 260                 if (n != 0) {
 261                         tmp &= ~AUD_CONFIG_N_MASK;
 262                         tmp |= AUD_CONFIG_N(n);
 263                         tmp |= AUD_CONFIG_N_PROG_ENABLE;
 264                 } else {
 265                         DRM_DEBUG_KMS("no suitable N value is found\n");
 266                 }
 267         }
 268
 269         I915_WRITE(HSW_AUD_CFG(pipe), tmp);
 270 }
 271
 272 static void
 273 hsw_audio_config_update(struct intel_crtc *intel_crtc, enum port port,
 274                         const struct drm_display_mode *adjusted_mode)
 275 {
 276         if (intel_crtc_has_dp_encoder(intel_crtc->config))
 277                 hsw_dp_audio_config_update(intel_crtc, port, adjusted_mode);
 278         else
 279                 hsw_hdmi_audio_config_update(intel_crtc, port, adjusted_mode);
 280 }
 281
 282 static void hsw_audio_codec_disable(struct intel_encoder *encoder)
 283 {
 284         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 285         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 286         enum pipe pipe = intel_crtc->pipe;
 287         uint32_t tmp;
 288
 289         DRM_DEBUG_KMS("Disable audio codec on pipe %c\n", pipe_name(pipe));
 290
 291         mutex_lock(&dev_priv->av_mutex);
 292
 293         /* Disable timestamps */
 294         tmp = I915_READ(HSW_AUD_CFG(pipe));
 295         tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
 296         tmp |= AUD_CONFIG_N_PROG_ENABLE;
 297         tmp &= ~AUD_CONFIG_UPPER_N_MASK;
 298         tmp &= ~AUD_CONFIG_LOWER_N_MASK;
 299         if (intel_crtc_has_dp_encoder(intel_crtc->config))
 300                 tmp |= AUD_CONFIG_N_VALUE_INDEX;
 301         I915_WRITE(HSW_AUD_CFG(pipe), tmp);
 302
 303         /* Invalidate ELD */
 304         tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
 305         tmp &= ~AUDIO_ELD_VALID(pipe);
 306         tmp &= ~AUDIO_OUTPUT_ENABLE(pipe);
 307         I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
 308
 309         mutex_unlock(&dev_priv->av_mutex);
 310 }
 311
 312 static void hsw_audio_codec_enable(struct drm_connector *connector,
 313                                    struct intel_encoder *intel_encoder,
 314                                    const struct drm_display_mode *adjusted_mode)
 315 {
 316         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 317         struct intel_crtc *intel_crtc = to_intel_crtc(intel_encoder->base.crtc);
 318         enum pipe pipe = intel_crtc->pipe;
 319         enum port port = intel_encoder->port;
 320         const uint8_t *eld = connector->eld;
 321         uint32_t tmp;
 322         int len, i;
 323
 324         DRM_DEBUG_KMS("Enable audio codec on pipe %c, %u bytes ELD\n",
 325                       pipe_name(pipe), drm_eld_size(eld));
 326
 327         mutex_lock(&dev_priv->av_mutex);
 328
 329         /* Enable audio presence detect, invalidate ELD */
 330         tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
 331         tmp |= AUDIO_OUTPUT_ENABLE(pipe);
 332         tmp &= ~AUDIO_ELD_VALID(pipe);
 333         I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
 334
 335         /*
 336          * FIXME: We're supposed to wait for vblank here, but we have vblanks
 337          * disabled during the mode set. The proper fix would be to push the
 338          * rest of the setup into a vblank work item, queued here, but the
 339          * infrastructure is not there yet.
 340          */
 341
 342         /* Reset ELD write address */
 343         tmp = I915_READ(HSW_AUD_DIP_ELD_CTRL(pipe));
 344         tmp &= ~IBX_ELD_ADDRESS_MASK;
 345         I915_WRITE(HSW_AUD_DIP_ELD_CTRL(pipe), tmp);
 346
 347         /* Up to 84 bytes of hw ELD buffer */
 348         len = min(drm_eld_size(eld), 84);
 349         for (i = 0; i < len / 4; i++)
 350                 I915_WRITE(HSW_AUD_EDID_DATA(pipe), *((uint32_t *)eld + i));
 351
 352         /* ELD valid */
 353         tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
 354         tmp |= AUDIO_ELD_VALID(pipe);
 355         I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
 356
 357         /* Enable timestamps */
 358         hsw_audio_config_update(intel_crtc, port, adjusted_mode);
 359
 360         mutex_unlock(&dev_priv->av_mutex);
 361 }
 362
 363 static void ilk_audio_codec_disable(struct intel_encoder *intel_encoder)
 364 {
 365         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
 366         struct intel_crtc *intel_crtc = to_intel_crtc(intel_encoder->base.crtc);
 367         enum pipe pipe = intel_crtc->pipe;
 368         enum port port = intel_encoder->port;
 369         uint32_t tmp, eldv;
 370         i915_reg_t aud_config, aud_cntrl_st2;
 371
 372         DRM_DEBUG_KMS("Disable audio codec on port %c, pipe %c\n",
 373                       port_name(port), pipe_name(pipe));
 374
 375         if (WARN_ON(port == PORT_A))
 376                 return;
 377
 378         if (HAS_PCH_IBX(dev_priv)) {
 379                 aud_config = IBX_AUD_CFG(pipe);
 380                 aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
 381         } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 382                 aud_config = VLV_AUD_CFG(pipe);
 383                 aud_cntrl_st2 = VLV_AUD_CNTL_ST2;
 384         } else {
 385                 aud_config = CPT_AUD_CFG(pipe);
 386                 aud_cntrl_st2 = CPT_AUD_CNTRL_ST2;
 387         }
 388
 389         /* Disable timestamps */
 390         tmp = I915_READ(aud_config);
 391         tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
 392         tmp |= AUD_CONFIG_N_PROG_ENABLE;
 393         tmp &= ~AUD_CONFIG_UPPER_N_MASK;
 394         tmp &= ~AUD_CONFIG_LOWER_N_MASK;
 395         if (intel_crtc_has_dp_encoder(intel_crtc->config))
 396                 tmp |= AUD_CONFIG_N_VALUE_INDEX;
 397         I915_WRITE(aud_config, tmp);
 398
 399         eldv = IBX_ELD_VALID(port);
 400
 401         /* Invalidate ELD */
 402         tmp = I915_READ(aud_cntrl_st2);
 403         tmp &= ~eldv;
 404         I915_WRITE(aud_cntrl_st2, tmp);
 405 }
 406
 407 static void ilk_audio_codec_enable(struct drm_connector *connector,
 408                                    struct intel_encoder *intel_encoder,
 409                                    const struct drm_display_mode *adjusted_mode)
 410 {
 411         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 412         struct intel_crtc *intel_crtc = to_intel_crtc(intel_encoder->base.crtc);
 413         enum pipe pipe = intel_crtc->pipe;
 414         enum port port = intel_encoder->port;
 415         uint8_t *eld = connector->eld;
 416         uint32_t tmp, eldv;
 417         int len, i;
 418         i915_reg_t hdmiw_hdmiedid, aud_config, aud_cntl_st, aud_cntrl_st2;
 419
 420         DRM_DEBUG_KMS("Enable audio codec on port %c, pipe %c, %u bytes ELD\n",
 421                       port_name(port), pipe_name(pipe), drm_eld_size(eld));
 422
 423         if (WARN_ON(port == PORT_A))
 424                 return;
 425
 426         /*
 427          * FIXME: We're supposed to wait for vblank here, but we have vblanks
 428          * disabled during the mode set. The proper fix would be to push the
 429          * rest of the setup into a vblank work item, queued here, but the
 430          * infrastructure is not there yet.
 431          */
 432
 433         if (HAS_PCH_IBX(connector->dev)) {
 434                 hdmiw_hdmiedid = IBX_HDMIW_HDMIEDID(pipe);
 435                 aud_config = IBX_AUD_CFG(pipe);
 436                 aud_cntl_st = IBX_AUD_CNTL_ST(pipe);
 437                 aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
 438         } else if (IS_VALLEYVIEW(connector->dev) ||
 439                    IS_CHERRYVIEW(connector->dev)) {
 440                 hdmiw_hdmiedid = VLV_HDMIW_HDMIEDID(pipe);
 441                 aud_config = VLV_AUD_CFG(pipe);
 442                 aud_cntl_st = VLV_AUD_CNTL_ST(pipe);
 443                 aud_cntrl_st2 = VLV_AUD_CNTL_ST2;
 444         } else {
 445                 hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID(pipe);
 446                 aud_config = CPT_AUD_CFG(pipe);
 447                 aud_cntl_st = CPT_AUD_CNTL_ST(pipe);
 448                 aud_cntrl_st2 = CPT_AUD_CNTRL_ST2;
 449         }
 450
 451         eldv = IBX_ELD_VALID(port);
 452
 453         /* Invalidate ELD */
 454         tmp = I915_READ(aud_cntrl_st2);
 455         tmp &= ~eldv;
 456         I915_WRITE(aud_cntrl_st2, tmp);
 457
 458         /* Reset ELD write address */
 459         tmp = I915_READ(aud_cntl_st);
 460         tmp &= ~IBX_ELD_ADDRESS_MASK;
 461         I915_WRITE(aud_cntl_st, tmp);
 462
 463         /* Up to 84 bytes of hw ELD buffer */
 464         len = min(drm_eld_size(eld), 84);
 465         for (i = 0; i < len / 4; i++)
 466                 I915_WRITE(hdmiw_hdmiedid, *((uint32_t *)eld + i));
 467
 468         /* ELD valid */
 469         tmp = I915_READ(aud_cntrl_st2);
 470         tmp |= eldv;
 471         I915_WRITE(aud_cntrl_st2, tmp);
 472
 473         /* Enable timestamps */
 474         tmp = I915_READ(aud_config);
 475         tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
 476         tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
 477         tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
 478         if (intel_crtc_has_dp_encoder(intel_crtc->config))
 479                 tmp |= AUD_CONFIG_N_VALUE_INDEX;
 480         else
 481                 tmp |= audio_config_hdmi_pixel_clock(adjusted_mode);
 482         I915_WRITE(aud_config, tmp);
 483 }
 484
 485 /**
 486  * intel_audio_codec_enable - Enable the audio codec for HD audio
 487  * @intel_encoder: encoder on which to enable audio
 488  *
 489  * The enable sequences may only be performed after enabling the transcoder and
 490  * port, and after completed link training.
 491  */
 492 void intel_audio_codec_enable(struct intel_encoder *intel_encoder)
 493 {
 494         struct drm_encoder *encoder = &intel_encoder->base;
 495         struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
 496         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 497         struct drm_connector *connector;
 498         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
 499         struct i915_audio_component *acomp = dev_priv->audio_component;
 500         enum port port = intel_encoder->port;
 501         enum pipe pipe = crtc->pipe;
 502
 503         connector = drm_select_eld(encoder);
 504         if (!connector)
 505                 return;
 506
 507         DRM_DEBUG_DRIVER("ELD on [CONNECTOR:%d:%s], [ENCODER:%d:%s]\n",
 508                          connector->base.id,
 509                          connector->name,
 510                          connector->encoder->base.id,
 511                          connector->encoder->name);
 512
 513         /* ELD Conn_Type */
 514         connector->eld[5] &= ~(3 << 2);
 515         if (intel_crtc_has_dp_encoder(crtc->config))
 516                 connector->eld[5] |= (1 << 2);
 517
 518         connector->eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
 519
 520         if (dev_priv->display.audio_codec_enable)
 521                 dev_priv->display.audio_codec_enable(connector, intel_encoder,
 522                                                      adjusted_mode);
 523
 524         mutex_lock(&dev_priv->av_mutex);
 525         intel_encoder->audio_connector = connector;
 526
 527         /* referred in audio callbacks */
 528         dev_priv->av_enc_map[pipe] = intel_encoder;
 529         mutex_unlock(&dev_priv->av_mutex);
 530
 531         /* audio drivers expect pipe = -1 to indicate Non-MST cases */
 532         if (intel_encoder->type != INTEL_OUTPUT_DP_MST)
 533                 pipe = -1;
 534
 535         if (acomp && acomp->audio_ops && acomp->audio_ops->pin_eld_notify)
 536                 acomp->audio_ops->pin_eld_notify(acomp->audio_ops->audio_ptr,
 537                                                  (int) port, (int) pipe);
 538 }
 539
 540 /**
 541  * intel_audio_codec_disable - Disable the audio codec for HD audio
 542  * @intel_encoder: encoder on which to disable audio
 543  *
 544  * The disable sequences must be performed before disabling the transcoder or
 545  * port.
 546  */
 547 void intel_audio_codec_disable(struct intel_encoder *intel_encoder)
 548 {
 549         struct drm_encoder *encoder = &intel_encoder->base;
 550         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
 551         struct i915_audio_component *acomp = dev_priv->audio_component;
 552         enum port port = intel_encoder->port;
 553         struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
 554         enum pipe pipe = crtc->pipe;
 555
 556         if (dev_priv->display.audio_codec_disable)
 557                 dev_priv->display.audio_codec_disable(intel_encoder);
 558
 559         mutex_lock(&dev_priv->av_mutex);
 560         intel_encoder->audio_connector = NULL;
 561         dev_priv->av_enc_map[pipe] = NULL;
 562         mutex_unlock(&dev_priv->av_mutex);
 563
 564         /* audio drivers expect pipe = -1 to indicate Non-MST cases */
 565         if (intel_encoder->type != INTEL_OUTPUT_DP_MST)
 566                 pipe = -1;
 567
 568         if (acomp && acomp->audio_ops && acomp->audio_ops->pin_eld_notify)
 569                 acomp->audio_ops->pin_eld_notify(acomp->audio_ops->audio_ptr,
 570                                                  (int) port, (int) pipe);
 571 }
 572
 573 /**
 574  * intel_init_audio_hooks - Set up chip specific audio hooks
 575  * @dev_priv: device private
 576  */
 577 void intel_init_audio_hooks(struct drm_i915_private *dev_priv)
 578 {
 579         if (IS_G4X(dev_priv)) {
 580                 dev_priv->display.audio_codec_enable = g4x_audio_codec_enable;
 581                 dev_priv->display.audio_codec_disable = g4x_audio_codec_disable;
 582         } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 583                 dev_priv->display.audio_codec_enable = ilk_audio_codec_enable;
 584                 dev_priv->display.audio_codec_disable = ilk_audio_codec_disable;
 585         } else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8) {
 586                 dev_priv->display.audio_codec_enable = hsw_audio_codec_enable;
 587                 dev_priv->display.audio_codec_disable = hsw_audio_codec_disable;
 588         } else if (HAS_PCH_SPLIT(dev_priv)) {
 589                 dev_priv->display.audio_codec_enable = ilk_audio_codec_enable;
 590                 dev_priv->display.audio_codec_disable = ilk_audio_codec_disable;
 591         }
 592 }
 593
 594 static void i915_audio_component_get_power(struct device *kdev)
 595 {
 596         intel_display_power_get(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
 597 }
 598
 599 static void i915_audio_component_put_power(struct device *kdev)
 600 {
 601         intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO);
 602 }
 603
 604 static void i915_audio_component_codec_wake_override(struct device *kdev,
 605                                                      bool enable)
 606 {
 607         struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
 608         u32 tmp;
 609
 610         if (!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv))
 611                 return;
 612
 613         i915_audio_component_get_power(kdev);
 614
 615         /*
 616          * Enable/disable generating the codec wake signal, overriding the
 617          * internal logic to generate the codec wake to controller.
 618          */
 619         tmp = I915_READ(HSW_AUD_CHICKENBIT);
 620         tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL;
 621         I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
 622         usleep_range(1000, 1500);
 623
 624         if (enable) {
 625                 tmp = I915_READ(HSW_AUD_CHICKENBIT);
 626                 tmp |= SKL_AUD_CODEC_WAKE_SIGNAL;
 627                 I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
 628                 usleep_range(1000, 1500);
 629         }
 630
 631         i915_audio_component_put_power(kdev);
 632 }
 633
 634 /* Get CDCLK in kHz  */
 635 static int i915_audio_component_get_cdclk_freq(struct device *kdev)
 636 {
 637         struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
 638
 639         if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))
 640                 return -ENODEV;
 641
 642         return dev_priv->cdclk_freq;
 643 }
 644
 645 static struct intel_encoder *get_saved_enc(struct drm_i915_private *dev_priv,
 646                                                int port, int pipe)
 647 {
 648
 649         if (WARN_ON(pipe >= I915_MAX_PIPES))
 650                 return NULL;
 651
 652         /* MST */
 653         if (pipe >= 0)
 654                 return dev_priv->av_enc_map[pipe];
 655
 656         /* Non-MST */
 657         for_each_pipe(dev_priv, pipe) {
 658                 struct intel_encoder *encoder;
 659
 660                 encoder = dev_priv->av_enc_map[pipe];
 661                 if (encoder == NULL)
 662                         continue;
 663
 664                 if (port == encoder->port)
 665                         return encoder;
 666         }
 667
 668         return NULL;
 669 }
 670
 671 static int i915_audio_component_sync_audio_rate(struct device *kdev, int port,
 672                                                 int pipe, int rate)
 673 {
 674         struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
 675         struct intel_encoder *intel_encoder;
 676         struct intel_crtc *crtc;
 677         struct drm_display_mode *adjusted_mode;
 678         struct i915_audio_component *acomp = dev_priv->audio_component;
 679         int err = 0;
 680
 681         if (!HAS_DDI(dev_priv))
 682                 return 0;
 683
 684         i915_audio_component_get_power(kdev);
 685         mutex_lock(&dev_priv->av_mutex);
 686
 687         /* 1. get the pipe */
 688         intel_encoder = get_saved_enc(dev_priv, port, pipe);
 689         if (!intel_encoder || !intel_encoder->base.crtc ||
 690             intel_encoder->type != INTEL_OUTPUT_HDMI) {
 691                 DRM_DEBUG_KMS("Not valid for port %c\n", port_name(port));
 692                 err = -ENODEV;
 693                 goto unlock;
 694         }
 695
 696         /* pipe passed from the audio driver will be -1 for Non-MST case */
 697         crtc = to_intel_crtc(intel_encoder->base.crtc);
 698         pipe = crtc->pipe;
 699
 700         adjusted_mode = &crtc->config->base.adjusted_mode;
 701
 702         /* port must be valid now, otherwise the pipe will be invalid */
 703         acomp->aud_sample_rate[port] = rate;
 704
 705         hsw_audio_config_update(crtc, port, adjusted_mode);
 706
 707  unlock:
 708         mutex_unlock(&dev_priv->av_mutex);
 709         i915_audio_component_put_power(kdev);
 710         return err;
 711 }
 712
 713 static int i915_audio_component_get_eld(struct device *kdev, int port,
 714                                         int pipe, bool *enabled,
 715                                         unsigned char *buf, int max_bytes)
 716 {
 717         struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
 718         struct intel_encoder *intel_encoder;
 719         const u8 *eld;
 720         int ret = -EINVAL;
 721
 722         mutex_lock(&dev_priv->av_mutex);
 723
 724         intel_encoder = get_saved_enc(dev_priv, port, pipe);
 725         if (!intel_encoder) {
 726                 DRM_DEBUG_KMS("Not valid for port %c\n", port_name(port));
 727                 mutex_unlock(&dev_priv->av_mutex);
 728                 return ret;
 729         }
 730
 731         ret = 0;
 732         *enabled = intel_encoder->audio_connector != NULL;
 733         if (*enabled) {
 734                 eld = intel_encoder->audio_connector->eld;
 735                 ret = drm_eld_size(eld);
 736                 memcpy(buf, eld, min(max_bytes, ret));
 737         }
 738
 739         mutex_unlock(&dev_priv->av_mutex);
 740         return ret;
 741 }
 742
 743 static const struct i915_audio_component_ops i915_audio_component_ops = {
 744         .owner          = THIS_MODULE,
 745         .get_power      = i915_audio_component_get_power,
 746         .put_power      = i915_audio_component_put_power,
 747         .codec_wake_override = i915_audio_component_codec_wake_override,
 748         .get_cdclk_freq = i915_audio_component_get_cdclk_freq,
 749         .sync_audio_rate = i915_audio_component_sync_audio_rate,
 750         .get_eld        = i915_audio_component_get_eld,
 751 };
 752
 753 static int i915_audio_component_bind(struct device *i915_kdev,
 754                                      struct device *hda_kdev, void *data)
 755 {
 756         struct i915_audio_component *acomp = data;
 757         struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
 758         int i;
 759
 760         if (WARN_ON(acomp->ops || acomp->dev))
 761                 return -EEXIST;
 762
 763         drm_modeset_lock_all(&dev_priv->drm);
 764         acomp->ops = &i915_audio_component_ops;
 765         acomp->dev = i915_kdev;
 766         BUILD_BUG_ON(MAX_PORTS != I915_MAX_PORTS);
 767         for (i = 0; i < ARRAY_SIZE(acomp->aud_sample_rate); i++)
 768                 acomp->aud_sample_rate[i] = 0;
 769         dev_priv->audio_component = acomp;
 770         drm_modeset_unlock_all(&dev_priv->drm);
 771
 772         return 0;
 773 }
 774
 775 static void i915_audio_component_unbind(struct device *i915_kdev,
 776                                         struct device *hda_kdev, void *data)
 777 {
 778         struct i915_audio_component *acomp = data;
 779         struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
 780
 781         drm_modeset_lock_all(&dev_priv->drm);
 782         acomp->ops = NULL;
 783         acomp->dev = NULL;
 784         dev_priv->audio_component = NULL;
 785         drm_modeset_unlock_all(&dev_priv->drm);
 786 }
 787
 788 static const struct component_ops i915_audio_component_bind_ops = {
 789         .bind   = i915_audio_component_bind,
 790         .unbind = i915_audio_component_unbind,
 791 };
 792
 793 /**
 794  * i915_audio_component_init - initialize and register the audio component
 795  * @dev_priv: i915 device instance
 796  *
 797  * This will register with the component framework a child component which
 798  * will bind dynamically to the snd_hda_intel driver's corresponding master
 799  * component when the latter is registered. During binding the child
 800  * initializes an instance of struct i915_audio_component which it receives
 801  * from the master. The master can then start to use the interface defined by
 802  * this struct. Each side can break the binding at any point by deregistering
 803  * its own component after which each side's component unbind callback is
 804  * called.
 805  *
 806  * We ignore any error during registration and continue with reduced
 807  * functionality (i.e. without HDMI audio).
 808  */
 809 void i915_audio_component_init(struct drm_i915_private *dev_priv)
 810 {
 811         int ret;
 812
 813         ret = component_add(dev_priv->drm.dev, &i915_audio_component_bind_ops);
 814         if (ret < 0) {
 815                 DRM_ERROR("failed to add audio component (%d)\n", ret);
 816                 /* continue with reduced functionality */
 817                 return;
 818         }
 819
 820         dev_priv->audio_component_registered = true;
 821 }
 822
 823 /**
 824  * i915_audio_component_cleanup - deregister the audio component
 825  * @dev_priv: i915 device instance
 826  *
 827  * Deregisters the audio component, breaking any existing binding to the
 828  * corresponding snd_hda_intel driver's master component.
 829  */
 830 void i915_audio_component_cleanup(struct drm_i915_private *dev_priv)
 831 {
 832         if (!dev_priv->audio_component_registered)
 833                 return;
 834
 835         component_del(dev_priv->drm.dev, &i915_audio_component_bind_ops);
 836         dev_priv->audio_component_registered = false;
 837 }