2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <linux/vga_switcheroo.h>
36 #include <drm/drm_atomic_helper.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/drm_edid.h>
39 #include "intel_drv.h"
40 #include <drm/i915_drm.h>
42 #include <linux/acpi.h>
44 /* Private structure for the integrated LVDS support */
45 struct intel_lvds_connector
{
46 struct intel_connector base
;
49 struct intel_lvds_pps
{
60 bool powerdown_on_reset
;
63 struct intel_lvds_encoder
{
64 struct intel_encoder base
;
70 struct intel_lvds_pps init_pps
;
73 struct intel_lvds_connector
*attached_connector
;
76 static struct intel_lvds_encoder
*to_lvds_encoder(struct drm_encoder
*encoder
)
78 return container_of(encoder
, struct intel_lvds_encoder
, base
.base
);
81 static struct intel_lvds_connector
*to_lvds_connector(struct drm_connector
*connector
)
83 return container_of(connector
, struct intel_lvds_connector
, base
.base
);
86 static bool intel_lvds_get_hw_state(struct intel_encoder
*encoder
,
89 struct drm_device
*dev
= encoder
->base
.dev
;
90 struct drm_i915_private
*dev_priv
= to_i915(dev
);
91 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
95 if (!intel_display_power_get_if_enabled(dev_priv
,
96 encoder
->power_domain
))
101 tmp
= I915_READ(lvds_encoder
->reg
);
103 if (!(tmp
& LVDS_PORT_EN
))
106 if (HAS_PCH_CPT(dev_priv
))
107 *pipe
= PORT_TO_PIPE_CPT(tmp
);
109 *pipe
= PORT_TO_PIPE(tmp
);
114 intel_display_power_put(dev_priv
, encoder
->power_domain
);
119 static void intel_lvds_get_config(struct intel_encoder
*encoder
,
120 struct intel_crtc_state
*pipe_config
)
122 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
123 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
126 tmp
= I915_READ(lvds_encoder
->reg
);
127 if (tmp
& LVDS_HSYNC_POLARITY
)
128 flags
|= DRM_MODE_FLAG_NHSYNC
;
130 flags
|= DRM_MODE_FLAG_PHSYNC
;
131 if (tmp
& LVDS_VSYNC_POLARITY
)
132 flags
|= DRM_MODE_FLAG_NVSYNC
;
134 flags
|= DRM_MODE_FLAG_PVSYNC
;
136 pipe_config
->base
.adjusted_mode
.flags
|= flags
;
138 if (INTEL_GEN(dev_priv
) < 5)
139 pipe_config
->gmch_pfit
.lvds_border_bits
=
140 tmp
& LVDS_BORDER_ENABLE
;
142 /* gen2/3 store dither state in pfit control, needs to match */
143 if (INTEL_GEN(dev_priv
) < 4) {
144 tmp
= I915_READ(PFIT_CONTROL
);
146 pipe_config
->gmch_pfit
.control
|= tmp
& PANEL_8TO6_DITHER_ENABLE
;
149 pipe_config
->base
.adjusted_mode
.crtc_clock
= pipe_config
->port_clock
;
152 static void intel_lvds_pps_get_hw_state(struct drm_i915_private
*dev_priv
,
153 struct intel_lvds_pps
*pps
)
157 pps
->powerdown_on_reset
= I915_READ(PP_CONTROL(0)) & PANEL_POWER_RESET
;
159 val
= I915_READ(PP_ON_DELAYS(0));
160 pps
->port
= (val
& PANEL_PORT_SELECT_MASK
) >>
161 PANEL_PORT_SELECT_SHIFT
;
162 pps
->t1_t2
= (val
& PANEL_POWER_UP_DELAY_MASK
) >>
163 PANEL_POWER_UP_DELAY_SHIFT
;
164 pps
->t5
= (val
& PANEL_LIGHT_ON_DELAY_MASK
) >>
165 PANEL_LIGHT_ON_DELAY_SHIFT
;
167 val
= I915_READ(PP_OFF_DELAYS(0));
168 pps
->t3
= (val
& PANEL_POWER_DOWN_DELAY_MASK
) >>
169 PANEL_POWER_DOWN_DELAY_SHIFT
;
170 pps
->tx
= (val
& PANEL_LIGHT_OFF_DELAY_MASK
) >>
171 PANEL_LIGHT_OFF_DELAY_SHIFT
;
173 val
= I915_READ(PP_DIVISOR(0));
174 pps
->divider
= (val
& PP_REFERENCE_DIVIDER_MASK
) >>
175 PP_REFERENCE_DIVIDER_SHIFT
;
176 val
= (val
& PANEL_POWER_CYCLE_DELAY_MASK
) >>
177 PANEL_POWER_CYCLE_DELAY_SHIFT
;
179 * Remove the BSpec specified +1 (100ms) offset that accounts for a
180 * too short power-cycle delay due to the asynchronous programming of
185 /* Convert from 100ms to 100us units */
186 pps
->t4
= val
* 1000;
188 if (INTEL_INFO(dev_priv
)->gen
<= 4 &&
189 pps
->t1_t2
== 0 && pps
->t5
== 0 && pps
->t3
== 0 && pps
->tx
== 0) {
190 DRM_DEBUG_KMS("Panel power timings uninitialized, "
191 "setting defaults\n");
192 /* Set T2 to 40ms and T5 to 200ms in 100 usec units */
193 pps
->t1_t2
= 40 * 10;
195 /* Set T3 to 35ms and Tx to 200ms in 100 usec units */
200 DRM_DEBUG_DRIVER("LVDS PPS:t1+t2 %d t3 %d t4 %d t5 %d tx %d "
201 "divider %d port %d powerdown_on_reset %d\n",
202 pps
->t1_t2
, pps
->t3
, pps
->t4
, pps
->t5
, pps
->tx
,
203 pps
->divider
, pps
->port
, pps
->powerdown_on_reset
);
206 static void intel_lvds_pps_init_hw(struct drm_i915_private
*dev_priv
,
207 struct intel_lvds_pps
*pps
)
211 val
= I915_READ(PP_CONTROL(0));
212 WARN_ON((val
& PANEL_UNLOCK_MASK
) != PANEL_UNLOCK_REGS
);
213 if (pps
->powerdown_on_reset
)
214 val
|= PANEL_POWER_RESET
;
215 I915_WRITE(PP_CONTROL(0), val
);
217 I915_WRITE(PP_ON_DELAYS(0), (pps
->port
<< PANEL_PORT_SELECT_SHIFT
) |
218 (pps
->t1_t2
<< PANEL_POWER_UP_DELAY_SHIFT
) |
219 (pps
->t5
<< PANEL_LIGHT_ON_DELAY_SHIFT
));
220 I915_WRITE(PP_OFF_DELAYS(0), (pps
->t3
<< PANEL_POWER_DOWN_DELAY_SHIFT
) |
221 (pps
->tx
<< PANEL_LIGHT_OFF_DELAY_SHIFT
));
223 val
= pps
->divider
<< PP_REFERENCE_DIVIDER_SHIFT
;
224 val
|= (DIV_ROUND_UP(pps
->t4
, 1000) + 1) <<
225 PANEL_POWER_CYCLE_DELAY_SHIFT
;
226 I915_WRITE(PP_DIVISOR(0), val
);
229 static void intel_pre_enable_lvds(struct intel_encoder
*encoder
,
230 const struct intel_crtc_state
*pipe_config
,
231 const struct drm_connector_state
*conn_state
)
233 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
234 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
235 struct intel_crtc
*crtc
= to_intel_crtc(pipe_config
->base
.crtc
);
236 const struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
237 int pipe
= crtc
->pipe
;
240 if (HAS_PCH_SPLIT(dev_priv
)) {
241 assert_fdi_rx_pll_disabled(dev_priv
, pipe
);
242 assert_shared_dpll_disabled(dev_priv
,
243 pipe_config
->shared_dpll
);
245 assert_pll_disabled(dev_priv
, pipe
);
248 intel_lvds_pps_init_hw(dev_priv
, &lvds_encoder
->init_pps
);
250 temp
= lvds_encoder
->init_lvds_val
;
251 temp
|= LVDS_PORT_EN
| LVDS_A0A2_CLKA_POWER_UP
;
253 if (HAS_PCH_CPT(dev_priv
)) {
254 temp
&= ~PORT_TRANS_SEL_MASK
;
255 temp
|= PORT_TRANS_SEL_CPT(pipe
);
258 temp
|= LVDS_PIPEB_SELECT
;
260 temp
&= ~LVDS_PIPEB_SELECT
;
264 /* set the corresponsding LVDS_BORDER bit */
265 temp
&= ~LVDS_BORDER_ENABLE
;
266 temp
|= pipe_config
->gmch_pfit
.lvds_border_bits
;
267 /* Set the B0-B3 data pairs corresponding to whether we're going to
268 * set the DPLLs for dual-channel mode or not.
270 if (lvds_encoder
->is_dual_link
)
271 temp
|= LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
;
273 temp
&= ~(LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
);
275 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
276 * appropriately here, but we need to look more thoroughly into how
277 * panels behave in the two modes. For now, let's just maintain the
278 * value we got from the BIOS.
280 temp
&= ~LVDS_A3_POWER_MASK
;
281 temp
|= lvds_encoder
->a3_power
;
283 /* Set the dithering flag on LVDS as needed, note that there is no
284 * special lvds dither control bit on pch-split platforms, dithering is
285 * only controlled through the PIPECONF reg. */
286 if (IS_GEN4(dev_priv
)) {
287 /* Bspec wording suggests that LVDS port dithering only exists
288 * for 18bpp panels. */
289 if (pipe_config
->dither
&& pipe_config
->pipe_bpp
== 18)
290 temp
|= LVDS_ENABLE_DITHER
;
292 temp
&= ~LVDS_ENABLE_DITHER
;
294 temp
&= ~(LVDS_HSYNC_POLARITY
| LVDS_VSYNC_POLARITY
);
295 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NHSYNC
)
296 temp
|= LVDS_HSYNC_POLARITY
;
297 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
298 temp
|= LVDS_VSYNC_POLARITY
;
300 I915_WRITE(lvds_encoder
->reg
, temp
);
304 * Sets the power state for the panel.
306 static void intel_enable_lvds(struct intel_encoder
*encoder
,
307 const struct intel_crtc_state
*pipe_config
,
308 const struct drm_connector_state
*conn_state
)
310 struct drm_device
*dev
= encoder
->base
.dev
;
311 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
312 struct drm_i915_private
*dev_priv
= to_i915(dev
);
314 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) | LVDS_PORT_EN
);
316 I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) | PANEL_POWER_ON
);
317 POSTING_READ(lvds_encoder
->reg
);
319 if (intel_wait_for_register(dev_priv
, PP_STATUS(0), PP_ON
, PP_ON
, 5000))
320 DRM_ERROR("timed out waiting for panel to power on\n");
322 intel_panel_enable_backlight(pipe_config
, conn_state
);
325 static void intel_disable_lvds(struct intel_encoder
*encoder
,
326 const struct intel_crtc_state
*old_crtc_state
,
327 const struct drm_connector_state
*old_conn_state
)
329 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
330 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
332 I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) & ~PANEL_POWER_ON
);
333 if (intel_wait_for_register(dev_priv
, PP_STATUS(0), PP_ON
, 0, 1000))
334 DRM_ERROR("timed out waiting for panel to power off\n");
336 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) & ~LVDS_PORT_EN
);
337 POSTING_READ(lvds_encoder
->reg
);
340 static void gmch_disable_lvds(struct intel_encoder
*encoder
,
341 const struct intel_crtc_state
*old_crtc_state
,
342 const struct drm_connector_state
*old_conn_state
)
345 intel_panel_disable_backlight(old_conn_state
);
347 intel_disable_lvds(encoder
, old_crtc_state
, old_conn_state
);
350 static void pch_disable_lvds(struct intel_encoder
*encoder
,
351 const struct intel_crtc_state
*old_crtc_state
,
352 const struct drm_connector_state
*old_conn_state
)
354 intel_panel_disable_backlight(old_conn_state
);
357 static void pch_post_disable_lvds(struct intel_encoder
*encoder
,
358 const struct intel_crtc_state
*old_crtc_state
,
359 const struct drm_connector_state
*old_conn_state
)
361 intel_disable_lvds(encoder
, old_crtc_state
, old_conn_state
);
364 static enum drm_mode_status
365 intel_lvds_mode_valid(struct drm_connector
*connector
,
366 struct drm_display_mode
*mode
)
368 struct intel_connector
*intel_connector
= to_intel_connector(connector
);
369 struct drm_display_mode
*fixed_mode
= intel_connector
->panel
.fixed_mode
;
370 int max_pixclk
= to_i915(connector
->dev
)->max_dotclk_freq
;
372 if (mode
->hdisplay
> fixed_mode
->hdisplay
)
374 if (mode
->vdisplay
> fixed_mode
->vdisplay
)
376 if (fixed_mode
->clock
> max_pixclk
)
377 return MODE_CLOCK_HIGH
;
382 static bool intel_lvds_compute_config(struct intel_encoder
*intel_encoder
,
383 struct intel_crtc_state
*pipe_config
,
384 struct drm_connector_state
*conn_state
)
386 struct drm_i915_private
*dev_priv
= to_i915(intel_encoder
->base
.dev
);
387 struct intel_lvds_encoder
*lvds_encoder
=
388 to_lvds_encoder(&intel_encoder
->base
);
389 struct intel_connector
*intel_connector
=
390 &lvds_encoder
->attached_connector
->base
;
391 struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
392 struct intel_crtc
*intel_crtc
= to_intel_crtc(pipe_config
->base
.crtc
);
393 unsigned int lvds_bpp
;
395 /* Should never happen!! */
396 if (INTEL_GEN(dev_priv
) < 4 && intel_crtc
->pipe
== 0) {
397 DRM_ERROR("Can't support LVDS on pipe A\n");
401 if (lvds_encoder
->a3_power
== LVDS_A3_POWER_UP
)
406 if (lvds_bpp
!= pipe_config
->pipe_bpp
&& !pipe_config
->bw_constrained
) {
407 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
408 pipe_config
->pipe_bpp
, lvds_bpp
);
409 pipe_config
->pipe_bpp
= lvds_bpp
;
413 * We have timings from the BIOS for the panel, put them in
414 * to the adjusted mode. The CRTC will be set up for this mode,
415 * with the panel scaling set up to source from the H/VDisplay
416 * of the original mode.
418 intel_fixed_panel_mode(intel_connector
->panel
.fixed_mode
,
421 if (HAS_PCH_SPLIT(dev_priv
)) {
422 pipe_config
->has_pch_encoder
= true;
424 intel_pch_panel_fitting(intel_crtc
, pipe_config
,
425 conn_state
->scaling_mode
);
427 intel_gmch_panel_fitting(intel_crtc
, pipe_config
,
428 conn_state
->scaling_mode
);
433 * XXX: It would be nice to support lower refresh rates on the
434 * panels to reduce power consumption, and perhaps match the
435 * user's requested refresh rate.
441 static enum drm_connector_status
442 intel_lvds_detect(struct drm_connector
*connector
, bool force
)
444 return connector_status_connected
;
448 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
450 static int intel_lvds_get_modes(struct drm_connector
*connector
)
452 struct intel_lvds_connector
*lvds_connector
= to_lvds_connector(connector
);
453 struct drm_device
*dev
= connector
->dev
;
454 struct drm_display_mode
*mode
;
456 /* use cached edid if we have one */
457 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
458 return drm_add_edid_modes(connector
, lvds_connector
->base
.edid
);
460 mode
= drm_mode_duplicate(dev
, lvds_connector
->base
.panel
.fixed_mode
);
464 drm_mode_probed_add(connector
, mode
);
469 * intel_lvds_destroy - unregister and free LVDS structures
470 * @connector: connector to free
472 * Unregister the DDC bus for this connector then free the driver private
475 static void intel_lvds_destroy(struct drm_connector
*connector
)
477 struct intel_lvds_connector
*lvds_connector
=
478 to_lvds_connector(connector
);
480 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
481 kfree(lvds_connector
->base
.edid
);
483 intel_panel_fini(&lvds_connector
->base
.panel
);
485 drm_connector_cleanup(connector
);
489 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs
= {
490 .get_modes
= intel_lvds_get_modes
,
491 .mode_valid
= intel_lvds_mode_valid
,
492 .atomic_check
= intel_digital_connector_atomic_check
,
495 static const struct drm_connector_funcs intel_lvds_connector_funcs
= {
496 .detect
= intel_lvds_detect
,
497 .fill_modes
= drm_helper_probe_single_connector_modes
,
498 .atomic_get_property
= intel_digital_connector_atomic_get_property
,
499 .atomic_set_property
= intel_digital_connector_atomic_set_property
,
500 .late_register
= intel_connector_register
,
501 .early_unregister
= intel_connector_unregister
,
502 .destroy
= intel_lvds_destroy
,
503 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
504 .atomic_duplicate_state
= intel_digital_connector_duplicate_state
,
507 static const struct drm_encoder_funcs intel_lvds_enc_funcs
= {
508 .destroy
= intel_encoder_destroy
,
511 static int intel_no_lvds_dmi_callback(const struct dmi_system_id
*id
)
513 DRM_INFO("Skipping LVDS initialization for %s\n", id
->ident
);
517 /* These systems claim to have LVDS, but really don't */
518 static const struct dmi_system_id intel_no_lvds
[] = {
520 .callback
= intel_no_lvds_dmi_callback
,
521 .ident
= "Apple Mac Mini (Core series)",
523 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
524 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini1,1"),
528 .callback
= intel_no_lvds_dmi_callback
,
529 .ident
= "Apple Mac Mini (Core 2 series)",
531 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
532 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini2,1"),
536 .callback
= intel_no_lvds_dmi_callback
,
537 .ident
= "MSI IM-945GSE-A",
539 DMI_MATCH(DMI_SYS_VENDOR
, "MSI"),
540 DMI_MATCH(DMI_PRODUCT_NAME
, "A9830IMS"),
544 .callback
= intel_no_lvds_dmi_callback
,
545 .ident
= "Dell Studio Hybrid",
547 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
548 DMI_MATCH(DMI_PRODUCT_NAME
, "Studio Hybrid 140g"),
552 .callback
= intel_no_lvds_dmi_callback
,
553 .ident
= "Dell OptiPlex FX170",
555 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
556 DMI_MATCH(DMI_PRODUCT_NAME
, "OptiPlex FX170"),
560 .callback
= intel_no_lvds_dmi_callback
,
561 .ident
= "AOpen Mini PC",
563 DMI_MATCH(DMI_SYS_VENDOR
, "AOpen"),
564 DMI_MATCH(DMI_PRODUCT_NAME
, "i965GMx-IF"),
568 .callback
= intel_no_lvds_dmi_callback
,
569 .ident
= "AOpen Mini PC MP915",
571 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
572 DMI_MATCH(DMI_BOARD_NAME
, "i915GMx-F"),
576 .callback
= intel_no_lvds_dmi_callback
,
577 .ident
= "AOpen i915GMm-HFS",
579 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
580 DMI_MATCH(DMI_BOARD_NAME
, "i915GMm-HFS"),
584 .callback
= intel_no_lvds_dmi_callback
,
585 .ident
= "AOpen i45GMx-I",
587 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
588 DMI_MATCH(DMI_BOARD_NAME
, "i45GMx-I"),
592 .callback
= intel_no_lvds_dmi_callback
,
593 .ident
= "Aopen i945GTt-VFA",
595 DMI_MATCH(DMI_PRODUCT_VERSION
, "AO00001JW"),
599 .callback
= intel_no_lvds_dmi_callback
,
600 .ident
= "Clientron U800",
602 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
603 DMI_MATCH(DMI_PRODUCT_NAME
, "U800"),
607 .callback
= intel_no_lvds_dmi_callback
,
608 .ident
= "Clientron E830",
610 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
611 DMI_MATCH(DMI_PRODUCT_NAME
, "E830"),
615 .callback
= intel_no_lvds_dmi_callback
,
616 .ident
= "Asus EeeBox PC EB1007",
618 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer INC."),
619 DMI_MATCH(DMI_PRODUCT_NAME
, "EB1007"),
623 .callback
= intel_no_lvds_dmi_callback
,
624 .ident
= "Asus AT5NM10T-I",
626 DMI_MATCH(DMI_BOARD_VENDOR
, "ASUSTeK Computer INC."),
627 DMI_MATCH(DMI_BOARD_NAME
, "AT5NM10T-I"),
631 .callback
= intel_no_lvds_dmi_callback
,
632 .ident
= "Hewlett-Packard HP t5740",
634 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
635 DMI_MATCH(DMI_PRODUCT_NAME
, " t5740"),
639 .callback
= intel_no_lvds_dmi_callback
,
640 .ident
= "Hewlett-Packard t5745",
642 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
643 DMI_MATCH(DMI_PRODUCT_NAME
, "hp t5745"),
647 .callback
= intel_no_lvds_dmi_callback
,
648 .ident
= "Hewlett-Packard st5747",
650 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
651 DMI_MATCH(DMI_PRODUCT_NAME
, "hp st5747"),
655 .callback
= intel_no_lvds_dmi_callback
,
656 .ident
= "MSI Wind Box DC500",
658 DMI_MATCH(DMI_BOARD_VENDOR
, "MICRO-STAR INTERNATIONAL CO., LTD"),
659 DMI_MATCH(DMI_BOARD_NAME
, "MS-7469"),
663 .callback
= intel_no_lvds_dmi_callback
,
664 .ident
= "Gigabyte GA-D525TUD",
666 DMI_MATCH(DMI_BOARD_VENDOR
, "Gigabyte Technology Co., Ltd."),
667 DMI_MATCH(DMI_BOARD_NAME
, "D525TUD"),
671 .callback
= intel_no_lvds_dmi_callback
,
672 .ident
= "Supermicro X7SPA-H",
674 DMI_MATCH(DMI_SYS_VENDOR
, "Supermicro"),
675 DMI_MATCH(DMI_PRODUCT_NAME
, "X7SPA-H"),
679 .callback
= intel_no_lvds_dmi_callback
,
680 .ident
= "Fujitsu Esprimo Q900",
682 DMI_MATCH(DMI_SYS_VENDOR
, "FUJITSU"),
683 DMI_MATCH(DMI_PRODUCT_NAME
, "ESPRIMO Q900"),
687 .callback
= intel_no_lvds_dmi_callback
,
688 .ident
= "Intel D410PT",
690 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
691 DMI_MATCH(DMI_BOARD_NAME
, "D410PT"),
695 .callback
= intel_no_lvds_dmi_callback
,
696 .ident
= "Intel D425KT",
698 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
699 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D425KT"),
703 .callback
= intel_no_lvds_dmi_callback
,
704 .ident
= "Intel D510MO",
706 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
707 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D510MO"),
711 .callback
= intel_no_lvds_dmi_callback
,
712 .ident
= "Intel D525MW",
714 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
715 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D525MW"),
719 .callback
= intel_no_lvds_dmi_callback
,
720 .ident
= "Radiant P845",
722 DMI_MATCH(DMI_SYS_VENDOR
, "Radiant Systems Inc"),
723 DMI_MATCH(DMI_PRODUCT_NAME
, "P845"),
727 { } /* terminating entry */
730 static int intel_dual_link_lvds_callback(const struct dmi_system_id
*id
)
732 DRM_INFO("Forcing lvds to dual link mode on %s\n", id
->ident
);
736 static const struct dmi_system_id intel_dual_link_lvds
[] = {
738 .callback
= intel_dual_link_lvds_callback
,
739 .ident
= "Apple MacBook Pro 15\" (2010)",
741 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
742 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro6,2"),
746 .callback
= intel_dual_link_lvds_callback
,
747 .ident
= "Apple MacBook Pro 15\" (2011)",
749 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
750 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro8,2"),
754 .callback
= intel_dual_link_lvds_callback
,
755 .ident
= "Apple MacBook Pro 15\" (2012)",
757 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
758 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro9,1"),
761 { } /* terminating entry */
764 struct intel_encoder
*intel_get_lvds_encoder(struct drm_device
*dev
)
766 struct intel_encoder
*intel_encoder
;
768 for_each_intel_encoder(dev
, intel_encoder
)
769 if (intel_encoder
->type
== INTEL_OUTPUT_LVDS
)
770 return intel_encoder
;
775 bool intel_is_dual_link_lvds(struct drm_device
*dev
)
777 struct intel_encoder
*encoder
= intel_get_lvds_encoder(dev
);
779 return encoder
&& to_lvds_encoder(&encoder
->base
)->is_dual_link
;
782 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder
*lvds_encoder
)
784 struct drm_device
*dev
= lvds_encoder
->base
.base
.dev
;
786 struct drm_i915_private
*dev_priv
= to_i915(dev
);
788 /* use the module option value if specified */
789 if (i915_modparams
.lvds_channel_mode
> 0)
790 return i915_modparams
.lvds_channel_mode
== 2;
792 /* single channel LVDS is limited to 112 MHz */
793 if (lvds_encoder
->attached_connector
->base
.panel
.fixed_mode
->clock
797 if (dmi_check_system(intel_dual_link_lvds
))
800 /* BIOS should set the proper LVDS register value at boot, but
801 * in reality, it doesn't set the value when the lid is closed;
802 * we need to check "the value to be set" in VBT when LVDS
803 * register is uninitialized.
805 val
= I915_READ(lvds_encoder
->reg
);
806 if (!(val
& ~(LVDS_PIPE_MASK
| LVDS_DETECTED
)))
807 val
= dev_priv
->vbt
.bios_lvds_val
;
809 return (val
& LVDS_CLKB_POWER_MASK
) == LVDS_CLKB_POWER_UP
;
812 static bool intel_lvds_supported(struct drm_i915_private
*dev_priv
)
814 /* With the introduction of the PCH we gained a dedicated
815 * LVDS presence pin, use it. */
816 if (HAS_PCH_IBX(dev_priv
) || HAS_PCH_CPT(dev_priv
))
819 /* Otherwise LVDS was only attached to mobile products,
820 * except for the inglorious 830gm */
821 if (INTEL_GEN(dev_priv
) <= 4 &&
822 IS_MOBILE(dev_priv
) && !IS_I830(dev_priv
))
829 * intel_lvds_init - setup LVDS connectors on this device
832 * Create the connector, register the LVDS DDC bus, and try to figure out what
833 * modes we can display on the LVDS panel (if present).
835 void intel_lvds_init(struct drm_i915_private
*dev_priv
)
837 struct drm_device
*dev
= &dev_priv
->drm
;
838 struct intel_lvds_encoder
*lvds_encoder
;
839 struct intel_encoder
*intel_encoder
;
840 struct intel_lvds_connector
*lvds_connector
;
841 struct intel_connector
*intel_connector
;
842 struct drm_connector
*connector
;
843 struct drm_encoder
*encoder
;
844 struct drm_display_mode
*scan
; /* *modes, *bios_mode; */
845 struct drm_display_mode
*fixed_mode
= NULL
;
846 struct drm_display_mode
*downclock_mode
= NULL
;
853 if (!intel_lvds_supported(dev_priv
))
856 /* Skip init on machines we know falsely report LVDS */
857 if (dmi_check_system(intel_no_lvds
))
860 if (HAS_PCH_SPLIT(dev_priv
))
865 lvds
= I915_READ(lvds_reg
);
867 if (HAS_PCH_SPLIT(dev_priv
)) {
868 if ((lvds
& LVDS_DETECTED
) == 0)
870 if (dev_priv
->vbt
.edp
.support
) {
871 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
876 pin
= GMBUS_PIN_PANEL
;
877 if (!intel_bios_is_lvds_present(dev_priv
, &pin
)) {
878 if ((lvds
& LVDS_PORT_EN
) == 0) {
879 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
882 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
885 lvds_encoder
= kzalloc(sizeof(*lvds_encoder
), GFP_KERNEL
);
889 lvds_connector
= kzalloc(sizeof(*lvds_connector
), GFP_KERNEL
);
890 if (!lvds_connector
) {
895 if (intel_connector_init(&lvds_connector
->base
) < 0) {
896 kfree(lvds_connector
);
901 lvds_encoder
->attached_connector
= lvds_connector
;
903 intel_encoder
= &lvds_encoder
->base
;
904 encoder
= &intel_encoder
->base
;
905 intel_connector
= &lvds_connector
->base
;
906 connector
= &intel_connector
->base
;
907 drm_connector_init(dev
, &intel_connector
->base
, &intel_lvds_connector_funcs
,
908 DRM_MODE_CONNECTOR_LVDS
);
910 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_lvds_enc_funcs
,
911 DRM_MODE_ENCODER_LVDS
, "LVDS");
913 intel_encoder
->enable
= intel_enable_lvds
;
914 intel_encoder
->pre_enable
= intel_pre_enable_lvds
;
915 intel_encoder
->compute_config
= intel_lvds_compute_config
;
916 if (HAS_PCH_SPLIT(dev_priv
)) {
917 intel_encoder
->disable
= pch_disable_lvds
;
918 intel_encoder
->post_disable
= pch_post_disable_lvds
;
920 intel_encoder
->disable
= gmch_disable_lvds
;
922 intel_encoder
->get_hw_state
= intel_lvds_get_hw_state
;
923 intel_encoder
->get_config
= intel_lvds_get_config
;
924 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
926 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
928 intel_encoder
->type
= INTEL_OUTPUT_LVDS
;
929 intel_encoder
->power_domain
= POWER_DOMAIN_PORT_OTHER
;
930 intel_encoder
->port
= PORT_NONE
;
931 intel_encoder
->cloneable
= 0;
932 if (HAS_PCH_SPLIT(dev_priv
))
933 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
934 else if (IS_GEN4(dev_priv
))
935 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
937 intel_encoder
->crtc_mask
= (1 << 1);
939 drm_connector_helper_add(connector
, &intel_lvds_connector_helper_funcs
);
940 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
941 connector
->interlace_allowed
= false;
942 connector
->doublescan_allowed
= false;
944 lvds_encoder
->reg
= lvds_reg
;
946 /* create the scaling mode property */
947 allowed_scalers
= BIT(DRM_MODE_SCALE_ASPECT
);
948 allowed_scalers
|= BIT(DRM_MODE_SCALE_FULLSCREEN
);
949 allowed_scalers
|= BIT(DRM_MODE_SCALE_CENTER
);
950 drm_connector_attach_scaling_mode_property(connector
, allowed_scalers
);
951 connector
->state
->scaling_mode
= DRM_MODE_SCALE_ASPECT
;
953 intel_lvds_pps_get_hw_state(dev_priv
, &lvds_encoder
->init_pps
);
954 lvds_encoder
->init_lvds_val
= lvds
;
958 * 1) check for EDID on DDC
959 * 2) check for VBT data
960 * 3) check to see if LVDS is already on
961 * if none of the above, no panel
965 * Attempt to get the fixed panel mode from DDC. Assume that the
966 * preferred mode is the right one.
968 mutex_lock(&dev
->mode_config
.mutex
);
969 if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC
)
970 edid
= drm_get_edid_switcheroo(connector
,
971 intel_gmbus_get_adapter(dev_priv
, pin
));
973 edid
= drm_get_edid(connector
,
974 intel_gmbus_get_adapter(dev_priv
, pin
));
976 if (drm_add_edid_modes(connector
, edid
)) {
977 drm_mode_connector_update_edid_property(connector
,
981 edid
= ERR_PTR(-EINVAL
);
984 edid
= ERR_PTR(-ENOENT
);
986 lvds_connector
->base
.edid
= edid
;
988 list_for_each_entry(scan
, &connector
->probed_modes
, head
) {
989 if (scan
->type
& DRM_MODE_TYPE_PREFERRED
) {
990 DRM_DEBUG_KMS("using preferred mode from EDID: ");
991 drm_mode_debug_printmodeline(scan
);
993 fixed_mode
= drm_mode_duplicate(dev
, scan
);
999 /* Failed to get EDID, what about VBT? */
1000 if (dev_priv
->vbt
.lfp_lvds_vbt_mode
) {
1001 DRM_DEBUG_KMS("using mode from VBT: ");
1002 drm_mode_debug_printmodeline(dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1004 fixed_mode
= drm_mode_duplicate(dev
, dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1006 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1007 connector
->display_info
.width_mm
= fixed_mode
->width_mm
;
1008 connector
->display_info
.height_mm
= fixed_mode
->height_mm
;
1014 * If we didn't get EDID, try checking if the panel is already turned
1015 * on. If so, assume that whatever is currently programmed is the
1018 fixed_mode
= intel_encoder_current_mode(intel_encoder
);
1020 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1021 drm_mode_debug_printmodeline(fixed_mode
);
1022 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1025 /* If we still don't have a mode after all that, give up. */
1030 mutex_unlock(&dev
->mode_config
.mutex
);
1032 intel_panel_init(&intel_connector
->panel
, fixed_mode
, downclock_mode
);
1033 intel_panel_setup_backlight(connector
, INVALID_PIPE
);
1035 lvds_encoder
->is_dual_link
= compute_is_dual_link_lvds(lvds_encoder
);
1036 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1037 lvds_encoder
->is_dual_link
? "dual" : "single");
1039 lvds_encoder
->a3_power
= lvds
& LVDS_A3_POWER_MASK
;
1044 mutex_unlock(&dev
->mode_config
.mutex
);
1046 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1047 drm_connector_cleanup(connector
);
1048 drm_encoder_cleanup(encoder
);
1049 kfree(lvds_encoder
);
1050 kfree(lvds_connector
);