2 * Copyright 2013 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
25 * Authors: Christian König <christian.koenig@amd.com>
28 #include <linux/firmware.h>
29 #include <linux/module.h>
34 #include "radeon_asic.h"
37 /* 1 second timeout */
38 #define VCE_IDLE_TIMEOUT_MS 1000
41 #define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin"
43 MODULE_FIRMWARE(FIRMWARE_BONAIRE
);
45 static void radeon_vce_idle_work_handler(struct work_struct
*work
);
48 * radeon_vce_init - allocate memory, load vce firmware
50 * @rdev: radeon_device pointer
52 * First step to get VCE online, allocate memory and load the firmware
54 int radeon_vce_init(struct radeon_device
*rdev
)
56 static const char *fw_version
= "[ATI LIB=VCEFW,";
57 static const char *fb_version
= "[ATI LIB=VCEFWSTATS,";
59 const char *fw_name
, *c
;
60 uint8_t start
, mid
, end
;
63 INIT_DELAYED_WORK(&rdev
->vce
.idle_work
, radeon_vce_idle_work_handler
);
65 switch (rdev
->family
) {
71 fw_name
= FIRMWARE_BONAIRE
;
78 r
= request_firmware(&rdev
->vce_fw
, fw_name
, rdev
->dev
);
80 dev_err(rdev
->dev
, "radeon_vce: Can't load firmware \"%s\"\n",
85 /* search for firmware version */
87 size
= rdev
->vce_fw
->size
- strlen(fw_version
) - 9;
88 c
= rdev
->vce_fw
->data
;
89 for (;size
> 0; --size
, ++c
)
90 if (strncmp(c
, fw_version
, strlen(fw_version
)) == 0)
96 c
+= strlen(fw_version
);
97 if (sscanf(c
, "%2hhd.%2hhd.%2hhd]", &start
, &mid
, &end
) != 3)
100 /* search for feedback version */
102 size
= rdev
->vce_fw
->size
- strlen(fb_version
) - 3;
103 c
= rdev
->vce_fw
->data
;
104 for (;size
> 0; --size
, ++c
)
105 if (strncmp(c
, fb_version
, strlen(fb_version
)) == 0)
111 c
+= strlen(fb_version
);
112 if (sscanf(c
, "%2u]", &rdev
->vce
.fb_version
) != 1)
115 DRM_INFO("Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d!\n",
116 start
, mid
, end
, rdev
->vce
.fb_version
);
118 rdev
->vce
.fw_version
= (start
<< 24) | (mid
<< 16) | (end
<< 8);
120 /* we can only work with this fw version for now */
121 if (rdev
->vce
.fw_version
!= ((40 << 24) | (2 << 16) | (2 << 8)))
124 /* allocate firmware, stack and heap BO */
126 size
= RADEON_GPU_PAGE_ALIGN(rdev
->vce_fw
->size
) +
127 RADEON_VCE_STACK_SIZE
+ RADEON_VCE_HEAP_SIZE
;
128 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true,
129 RADEON_GEM_DOMAIN_VRAM
, 0, NULL
, NULL
,
132 dev_err(rdev
->dev
, "(%d) failed to allocate VCE bo\n", r
);
136 r
= radeon_bo_reserve(rdev
->vce
.vcpu_bo
, false);
138 radeon_bo_unref(&rdev
->vce
.vcpu_bo
);
139 dev_err(rdev
->dev
, "(%d) failed to reserve VCE bo\n", r
);
143 r
= radeon_bo_pin(rdev
->vce
.vcpu_bo
, RADEON_GEM_DOMAIN_VRAM
,
144 &rdev
->vce
.gpu_addr
);
145 radeon_bo_unreserve(rdev
->vce
.vcpu_bo
);
147 radeon_bo_unref(&rdev
->vce
.vcpu_bo
);
148 dev_err(rdev
->dev
, "(%d) VCE bo pin failed\n", r
);
152 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
153 atomic_set(&rdev
->vce
.handles
[i
], 0);
154 rdev
->vce
.filp
[i
] = NULL
;
161 * radeon_vce_fini - free memory
163 * @rdev: radeon_device pointer
165 * Last step on VCE teardown, free firmware memory
167 void radeon_vce_fini(struct radeon_device
*rdev
)
169 if (rdev
->vce
.vcpu_bo
== NULL
)
172 radeon_bo_unref(&rdev
->vce
.vcpu_bo
);
174 release_firmware(rdev
->vce_fw
);
178 * radeon_vce_suspend - unpin VCE fw memory
180 * @rdev: radeon_device pointer
183 int radeon_vce_suspend(struct radeon_device
*rdev
)
187 if (rdev
->vce
.vcpu_bo
== NULL
)
190 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
)
191 if (atomic_read(&rdev
->vce
.handles
[i
]))
194 if (i
== RADEON_MAX_VCE_HANDLES
)
197 /* TODO: suspending running encoding sessions isn't supported */
202 * radeon_vce_resume - pin VCE fw memory
204 * @rdev: radeon_device pointer
207 int radeon_vce_resume(struct radeon_device
*rdev
)
212 if (rdev
->vce
.vcpu_bo
== NULL
)
215 r
= radeon_bo_reserve(rdev
->vce
.vcpu_bo
, false);
217 dev_err(rdev
->dev
, "(%d) failed to reserve VCE bo\n", r
);
221 r
= radeon_bo_kmap(rdev
->vce
.vcpu_bo
, &cpu_addr
);
223 radeon_bo_unreserve(rdev
->vce
.vcpu_bo
);
224 dev_err(rdev
->dev
, "(%d) VCE map failed\n", r
);
228 memcpy(cpu_addr
, rdev
->vce_fw
->data
, rdev
->vce_fw
->size
);
230 radeon_bo_kunmap(rdev
->vce
.vcpu_bo
);
232 radeon_bo_unreserve(rdev
->vce
.vcpu_bo
);
238 * radeon_vce_idle_work_handler - power off VCE
240 * @work: pointer to work structure
242 * power of VCE when it's not used any more
244 static void radeon_vce_idle_work_handler(struct work_struct
*work
)
246 struct radeon_device
*rdev
=
247 container_of(work
, struct radeon_device
, vce
.idle_work
.work
);
249 if ((radeon_fence_count_emitted(rdev
, TN_RING_TYPE_VCE1_INDEX
) == 0) &&
250 (radeon_fence_count_emitted(rdev
, TN_RING_TYPE_VCE2_INDEX
) == 0)) {
251 if ((rdev
->pm
.pm_method
== PM_METHOD_DPM
) && rdev
->pm
.dpm_enabled
) {
252 radeon_dpm_enable_vce(rdev
, false);
254 radeon_set_vce_clocks(rdev
, 0, 0);
257 schedule_delayed_work(&rdev
->vce
.idle_work
,
258 msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS
));
263 * radeon_vce_note_usage - power up VCE
265 * @rdev: radeon_device pointer
267 * Make sure VCE is powerd up when we want to use it
269 void radeon_vce_note_usage(struct radeon_device
*rdev
)
271 bool streams_changed
= false;
272 bool set_clocks
= !cancel_delayed_work_sync(&rdev
->vce
.idle_work
);
273 set_clocks
&= schedule_delayed_work(&rdev
->vce
.idle_work
,
274 msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS
));
276 if ((rdev
->pm
.pm_method
== PM_METHOD_DPM
) && rdev
->pm
.dpm_enabled
) {
277 /* XXX figure out if the streams changed */
278 streams_changed
= false;
281 if (set_clocks
|| streams_changed
) {
282 if ((rdev
->pm
.pm_method
== PM_METHOD_DPM
) && rdev
->pm
.dpm_enabled
) {
283 radeon_dpm_enable_vce(rdev
, true);
285 radeon_set_vce_clocks(rdev
, 53300, 40000);
291 * radeon_vce_free_handles - free still open VCE handles
293 * @rdev: radeon_device pointer
294 * @filp: drm file pointer
296 * Close all VCE handles still open by this file pointer
298 void radeon_vce_free_handles(struct radeon_device
*rdev
, struct drm_file
*filp
)
301 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
302 uint32_t handle
= atomic_read(&rdev
->vce
.handles
[i
]);
303 if (!handle
|| rdev
->vce
.filp
[i
] != filp
)
306 radeon_vce_note_usage(rdev
);
308 r
= radeon_vce_get_destroy_msg(rdev
, TN_RING_TYPE_VCE1_INDEX
,
311 DRM_ERROR("Error destroying VCE handle (%d)!\n", r
);
313 rdev
->vce
.filp
[i
] = NULL
;
314 atomic_set(&rdev
->vce
.handles
[i
], 0);
319 * radeon_vce_get_create_msg - generate a VCE create msg
321 * @rdev: radeon_device pointer
322 * @ring: ring we should submit the msg to
323 * @handle: VCE session handle to use
324 * @fence: optional fence to return
326 * Open up a stream for HW test
328 int radeon_vce_get_create_msg(struct radeon_device
*rdev
, int ring
,
329 uint32_t handle
, struct radeon_fence
**fence
)
331 const unsigned ib_size_dw
= 1024;
336 r
= radeon_ib_get(rdev
, ring
, &ib
, NULL
, ib_size_dw
* 4);
338 DRM_ERROR("radeon: failed to get ib (%d).\n", r
);
342 dummy
= ib
.gpu_addr
+ 1024;
344 /* stitch together an VCE create msg */
346 ib
.ptr
[ib
.length_dw
++] = 0x0000000c; /* len */
347 ib
.ptr
[ib
.length_dw
++] = 0x00000001; /* session cmd */
348 ib
.ptr
[ib
.length_dw
++] = handle
;
350 ib
.ptr
[ib
.length_dw
++] = 0x00000030; /* len */
351 ib
.ptr
[ib
.length_dw
++] = 0x01000001; /* create cmd */
352 ib
.ptr
[ib
.length_dw
++] = 0x00000000;
353 ib
.ptr
[ib
.length_dw
++] = 0x00000042;
354 ib
.ptr
[ib
.length_dw
++] = 0x0000000a;
355 ib
.ptr
[ib
.length_dw
++] = 0x00000001;
356 ib
.ptr
[ib
.length_dw
++] = 0x00000080;
357 ib
.ptr
[ib
.length_dw
++] = 0x00000060;
358 ib
.ptr
[ib
.length_dw
++] = 0x00000100;
359 ib
.ptr
[ib
.length_dw
++] = 0x00000100;
360 ib
.ptr
[ib
.length_dw
++] = 0x0000000c;
361 ib
.ptr
[ib
.length_dw
++] = 0x00000000;
363 ib
.ptr
[ib
.length_dw
++] = 0x00000014; /* len */
364 ib
.ptr
[ib
.length_dw
++] = 0x05000005; /* feedback buffer */
365 ib
.ptr
[ib
.length_dw
++] = upper_32_bits(dummy
);
366 ib
.ptr
[ib
.length_dw
++] = dummy
;
367 ib
.ptr
[ib
.length_dw
++] = 0x00000001;
369 for (i
= ib
.length_dw
; i
< ib_size_dw
; ++i
)
372 r
= radeon_ib_schedule(rdev
, &ib
, NULL
, false);
374 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r
);
378 *fence
= radeon_fence_ref(ib
.fence
);
380 radeon_ib_free(rdev
, &ib
);
386 * radeon_vce_get_destroy_msg - generate a VCE destroy msg
388 * @rdev: radeon_device pointer
389 * @ring: ring we should submit the msg to
390 * @handle: VCE session handle to use
391 * @fence: optional fence to return
393 * Close up a stream for HW test or if userspace failed to do so
395 int radeon_vce_get_destroy_msg(struct radeon_device
*rdev
, int ring
,
396 uint32_t handle
, struct radeon_fence
**fence
)
398 const unsigned ib_size_dw
= 1024;
403 r
= radeon_ib_get(rdev
, ring
, &ib
, NULL
, ib_size_dw
* 4);
405 DRM_ERROR("radeon: failed to get ib (%d).\n", r
);
409 dummy
= ib
.gpu_addr
+ 1024;
411 /* stitch together an VCE destroy msg */
413 ib
.ptr
[ib
.length_dw
++] = 0x0000000c; /* len */
414 ib
.ptr
[ib
.length_dw
++] = 0x00000001; /* session cmd */
415 ib
.ptr
[ib
.length_dw
++] = handle
;
417 ib
.ptr
[ib
.length_dw
++] = 0x00000014; /* len */
418 ib
.ptr
[ib
.length_dw
++] = 0x05000005; /* feedback buffer */
419 ib
.ptr
[ib
.length_dw
++] = upper_32_bits(dummy
);
420 ib
.ptr
[ib
.length_dw
++] = dummy
;
421 ib
.ptr
[ib
.length_dw
++] = 0x00000001;
423 ib
.ptr
[ib
.length_dw
++] = 0x00000008; /* len */
424 ib
.ptr
[ib
.length_dw
++] = 0x02000001; /* destroy cmd */
426 for (i
= ib
.length_dw
; i
< ib_size_dw
; ++i
)
429 r
= radeon_ib_schedule(rdev
, &ib
, NULL
, false);
431 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r
);
435 *fence
= radeon_fence_ref(ib
.fence
);
437 radeon_ib_free(rdev
, &ib
);
443 * radeon_vce_cs_reloc - command submission relocation
446 * @lo: address of lower dword
447 * @hi: address of higher dword
448 * @size: size of checker for relocation buffer
450 * Patch relocation inside command stream with real buffer address
452 int radeon_vce_cs_reloc(struct radeon_cs_parser
*p
, int lo
, int hi
,
455 struct radeon_cs_chunk
*relocs_chunk
;
456 struct radeon_bo_list
*reloc
;
457 uint64_t start
, end
, offset
;
460 relocs_chunk
= p
->chunk_relocs
;
461 offset
= radeon_get_ib_value(p
, lo
);
462 idx
= radeon_get_ib_value(p
, hi
);
464 if (idx
>= relocs_chunk
->length_dw
) {
465 DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
466 idx
, relocs_chunk
->length_dw
);
470 reloc
= &p
->relocs
[(idx
/ 4)];
471 start
= reloc
->gpu_offset
;
472 end
= start
+ radeon_bo_size(reloc
->robj
);
475 p
->ib
.ptr
[lo
] = start
& 0xFFFFFFFF;
476 p
->ib
.ptr
[hi
] = start
>> 32;
479 DRM_ERROR("invalid reloc offset %llX!\n", offset
);
482 if ((end
- start
) < size
) {
483 DRM_ERROR("buffer to small (%d / %d)!\n",
484 (unsigned)(end
- start
), size
);
492 * radeon_vce_validate_handle - validate stream handle
495 * @handle: handle to validate
496 * @allocated: allocated a new handle?
498 * Validates the handle and return the found session index or -EINVAL
499 * we we don't have another free session index.
501 static int radeon_vce_validate_handle(struct radeon_cs_parser
*p
,
502 uint32_t handle
, bool *allocated
)
508 /* validate the handle */
509 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
510 if (atomic_read(&p
->rdev
->vce
.handles
[i
]) == handle
) {
511 if (p
->rdev
->vce
.filp
[i
] != p
->filp
) {
512 DRM_ERROR("VCE handle collision detected!\n");
519 /* handle not found try to alloc a new one */
520 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
) {
521 if (!atomic_cmpxchg(&p
->rdev
->vce
.handles
[i
], 0, handle
)) {
522 p
->rdev
->vce
.filp
[i
] = p
->filp
;
523 p
->rdev
->vce
.img_size
[i
] = 0;
529 DRM_ERROR("No more free VCE handles!\n");
534 * radeon_vce_cs_parse - parse and validate the command stream
539 int radeon_vce_cs_parse(struct radeon_cs_parser
*p
)
541 int session_idx
= -1;
542 bool destroyed
= false, created
= false, allocated
= false;
543 uint32_t tmp
, handle
= 0;
544 uint32_t *size
= &tmp
;
547 while (p
->idx
< p
->chunk_ib
->length_dw
) {
548 uint32_t len
= radeon_get_ib_value(p
, p
->idx
);
549 uint32_t cmd
= radeon_get_ib_value(p
, p
->idx
+ 1);
551 if ((len
< 8) || (len
& 3)) {
552 DRM_ERROR("invalid VCE command length (%d)!\n", len
);
558 DRM_ERROR("No other command allowed after destroy!\n");
564 case 0x00000001: // session
565 handle
= radeon_get_ib_value(p
, p
->idx
+ 2);
566 session_idx
= radeon_vce_validate_handle(p
, handle
,
570 size
= &p
->rdev
->vce
.img_size
[session_idx
];
573 case 0x00000002: // task info
576 case 0x01000001: // create
579 DRM_ERROR("Handle already in use!\n");
584 *size
= radeon_get_ib_value(p
, p
->idx
+ 8) *
585 radeon_get_ib_value(p
, p
->idx
+ 10) *
589 case 0x04000001: // config extension
590 case 0x04000002: // pic control
591 case 0x04000005: // rate control
592 case 0x04000007: // motion estimation
593 case 0x04000008: // rdo
594 case 0x04000009: // vui
597 case 0x03000001: // encode
598 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 10, p
->idx
+ 9,
603 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 12, p
->idx
+ 11,
609 case 0x02000001: // destroy
613 case 0x05000001: // context buffer
614 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 3, p
->idx
+ 2,
620 case 0x05000004: // video bitstream buffer
621 tmp
= radeon_get_ib_value(p
, p
->idx
+ 4);
622 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 3, p
->idx
+ 2,
628 case 0x05000005: // feedback buffer
629 r
= radeon_vce_cs_reloc(p
, p
->idx
+ 3, p
->idx
+ 2,
636 DRM_ERROR("invalid VCE command (0x%x)!\n", cmd
);
641 if (session_idx
== -1) {
642 DRM_ERROR("no session command at start of IB\n");
650 if (allocated
&& !created
) {
651 DRM_ERROR("New session without create command!\n");
656 if ((!r
&& destroyed
) || (r
&& allocated
)) {
658 * IB contains a destroy msg or we have allocated an
659 * handle and got an error, anyway free the handle
661 for (i
= 0; i
< RADEON_MAX_VCE_HANDLES
; ++i
)
662 atomic_cmpxchg(&p
->rdev
->vce
.handles
[i
], handle
, 0);
669 * radeon_vce_semaphore_emit - emit a semaphore command
671 * @rdev: radeon_device pointer
672 * @ring: engine to use
673 * @semaphore: address of semaphore
674 * @emit_wait: true=emit wait, false=emit signal
677 bool radeon_vce_semaphore_emit(struct radeon_device
*rdev
,
678 struct radeon_ring
*ring
,
679 struct radeon_semaphore
*semaphore
,
682 uint64_t addr
= semaphore
->gpu_addr
;
684 radeon_ring_write(ring
, VCE_CMD_SEMAPHORE
);
685 radeon_ring_write(ring
, (addr
>> 3) & 0x000FFFFF);
686 radeon_ring_write(ring
, (addr
>> 23) & 0x000FFFFF);
687 radeon_ring_write(ring
, 0x01003000 | (emit_wait
? 1 : 0));
689 radeon_ring_write(ring
, VCE_CMD_END
);
695 * radeon_vce_ib_execute - execute indirect buffer
697 * @rdev: radeon_device pointer
698 * @ib: the IB to execute
701 void radeon_vce_ib_execute(struct radeon_device
*rdev
, struct radeon_ib
*ib
)
703 struct radeon_ring
*ring
= &rdev
->ring
[ib
->ring
];
704 radeon_ring_write(ring
, VCE_CMD_IB
);
705 radeon_ring_write(ring
, ib
->gpu_addr
);
706 radeon_ring_write(ring
, upper_32_bits(ib
->gpu_addr
));
707 radeon_ring_write(ring
, ib
->length_dw
);
711 * radeon_vce_fence_emit - add a fence command to the ring
713 * @rdev: radeon_device pointer
717 void radeon_vce_fence_emit(struct radeon_device
*rdev
,
718 struct radeon_fence
*fence
)
720 struct radeon_ring
*ring
= &rdev
->ring
[fence
->ring
];
721 uint64_t addr
= rdev
->fence_drv
[fence
->ring
].gpu_addr
;
723 radeon_ring_write(ring
, VCE_CMD_FENCE
);
724 radeon_ring_write(ring
, addr
);
725 radeon_ring_write(ring
, upper_32_bits(addr
));
726 radeon_ring_write(ring
, fence
->seq
);
727 radeon_ring_write(ring
, VCE_CMD_TRAP
);
728 radeon_ring_write(ring
, VCE_CMD_END
);
732 * radeon_vce_ring_test - test if VCE ring is working
734 * @rdev: radeon_device pointer
735 * @ring: the engine to test on
738 int radeon_vce_ring_test(struct radeon_device
*rdev
, struct radeon_ring
*ring
)
740 uint32_t rptr
= vce_v1_0_get_rptr(rdev
, ring
);
744 r
= radeon_ring_lock(rdev
, ring
, 16);
746 DRM_ERROR("radeon: vce failed to lock ring %d (%d).\n",
750 radeon_ring_write(ring
, VCE_CMD_END
);
751 radeon_ring_unlock_commit(rdev
, ring
, false);
753 for (i
= 0; i
< rdev
->usec_timeout
; i
++) {
754 if (vce_v1_0_get_rptr(rdev
, ring
) != rptr
)
759 if (i
< rdev
->usec_timeout
) {
760 DRM_INFO("ring test on %d succeeded in %d usecs\n",
763 DRM_ERROR("radeon: ring %d test failed\n",
772 * radeon_vce_ib_test - test if VCE IBs are working
774 * @rdev: radeon_device pointer
775 * @ring: the engine to test on
778 int radeon_vce_ib_test(struct radeon_device
*rdev
, struct radeon_ring
*ring
)
780 struct radeon_fence
*fence
= NULL
;
783 r
= radeon_vce_get_create_msg(rdev
, ring
->idx
, 1, NULL
);
785 DRM_ERROR("radeon: failed to get create msg (%d).\n", r
);
789 r
= radeon_vce_get_destroy_msg(rdev
, ring
->idx
, 1, &fence
);
791 DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r
);
795 r
= radeon_fence_wait(fence
, false);
797 DRM_ERROR("radeon: fence wait failed (%d).\n", r
);
799 DRM_INFO("ib test on ring %d succeeded\n", ring
->idx
);
802 radeon_fence_unref(&fence
);