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Merge tag 'driver-core-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[mirror_ubuntu-artful-kernel.git] / drivers / hwtracing / coresight / coresight-etm4x.c
1 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/types.h>
17 #include <linux/device.h>
18 #include <linux/module.h>
19 #include <linux/io.h>
20 #include <linux/err.h>
21 #include <linux/fs.h>
22 #include <linux/slab.h>
23 #include <linux/delay.h>
24 #include <linux/smp.h>
25 #include <linux/sysfs.h>
26 #include <linux/stat.h>
27 #include <linux/clk.h>
28 #include <linux/cpu.h>
29 #include <linux/coresight.h>
30 #include <linux/pm_wakeup.h>
31 #include <linux/amba/bus.h>
32 #include <linux/seq_file.h>
33 #include <linux/uaccess.h>
34 #include <linux/pm_runtime.h>
35 #include <asm/sections.h>
36
37 #include "coresight-etm4x.h"
38
39 static int boot_enable;
40 module_param_named(boot_enable, boot_enable, int, S_IRUGO);
41
42 /* The number of ETMv4 currently registered */
43 static int etm4_count;
44 static struct etmv4_drvdata *etmdrvdata[NR_CPUS];
45
46 static void etm4_os_unlock(void *info)
47 {
48 struct etmv4_drvdata *drvdata = (struct etmv4_drvdata *)info;
49
50 /* Writing any value to ETMOSLAR unlocks the trace registers */
51 writel_relaxed(0x0, drvdata->base + TRCOSLAR);
52 isb();
53 }
54
55 static bool etm4_arch_supported(u8 arch)
56 {
57 switch (arch) {
58 case ETM_ARCH_V4:
59 break;
60 default:
61 return false;
62 }
63 return true;
64 }
65
66 static int etm4_trace_id(struct coresight_device *csdev)
67 {
68 struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
69 unsigned long flags;
70 int trace_id = -1;
71
72 if (!drvdata->enable)
73 return drvdata->trcid;
74
75 pm_runtime_get_sync(drvdata->dev);
76 spin_lock_irqsave(&drvdata->spinlock, flags);
77
78 CS_UNLOCK(drvdata->base);
79 trace_id = readl_relaxed(drvdata->base + TRCTRACEIDR);
80 trace_id &= ETM_TRACEID_MASK;
81 CS_LOCK(drvdata->base);
82
83 spin_unlock_irqrestore(&drvdata->spinlock, flags);
84 pm_runtime_put(drvdata->dev);
85
86 return trace_id;
87 }
88
89 static void etm4_enable_hw(void *info)
90 {
91 int i;
92 struct etmv4_drvdata *drvdata = info;
93
94 CS_UNLOCK(drvdata->base);
95
96 etm4_os_unlock(drvdata);
97
98 /* Disable the trace unit before programming trace registers */
99 writel_relaxed(0, drvdata->base + TRCPRGCTLR);
100
101 /* wait for TRCSTATR.IDLE to go up */
102 if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1))
103 dev_err(drvdata->dev,
104 "timeout observed when probing at offset %#x\n",
105 TRCSTATR);
106
107 writel_relaxed(drvdata->pe_sel, drvdata->base + TRCPROCSELR);
108 writel_relaxed(drvdata->cfg, drvdata->base + TRCCONFIGR);
109 /* nothing specific implemented */
110 writel_relaxed(0x0, drvdata->base + TRCAUXCTLR);
111 writel_relaxed(drvdata->eventctrl0, drvdata->base + TRCEVENTCTL0R);
112 writel_relaxed(drvdata->eventctrl1, drvdata->base + TRCEVENTCTL1R);
113 writel_relaxed(drvdata->stall_ctrl, drvdata->base + TRCSTALLCTLR);
114 writel_relaxed(drvdata->ts_ctrl, drvdata->base + TRCTSCTLR);
115 writel_relaxed(drvdata->syncfreq, drvdata->base + TRCSYNCPR);
116 writel_relaxed(drvdata->ccctlr, drvdata->base + TRCCCCTLR);
117 writel_relaxed(drvdata->bb_ctrl, drvdata->base + TRCBBCTLR);
118 writel_relaxed(drvdata->trcid, drvdata->base + TRCTRACEIDR);
119 writel_relaxed(drvdata->vinst_ctrl, drvdata->base + TRCVICTLR);
120 writel_relaxed(drvdata->viiectlr, drvdata->base + TRCVIIECTLR);
121 writel_relaxed(drvdata->vissctlr,
122 drvdata->base + TRCVISSCTLR);
123 writel_relaxed(drvdata->vipcssctlr,
124 drvdata->base + TRCVIPCSSCTLR);
125 for (i = 0; i < drvdata->nrseqstate - 1; i++)
126 writel_relaxed(drvdata->seq_ctrl[i],
127 drvdata->base + TRCSEQEVRn(i));
128 writel_relaxed(drvdata->seq_rst, drvdata->base + TRCSEQRSTEVR);
129 writel_relaxed(drvdata->seq_state, drvdata->base + TRCSEQSTR);
130 writel_relaxed(drvdata->ext_inp, drvdata->base + TRCEXTINSELR);
131 for (i = 0; i < drvdata->nr_cntr; i++) {
132 writel_relaxed(drvdata->cntrldvr[i],
133 drvdata->base + TRCCNTRLDVRn(i));
134 writel_relaxed(drvdata->cntr_ctrl[i],
135 drvdata->base + TRCCNTCTLRn(i));
136 writel_relaxed(drvdata->cntr_val[i],
137 drvdata->base + TRCCNTVRn(i));
138 }
139 for (i = 0; i < drvdata->nr_resource; i++)
140 writel_relaxed(drvdata->res_ctrl[i],
141 drvdata->base + TRCRSCTLRn(i));
142
143 for (i = 0; i < drvdata->nr_ss_cmp; i++) {
144 writel_relaxed(drvdata->ss_ctrl[i],
145 drvdata->base + TRCSSCCRn(i));
146 writel_relaxed(drvdata->ss_status[i],
147 drvdata->base + TRCSSCSRn(i));
148 writel_relaxed(drvdata->ss_pe_cmp[i],
149 drvdata->base + TRCSSPCICRn(i));
150 }
151 for (i = 0; i < drvdata->nr_addr_cmp; i++) {
152 writeq_relaxed(drvdata->addr_val[i],
153 drvdata->base + TRCACVRn(i));
154 writeq_relaxed(drvdata->addr_acc[i],
155 drvdata->base + TRCACATRn(i));
156 }
157 for (i = 0; i < drvdata->numcidc; i++)
158 writeq_relaxed(drvdata->ctxid_pid[i],
159 drvdata->base + TRCCIDCVRn(i));
160 writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);
161 writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);
162
163 for (i = 0; i < drvdata->numvmidc; i++)
164 writeq_relaxed(drvdata->vmid_val[i],
165 drvdata->base + TRCVMIDCVRn(i));
166 writel_relaxed(drvdata->vmid_mask0, drvdata->base + TRCVMIDCCTLR0);
167 writel_relaxed(drvdata->vmid_mask1, drvdata->base + TRCVMIDCCTLR1);
168
169 /* Enable the trace unit */
170 writel_relaxed(1, drvdata->base + TRCPRGCTLR);
171
172 /* wait for TRCSTATR.IDLE to go back down to '0' */
173 if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0))
174 dev_err(drvdata->dev,
175 "timeout observed when probing at offset %#x\n",
176 TRCSTATR);
177
178 CS_LOCK(drvdata->base);
179
180 dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
181 }
182
183 static int etm4_enable(struct coresight_device *csdev)
184 {
185 struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
186 int ret;
187
188 pm_runtime_get_sync(drvdata->dev);
189 spin_lock(&drvdata->spinlock);
190
191 /*
192 * Executing etm4_enable_hw on the cpu whose ETM is being enabled
193 * ensures that register writes occur when cpu is powered.
194 */
195 ret = smp_call_function_single(drvdata->cpu,
196 etm4_enable_hw, drvdata, 1);
197 if (ret)
198 goto err;
199 drvdata->enable = true;
200 drvdata->sticky_enable = true;
201
202 spin_unlock(&drvdata->spinlock);
203
204 dev_info(drvdata->dev, "ETM tracing enabled\n");
205 return 0;
206 err:
207 spin_unlock(&drvdata->spinlock);
208 pm_runtime_put(drvdata->dev);
209 return ret;
210 }
211
212 static void etm4_disable_hw(void *info)
213 {
214 u32 control;
215 struct etmv4_drvdata *drvdata = info;
216
217 CS_UNLOCK(drvdata->base);
218
219 control = readl_relaxed(drvdata->base + TRCPRGCTLR);
220
221 /* EN, bit[0] Trace unit enable bit */
222 control &= ~0x1;
223
224 /* make sure everything completes before disabling */
225 mb();
226 isb();
227 writel_relaxed(control, drvdata->base + TRCPRGCTLR);
228
229 CS_LOCK(drvdata->base);
230
231 dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu);
232 }
233
234 static void etm4_disable(struct coresight_device *csdev)
235 {
236 struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
237
238 /*
239 * Taking hotplug lock here protects from clocks getting disabled
240 * with tracing being left on (crash scenario) if user disable occurs
241 * after cpu online mask indicates the cpu is offline but before the
242 * DYING hotplug callback is serviced by the ETM driver.
243 */
244 get_online_cpus();
245 spin_lock(&drvdata->spinlock);
246
247 /*
248 * Executing etm4_disable_hw on the cpu whose ETM is being disabled
249 * ensures that register writes occur when cpu is powered.
250 */
251 smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1);
252 drvdata->enable = false;
253
254 spin_unlock(&drvdata->spinlock);
255 put_online_cpus();
256
257 pm_runtime_put(drvdata->dev);
258
259 dev_info(drvdata->dev, "ETM tracing disabled\n");
260 }
261
262 static const struct coresight_ops_source etm4_source_ops = {
263 .trace_id = etm4_trace_id,
264 .enable = etm4_enable,
265 .disable = etm4_disable,
266 };
267
268 static const struct coresight_ops etm4_cs_ops = {
269 .source_ops = &etm4_source_ops,
270 };
271
272 static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
273 {
274 u8 idx = drvdata->addr_idx;
275
276 /*
277 * TRCACATRn.TYPE bit[1:0]: type of comparison
278 * the trace unit performs
279 */
280 if (BMVAL(drvdata->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) {
281 if (idx % 2 != 0)
282 return -EINVAL;
283
284 /*
285 * We are performing instruction address comparison. Set the
286 * relevant bit of ViewInst Include/Exclude Control register
287 * for corresponding address comparator pair.
288 */
289 if (drvdata->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
290 drvdata->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
291 return -EINVAL;
292
293 if (exclude == true) {
294 /*
295 * Set exclude bit and unset the include bit
296 * corresponding to comparator pair
297 */
298 drvdata->viiectlr |= BIT(idx / 2 + 16);
299 drvdata->viiectlr &= ~BIT(idx / 2);
300 } else {
301 /*
302 * Set include bit and unset exclude bit
303 * corresponding to comparator pair
304 */
305 drvdata->viiectlr |= BIT(idx / 2);
306 drvdata->viiectlr &= ~BIT(idx / 2 + 16);
307 }
308 }
309 return 0;
310 }
311
312 static ssize_t nr_pe_cmp_show(struct device *dev,
313 struct device_attribute *attr,
314 char *buf)
315 {
316 unsigned long val;
317 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
318
319 val = drvdata->nr_pe_cmp;
320 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
321 }
322 static DEVICE_ATTR_RO(nr_pe_cmp);
323
324 static ssize_t nr_addr_cmp_show(struct device *dev,
325 struct device_attribute *attr,
326 char *buf)
327 {
328 unsigned long val;
329 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
330
331 val = drvdata->nr_addr_cmp;
332 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
333 }
334 static DEVICE_ATTR_RO(nr_addr_cmp);
335
336 static ssize_t nr_cntr_show(struct device *dev,
337 struct device_attribute *attr,
338 char *buf)
339 {
340 unsigned long val;
341 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
342
343 val = drvdata->nr_cntr;
344 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
345 }
346 static DEVICE_ATTR_RO(nr_cntr);
347
348 static ssize_t nr_ext_inp_show(struct device *dev,
349 struct device_attribute *attr,
350 char *buf)
351 {
352 unsigned long val;
353 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
354
355 val = drvdata->nr_ext_inp;
356 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
357 }
358 static DEVICE_ATTR_RO(nr_ext_inp);
359
360 static ssize_t numcidc_show(struct device *dev,
361 struct device_attribute *attr,
362 char *buf)
363 {
364 unsigned long val;
365 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
366
367 val = drvdata->numcidc;
368 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
369 }
370 static DEVICE_ATTR_RO(numcidc);
371
372 static ssize_t numvmidc_show(struct device *dev,
373 struct device_attribute *attr,
374 char *buf)
375 {
376 unsigned long val;
377 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
378
379 val = drvdata->numvmidc;
380 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
381 }
382 static DEVICE_ATTR_RO(numvmidc);
383
384 static ssize_t nrseqstate_show(struct device *dev,
385 struct device_attribute *attr,
386 char *buf)
387 {
388 unsigned long val;
389 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
390
391 val = drvdata->nrseqstate;
392 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
393 }
394 static DEVICE_ATTR_RO(nrseqstate);
395
396 static ssize_t nr_resource_show(struct device *dev,
397 struct device_attribute *attr,
398 char *buf)
399 {
400 unsigned long val;
401 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
402
403 val = drvdata->nr_resource;
404 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
405 }
406 static DEVICE_ATTR_RO(nr_resource);
407
408 static ssize_t nr_ss_cmp_show(struct device *dev,
409 struct device_attribute *attr,
410 char *buf)
411 {
412 unsigned long val;
413 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
414
415 val = drvdata->nr_ss_cmp;
416 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
417 }
418 static DEVICE_ATTR_RO(nr_ss_cmp);
419
420 static ssize_t reset_store(struct device *dev,
421 struct device_attribute *attr,
422 const char *buf, size_t size)
423 {
424 int i;
425 unsigned long val;
426 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
427
428 if (kstrtoul(buf, 16, &val))
429 return -EINVAL;
430
431 spin_lock(&drvdata->spinlock);
432 if (val)
433 drvdata->mode = 0x0;
434
435 /* Disable data tracing: do not trace load and store data transfers */
436 drvdata->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
437 drvdata->cfg &= ~(BIT(1) | BIT(2));
438
439 /* Disable data value and data address tracing */
440 drvdata->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
441 ETM_MODE_DATA_TRACE_VAL);
442 drvdata->cfg &= ~(BIT(16) | BIT(17));
443
444 /* Disable all events tracing */
445 drvdata->eventctrl0 = 0x0;
446 drvdata->eventctrl1 = 0x0;
447
448 /* Disable timestamp event */
449 drvdata->ts_ctrl = 0x0;
450
451 /* Disable stalling */
452 drvdata->stall_ctrl = 0x0;
453
454 /* Reset trace synchronization period to 2^8 = 256 bytes*/
455 if (drvdata->syncpr == false)
456 drvdata->syncfreq = 0x8;
457
458 /*
459 * Enable ViewInst to trace everything with start-stop logic in
460 * started state. ARM recommends start-stop logic is set before
461 * each trace run.
462 */
463 drvdata->vinst_ctrl |= BIT(0);
464 if (drvdata->nr_addr_cmp == true) {
465 drvdata->mode |= ETM_MODE_VIEWINST_STARTSTOP;
466 /* SSSTATUS, bit[9] */
467 drvdata->vinst_ctrl |= BIT(9);
468 }
469
470 /* No address range filtering for ViewInst */
471 drvdata->viiectlr = 0x0;
472
473 /* No start-stop filtering for ViewInst */
474 drvdata->vissctlr = 0x0;
475
476 /* Disable seq events */
477 for (i = 0; i < drvdata->nrseqstate-1; i++)
478 drvdata->seq_ctrl[i] = 0x0;
479 drvdata->seq_rst = 0x0;
480 drvdata->seq_state = 0x0;
481
482 /* Disable external input events */
483 drvdata->ext_inp = 0x0;
484
485 drvdata->cntr_idx = 0x0;
486 for (i = 0; i < drvdata->nr_cntr; i++) {
487 drvdata->cntrldvr[i] = 0x0;
488 drvdata->cntr_ctrl[i] = 0x0;
489 drvdata->cntr_val[i] = 0x0;
490 }
491
492 drvdata->res_idx = 0x0;
493 for (i = 0; i < drvdata->nr_resource; i++)
494 drvdata->res_ctrl[i] = 0x0;
495
496 for (i = 0; i < drvdata->nr_ss_cmp; i++) {
497 drvdata->ss_ctrl[i] = 0x0;
498 drvdata->ss_pe_cmp[i] = 0x0;
499 }
500
501 drvdata->addr_idx = 0x0;
502 for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
503 drvdata->addr_val[i] = 0x0;
504 drvdata->addr_acc[i] = 0x0;
505 drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE;
506 }
507
508 drvdata->ctxid_idx = 0x0;
509 for (i = 0; i < drvdata->numcidc; i++) {
510 drvdata->ctxid_pid[i] = 0x0;
511 drvdata->ctxid_vpid[i] = 0x0;
512 }
513
514 drvdata->ctxid_mask0 = 0x0;
515 drvdata->ctxid_mask1 = 0x0;
516
517 drvdata->vmid_idx = 0x0;
518 for (i = 0; i < drvdata->numvmidc; i++)
519 drvdata->vmid_val[i] = 0x0;
520 drvdata->vmid_mask0 = 0x0;
521 drvdata->vmid_mask1 = 0x0;
522
523 drvdata->trcid = drvdata->cpu + 1;
524 spin_unlock(&drvdata->spinlock);
525 return size;
526 }
527 static DEVICE_ATTR_WO(reset);
528
529 static ssize_t mode_show(struct device *dev,
530 struct device_attribute *attr,
531 char *buf)
532 {
533 unsigned long val;
534 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
535
536 val = drvdata->mode;
537 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
538 }
539
540 static ssize_t mode_store(struct device *dev,
541 struct device_attribute *attr,
542 const char *buf, size_t size)
543 {
544 unsigned long val, mode;
545 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
546
547 if (kstrtoul(buf, 16, &val))
548 return -EINVAL;
549
550 spin_lock(&drvdata->spinlock);
551 drvdata->mode = val & ETMv4_MODE_ALL;
552
553 if (drvdata->mode & ETM_MODE_EXCLUDE)
554 etm4_set_mode_exclude(drvdata, true);
555 else
556 etm4_set_mode_exclude(drvdata, false);
557
558 if (drvdata->instrp0 == true) {
559 /* start by clearing instruction P0 field */
560 drvdata->cfg &= ~(BIT(1) | BIT(2));
561 if (drvdata->mode & ETM_MODE_LOAD)
562 /* 0b01 Trace load instructions as P0 instructions */
563 drvdata->cfg |= BIT(1);
564 if (drvdata->mode & ETM_MODE_STORE)
565 /* 0b10 Trace store instructions as P0 instructions */
566 drvdata->cfg |= BIT(2);
567 if (drvdata->mode & ETM_MODE_LOAD_STORE)
568 /*
569 * 0b11 Trace load and store instructions
570 * as P0 instructions
571 */
572 drvdata->cfg |= BIT(1) | BIT(2);
573 }
574
575 /* bit[3], Branch broadcast mode */
576 if ((drvdata->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
577 drvdata->cfg |= BIT(3);
578 else
579 drvdata->cfg &= ~BIT(3);
580
581 /* bit[4], Cycle counting instruction trace bit */
582 if ((drvdata->mode & ETMv4_MODE_CYCACC) &&
583 (drvdata->trccci == true))
584 drvdata->cfg |= BIT(4);
585 else
586 drvdata->cfg &= ~BIT(4);
587
588 /* bit[6], Context ID tracing bit */
589 if ((drvdata->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
590 drvdata->cfg |= BIT(6);
591 else
592 drvdata->cfg &= ~BIT(6);
593
594 if ((drvdata->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
595 drvdata->cfg |= BIT(7);
596 else
597 drvdata->cfg &= ~BIT(7);
598
599 /* bits[10:8], Conditional instruction tracing bit */
600 mode = ETM_MODE_COND(drvdata->mode);
601 if (drvdata->trccond == true) {
602 drvdata->cfg &= ~(BIT(8) | BIT(9) | BIT(10));
603 drvdata->cfg |= mode << 8;
604 }
605
606 /* bit[11], Global timestamp tracing bit */
607 if ((drvdata->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
608 drvdata->cfg |= BIT(11);
609 else
610 drvdata->cfg &= ~BIT(11);
611
612 /* bit[12], Return stack enable bit */
613 if ((drvdata->mode & ETM_MODE_RETURNSTACK) &&
614 (drvdata->retstack == true))
615 drvdata->cfg |= BIT(12);
616 else
617 drvdata->cfg &= ~BIT(12);
618
619 /* bits[14:13], Q element enable field */
620 mode = ETM_MODE_QELEM(drvdata->mode);
621 /* start by clearing QE bits */
622 drvdata->cfg &= ~(BIT(13) | BIT(14));
623 /* if supported, Q elements with instruction counts are enabled */
624 if ((mode & BIT(0)) && (drvdata->q_support & BIT(0)))
625 drvdata->cfg |= BIT(13);
626 /*
627 * if supported, Q elements with and without instruction
628 * counts are enabled
629 */
630 if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
631 drvdata->cfg |= BIT(14);
632
633 /* bit[11], AMBA Trace Bus (ATB) trigger enable bit */
634 if ((drvdata->mode & ETM_MODE_ATB_TRIGGER) &&
635 (drvdata->atbtrig == true))
636 drvdata->eventctrl1 |= BIT(11);
637 else
638 drvdata->eventctrl1 &= ~BIT(11);
639
640 /* bit[12], Low-power state behavior override bit */
641 if ((drvdata->mode & ETM_MODE_LPOVERRIDE) &&
642 (drvdata->lpoverride == true))
643 drvdata->eventctrl1 |= BIT(12);
644 else
645 drvdata->eventctrl1 &= ~BIT(12);
646
647 /* bit[8], Instruction stall bit */
648 if (drvdata->mode & ETM_MODE_ISTALL_EN)
649 drvdata->stall_ctrl |= BIT(8);
650 else
651 drvdata->stall_ctrl &= ~BIT(8);
652
653 /* bit[10], Prioritize instruction trace bit */
654 if (drvdata->mode & ETM_MODE_INSTPRIO)
655 drvdata->stall_ctrl |= BIT(10);
656 else
657 drvdata->stall_ctrl &= ~BIT(10);
658
659 /* bit[13], Trace overflow prevention bit */
660 if ((drvdata->mode & ETM_MODE_NOOVERFLOW) &&
661 (drvdata->nooverflow == true))
662 drvdata->stall_ctrl |= BIT(13);
663 else
664 drvdata->stall_ctrl &= ~BIT(13);
665
666 /* bit[9] Start/stop logic control bit */
667 if (drvdata->mode & ETM_MODE_VIEWINST_STARTSTOP)
668 drvdata->vinst_ctrl |= BIT(9);
669 else
670 drvdata->vinst_ctrl &= ~BIT(9);
671
672 /* bit[10], Whether a trace unit must trace a Reset exception */
673 if (drvdata->mode & ETM_MODE_TRACE_RESET)
674 drvdata->vinst_ctrl |= BIT(10);
675 else
676 drvdata->vinst_ctrl &= ~BIT(10);
677
678 /* bit[11], Whether a trace unit must trace a system error exception */
679 if ((drvdata->mode & ETM_MODE_TRACE_ERR) &&
680 (drvdata->trc_error == true))
681 drvdata->vinst_ctrl |= BIT(11);
682 else
683 drvdata->vinst_ctrl &= ~BIT(11);
684
685 spin_unlock(&drvdata->spinlock);
686 return size;
687 }
688 static DEVICE_ATTR_RW(mode);
689
690 static ssize_t pe_show(struct device *dev,
691 struct device_attribute *attr,
692 char *buf)
693 {
694 unsigned long val;
695 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
696
697 val = drvdata->pe_sel;
698 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
699 }
700
701 static ssize_t pe_store(struct device *dev,
702 struct device_attribute *attr,
703 const char *buf, size_t size)
704 {
705 unsigned long val;
706 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
707
708 if (kstrtoul(buf, 16, &val))
709 return -EINVAL;
710
711 spin_lock(&drvdata->spinlock);
712 if (val > drvdata->nr_pe) {
713 spin_unlock(&drvdata->spinlock);
714 return -EINVAL;
715 }
716
717 drvdata->pe_sel = val;
718 spin_unlock(&drvdata->spinlock);
719 return size;
720 }
721 static DEVICE_ATTR_RW(pe);
722
723 static ssize_t event_show(struct device *dev,
724 struct device_attribute *attr,
725 char *buf)
726 {
727 unsigned long val;
728 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
729
730 val = drvdata->eventctrl0;
731 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
732 }
733
734 static ssize_t event_store(struct device *dev,
735 struct device_attribute *attr,
736 const char *buf, size_t size)
737 {
738 unsigned long val;
739 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
740
741 if (kstrtoul(buf, 16, &val))
742 return -EINVAL;
743
744 spin_lock(&drvdata->spinlock);
745 switch (drvdata->nr_event) {
746 case 0x0:
747 /* EVENT0, bits[7:0] */
748 drvdata->eventctrl0 = val & 0xFF;
749 break;
750 case 0x1:
751 /* EVENT1, bits[15:8] */
752 drvdata->eventctrl0 = val & 0xFFFF;
753 break;
754 case 0x2:
755 /* EVENT2, bits[23:16] */
756 drvdata->eventctrl0 = val & 0xFFFFFF;
757 break;
758 case 0x3:
759 /* EVENT3, bits[31:24] */
760 drvdata->eventctrl0 = val;
761 break;
762 default:
763 break;
764 }
765 spin_unlock(&drvdata->spinlock);
766 return size;
767 }
768 static DEVICE_ATTR_RW(event);
769
770 static ssize_t event_instren_show(struct device *dev,
771 struct device_attribute *attr,
772 char *buf)
773 {
774 unsigned long val;
775 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
776
777 val = BMVAL(drvdata->eventctrl1, 0, 3);
778 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
779 }
780
781 static ssize_t event_instren_store(struct device *dev,
782 struct device_attribute *attr,
783 const char *buf, size_t size)
784 {
785 unsigned long val;
786 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
787
788 if (kstrtoul(buf, 16, &val))
789 return -EINVAL;
790
791 spin_lock(&drvdata->spinlock);
792 /* start by clearing all instruction event enable bits */
793 drvdata->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3));
794 switch (drvdata->nr_event) {
795 case 0x0:
796 /* generate Event element for event 1 */
797 drvdata->eventctrl1 |= val & BIT(1);
798 break;
799 case 0x1:
800 /* generate Event element for event 1 and 2 */
801 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1));
802 break;
803 case 0x2:
804 /* generate Event element for event 1, 2 and 3 */
805 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2));
806 break;
807 case 0x3:
808 /* generate Event element for all 4 events */
809 drvdata->eventctrl1 |= val & 0xF;
810 break;
811 default:
812 break;
813 }
814 spin_unlock(&drvdata->spinlock);
815 return size;
816 }
817 static DEVICE_ATTR_RW(event_instren);
818
819 static ssize_t event_ts_show(struct device *dev,
820 struct device_attribute *attr,
821 char *buf)
822 {
823 unsigned long val;
824 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
825
826 val = drvdata->ts_ctrl;
827 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
828 }
829
830 static ssize_t event_ts_store(struct device *dev,
831 struct device_attribute *attr,
832 const char *buf, size_t size)
833 {
834 unsigned long val;
835 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
836
837 if (kstrtoul(buf, 16, &val))
838 return -EINVAL;
839 if (!drvdata->ts_size)
840 return -EINVAL;
841
842 drvdata->ts_ctrl = val & ETMv4_EVENT_MASK;
843 return size;
844 }
845 static DEVICE_ATTR_RW(event_ts);
846
847 static ssize_t syncfreq_show(struct device *dev,
848 struct device_attribute *attr,
849 char *buf)
850 {
851 unsigned long val;
852 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
853
854 val = drvdata->syncfreq;
855 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
856 }
857
858 static ssize_t syncfreq_store(struct device *dev,
859 struct device_attribute *attr,
860 const char *buf, size_t size)
861 {
862 unsigned long val;
863 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
864
865 if (kstrtoul(buf, 16, &val))
866 return -EINVAL;
867 if (drvdata->syncpr == true)
868 return -EINVAL;
869
870 drvdata->syncfreq = val & ETMv4_SYNC_MASK;
871 return size;
872 }
873 static DEVICE_ATTR_RW(syncfreq);
874
875 static ssize_t cyc_threshold_show(struct device *dev,
876 struct device_attribute *attr,
877 char *buf)
878 {
879 unsigned long val;
880 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
881
882 val = drvdata->ccctlr;
883 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
884 }
885
886 static ssize_t cyc_threshold_store(struct device *dev,
887 struct device_attribute *attr,
888 const char *buf, size_t size)
889 {
890 unsigned long val;
891 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
892
893 if (kstrtoul(buf, 16, &val))
894 return -EINVAL;
895 if (val < drvdata->ccitmin)
896 return -EINVAL;
897
898 drvdata->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
899 return size;
900 }
901 static DEVICE_ATTR_RW(cyc_threshold);
902
903 static ssize_t bb_ctrl_show(struct device *dev,
904 struct device_attribute *attr,
905 char *buf)
906 {
907 unsigned long val;
908 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
909
910 val = drvdata->bb_ctrl;
911 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
912 }
913
914 static ssize_t bb_ctrl_store(struct device *dev,
915 struct device_attribute *attr,
916 const char *buf, size_t size)
917 {
918 unsigned long val;
919 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
920
921 if (kstrtoul(buf, 16, &val))
922 return -EINVAL;
923 if (drvdata->trcbb == false)
924 return -EINVAL;
925 if (!drvdata->nr_addr_cmp)
926 return -EINVAL;
927 /*
928 * Bit[7:0] selects which address range comparator is used for
929 * branch broadcast control.
930 */
931 if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
932 return -EINVAL;
933
934 drvdata->bb_ctrl = val;
935 return size;
936 }
937 static DEVICE_ATTR_RW(bb_ctrl);
938
939 static ssize_t event_vinst_show(struct device *dev,
940 struct device_attribute *attr,
941 char *buf)
942 {
943 unsigned long val;
944 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
945
946 val = drvdata->vinst_ctrl & ETMv4_EVENT_MASK;
947 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
948 }
949
950 static ssize_t event_vinst_store(struct device *dev,
951 struct device_attribute *attr,
952 const char *buf, size_t size)
953 {
954 unsigned long val;
955 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
956
957 if (kstrtoul(buf, 16, &val))
958 return -EINVAL;
959
960 spin_lock(&drvdata->spinlock);
961 val &= ETMv4_EVENT_MASK;
962 drvdata->vinst_ctrl &= ~ETMv4_EVENT_MASK;
963 drvdata->vinst_ctrl |= val;
964 spin_unlock(&drvdata->spinlock);
965 return size;
966 }
967 static DEVICE_ATTR_RW(event_vinst);
968
969 static ssize_t s_exlevel_vinst_show(struct device *dev,
970 struct device_attribute *attr,
971 char *buf)
972 {
973 unsigned long val;
974 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
975
976 val = BMVAL(drvdata->vinst_ctrl, 16, 19);
977 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
978 }
979
980 static ssize_t s_exlevel_vinst_store(struct device *dev,
981 struct device_attribute *attr,
982 const char *buf, size_t size)
983 {
984 unsigned long val;
985 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
986
987 if (kstrtoul(buf, 16, &val))
988 return -EINVAL;
989
990 spin_lock(&drvdata->spinlock);
991 /* clear all EXLEVEL_S bits (bit[18] is never implemented) */
992 drvdata->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));
993 /* enable instruction tracing for corresponding exception level */
994 val &= drvdata->s_ex_level;
995 drvdata->vinst_ctrl |= (val << 16);
996 spin_unlock(&drvdata->spinlock);
997 return size;
998 }
999 static DEVICE_ATTR_RW(s_exlevel_vinst);
1000
1001 static ssize_t ns_exlevel_vinst_show(struct device *dev,
1002 struct device_attribute *attr,
1003 char *buf)
1004 {
1005 unsigned long val;
1006 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1007
1008 /* EXLEVEL_NS, bits[23:20] */
1009 val = BMVAL(drvdata->vinst_ctrl, 20, 23);
1010 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1011 }
1012
1013 static ssize_t ns_exlevel_vinst_store(struct device *dev,
1014 struct device_attribute *attr,
1015 const char *buf, size_t size)
1016 {
1017 unsigned long val;
1018 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1019
1020 if (kstrtoul(buf, 16, &val))
1021 return -EINVAL;
1022
1023 spin_lock(&drvdata->spinlock);
1024 /* clear EXLEVEL_NS bits (bit[23] is never implemented */
1025 drvdata->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));
1026 /* enable instruction tracing for corresponding exception level */
1027 val &= drvdata->ns_ex_level;
1028 drvdata->vinst_ctrl |= (val << 20);
1029 spin_unlock(&drvdata->spinlock);
1030 return size;
1031 }
1032 static DEVICE_ATTR_RW(ns_exlevel_vinst);
1033
1034 static ssize_t addr_idx_show(struct device *dev,
1035 struct device_attribute *attr,
1036 char *buf)
1037 {
1038 unsigned long val;
1039 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1040
1041 val = drvdata->addr_idx;
1042 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1043 }
1044
1045 static ssize_t addr_idx_store(struct device *dev,
1046 struct device_attribute *attr,
1047 const char *buf, size_t size)
1048 {
1049 unsigned long val;
1050 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1051
1052 if (kstrtoul(buf, 16, &val))
1053 return -EINVAL;
1054 if (val >= drvdata->nr_addr_cmp * 2)
1055 return -EINVAL;
1056
1057 /*
1058 * Use spinlock to ensure index doesn't change while it gets
1059 * dereferenced multiple times within a spinlock block elsewhere.
1060 */
1061 spin_lock(&drvdata->spinlock);
1062 drvdata->addr_idx = val;
1063 spin_unlock(&drvdata->spinlock);
1064 return size;
1065 }
1066 static DEVICE_ATTR_RW(addr_idx);
1067
1068 static ssize_t addr_instdatatype_show(struct device *dev,
1069 struct device_attribute *attr,
1070 char *buf)
1071 {
1072 ssize_t len;
1073 u8 val, idx;
1074 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1075
1076 spin_lock(&drvdata->spinlock);
1077 idx = drvdata->addr_idx;
1078 val = BMVAL(drvdata->addr_acc[idx], 0, 1);
1079 len = scnprintf(buf, PAGE_SIZE, "%s\n",
1080 val == ETM_INSTR_ADDR ? "instr" :
1081 (val == ETM_DATA_LOAD_ADDR ? "data_load" :
1082 (val == ETM_DATA_STORE_ADDR ? "data_store" :
1083 "data_load_store")));
1084 spin_unlock(&drvdata->spinlock);
1085 return len;
1086 }
1087
1088 static ssize_t addr_instdatatype_store(struct device *dev,
1089 struct device_attribute *attr,
1090 const char *buf, size_t size)
1091 {
1092 u8 idx;
1093 char str[20] = "";
1094 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1095
1096 if (strlen(buf) >= 20)
1097 return -EINVAL;
1098 if (sscanf(buf, "%s", str) != 1)
1099 return -EINVAL;
1100
1101 spin_lock(&drvdata->spinlock);
1102 idx = drvdata->addr_idx;
1103 if (!strcmp(str, "instr"))
1104 /* TYPE, bits[1:0] */
1105 drvdata->addr_acc[idx] &= ~(BIT(0) | BIT(1));
1106
1107 spin_unlock(&drvdata->spinlock);
1108 return size;
1109 }
1110 static DEVICE_ATTR_RW(addr_instdatatype);
1111
1112 static ssize_t addr_single_show(struct device *dev,
1113 struct device_attribute *attr,
1114 char *buf)
1115 {
1116 u8 idx;
1117 unsigned long val;
1118 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1119
1120 idx = drvdata->addr_idx;
1121 spin_lock(&drvdata->spinlock);
1122 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1123 drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
1124 spin_unlock(&drvdata->spinlock);
1125 return -EPERM;
1126 }
1127 val = (unsigned long)drvdata->addr_val[idx];
1128 spin_unlock(&drvdata->spinlock);
1129 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1130 }
1131
1132 static ssize_t addr_single_store(struct device *dev,
1133 struct device_attribute *attr,
1134 const char *buf, size_t size)
1135 {
1136 u8 idx;
1137 unsigned long val;
1138 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1139
1140 if (kstrtoul(buf, 16, &val))
1141 return -EINVAL;
1142
1143 spin_lock(&drvdata->spinlock);
1144 idx = drvdata->addr_idx;
1145 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1146 drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
1147 spin_unlock(&drvdata->spinlock);
1148 return -EPERM;
1149 }
1150
1151 drvdata->addr_val[idx] = (u64)val;
1152 drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
1153 spin_unlock(&drvdata->spinlock);
1154 return size;
1155 }
1156 static DEVICE_ATTR_RW(addr_single);
1157
1158 static ssize_t addr_range_show(struct device *dev,
1159 struct device_attribute *attr,
1160 char *buf)
1161 {
1162 u8 idx;
1163 unsigned long val1, val2;
1164 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1165
1166 spin_lock(&drvdata->spinlock);
1167 idx = drvdata->addr_idx;
1168 if (idx % 2 != 0) {
1169 spin_unlock(&drvdata->spinlock);
1170 return -EPERM;
1171 }
1172 if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
1173 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
1174 (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
1175 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
1176 spin_unlock(&drvdata->spinlock);
1177 return -EPERM;
1178 }
1179
1180 val1 = (unsigned long)drvdata->addr_val[idx];
1181 val2 = (unsigned long)drvdata->addr_val[idx + 1];
1182 spin_unlock(&drvdata->spinlock);
1183 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1184 }
1185
1186 static ssize_t addr_range_store(struct device *dev,
1187 struct device_attribute *attr,
1188 const char *buf, size_t size)
1189 {
1190 u8 idx;
1191 unsigned long val1, val2;
1192 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1193
1194 if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
1195 return -EINVAL;
1196 /* lower address comparator cannot have a higher address value */
1197 if (val1 > val2)
1198 return -EINVAL;
1199
1200 spin_lock(&drvdata->spinlock);
1201 idx = drvdata->addr_idx;
1202 if (idx % 2 != 0) {
1203 spin_unlock(&drvdata->spinlock);
1204 return -EPERM;
1205 }
1206
1207 if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
1208 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
1209 (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
1210 drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
1211 spin_unlock(&drvdata->spinlock);
1212 return -EPERM;
1213 }
1214
1215 drvdata->addr_val[idx] = (u64)val1;
1216 drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
1217 drvdata->addr_val[idx + 1] = (u64)val2;
1218 drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
1219 /*
1220 * Program include or exclude control bits for vinst or vdata
1221 * whenever we change addr comparators to ETM_ADDR_TYPE_RANGE
1222 */
1223 if (drvdata->mode & ETM_MODE_EXCLUDE)
1224 etm4_set_mode_exclude(drvdata, true);
1225 else
1226 etm4_set_mode_exclude(drvdata, false);
1227
1228 spin_unlock(&drvdata->spinlock);
1229 return size;
1230 }
1231 static DEVICE_ATTR_RW(addr_range);
1232
1233 static ssize_t addr_start_show(struct device *dev,
1234 struct device_attribute *attr,
1235 char *buf)
1236 {
1237 u8 idx;
1238 unsigned long val;
1239 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1240
1241 spin_lock(&drvdata->spinlock);
1242 idx = drvdata->addr_idx;
1243
1244 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1245 drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1246 spin_unlock(&drvdata->spinlock);
1247 return -EPERM;
1248 }
1249
1250 val = (unsigned long)drvdata->addr_val[idx];
1251 spin_unlock(&drvdata->spinlock);
1252 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1253 }
1254
1255 static ssize_t addr_start_store(struct device *dev,
1256 struct device_attribute *attr,
1257 const char *buf, size_t size)
1258 {
1259 u8 idx;
1260 unsigned long val;
1261 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1262
1263 if (kstrtoul(buf, 16, &val))
1264 return -EINVAL;
1265
1266 spin_lock(&drvdata->spinlock);
1267 idx = drvdata->addr_idx;
1268 if (!drvdata->nr_addr_cmp) {
1269 spin_unlock(&drvdata->spinlock);
1270 return -EINVAL;
1271 }
1272 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1273 drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1274 spin_unlock(&drvdata->spinlock);
1275 return -EPERM;
1276 }
1277
1278 drvdata->addr_val[idx] = (u64)val;
1279 drvdata->addr_type[idx] = ETM_ADDR_TYPE_START;
1280 drvdata->vissctlr |= BIT(idx);
1281 /* SSSTATUS, bit[9] - turn on start/stop logic */
1282 drvdata->vinst_ctrl |= BIT(9);
1283 spin_unlock(&drvdata->spinlock);
1284 return size;
1285 }
1286 static DEVICE_ATTR_RW(addr_start);
1287
1288 static ssize_t addr_stop_show(struct device *dev,
1289 struct device_attribute *attr,
1290 char *buf)
1291 {
1292 u8 idx;
1293 unsigned long val;
1294 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1295
1296 spin_lock(&drvdata->spinlock);
1297 idx = drvdata->addr_idx;
1298
1299 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1300 drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1301 spin_unlock(&drvdata->spinlock);
1302 return -EPERM;
1303 }
1304
1305 val = (unsigned long)drvdata->addr_val[idx];
1306 spin_unlock(&drvdata->spinlock);
1307 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1308 }
1309
1310 static ssize_t addr_stop_store(struct device *dev,
1311 struct device_attribute *attr,
1312 const char *buf, size_t size)
1313 {
1314 u8 idx;
1315 unsigned long val;
1316 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1317
1318 if (kstrtoul(buf, 16, &val))
1319 return -EINVAL;
1320
1321 spin_lock(&drvdata->spinlock);
1322 idx = drvdata->addr_idx;
1323 if (!drvdata->nr_addr_cmp) {
1324 spin_unlock(&drvdata->spinlock);
1325 return -EINVAL;
1326 }
1327 if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1328 drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1329 spin_unlock(&drvdata->spinlock);
1330 return -EPERM;
1331 }
1332
1333 drvdata->addr_val[idx] = (u64)val;
1334 drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP;
1335 drvdata->vissctlr |= BIT(idx + 16);
1336 /* SSSTATUS, bit[9] - turn on start/stop logic */
1337 drvdata->vinst_ctrl |= BIT(9);
1338 spin_unlock(&drvdata->spinlock);
1339 return size;
1340 }
1341 static DEVICE_ATTR_RW(addr_stop);
1342
1343 static ssize_t addr_ctxtype_show(struct device *dev,
1344 struct device_attribute *attr,
1345 char *buf)
1346 {
1347 ssize_t len;
1348 u8 idx, val;
1349 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1350
1351 spin_lock(&drvdata->spinlock);
1352 idx = drvdata->addr_idx;
1353 /* CONTEXTTYPE, bits[3:2] */
1354 val = BMVAL(drvdata->addr_acc[idx], 2, 3);
1355 len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
1356 (val == ETM_CTX_CTXID ? "ctxid" :
1357 (val == ETM_CTX_VMID ? "vmid" : "all")));
1358 spin_unlock(&drvdata->spinlock);
1359 return len;
1360 }
1361
1362 static ssize_t addr_ctxtype_store(struct device *dev,
1363 struct device_attribute *attr,
1364 const char *buf, size_t size)
1365 {
1366 u8 idx;
1367 char str[10] = "";
1368 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1369
1370 if (strlen(buf) >= 10)
1371 return -EINVAL;
1372 if (sscanf(buf, "%s", str) != 1)
1373 return -EINVAL;
1374
1375 spin_lock(&drvdata->spinlock);
1376 idx = drvdata->addr_idx;
1377 if (!strcmp(str, "none"))
1378 /* start by clearing context type bits */
1379 drvdata->addr_acc[idx] &= ~(BIT(2) | BIT(3));
1380 else if (!strcmp(str, "ctxid")) {
1381 /* 0b01 The trace unit performs a Context ID */
1382 if (drvdata->numcidc) {
1383 drvdata->addr_acc[idx] |= BIT(2);
1384 drvdata->addr_acc[idx] &= ~BIT(3);
1385 }
1386 } else if (!strcmp(str, "vmid")) {
1387 /* 0b10 The trace unit performs a VMID */
1388 if (drvdata->numvmidc) {
1389 drvdata->addr_acc[idx] &= ~BIT(2);
1390 drvdata->addr_acc[idx] |= BIT(3);
1391 }
1392 } else if (!strcmp(str, "all")) {
1393 /*
1394 * 0b11 The trace unit performs a Context ID
1395 * comparison and a VMID
1396 */
1397 if (drvdata->numcidc)
1398 drvdata->addr_acc[idx] |= BIT(2);
1399 if (drvdata->numvmidc)
1400 drvdata->addr_acc[idx] |= BIT(3);
1401 }
1402 spin_unlock(&drvdata->spinlock);
1403 return size;
1404 }
1405 static DEVICE_ATTR_RW(addr_ctxtype);
1406
1407 static ssize_t addr_context_show(struct device *dev,
1408 struct device_attribute *attr,
1409 char *buf)
1410 {
1411 u8 idx;
1412 unsigned long val;
1413 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1414
1415 spin_lock(&drvdata->spinlock);
1416 idx = drvdata->addr_idx;
1417 /* context ID comparator bits[6:4] */
1418 val = BMVAL(drvdata->addr_acc[idx], 4, 6);
1419 spin_unlock(&drvdata->spinlock);
1420 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1421 }
1422
1423 static ssize_t addr_context_store(struct device *dev,
1424 struct device_attribute *attr,
1425 const char *buf, size_t size)
1426 {
1427 u8 idx;
1428 unsigned long val;
1429 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1430
1431 if (kstrtoul(buf, 16, &val))
1432 return -EINVAL;
1433 if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
1434 return -EINVAL;
1435 if (val >= (drvdata->numcidc >= drvdata->numvmidc ?
1436 drvdata->numcidc : drvdata->numvmidc))
1437 return -EINVAL;
1438
1439 spin_lock(&drvdata->spinlock);
1440 idx = drvdata->addr_idx;
1441 /* clear context ID comparator bits[6:4] */
1442 drvdata->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6));
1443 drvdata->addr_acc[idx] |= (val << 4);
1444 spin_unlock(&drvdata->spinlock);
1445 return size;
1446 }
1447 static DEVICE_ATTR_RW(addr_context);
1448
1449 static ssize_t seq_idx_show(struct device *dev,
1450 struct device_attribute *attr,
1451 char *buf)
1452 {
1453 unsigned long val;
1454 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1455
1456 val = drvdata->seq_idx;
1457 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1458 }
1459
1460 static ssize_t seq_idx_store(struct device *dev,
1461 struct device_attribute *attr,
1462 const char *buf, size_t size)
1463 {
1464 unsigned long val;
1465 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1466
1467 if (kstrtoul(buf, 16, &val))
1468 return -EINVAL;
1469 if (val >= drvdata->nrseqstate - 1)
1470 return -EINVAL;
1471
1472 /*
1473 * Use spinlock to ensure index doesn't change while it gets
1474 * dereferenced multiple times within a spinlock block elsewhere.
1475 */
1476 spin_lock(&drvdata->spinlock);
1477 drvdata->seq_idx = val;
1478 spin_unlock(&drvdata->spinlock);
1479 return size;
1480 }
1481 static DEVICE_ATTR_RW(seq_idx);
1482
1483 static ssize_t seq_state_show(struct device *dev,
1484 struct device_attribute *attr,
1485 char *buf)
1486 {
1487 unsigned long val;
1488 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1489
1490 val = drvdata->seq_state;
1491 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1492 }
1493
1494 static ssize_t seq_state_store(struct device *dev,
1495 struct device_attribute *attr,
1496 const char *buf, size_t size)
1497 {
1498 unsigned long val;
1499 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1500
1501 if (kstrtoul(buf, 16, &val))
1502 return -EINVAL;
1503 if (val >= drvdata->nrseqstate)
1504 return -EINVAL;
1505
1506 drvdata->seq_state = val;
1507 return size;
1508 }
1509 static DEVICE_ATTR_RW(seq_state);
1510
1511 static ssize_t seq_event_show(struct device *dev,
1512 struct device_attribute *attr,
1513 char *buf)
1514 {
1515 u8 idx;
1516 unsigned long val;
1517 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1518
1519 spin_lock(&drvdata->spinlock);
1520 idx = drvdata->seq_idx;
1521 val = drvdata->seq_ctrl[idx];
1522 spin_unlock(&drvdata->spinlock);
1523 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1524 }
1525
1526 static ssize_t seq_event_store(struct device *dev,
1527 struct device_attribute *attr,
1528 const char *buf, size_t size)
1529 {
1530 u8 idx;
1531 unsigned long val;
1532 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1533
1534 if (kstrtoul(buf, 16, &val))
1535 return -EINVAL;
1536
1537 spin_lock(&drvdata->spinlock);
1538 idx = drvdata->seq_idx;
1539 /* RST, bits[7:0] */
1540 drvdata->seq_ctrl[idx] = val & 0xFF;
1541 spin_unlock(&drvdata->spinlock);
1542 return size;
1543 }
1544 static DEVICE_ATTR_RW(seq_event);
1545
1546 static ssize_t seq_reset_event_show(struct device *dev,
1547 struct device_attribute *attr,
1548 char *buf)
1549 {
1550 unsigned long val;
1551 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1552
1553 val = drvdata->seq_rst;
1554 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1555 }
1556
1557 static ssize_t seq_reset_event_store(struct device *dev,
1558 struct device_attribute *attr,
1559 const char *buf, size_t size)
1560 {
1561 unsigned long val;
1562 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1563
1564 if (kstrtoul(buf, 16, &val))
1565 return -EINVAL;
1566 if (!(drvdata->nrseqstate))
1567 return -EINVAL;
1568
1569 drvdata->seq_rst = val & ETMv4_EVENT_MASK;
1570 return size;
1571 }
1572 static DEVICE_ATTR_RW(seq_reset_event);
1573
1574 static ssize_t cntr_idx_show(struct device *dev,
1575 struct device_attribute *attr,
1576 char *buf)
1577 {
1578 unsigned long val;
1579 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1580
1581 val = drvdata->cntr_idx;
1582 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1583 }
1584
1585 static ssize_t cntr_idx_store(struct device *dev,
1586 struct device_attribute *attr,
1587 const char *buf, size_t size)
1588 {
1589 unsigned long val;
1590 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1591
1592 if (kstrtoul(buf, 16, &val))
1593 return -EINVAL;
1594 if (val >= drvdata->nr_cntr)
1595 return -EINVAL;
1596
1597 /*
1598 * Use spinlock to ensure index doesn't change while it gets
1599 * dereferenced multiple times within a spinlock block elsewhere.
1600 */
1601 spin_lock(&drvdata->spinlock);
1602 drvdata->cntr_idx = val;
1603 spin_unlock(&drvdata->spinlock);
1604 return size;
1605 }
1606 static DEVICE_ATTR_RW(cntr_idx);
1607
1608 static ssize_t cntrldvr_show(struct device *dev,
1609 struct device_attribute *attr,
1610 char *buf)
1611 {
1612 u8 idx;
1613 unsigned long val;
1614 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1615
1616 spin_lock(&drvdata->spinlock);
1617 idx = drvdata->cntr_idx;
1618 val = drvdata->cntrldvr[idx];
1619 spin_unlock(&drvdata->spinlock);
1620 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1621 }
1622
1623 static ssize_t cntrldvr_store(struct device *dev,
1624 struct device_attribute *attr,
1625 const char *buf, size_t size)
1626 {
1627 u8 idx;
1628 unsigned long val;
1629 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1630
1631 if (kstrtoul(buf, 16, &val))
1632 return -EINVAL;
1633 if (val > ETM_CNTR_MAX_VAL)
1634 return -EINVAL;
1635
1636 spin_lock(&drvdata->spinlock);
1637 idx = drvdata->cntr_idx;
1638 drvdata->cntrldvr[idx] = val;
1639 spin_unlock(&drvdata->spinlock);
1640 return size;
1641 }
1642 static DEVICE_ATTR_RW(cntrldvr);
1643
1644 static ssize_t cntr_val_show(struct device *dev,
1645 struct device_attribute *attr,
1646 char *buf)
1647 {
1648 u8 idx;
1649 unsigned long val;
1650 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1651
1652 spin_lock(&drvdata->spinlock);
1653 idx = drvdata->cntr_idx;
1654 val = drvdata->cntr_val[idx];
1655 spin_unlock(&drvdata->spinlock);
1656 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1657 }
1658
1659 static ssize_t cntr_val_store(struct device *dev,
1660 struct device_attribute *attr,
1661 const char *buf, size_t size)
1662 {
1663 u8 idx;
1664 unsigned long val;
1665 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1666
1667 if (kstrtoul(buf, 16, &val))
1668 return -EINVAL;
1669 if (val > ETM_CNTR_MAX_VAL)
1670 return -EINVAL;
1671
1672 spin_lock(&drvdata->spinlock);
1673 idx = drvdata->cntr_idx;
1674 drvdata->cntr_val[idx] = val;
1675 spin_unlock(&drvdata->spinlock);
1676 return size;
1677 }
1678 static DEVICE_ATTR_RW(cntr_val);
1679
1680 static ssize_t cntr_ctrl_show(struct device *dev,
1681 struct device_attribute *attr,
1682 char *buf)
1683 {
1684 u8 idx;
1685 unsigned long val;
1686 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1687
1688 spin_lock(&drvdata->spinlock);
1689 idx = drvdata->cntr_idx;
1690 val = drvdata->cntr_ctrl[idx];
1691 spin_unlock(&drvdata->spinlock);
1692 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1693 }
1694
1695 static ssize_t cntr_ctrl_store(struct device *dev,
1696 struct device_attribute *attr,
1697 const char *buf, size_t size)
1698 {
1699 u8 idx;
1700 unsigned long val;
1701 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1702
1703 if (kstrtoul(buf, 16, &val))
1704 return -EINVAL;
1705
1706 spin_lock(&drvdata->spinlock);
1707 idx = drvdata->cntr_idx;
1708 drvdata->cntr_ctrl[idx] = val;
1709 spin_unlock(&drvdata->spinlock);
1710 return size;
1711 }
1712 static DEVICE_ATTR_RW(cntr_ctrl);
1713
1714 static ssize_t res_idx_show(struct device *dev,
1715 struct device_attribute *attr,
1716 char *buf)
1717 {
1718 unsigned long val;
1719 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1720
1721 val = drvdata->res_idx;
1722 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1723 }
1724
1725 static ssize_t res_idx_store(struct device *dev,
1726 struct device_attribute *attr,
1727 const char *buf, size_t size)
1728 {
1729 unsigned long val;
1730 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1731
1732 if (kstrtoul(buf, 16, &val))
1733 return -EINVAL;
1734 /* Resource selector pair 0 is always implemented and reserved */
1735 if ((val == 0) || (val >= drvdata->nr_resource))
1736 return -EINVAL;
1737
1738 /*
1739 * Use spinlock to ensure index doesn't change while it gets
1740 * dereferenced multiple times within a spinlock block elsewhere.
1741 */
1742 spin_lock(&drvdata->spinlock);
1743 drvdata->res_idx = val;
1744 spin_unlock(&drvdata->spinlock);
1745 return size;
1746 }
1747 static DEVICE_ATTR_RW(res_idx);
1748
1749 static ssize_t res_ctrl_show(struct device *dev,
1750 struct device_attribute *attr,
1751 char *buf)
1752 {
1753 u8 idx;
1754 unsigned long val;
1755 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1756
1757 spin_lock(&drvdata->spinlock);
1758 idx = drvdata->res_idx;
1759 val = drvdata->res_ctrl[idx];
1760 spin_unlock(&drvdata->spinlock);
1761 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1762 }
1763
1764 static ssize_t res_ctrl_store(struct device *dev,
1765 struct device_attribute *attr,
1766 const char *buf, size_t size)
1767 {
1768 u8 idx;
1769 unsigned long val;
1770 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1771
1772 if (kstrtoul(buf, 16, &val))
1773 return -EINVAL;
1774
1775 spin_lock(&drvdata->spinlock);
1776 idx = drvdata->res_idx;
1777 /* For odd idx pair inversal bit is RES0 */
1778 if (idx % 2 != 0)
1779 /* PAIRINV, bit[21] */
1780 val &= ~BIT(21);
1781 drvdata->res_ctrl[idx] = val;
1782 spin_unlock(&drvdata->spinlock);
1783 return size;
1784 }
1785 static DEVICE_ATTR_RW(res_ctrl);
1786
1787 static ssize_t ctxid_idx_show(struct device *dev,
1788 struct device_attribute *attr,
1789 char *buf)
1790 {
1791 unsigned long val;
1792 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1793
1794 val = drvdata->ctxid_idx;
1795 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1796 }
1797
1798 static ssize_t ctxid_idx_store(struct device *dev,
1799 struct device_attribute *attr,
1800 const char *buf, size_t size)
1801 {
1802 unsigned long val;
1803 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1804
1805 if (kstrtoul(buf, 16, &val))
1806 return -EINVAL;
1807 if (val >= drvdata->numcidc)
1808 return -EINVAL;
1809
1810 /*
1811 * Use spinlock to ensure index doesn't change while it gets
1812 * dereferenced multiple times within a spinlock block elsewhere.
1813 */
1814 spin_lock(&drvdata->spinlock);
1815 drvdata->ctxid_idx = val;
1816 spin_unlock(&drvdata->spinlock);
1817 return size;
1818 }
1819 static DEVICE_ATTR_RW(ctxid_idx);
1820
1821 static ssize_t ctxid_pid_show(struct device *dev,
1822 struct device_attribute *attr,
1823 char *buf)
1824 {
1825 u8 idx;
1826 unsigned long val;
1827 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1828
1829 spin_lock(&drvdata->spinlock);
1830 idx = drvdata->ctxid_idx;
1831 val = (unsigned long)drvdata->ctxid_vpid[idx];
1832 spin_unlock(&drvdata->spinlock);
1833 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1834 }
1835
1836 static ssize_t ctxid_pid_store(struct device *dev,
1837 struct device_attribute *attr,
1838 const char *buf, size_t size)
1839 {
1840 u8 idx;
1841 unsigned long vpid, pid;
1842 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1843
1844 /*
1845 * only implemented when ctxid tracing is enabled, i.e. at least one
1846 * ctxid comparator is implemented and ctxid is greater than 0 bits
1847 * in length
1848 */
1849 if (!drvdata->ctxid_size || !drvdata->numcidc)
1850 return -EINVAL;
1851 if (kstrtoul(buf, 16, &vpid))
1852 return -EINVAL;
1853
1854 pid = coresight_vpid_to_pid(vpid);
1855
1856 spin_lock(&drvdata->spinlock);
1857 idx = drvdata->ctxid_idx;
1858 drvdata->ctxid_pid[idx] = (u64)pid;
1859 drvdata->ctxid_vpid[idx] = (u64)vpid;
1860 spin_unlock(&drvdata->spinlock);
1861 return size;
1862 }
1863 static DEVICE_ATTR_RW(ctxid_pid);
1864
1865 static ssize_t ctxid_masks_show(struct device *dev,
1866 struct device_attribute *attr,
1867 char *buf)
1868 {
1869 unsigned long val1, val2;
1870 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1871
1872 spin_lock(&drvdata->spinlock);
1873 val1 = drvdata->ctxid_mask0;
1874 val2 = drvdata->ctxid_mask1;
1875 spin_unlock(&drvdata->spinlock);
1876 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1877 }
1878
1879 static ssize_t ctxid_masks_store(struct device *dev,
1880 struct device_attribute *attr,
1881 const char *buf, size_t size)
1882 {
1883 u8 i, j, maskbyte;
1884 unsigned long val1, val2, mask;
1885 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1886
1887 /*
1888 * only implemented when ctxid tracing is enabled, i.e. at least one
1889 * ctxid comparator is implemented and ctxid is greater than 0 bits
1890 * in length
1891 */
1892 if (!drvdata->ctxid_size || !drvdata->numcidc)
1893 return -EINVAL;
1894 if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
1895 return -EINVAL;
1896
1897 spin_lock(&drvdata->spinlock);
1898 /*
1899 * each byte[0..3] controls mask value applied to ctxid
1900 * comparator[0..3]
1901 */
1902 switch (drvdata->numcidc) {
1903 case 0x1:
1904 /* COMP0, bits[7:0] */
1905 drvdata->ctxid_mask0 = val1 & 0xFF;
1906 break;
1907 case 0x2:
1908 /* COMP1, bits[15:8] */
1909 drvdata->ctxid_mask0 = val1 & 0xFFFF;
1910 break;
1911 case 0x3:
1912 /* COMP2, bits[23:16] */
1913 drvdata->ctxid_mask0 = val1 & 0xFFFFFF;
1914 break;
1915 case 0x4:
1916 /* COMP3, bits[31:24] */
1917 drvdata->ctxid_mask0 = val1;
1918 break;
1919 case 0x5:
1920 /* COMP4, bits[7:0] */
1921 drvdata->ctxid_mask0 = val1;
1922 drvdata->ctxid_mask1 = val2 & 0xFF;
1923 break;
1924 case 0x6:
1925 /* COMP5, bits[15:8] */
1926 drvdata->ctxid_mask0 = val1;
1927 drvdata->ctxid_mask1 = val2 & 0xFFFF;
1928 break;
1929 case 0x7:
1930 /* COMP6, bits[23:16] */
1931 drvdata->ctxid_mask0 = val1;
1932 drvdata->ctxid_mask1 = val2 & 0xFFFFFF;
1933 break;
1934 case 0x8:
1935 /* COMP7, bits[31:24] */
1936 drvdata->ctxid_mask0 = val1;
1937 drvdata->ctxid_mask1 = val2;
1938 break;
1939 default:
1940 break;
1941 }
1942 /*
1943 * If software sets a mask bit to 1, it must program relevant byte
1944 * of ctxid comparator value 0x0, otherwise behavior is unpredictable.
1945 * For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24]
1946 * of ctxid comparator0 value (corresponding to byte 0) register.
1947 */
1948 mask = drvdata->ctxid_mask0;
1949 for (i = 0; i < drvdata->numcidc; i++) {
1950 /* mask value of corresponding ctxid comparator */
1951 maskbyte = mask & ETMv4_EVENT_MASK;
1952 /*
1953 * each bit corresponds to a byte of respective ctxid comparator
1954 * value register
1955 */
1956 for (j = 0; j < 8; j++) {
1957 if (maskbyte & 1)
1958 drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
1959 maskbyte >>= 1;
1960 }
1961 /* Select the next ctxid comparator mask value */
1962 if (i == 3)
1963 /* ctxid comparators[4-7] */
1964 mask = drvdata->ctxid_mask1;
1965 else
1966 mask >>= 0x8;
1967 }
1968
1969 spin_unlock(&drvdata->spinlock);
1970 return size;
1971 }
1972 static DEVICE_ATTR_RW(ctxid_masks);
1973
1974 static ssize_t vmid_idx_show(struct device *dev,
1975 struct device_attribute *attr,
1976 char *buf)
1977 {
1978 unsigned long val;
1979 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1980
1981 val = drvdata->vmid_idx;
1982 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1983 }
1984
1985 static ssize_t vmid_idx_store(struct device *dev,
1986 struct device_attribute *attr,
1987 const char *buf, size_t size)
1988 {
1989 unsigned long val;
1990 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1991
1992 if (kstrtoul(buf, 16, &val))
1993 return -EINVAL;
1994 if (val >= drvdata->numvmidc)
1995 return -EINVAL;
1996
1997 /*
1998 * Use spinlock to ensure index doesn't change while it gets
1999 * dereferenced multiple times within a spinlock block elsewhere.
2000 */
2001 spin_lock(&drvdata->spinlock);
2002 drvdata->vmid_idx = val;
2003 spin_unlock(&drvdata->spinlock);
2004 return size;
2005 }
2006 static DEVICE_ATTR_RW(vmid_idx);
2007
2008 static ssize_t vmid_val_show(struct device *dev,
2009 struct device_attribute *attr,
2010 char *buf)
2011 {
2012 unsigned long val;
2013 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2014
2015 val = (unsigned long)drvdata->vmid_val[drvdata->vmid_idx];
2016 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
2017 }
2018
2019 static ssize_t vmid_val_store(struct device *dev,
2020 struct device_attribute *attr,
2021 const char *buf, size_t size)
2022 {
2023 unsigned long val;
2024 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2025
2026 /*
2027 * only implemented when vmid tracing is enabled, i.e. at least one
2028 * vmid comparator is implemented and at least 8 bit vmid size
2029 */
2030 if (!drvdata->vmid_size || !drvdata->numvmidc)
2031 return -EINVAL;
2032 if (kstrtoul(buf, 16, &val))
2033 return -EINVAL;
2034
2035 spin_lock(&drvdata->spinlock);
2036 drvdata->vmid_val[drvdata->vmid_idx] = (u64)val;
2037 spin_unlock(&drvdata->spinlock);
2038 return size;
2039 }
2040 static DEVICE_ATTR_RW(vmid_val);
2041
2042 static ssize_t vmid_masks_show(struct device *dev,
2043 struct device_attribute *attr, char *buf)
2044 {
2045 unsigned long val1, val2;
2046 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2047
2048 spin_lock(&drvdata->spinlock);
2049 val1 = drvdata->vmid_mask0;
2050 val2 = drvdata->vmid_mask1;
2051 spin_unlock(&drvdata->spinlock);
2052 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
2053 }
2054
2055 static ssize_t vmid_masks_store(struct device *dev,
2056 struct device_attribute *attr,
2057 const char *buf, size_t size)
2058 {
2059 u8 i, j, maskbyte;
2060 unsigned long val1, val2, mask;
2061 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2062 /*
2063 * only implemented when vmid tracing is enabled, i.e. at least one
2064 * vmid comparator is implemented and at least 8 bit vmid size
2065 */
2066 if (!drvdata->vmid_size || !drvdata->numvmidc)
2067 return -EINVAL;
2068 if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
2069 return -EINVAL;
2070
2071 spin_lock(&drvdata->spinlock);
2072
2073 /*
2074 * each byte[0..3] controls mask value applied to vmid
2075 * comparator[0..3]
2076 */
2077 switch (drvdata->numvmidc) {
2078 case 0x1:
2079 /* COMP0, bits[7:0] */
2080 drvdata->vmid_mask0 = val1 & 0xFF;
2081 break;
2082 case 0x2:
2083 /* COMP1, bits[15:8] */
2084 drvdata->vmid_mask0 = val1 & 0xFFFF;
2085 break;
2086 case 0x3:
2087 /* COMP2, bits[23:16] */
2088 drvdata->vmid_mask0 = val1 & 0xFFFFFF;
2089 break;
2090 case 0x4:
2091 /* COMP3, bits[31:24] */
2092 drvdata->vmid_mask0 = val1;
2093 break;
2094 case 0x5:
2095 /* COMP4, bits[7:0] */
2096 drvdata->vmid_mask0 = val1;
2097 drvdata->vmid_mask1 = val2 & 0xFF;
2098 break;
2099 case 0x6:
2100 /* COMP5, bits[15:8] */
2101 drvdata->vmid_mask0 = val1;
2102 drvdata->vmid_mask1 = val2 & 0xFFFF;
2103 break;
2104 case 0x7:
2105 /* COMP6, bits[23:16] */
2106 drvdata->vmid_mask0 = val1;
2107 drvdata->vmid_mask1 = val2 & 0xFFFFFF;
2108 break;
2109 case 0x8:
2110 /* COMP7, bits[31:24] */
2111 drvdata->vmid_mask0 = val1;
2112 drvdata->vmid_mask1 = val2;
2113 break;
2114 default:
2115 break;
2116 }
2117
2118 /*
2119 * If software sets a mask bit to 1, it must program relevant byte
2120 * of vmid comparator value 0x0, otherwise behavior is unpredictable.
2121 * For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24]
2122 * of vmid comparator0 value (corresponding to byte 0) register.
2123 */
2124 mask = drvdata->vmid_mask0;
2125 for (i = 0; i < drvdata->numvmidc; i++) {
2126 /* mask value of corresponding vmid comparator */
2127 maskbyte = mask & ETMv4_EVENT_MASK;
2128 /*
2129 * each bit corresponds to a byte of respective vmid comparator
2130 * value register
2131 */
2132 for (j = 0; j < 8; j++) {
2133 if (maskbyte & 1)
2134 drvdata->vmid_val[i] &= ~(0xFF << (j * 8));
2135 maskbyte >>= 1;
2136 }
2137 /* Select the next vmid comparator mask value */
2138 if (i == 3)
2139 /* vmid comparators[4-7] */
2140 mask = drvdata->vmid_mask1;
2141 else
2142 mask >>= 0x8;
2143 }
2144 spin_unlock(&drvdata->spinlock);
2145 return size;
2146 }
2147 static DEVICE_ATTR_RW(vmid_masks);
2148
2149 static ssize_t cpu_show(struct device *dev,
2150 struct device_attribute *attr, char *buf)
2151 {
2152 int val;
2153 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2154
2155 val = drvdata->cpu;
2156 return scnprintf(buf, PAGE_SIZE, "%d\n", val);
2157
2158 }
2159 static DEVICE_ATTR_RO(cpu);
2160
2161 static struct attribute *coresight_etmv4_attrs[] = {
2162 &dev_attr_nr_pe_cmp.attr,
2163 &dev_attr_nr_addr_cmp.attr,
2164 &dev_attr_nr_cntr.attr,
2165 &dev_attr_nr_ext_inp.attr,
2166 &dev_attr_numcidc.attr,
2167 &dev_attr_numvmidc.attr,
2168 &dev_attr_nrseqstate.attr,
2169 &dev_attr_nr_resource.attr,
2170 &dev_attr_nr_ss_cmp.attr,
2171 &dev_attr_reset.attr,
2172 &dev_attr_mode.attr,
2173 &dev_attr_pe.attr,
2174 &dev_attr_event.attr,
2175 &dev_attr_event_instren.attr,
2176 &dev_attr_event_ts.attr,
2177 &dev_attr_syncfreq.attr,
2178 &dev_attr_cyc_threshold.attr,
2179 &dev_attr_bb_ctrl.attr,
2180 &dev_attr_event_vinst.attr,
2181 &dev_attr_s_exlevel_vinst.attr,
2182 &dev_attr_ns_exlevel_vinst.attr,
2183 &dev_attr_addr_idx.attr,
2184 &dev_attr_addr_instdatatype.attr,
2185 &dev_attr_addr_single.attr,
2186 &dev_attr_addr_range.attr,
2187 &dev_attr_addr_start.attr,
2188 &dev_attr_addr_stop.attr,
2189 &dev_attr_addr_ctxtype.attr,
2190 &dev_attr_addr_context.attr,
2191 &dev_attr_seq_idx.attr,
2192 &dev_attr_seq_state.attr,
2193 &dev_attr_seq_event.attr,
2194 &dev_attr_seq_reset_event.attr,
2195 &dev_attr_cntr_idx.attr,
2196 &dev_attr_cntrldvr.attr,
2197 &dev_attr_cntr_val.attr,
2198 &dev_attr_cntr_ctrl.attr,
2199 &dev_attr_res_idx.attr,
2200 &dev_attr_res_ctrl.attr,
2201 &dev_attr_ctxid_idx.attr,
2202 &dev_attr_ctxid_pid.attr,
2203 &dev_attr_ctxid_masks.attr,
2204 &dev_attr_vmid_idx.attr,
2205 &dev_attr_vmid_val.attr,
2206 &dev_attr_vmid_masks.attr,
2207 &dev_attr_cpu.attr,
2208 NULL,
2209 };
2210
2211 #define coresight_simple_func(name, offset) \
2212 static ssize_t name##_show(struct device *_dev, \
2213 struct device_attribute *attr, char *buf) \
2214 { \
2215 struct etmv4_drvdata *drvdata = dev_get_drvdata(_dev->parent); \
2216 return scnprintf(buf, PAGE_SIZE, "0x%x\n", \
2217 readl_relaxed(drvdata->base + offset)); \
2218 } \
2219 DEVICE_ATTR_RO(name)
2220
2221 coresight_simple_func(trcoslsr, TRCOSLSR);
2222 coresight_simple_func(trcpdcr, TRCPDCR);
2223 coresight_simple_func(trcpdsr, TRCPDSR);
2224 coresight_simple_func(trclsr, TRCLSR);
2225 coresight_simple_func(trcauthstatus, TRCAUTHSTATUS);
2226 coresight_simple_func(trcdevid, TRCDEVID);
2227 coresight_simple_func(trcdevtype, TRCDEVTYPE);
2228 coresight_simple_func(trcpidr0, TRCPIDR0);
2229 coresight_simple_func(trcpidr1, TRCPIDR1);
2230 coresight_simple_func(trcpidr2, TRCPIDR2);
2231 coresight_simple_func(trcpidr3, TRCPIDR3);
2232
2233 static struct attribute *coresight_etmv4_mgmt_attrs[] = {
2234 &dev_attr_trcoslsr.attr,
2235 &dev_attr_trcpdcr.attr,
2236 &dev_attr_trcpdsr.attr,
2237 &dev_attr_trclsr.attr,
2238 &dev_attr_trcauthstatus.attr,
2239 &dev_attr_trcdevid.attr,
2240 &dev_attr_trcdevtype.attr,
2241 &dev_attr_trcpidr0.attr,
2242 &dev_attr_trcpidr1.attr,
2243 &dev_attr_trcpidr2.attr,
2244 &dev_attr_trcpidr3.attr,
2245 NULL,
2246 };
2247
2248 coresight_simple_func(trcidr0, TRCIDR0);
2249 coresight_simple_func(trcidr1, TRCIDR1);
2250 coresight_simple_func(trcidr2, TRCIDR2);
2251 coresight_simple_func(trcidr3, TRCIDR3);
2252 coresight_simple_func(trcidr4, TRCIDR4);
2253 coresight_simple_func(trcidr5, TRCIDR5);
2254 /* trcidr[6,7] are reserved */
2255 coresight_simple_func(trcidr8, TRCIDR8);
2256 coresight_simple_func(trcidr9, TRCIDR9);
2257 coresight_simple_func(trcidr10, TRCIDR10);
2258 coresight_simple_func(trcidr11, TRCIDR11);
2259 coresight_simple_func(trcidr12, TRCIDR12);
2260 coresight_simple_func(trcidr13, TRCIDR13);
2261
2262 static struct attribute *coresight_etmv4_trcidr_attrs[] = {
2263 &dev_attr_trcidr0.attr,
2264 &dev_attr_trcidr1.attr,
2265 &dev_attr_trcidr2.attr,
2266 &dev_attr_trcidr3.attr,
2267 &dev_attr_trcidr4.attr,
2268 &dev_attr_trcidr5.attr,
2269 /* trcidr[6,7] are reserved */
2270 &dev_attr_trcidr8.attr,
2271 &dev_attr_trcidr9.attr,
2272 &dev_attr_trcidr10.attr,
2273 &dev_attr_trcidr11.attr,
2274 &dev_attr_trcidr12.attr,
2275 &dev_attr_trcidr13.attr,
2276 NULL,
2277 };
2278
2279 static const struct attribute_group coresight_etmv4_group = {
2280 .attrs = coresight_etmv4_attrs,
2281 };
2282
2283 static const struct attribute_group coresight_etmv4_mgmt_group = {
2284 .attrs = coresight_etmv4_mgmt_attrs,
2285 .name = "mgmt",
2286 };
2287
2288 static const struct attribute_group coresight_etmv4_trcidr_group = {
2289 .attrs = coresight_etmv4_trcidr_attrs,
2290 .name = "trcidr",
2291 };
2292
2293 static const struct attribute_group *coresight_etmv4_groups[] = {
2294 &coresight_etmv4_group,
2295 &coresight_etmv4_mgmt_group,
2296 &coresight_etmv4_trcidr_group,
2297 NULL,
2298 };
2299
2300 static void etm4_init_arch_data(void *info)
2301 {
2302 u32 etmidr0;
2303 u32 etmidr1;
2304 u32 etmidr2;
2305 u32 etmidr3;
2306 u32 etmidr4;
2307 u32 etmidr5;
2308 struct etmv4_drvdata *drvdata = info;
2309
2310 CS_UNLOCK(drvdata->base);
2311
2312 /* find all capabilities of the tracing unit */
2313 etmidr0 = readl_relaxed(drvdata->base + TRCIDR0);
2314
2315 /* INSTP0, bits[2:1] P0 tracing support field */
2316 if (BMVAL(etmidr0, 1, 1) && BMVAL(etmidr0, 2, 2))
2317 drvdata->instrp0 = true;
2318 else
2319 drvdata->instrp0 = false;
2320
2321 /* TRCBB, bit[5] Branch broadcast tracing support bit */
2322 if (BMVAL(etmidr0, 5, 5))
2323 drvdata->trcbb = true;
2324 else
2325 drvdata->trcbb = false;
2326
2327 /* TRCCOND, bit[6] Conditional instruction tracing support bit */
2328 if (BMVAL(etmidr0, 6, 6))
2329 drvdata->trccond = true;
2330 else
2331 drvdata->trccond = false;
2332
2333 /* TRCCCI, bit[7] Cycle counting instruction bit */
2334 if (BMVAL(etmidr0, 7, 7))
2335 drvdata->trccci = true;
2336 else
2337 drvdata->trccci = false;
2338
2339 /* RETSTACK, bit[9] Return stack bit */
2340 if (BMVAL(etmidr0, 9, 9))
2341 drvdata->retstack = true;
2342 else
2343 drvdata->retstack = false;
2344
2345 /* NUMEVENT, bits[11:10] Number of events field */
2346 drvdata->nr_event = BMVAL(etmidr0, 10, 11);
2347 /* QSUPP, bits[16:15] Q element support field */
2348 drvdata->q_support = BMVAL(etmidr0, 15, 16);
2349 /* TSSIZE, bits[28:24] Global timestamp size field */
2350 drvdata->ts_size = BMVAL(etmidr0, 24, 28);
2351
2352 /* base architecture of trace unit */
2353 etmidr1 = readl_relaxed(drvdata->base + TRCIDR1);
2354 /*
2355 * TRCARCHMIN, bits[7:4] architecture the minor version number
2356 * TRCARCHMAJ, bits[11:8] architecture major versin number
2357 */
2358 drvdata->arch = BMVAL(etmidr1, 4, 11);
2359
2360 /* maximum size of resources */
2361 etmidr2 = readl_relaxed(drvdata->base + TRCIDR2);
2362 /* CIDSIZE, bits[9:5] Indicates the Context ID size */
2363 drvdata->ctxid_size = BMVAL(etmidr2, 5, 9);
2364 /* VMIDSIZE, bits[14:10] Indicates the VMID size */
2365 drvdata->vmid_size = BMVAL(etmidr2, 10, 14);
2366 /* CCSIZE, bits[28:25] size of the cycle counter in bits minus 12 */
2367 drvdata->ccsize = BMVAL(etmidr2, 25, 28);
2368
2369 etmidr3 = readl_relaxed(drvdata->base + TRCIDR3);
2370 /* CCITMIN, bits[11:0] minimum threshold value that can be programmed */
2371 drvdata->ccitmin = BMVAL(etmidr3, 0, 11);
2372 /* EXLEVEL_S, bits[19:16] Secure state instruction tracing */
2373 drvdata->s_ex_level = BMVAL(etmidr3, 16, 19);
2374 /* EXLEVEL_NS, bits[23:20] Non-secure state instruction tracing */
2375 drvdata->ns_ex_level = BMVAL(etmidr3, 20, 23);
2376
2377 /*
2378 * TRCERR, bit[24] whether a trace unit can trace a
2379 * system error exception.
2380 */
2381 if (BMVAL(etmidr3, 24, 24))
2382 drvdata->trc_error = true;
2383 else
2384 drvdata->trc_error = false;
2385
2386 /* SYNCPR, bit[25] implementation has a fixed synchronization period? */
2387 if (BMVAL(etmidr3, 25, 25))
2388 drvdata->syncpr = true;
2389 else
2390 drvdata->syncpr = false;
2391
2392 /* STALLCTL, bit[26] is stall control implemented? */
2393 if (BMVAL(etmidr3, 26, 26))
2394 drvdata->stallctl = true;
2395 else
2396 drvdata->stallctl = false;
2397
2398 /* SYSSTALL, bit[27] implementation can support stall control? */
2399 if (BMVAL(etmidr3, 27, 27))
2400 drvdata->sysstall = true;
2401 else
2402 drvdata->sysstall = false;
2403
2404 /* NUMPROC, bits[30:28] the number of PEs available for tracing */
2405 drvdata->nr_pe = BMVAL(etmidr3, 28, 30);
2406
2407 /* NOOVERFLOW, bit[31] is trace overflow prevention supported */
2408 if (BMVAL(etmidr3, 31, 31))
2409 drvdata->nooverflow = true;
2410 else
2411 drvdata->nooverflow = false;
2412
2413 /* number of resources trace unit supports */
2414 etmidr4 = readl_relaxed(drvdata->base + TRCIDR4);
2415 /* NUMACPAIRS, bits[0:3] number of addr comparator pairs for tracing */
2416 drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3);
2417 /* NUMPC, bits[15:12] number of PE comparator inputs for tracing */
2418 drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15);
2419 /* NUMRSPAIR, bits[19:16] the number of resource pairs for tracing */
2420 drvdata->nr_resource = BMVAL(etmidr4, 16, 19);
2421 /*
2422 * NUMSSCC, bits[23:20] the number of single-shot
2423 * comparator control for tracing
2424 */
2425 drvdata->nr_ss_cmp = BMVAL(etmidr4, 20, 23);
2426 /* NUMCIDC, bits[27:24] number of Context ID comparators for tracing */
2427 drvdata->numcidc = BMVAL(etmidr4, 24, 27);
2428 /* NUMVMIDC, bits[31:28] number of VMID comparators for tracing */
2429 drvdata->numvmidc = BMVAL(etmidr4, 28, 31);
2430
2431 etmidr5 = readl_relaxed(drvdata->base + TRCIDR5);
2432 /* NUMEXTIN, bits[8:0] number of external inputs implemented */
2433 drvdata->nr_ext_inp = BMVAL(etmidr5, 0, 8);
2434 /* TRACEIDSIZE, bits[21:16] indicates the trace ID width */
2435 drvdata->trcid_size = BMVAL(etmidr5, 16, 21);
2436 /* ATBTRIG, bit[22] implementation can support ATB triggers? */
2437 if (BMVAL(etmidr5, 22, 22))
2438 drvdata->atbtrig = true;
2439 else
2440 drvdata->atbtrig = false;
2441 /*
2442 * LPOVERRIDE, bit[23] implementation supports
2443 * low-power state override
2444 */
2445 if (BMVAL(etmidr5, 23, 23))
2446 drvdata->lpoverride = true;
2447 else
2448 drvdata->lpoverride = false;
2449 /* NUMSEQSTATE, bits[27:25] number of sequencer states implemented */
2450 drvdata->nrseqstate = BMVAL(etmidr5, 25, 27);
2451 /* NUMCNTR, bits[30:28] number of counters available for tracing */
2452 drvdata->nr_cntr = BMVAL(etmidr5, 28, 30);
2453 CS_LOCK(drvdata->base);
2454 }
2455
2456 static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
2457 {
2458 int i;
2459
2460 drvdata->pe_sel = 0x0;
2461 drvdata->cfg = (ETMv4_MODE_CTXID | ETM_MODE_VMID |
2462 ETMv4_MODE_TIMESTAMP | ETM_MODE_RETURNSTACK);
2463
2464 /* disable all events tracing */
2465 drvdata->eventctrl0 = 0x0;
2466 drvdata->eventctrl1 = 0x0;
2467
2468 /* disable stalling */
2469 drvdata->stall_ctrl = 0x0;
2470
2471 /* disable timestamp event */
2472 drvdata->ts_ctrl = 0x0;
2473
2474 /* enable trace synchronization every 4096 bytes for trace */
2475 if (drvdata->syncpr == false)
2476 drvdata->syncfreq = 0xC;
2477
2478 /*
2479 * enable viewInst to trace everything with start-stop logic in
2480 * started state
2481 */
2482 drvdata->vinst_ctrl |= BIT(0);
2483 /* set initial state of start-stop logic */
2484 if (drvdata->nr_addr_cmp)
2485 drvdata->vinst_ctrl |= BIT(9);
2486
2487 /* no address range filtering for ViewInst */
2488 drvdata->viiectlr = 0x0;
2489 /* no start-stop filtering for ViewInst */
2490 drvdata->vissctlr = 0x0;
2491
2492 /* disable seq events */
2493 for (i = 0; i < drvdata->nrseqstate-1; i++)
2494 drvdata->seq_ctrl[i] = 0x0;
2495 drvdata->seq_rst = 0x0;
2496 drvdata->seq_state = 0x0;
2497
2498 /* disable external input events */
2499 drvdata->ext_inp = 0x0;
2500
2501 for (i = 0; i < drvdata->nr_cntr; i++) {
2502 drvdata->cntrldvr[i] = 0x0;
2503 drvdata->cntr_ctrl[i] = 0x0;
2504 drvdata->cntr_val[i] = 0x0;
2505 }
2506
2507 for (i = 2; i < drvdata->nr_resource * 2; i++)
2508 drvdata->res_ctrl[i] = 0x0;
2509
2510 for (i = 0; i < drvdata->nr_ss_cmp; i++) {
2511 drvdata->ss_ctrl[i] = 0x0;
2512 drvdata->ss_pe_cmp[i] = 0x0;
2513 }
2514
2515 if (drvdata->nr_addr_cmp >= 1) {
2516 drvdata->addr_val[0] = (unsigned long)_stext;
2517 drvdata->addr_val[1] = (unsigned long)_etext;
2518 drvdata->addr_type[0] = ETM_ADDR_TYPE_RANGE;
2519 drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE;
2520 }
2521
2522 for (i = 0; i < drvdata->numcidc; i++) {
2523 drvdata->ctxid_pid[i] = 0x0;
2524 drvdata->ctxid_vpid[i] = 0x0;
2525 }
2526
2527 drvdata->ctxid_mask0 = 0x0;
2528 drvdata->ctxid_mask1 = 0x0;
2529
2530 for (i = 0; i < drvdata->numvmidc; i++)
2531 drvdata->vmid_val[i] = 0x0;
2532 drvdata->vmid_mask0 = 0x0;
2533 drvdata->vmid_mask1 = 0x0;
2534
2535 /*
2536 * A trace ID value of 0 is invalid, so let's start at some
2537 * random value that fits in 7 bits. ETMv3.x has 0x10 so let's
2538 * start at 0x20.
2539 */
2540 drvdata->trcid = 0x20 + drvdata->cpu;
2541 }
2542
2543 static int etm4_cpu_callback(struct notifier_block *nfb, unsigned long action,
2544 void *hcpu)
2545 {
2546 unsigned int cpu = (unsigned long)hcpu;
2547
2548 if (!etmdrvdata[cpu])
2549 goto out;
2550
2551 switch (action & (~CPU_TASKS_FROZEN)) {
2552 case CPU_STARTING:
2553 spin_lock(&etmdrvdata[cpu]->spinlock);
2554 if (!etmdrvdata[cpu]->os_unlock) {
2555 etm4_os_unlock(etmdrvdata[cpu]);
2556 etmdrvdata[cpu]->os_unlock = true;
2557 }
2558
2559 if (etmdrvdata[cpu]->enable)
2560 etm4_enable_hw(etmdrvdata[cpu]);
2561 spin_unlock(&etmdrvdata[cpu]->spinlock);
2562 break;
2563
2564 case CPU_ONLINE:
2565 if (etmdrvdata[cpu]->boot_enable &&
2566 !etmdrvdata[cpu]->sticky_enable)
2567 coresight_enable(etmdrvdata[cpu]->csdev);
2568 break;
2569
2570 case CPU_DYING:
2571 spin_lock(&etmdrvdata[cpu]->spinlock);
2572 if (etmdrvdata[cpu]->enable)
2573 etm4_disable_hw(etmdrvdata[cpu]);
2574 spin_unlock(&etmdrvdata[cpu]->spinlock);
2575 break;
2576 }
2577 out:
2578 return NOTIFY_OK;
2579 }
2580
2581 static struct notifier_block etm4_cpu_notifier = {
2582 .notifier_call = etm4_cpu_callback,
2583 };
2584
2585 static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
2586 {
2587 int ret;
2588 void __iomem *base;
2589 struct device *dev = &adev->dev;
2590 struct coresight_platform_data *pdata = NULL;
2591 struct etmv4_drvdata *drvdata;
2592 struct resource *res = &adev->res;
2593 struct coresight_desc *desc;
2594 struct device_node *np = adev->dev.of_node;
2595
2596 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
2597 if (!desc)
2598 return -ENOMEM;
2599
2600 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
2601 if (!drvdata)
2602 return -ENOMEM;
2603
2604 if (np) {
2605 pdata = of_get_coresight_platform_data(dev, np);
2606 if (IS_ERR(pdata))
2607 return PTR_ERR(pdata);
2608 adev->dev.platform_data = pdata;
2609 }
2610
2611 drvdata->dev = &adev->dev;
2612 dev_set_drvdata(dev, drvdata);
2613
2614 /* Validity for the resource is already checked by the AMBA core */
2615 base = devm_ioremap_resource(dev, res);
2616 if (IS_ERR(base))
2617 return PTR_ERR(base);
2618
2619 drvdata->base = base;
2620
2621 spin_lock_init(&drvdata->spinlock);
2622
2623 drvdata->cpu = pdata ? pdata->cpu : 0;
2624
2625 get_online_cpus();
2626 etmdrvdata[drvdata->cpu] = drvdata;
2627
2628 if (!smp_call_function_single(drvdata->cpu, etm4_os_unlock, drvdata, 1))
2629 drvdata->os_unlock = true;
2630
2631 if (smp_call_function_single(drvdata->cpu,
2632 etm4_init_arch_data, drvdata, 1))
2633 dev_err(dev, "ETM arch init failed\n");
2634
2635 if (!etm4_count++)
2636 register_hotcpu_notifier(&etm4_cpu_notifier);
2637
2638 put_online_cpus();
2639
2640 if (etm4_arch_supported(drvdata->arch) == false) {
2641 ret = -EINVAL;
2642 goto err_arch_supported;
2643 }
2644 etm4_init_default_data(drvdata);
2645
2646 pm_runtime_put(&adev->dev);
2647
2648 desc->type = CORESIGHT_DEV_TYPE_SOURCE;
2649 desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;
2650 desc->ops = &etm4_cs_ops;
2651 desc->pdata = pdata;
2652 desc->dev = dev;
2653 desc->groups = coresight_etmv4_groups;
2654 drvdata->csdev = coresight_register(desc);
2655 if (IS_ERR(drvdata->csdev)) {
2656 ret = PTR_ERR(drvdata->csdev);
2657 goto err_coresight_register;
2658 }
2659
2660 dev_info(dev, "%s initialized\n", (char *)id->data);
2661
2662 if (boot_enable) {
2663 coresight_enable(drvdata->csdev);
2664 drvdata->boot_enable = true;
2665 }
2666
2667 return 0;
2668
2669 err_arch_supported:
2670 pm_runtime_put(&adev->dev);
2671 err_coresight_register:
2672 if (--etm4_count == 0)
2673 unregister_hotcpu_notifier(&etm4_cpu_notifier);
2674 return ret;
2675 }
2676
2677 static int etm4_remove(struct amba_device *adev)
2678 {
2679 struct etmv4_drvdata *drvdata = amba_get_drvdata(adev);
2680
2681 coresight_unregister(drvdata->csdev);
2682 if (--etm4_count == 0)
2683 unregister_hotcpu_notifier(&etm4_cpu_notifier);
2684
2685 return 0;
2686 }
2687
2688 static struct amba_id etm4_ids[] = {
2689 { /* ETM 4.0 - Qualcomm */
2690 .id = 0x0003b95d,
2691 .mask = 0x0003ffff,
2692 .data = "ETM 4.0",
2693 },
2694 { /* ETM 4.0 - Juno board */
2695 .id = 0x000bb95e,
2696 .mask = 0x000fffff,
2697 .data = "ETM 4.0",
2698 },
2699 { 0, 0},
2700 };
2701
2702 static struct amba_driver etm4x_driver = {
2703 .drv = {
2704 .name = "coresight-etm4x",
2705 },
2706 .probe = etm4_probe,
2707 .remove = etm4_remove,
2708 .id_table = etm4_ids,
2709 };
2710
2711 module_amba_driver(etm4x_driver);
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