1 /*******************************************************************************
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 *******************************************************************************/
38 #define I40IW_IEQ_MPA_FRAMING 6
44 enum puda_resource_type
{
45 I40IW_PUDA_RSRC_TYPE_ILQ
= 1,
46 I40IW_PUDA_RSRC_TYPE_IEQ
49 enum puda_rsrc_complete
{
54 PUDA_HASH_CRC_COMPLETE
57 struct i40iw_puda_completion_info
{
58 struct i40iw_qp_uk
*qp
;
64 u32 compl_error
; /* No_err=0, else major and minor err code */
69 struct i40iw_puda_send_info
{
70 u64 paddr
; /* Physical address */
79 struct i40iw_puda_buf
{
80 struct list_head list
; /* MUST be first entry */
81 struct i40iw_dma_mem mem
; /* DMA memory for the buffer */
82 struct i40iw_puda_buf
*next
; /* for alloclist in rsrc struct */
83 struct i40iw_virt_mem buf_mem
; /* Buffer memory for this buffer */
90 u8 tcphlen
; /* tcp length in bytes */
91 u8 maclen
; /* mac length in bytes */
92 u32 totallen
; /* machlen+iphlen+tcphlen+datalen */
99 struct i40iw_puda_rsrc_info
{
100 enum puda_resource_type type
; /* ILQ or IEQ */
110 u32 tx_buf_cnt
; /* total bufs allocated will be rq_size + tx_buf_cnt */
111 void (*receive
)(struct i40iw_sc_vsi
*, struct i40iw_puda_buf
*);
112 void (*xmit_complete
)(struct i40iw_sc_vsi
*, void *);
115 struct i40iw_puda_rsrc
{
116 struct i40iw_sc_cq cq
;
117 struct i40iw_sc_qp qp
;
118 struct i40iw_sc_pd sc_pd
;
119 struct i40iw_sc_dev
*dev
;
120 struct i40iw_sc_vsi
*vsi
;
121 struct i40iw_dma_mem cqmem
;
122 struct i40iw_dma_mem qpmem
;
123 struct i40iw_virt_mem ilq_mem
;
124 enum puda_rsrc_complete completion
;
125 enum puda_resource_type type
;
126 u16 buf_size
; /*buffer must be max datalen + tcpip hdr + mac */
134 struct i40iw_sq_uk_wr_trk_info
*sq_wrtrk_array
;
139 u32 tx_wqe_avail_cnt
;
141 struct shash_desc
*hash_desc
;
142 struct list_head txpend
;
143 struct list_head bufpool
; /* free buffers pool list for recv and xmit */
145 u32 avail_buf_count
; /* snapshot of currently available buffers */
146 spinlock_t bufpool_lock
;
147 struct i40iw_puda_buf
*alloclist
;
148 void (*receive
)(struct i40iw_sc_vsi
*, struct i40iw_puda_buf
*);
149 void (*xmit_complete
)(struct i40iw_sc_vsi
*, void *);
151 u64 stats_buf_alloc_fail
;
154 u64 stats_rcvd_pkt_err
;
155 u64 stats_sent_pkt_q
;
159 struct i40iw_puda_buf
*i40iw_puda_get_bufpool(struct i40iw_puda_rsrc
*rsrc
);
160 void i40iw_puda_ret_bufpool(struct i40iw_puda_rsrc
*rsrc
,
161 struct i40iw_puda_buf
*buf
);
162 void i40iw_puda_send_buf(struct i40iw_puda_rsrc
*rsrc
,
163 struct i40iw_puda_buf
*buf
);
164 enum i40iw_status_code
i40iw_puda_send(struct i40iw_sc_qp
*qp
,
165 struct i40iw_puda_send_info
*info
);
166 enum i40iw_status_code
i40iw_puda_create_rsrc(struct i40iw_sc_vsi
*vsi
,
167 struct i40iw_puda_rsrc_info
*info
);
168 void i40iw_puda_dele_resources(struct i40iw_sc_vsi
*vsi
,
169 enum puda_resource_type type
,
171 enum i40iw_status_code
i40iw_puda_poll_completion(struct i40iw_sc_dev
*dev
,
172 struct i40iw_sc_cq
*cq
, u32
*compl_err
);
174 struct i40iw_sc_qp
*i40iw_ieq_get_qp(struct i40iw_sc_dev
*dev
,
175 struct i40iw_puda_buf
*buf
);
176 enum i40iw_status_code
i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info
*info
,
177 struct i40iw_puda_buf
*buf
);
178 enum i40iw_status_code
i40iw_ieq_check_mpacrc(struct shash_desc
*desc
,
179 void *addr
, u32 length
, u32 value
);
180 enum i40iw_status_code
i40iw_init_hash_desc(struct shash_desc
**desc
);
181 void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev
*dev
, struct i40iw_sc_qp
*qp
);
182 void i40iw_free_hash_desc(struct shash_desc
*desc
);
183 void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf
*buf
, u16 length
,
185 enum i40iw_status_code
i40iw_cqp_qp_create_cmd(struct i40iw_sc_dev
*dev
, struct i40iw_sc_qp
*qp
);
186 enum i40iw_status_code
i40iw_cqp_cq_create_cmd(struct i40iw_sc_dev
*dev
, struct i40iw_sc_cq
*cq
);
187 void i40iw_cqp_qp_destroy_cmd(struct i40iw_sc_dev
*dev
, struct i40iw_sc_qp
*qp
);
188 void i40iw_cqp_cq_destroy_cmd(struct i40iw_sc_dev
*dev
, struct i40iw_sc_cq
*cq
);