2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <linux/sched.h>
29 #include "segment_descriptor.h"
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
35 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
37 static struct page
*vmx_io_bitmap_a
;
38 static struct page
*vmx_io_bitmap_b
;
45 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
47 static struct vmcs_descriptor
{
53 #define VMX_SEGMENT_FIELD(seg) \
54 [VCPU_SREG_##seg] = { \
55 .selector = GUEST_##seg##_SELECTOR, \
56 .base = GUEST_##seg##_BASE, \
57 .limit = GUEST_##seg##_LIMIT, \
58 .ar_bytes = GUEST_##seg##_AR_BYTES, \
61 static struct kvm_vmx_segment_field
{
66 } kvm_vmx_segment_fields
[] = {
67 VMX_SEGMENT_FIELD(CS
),
68 VMX_SEGMENT_FIELD(DS
),
69 VMX_SEGMENT_FIELD(ES
),
70 VMX_SEGMENT_FIELD(FS
),
71 VMX_SEGMENT_FIELD(GS
),
72 VMX_SEGMENT_FIELD(SS
),
73 VMX_SEGMENT_FIELD(TR
),
74 VMX_SEGMENT_FIELD(LDTR
),
78 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
79 * away by decrementing the array size.
81 static const u32 vmx_msr_index
[] = {
83 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
85 MSR_EFER
, MSR_K6_STAR
,
87 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
89 static inline u64
msr_efer_save_restore_bits(struct vmx_msr_entry msr
)
91 return (u64
)msr
.data
& EFER_SAVE_RESTORE_BITS
;
94 static inline int msr_efer_need_save_restore(struct kvm_vcpu
*vcpu
)
96 int efer_offset
= vcpu
->msr_offset_efer
;
97 return msr_efer_save_restore_bits(vcpu
->host_msrs
[efer_offset
]) !=
98 msr_efer_save_restore_bits(vcpu
->guest_msrs
[efer_offset
]);
101 static inline int is_page_fault(u32 intr_info
)
103 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
104 INTR_INFO_VALID_MASK
)) ==
105 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
108 static inline int is_no_device(u32 intr_info
)
110 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
111 INTR_INFO_VALID_MASK
)) ==
112 (INTR_TYPE_EXCEPTION
| NM_VECTOR
| INTR_INFO_VALID_MASK
);
115 static inline int is_external_interrupt(u32 intr_info
)
117 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
118 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
121 static int __find_msr_index(struct kvm_vcpu
*vcpu
, u32 msr
)
125 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
126 if (vcpu
->guest_msrs
[i
].index
== msr
)
131 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
135 i
= __find_msr_index(vcpu
, msr
);
137 return &vcpu
->guest_msrs
[i
];
141 static void vmcs_clear(struct vmcs
*vmcs
)
143 u64 phys_addr
= __pa(vmcs
);
146 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
147 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
150 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
154 static void __vcpu_clear(void *arg
)
156 struct kvm_vcpu
*vcpu
= arg
;
157 int cpu
= raw_smp_processor_id();
159 if (vcpu
->cpu
== cpu
)
160 vmcs_clear(vcpu
->vmcs
);
161 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
162 per_cpu(current_vmcs
, cpu
) = NULL
;
165 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
167 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
168 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
174 static unsigned long vmcs_readl(unsigned long field
)
178 asm volatile (ASM_VMX_VMREAD_RDX_RAX
179 : "=a"(value
) : "d"(field
) : "cc");
183 static u16
vmcs_read16(unsigned long field
)
185 return vmcs_readl(field
);
188 static u32
vmcs_read32(unsigned long field
)
190 return vmcs_readl(field
);
193 static u64
vmcs_read64(unsigned long field
)
196 return vmcs_readl(field
);
198 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
202 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
204 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
205 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
209 static void vmcs_writel(unsigned long field
, unsigned long value
)
213 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
214 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
216 vmwrite_error(field
, value
);
219 static void vmcs_write16(unsigned long field
, u16 value
)
221 vmcs_writel(field
, value
);
224 static void vmcs_write32(unsigned long field
, u32 value
)
226 vmcs_writel(field
, value
);
229 static void vmcs_write64(unsigned long field
, u64 value
)
232 vmcs_writel(field
, value
);
234 vmcs_writel(field
, value
);
236 vmcs_writel(field
+1, value
>> 32);
240 static void vmcs_clear_bits(unsigned long field
, u32 mask
)
242 vmcs_writel(field
, vmcs_readl(field
) & ~mask
);
245 static void vmcs_set_bits(unsigned long field
, u32 mask
)
247 vmcs_writel(field
, vmcs_readl(field
) | mask
);
250 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
254 eb
= 1u << PF_VECTOR
;
255 if (!vcpu
->fpu_active
)
256 eb
|= 1u << NM_VECTOR
;
257 if (vcpu
->guest_debug
.enabled
)
259 if (vcpu
->rmode
.active
)
261 vmcs_write32(EXCEPTION_BITMAP
, eb
);
264 static void reload_tss(void)
266 #ifndef CONFIG_X86_64
269 * VT restores TR but not its size. Useless.
271 struct descriptor_table gdt
;
272 struct segment_descriptor
*descs
;
275 descs
= (void *)gdt
.base
;
276 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
281 static void load_transition_efer(struct kvm_vcpu
*vcpu
)
284 int efer_offset
= vcpu
->msr_offset_efer
;
286 trans_efer
= vcpu
->host_msrs
[efer_offset
].data
;
287 trans_efer
&= ~EFER_SAVE_RESTORE_BITS
;
288 trans_efer
|= msr_efer_save_restore_bits(
289 vcpu
->guest_msrs
[efer_offset
]);
290 wrmsrl(MSR_EFER
, trans_efer
);
291 vcpu
->stat
.efer_reload
++;
294 static void vmx_save_host_state(struct kvm_vcpu
*vcpu
)
296 struct vmx_host_state
*hs
= &vcpu
->vmx_host_state
;
303 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
304 * allow segment selectors with cpl > 0 or ti == 1.
306 hs
->ldt_sel
= read_ldt();
307 hs
->fs_gs_ldt_reload_needed
= hs
->ldt_sel
;
308 hs
->fs_sel
= read_fs();
309 if (!(hs
->fs_sel
& 7))
310 vmcs_write16(HOST_FS_SELECTOR
, hs
->fs_sel
);
312 vmcs_write16(HOST_FS_SELECTOR
, 0);
313 hs
->fs_gs_ldt_reload_needed
= 1;
315 hs
->gs_sel
= read_gs();
316 if (!(hs
->gs_sel
& 7))
317 vmcs_write16(HOST_GS_SELECTOR
, hs
->gs_sel
);
319 vmcs_write16(HOST_GS_SELECTOR
, 0);
320 hs
->fs_gs_ldt_reload_needed
= 1;
324 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
325 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
327 vmcs_writel(HOST_FS_BASE
, segment_base(hs
->fs_sel
));
328 vmcs_writel(HOST_GS_BASE
, segment_base(hs
->gs_sel
));
332 if (is_long_mode(vcpu
)) {
333 save_msrs(vcpu
->host_msrs
+ vcpu
->msr_offset_kernel_gs_base
, 1);
336 load_msrs(vcpu
->guest_msrs
, vcpu
->save_nmsrs
);
337 if (msr_efer_need_save_restore(vcpu
))
338 load_transition_efer(vcpu
);
341 static void vmx_load_host_state(struct kvm_vcpu
*vcpu
)
343 struct vmx_host_state
*hs
= &vcpu
->vmx_host_state
;
349 if (hs
->fs_gs_ldt_reload_needed
) {
350 load_ldt(hs
->ldt_sel
);
353 * If we have to reload gs, we must take care to
354 * preserve our gs base.
359 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
365 save_msrs(vcpu
->guest_msrs
, vcpu
->save_nmsrs
);
366 load_msrs(vcpu
->host_msrs
, vcpu
->save_nmsrs
);
367 if (msr_efer_need_save_restore(vcpu
))
368 load_msrs(vcpu
->host_msrs
+ vcpu
->msr_offset_efer
, 1);
372 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
373 * vcpu mutex is already taken.
375 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
377 u64 phys_addr
= __pa(vcpu
->vmcs
);
382 if (vcpu
->cpu
!= cpu
)
385 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
388 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
389 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
390 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
393 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
394 vcpu
->vmcs
, phys_addr
);
397 if (vcpu
->cpu
!= cpu
) {
398 struct descriptor_table dt
;
399 unsigned long sysenter_esp
;
403 * Linux uses per-cpu TSS and GDT, so set these when switching
406 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
408 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
410 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
411 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
415 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
417 vmx_load_host_state(vcpu
);
418 kvm_put_guest_fpu(vcpu
);
422 static void vmx_fpu_activate(struct kvm_vcpu
*vcpu
)
424 if (vcpu
->fpu_active
)
426 vcpu
->fpu_active
= 1;
427 vmcs_clear_bits(GUEST_CR0
, CR0_TS_MASK
);
428 if (vcpu
->cr0
& CR0_TS_MASK
)
429 vmcs_set_bits(GUEST_CR0
, CR0_TS_MASK
);
430 update_exception_bitmap(vcpu
);
433 static void vmx_fpu_deactivate(struct kvm_vcpu
*vcpu
)
435 if (!vcpu
->fpu_active
)
437 vcpu
->fpu_active
= 0;
438 vmcs_set_bits(GUEST_CR0
, CR0_TS_MASK
);
439 update_exception_bitmap(vcpu
);
442 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
447 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
449 return vmcs_readl(GUEST_RFLAGS
);
452 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
454 vmcs_writel(GUEST_RFLAGS
, rflags
);
457 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
460 u32 interruptibility
;
462 rip
= vmcs_readl(GUEST_RIP
);
463 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
464 vmcs_writel(GUEST_RIP
, rip
);
467 * We emulated an instruction, so temporary interrupt blocking
468 * should be removed, if set.
470 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
471 if (interruptibility
& 3)
472 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
473 interruptibility
& ~3);
474 vcpu
->interrupt_window_open
= 1;
477 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
479 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
480 vmcs_readl(GUEST_RIP
));
481 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
482 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
484 INTR_TYPE_EXCEPTION
|
485 INTR_INFO_DELIEVER_CODE_MASK
|
486 INTR_INFO_VALID_MASK
);
490 * Swap MSR entry in host/guest MSR entry array.
492 void move_msr_up(struct kvm_vcpu
*vcpu
, int from
, int to
)
494 struct vmx_msr_entry tmp
;
495 tmp
= vcpu
->guest_msrs
[to
];
496 vcpu
->guest_msrs
[to
] = vcpu
->guest_msrs
[from
];
497 vcpu
->guest_msrs
[from
] = tmp
;
498 tmp
= vcpu
->host_msrs
[to
];
499 vcpu
->host_msrs
[to
] = vcpu
->host_msrs
[from
];
500 vcpu
->host_msrs
[from
] = tmp
;
504 * Set up the vmcs to automatically save and restore system
505 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
506 * mode, as fiddling with msrs is very expensive.
508 static void setup_msrs(struct kvm_vcpu
*vcpu
)
514 if (is_long_mode(vcpu
)) {
517 index
= __find_msr_index(vcpu
, MSR_SYSCALL_MASK
);
519 move_msr_up(vcpu
, index
, save_nmsrs
++);
520 index
= __find_msr_index(vcpu
, MSR_LSTAR
);
522 move_msr_up(vcpu
, index
, save_nmsrs
++);
523 index
= __find_msr_index(vcpu
, MSR_CSTAR
);
525 move_msr_up(vcpu
, index
, save_nmsrs
++);
526 index
= __find_msr_index(vcpu
, MSR_KERNEL_GS_BASE
);
528 move_msr_up(vcpu
, index
, save_nmsrs
++);
530 * MSR_K6_STAR is only needed on long mode guests, and only
531 * if efer.sce is enabled.
533 index
= __find_msr_index(vcpu
, MSR_K6_STAR
);
534 if ((index
>= 0) && (vcpu
->shadow_efer
& EFER_SCE
))
535 move_msr_up(vcpu
, index
, save_nmsrs
++);
538 vcpu
->save_nmsrs
= save_nmsrs
;
541 vcpu
->msr_offset_kernel_gs_base
=
542 __find_msr_index(vcpu
, MSR_KERNEL_GS_BASE
);
544 vcpu
->msr_offset_efer
= __find_msr_index(vcpu
, MSR_EFER
);
548 * reads and returns guest's timestamp counter "register"
549 * guest_tsc = host_tsc + tsc_offset -- 21.3
551 static u64
guest_read_tsc(void)
553 u64 host_tsc
, tsc_offset
;
556 tsc_offset
= vmcs_read64(TSC_OFFSET
);
557 return host_tsc
+ tsc_offset
;
561 * writes 'guest_tsc' into guest's timestamp counter "register"
562 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
564 static void guest_write_tsc(u64 guest_tsc
)
569 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
573 * Reads an msr value (of 'msr_index') into 'pdata'.
574 * Returns 0 on success, non-0 otherwise.
575 * Assumes vcpu_load() was already called.
577 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
580 struct vmx_msr_entry
*msr
;
583 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
590 data
= vmcs_readl(GUEST_FS_BASE
);
593 data
= vmcs_readl(GUEST_GS_BASE
);
596 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
598 case MSR_IA32_TIME_STAMP_COUNTER
:
599 data
= guest_read_tsc();
601 case MSR_IA32_SYSENTER_CS
:
602 data
= vmcs_read32(GUEST_SYSENTER_CS
);
604 case MSR_IA32_SYSENTER_EIP
:
605 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
607 case MSR_IA32_SYSENTER_ESP
:
608 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
611 msr
= find_msr_entry(vcpu
, msr_index
);
616 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
624 * Writes msr value into into the appropriate "register".
625 * Returns 0 on success, non-0 otherwise.
626 * Assumes vcpu_load() was already called.
628 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
630 struct vmx_msr_entry
*msr
;
636 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
637 if (vcpu
->vmx_host_state
.loaded
)
638 load_transition_efer(vcpu
);
641 vmcs_writel(GUEST_FS_BASE
, data
);
644 vmcs_writel(GUEST_GS_BASE
, data
);
647 case MSR_IA32_SYSENTER_CS
:
648 vmcs_write32(GUEST_SYSENTER_CS
, data
);
650 case MSR_IA32_SYSENTER_EIP
:
651 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
653 case MSR_IA32_SYSENTER_ESP
:
654 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
656 case MSR_IA32_TIME_STAMP_COUNTER
:
657 guest_write_tsc(data
);
660 msr
= find_msr_entry(vcpu
, msr_index
);
663 if (vcpu
->vmx_host_state
.loaded
)
664 load_msrs(vcpu
->guest_msrs
, vcpu
->save_nmsrs
);
667 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
674 * Sync the rsp and rip registers into the vcpu structure. This allows
675 * registers to be accessed by indexing vcpu->regs.
677 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
679 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
680 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
684 * Syncs rsp and rip back into the vmcs. Should be called after possible
687 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
689 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
690 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
693 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
695 unsigned long dr7
= 0x400;
698 old_singlestep
= vcpu
->guest_debug
.singlestep
;
700 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
701 if (vcpu
->guest_debug
.enabled
) {
704 dr7
|= 0x200; /* exact */
705 for (i
= 0; i
< 4; ++i
) {
706 if (!dbg
->breakpoints
[i
].enabled
)
708 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
709 dr7
|= 2 << (i
*2); /* global enable */
710 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
713 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
715 vcpu
->guest_debug
.singlestep
= 0;
717 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
720 flags
= vmcs_readl(GUEST_RFLAGS
);
721 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
722 vmcs_writel(GUEST_RFLAGS
, flags
);
725 update_exception_bitmap(vcpu
);
726 vmcs_writel(GUEST_DR7
, dr7
);
731 static __init
int cpu_has_kvm_support(void)
733 unsigned long ecx
= cpuid_ecx(1);
734 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
737 static __init
int vmx_disabled_by_bios(void)
741 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
742 return (msr
& 5) == 1; /* locked but not enabled */
745 static void hardware_enable(void *garbage
)
747 int cpu
= raw_smp_processor_id();
748 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
751 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
753 /* enable and lock */
754 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
755 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
756 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
760 static void hardware_disable(void *garbage
)
762 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
765 static __init
void setup_vmcs_descriptor(void)
767 u32 vmx_msr_low
, vmx_msr_high
;
769 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
770 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
771 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
772 vmcs_descriptor
.revision_id
= vmx_msr_low
;
775 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
777 int node
= cpu_to_node(cpu
);
781 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
784 vmcs
= page_address(pages
);
785 memset(vmcs
, 0, vmcs_descriptor
.size
);
786 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
790 static struct vmcs
*alloc_vmcs(void)
792 return alloc_vmcs_cpu(raw_smp_processor_id());
795 static void free_vmcs(struct vmcs
*vmcs
)
797 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
800 static void free_kvm_area(void)
804 for_each_online_cpu(cpu
)
805 free_vmcs(per_cpu(vmxarea
, cpu
));
808 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
810 static __init
int alloc_kvm_area(void)
814 for_each_online_cpu(cpu
) {
817 vmcs
= alloc_vmcs_cpu(cpu
);
823 per_cpu(vmxarea
, cpu
) = vmcs
;
828 static __init
int hardware_setup(void)
830 setup_vmcs_descriptor();
831 return alloc_kvm_area();
834 static __exit
void hardware_unsetup(void)
839 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
841 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
843 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
844 vmcs_write16(sf
->selector
, save
->selector
);
845 vmcs_writel(sf
->base
, save
->base
);
846 vmcs_write32(sf
->limit
, save
->limit
);
847 vmcs_write32(sf
->ar_bytes
, save
->ar
);
849 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
851 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
855 static void enter_pmode(struct kvm_vcpu
*vcpu
)
859 vcpu
->rmode
.active
= 0;
861 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
862 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
863 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
865 flags
= vmcs_readl(GUEST_RFLAGS
);
866 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
867 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
868 vmcs_writel(GUEST_RFLAGS
, flags
);
870 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
871 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
873 update_exception_bitmap(vcpu
);
875 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
876 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
877 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
878 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
880 vmcs_write16(GUEST_SS_SELECTOR
, 0);
881 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
883 vmcs_write16(GUEST_CS_SELECTOR
,
884 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
885 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
888 static int rmode_tss_base(struct kvm
* kvm
)
890 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
891 return base_gfn
<< PAGE_SHIFT
;
894 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
896 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
898 save
->selector
= vmcs_read16(sf
->selector
);
899 save
->base
= vmcs_readl(sf
->base
);
900 save
->limit
= vmcs_read32(sf
->limit
);
901 save
->ar
= vmcs_read32(sf
->ar_bytes
);
902 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
903 vmcs_write32(sf
->limit
, 0xffff);
904 vmcs_write32(sf
->ar_bytes
, 0xf3);
907 static void enter_rmode(struct kvm_vcpu
*vcpu
)
911 vcpu
->rmode
.active
= 1;
913 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
914 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
916 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
917 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
919 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
920 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
922 flags
= vmcs_readl(GUEST_RFLAGS
);
923 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
925 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
927 vmcs_writel(GUEST_RFLAGS
, flags
);
928 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
929 update_exception_bitmap(vcpu
);
931 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
932 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
933 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
935 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
936 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
937 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
938 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
939 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
941 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
942 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
943 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
944 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
949 static void enter_lmode(struct kvm_vcpu
*vcpu
)
953 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
954 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
955 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
957 vmcs_write32(GUEST_TR_AR_BYTES
,
958 (guest_tr_ar
& ~AR_TYPE_MASK
)
959 | AR_TYPE_BUSY_64_TSS
);
962 vcpu
->shadow_efer
|= EFER_LMA
;
964 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
965 vmcs_write32(VM_ENTRY_CONTROLS
,
966 vmcs_read32(VM_ENTRY_CONTROLS
)
967 | VM_ENTRY_CONTROLS_IA32E_MASK
);
970 static void exit_lmode(struct kvm_vcpu
*vcpu
)
972 vcpu
->shadow_efer
&= ~EFER_LMA
;
974 vmcs_write32(VM_ENTRY_CONTROLS
,
975 vmcs_read32(VM_ENTRY_CONTROLS
)
976 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
981 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
983 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
984 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
987 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
989 vmx_fpu_deactivate(vcpu
);
991 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
994 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
998 if (vcpu
->shadow_efer
& EFER_LME
) {
999 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
1001 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
1006 vmcs_writel(CR0_READ_SHADOW
, cr0
);
1007 vmcs_writel(GUEST_CR0
,
1008 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
1011 if (!(cr0
& CR0_TS_MASK
) || !(cr0
& CR0_PE_MASK
))
1012 vmx_fpu_activate(vcpu
);
1015 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1017 vmcs_writel(GUEST_CR3
, cr3
);
1018 if (vcpu
->cr0
& CR0_PE_MASK
)
1019 vmx_fpu_deactivate(vcpu
);
1022 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1024 vmcs_writel(CR4_READ_SHADOW
, cr4
);
1025 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
1026 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
1030 #ifdef CONFIG_X86_64
1032 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1034 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
1036 vcpu
->shadow_efer
= efer
;
1037 if (efer
& EFER_LMA
) {
1038 vmcs_write32(VM_ENTRY_CONTROLS
,
1039 vmcs_read32(VM_ENTRY_CONTROLS
) |
1040 VM_ENTRY_CONTROLS_IA32E_MASK
);
1044 vmcs_write32(VM_ENTRY_CONTROLS
,
1045 vmcs_read32(VM_ENTRY_CONTROLS
) &
1046 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
1048 msr
->data
= efer
& ~EFER_LME
;
1055 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
1057 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1059 return vmcs_readl(sf
->base
);
1062 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
1063 struct kvm_segment
*var
, int seg
)
1065 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1068 var
->base
= vmcs_readl(sf
->base
);
1069 var
->limit
= vmcs_read32(sf
->limit
);
1070 var
->selector
= vmcs_read16(sf
->selector
);
1071 ar
= vmcs_read32(sf
->ar_bytes
);
1072 if (ar
& AR_UNUSABLE_MASK
)
1074 var
->type
= ar
& 15;
1075 var
->s
= (ar
>> 4) & 1;
1076 var
->dpl
= (ar
>> 5) & 3;
1077 var
->present
= (ar
>> 7) & 1;
1078 var
->avl
= (ar
>> 12) & 1;
1079 var
->l
= (ar
>> 13) & 1;
1080 var
->db
= (ar
>> 14) & 1;
1081 var
->g
= (ar
>> 15) & 1;
1082 var
->unusable
= (ar
>> 16) & 1;
1085 static u32
vmx_segment_access_rights(struct kvm_segment
*var
)
1092 ar
= var
->type
& 15;
1093 ar
|= (var
->s
& 1) << 4;
1094 ar
|= (var
->dpl
& 3) << 5;
1095 ar
|= (var
->present
& 1) << 7;
1096 ar
|= (var
->avl
& 1) << 12;
1097 ar
|= (var
->l
& 1) << 13;
1098 ar
|= (var
->db
& 1) << 14;
1099 ar
|= (var
->g
& 1) << 15;
1101 if (ar
== 0) /* a 0 value means unusable */
1102 ar
= AR_UNUSABLE_MASK
;
1107 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
1108 struct kvm_segment
*var
, int seg
)
1110 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1113 if (vcpu
->rmode
.active
&& seg
== VCPU_SREG_TR
) {
1114 vcpu
->rmode
.tr
.selector
= var
->selector
;
1115 vcpu
->rmode
.tr
.base
= var
->base
;
1116 vcpu
->rmode
.tr
.limit
= var
->limit
;
1117 vcpu
->rmode
.tr
.ar
= vmx_segment_access_rights(var
);
1120 vmcs_writel(sf
->base
, var
->base
);
1121 vmcs_write32(sf
->limit
, var
->limit
);
1122 vmcs_write16(sf
->selector
, var
->selector
);
1123 if (vcpu
->rmode
.active
&& var
->s
) {
1125 * Hack real-mode segments into vm86 compatibility.
1127 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
1128 vmcs_writel(sf
->base
, 0xf0000);
1131 ar
= vmx_segment_access_rights(var
);
1132 vmcs_write32(sf
->ar_bytes
, ar
);
1135 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
1137 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1139 *db
= (ar
>> 14) & 1;
1140 *l
= (ar
>> 13) & 1;
1143 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1145 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
1146 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
1149 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1151 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
1152 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
1155 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1157 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
1158 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
1161 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1163 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
1164 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
1167 static int init_rmode_tss(struct kvm
* kvm
)
1169 struct page
*p1
, *p2
, *p3
;
1170 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
1173 p1
= gfn_to_page(kvm
, fn
++);
1174 p2
= gfn_to_page(kvm
, fn
++);
1175 p3
= gfn_to_page(kvm
, fn
);
1177 if (!p1
|| !p2
|| !p3
) {
1178 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
1182 page
= kmap_atomic(p1
, KM_USER0
);
1183 memset(page
, 0, PAGE_SIZE
);
1184 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
1185 kunmap_atomic(page
, KM_USER0
);
1187 page
= kmap_atomic(p2
, KM_USER0
);
1188 memset(page
, 0, PAGE_SIZE
);
1189 kunmap_atomic(page
, KM_USER0
);
1191 page
= kmap_atomic(p3
, KM_USER0
);
1192 memset(page
, 0, PAGE_SIZE
);
1193 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
1194 kunmap_atomic(page
, KM_USER0
);
1199 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
1201 u32 msr_high
, msr_low
;
1203 rdmsr(msr
, msr_low
, msr_high
);
1207 vmcs_write32(vmcs_field
, val
);
1210 static void seg_setup(int seg
)
1212 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1214 vmcs_write16(sf
->selector
, 0);
1215 vmcs_writel(sf
->base
, 0);
1216 vmcs_write32(sf
->limit
, 0xffff);
1217 vmcs_write32(sf
->ar_bytes
, 0x93);
1221 * Sets up the vmcs for emulated real mode.
1223 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
1225 u32 host_sysenter_cs
;
1228 struct descriptor_table dt
;
1231 unsigned long kvm_vmx_return
;
1233 if (!init_rmode_tss(vcpu
->kvm
)) {
1238 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
1239 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1241 vcpu
->apic_base
= 0xfee00000 |
1242 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1243 MSR_IA32_APICBASE_ENABLE
;
1248 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1249 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1251 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1252 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1253 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1254 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1256 seg_setup(VCPU_SREG_DS
);
1257 seg_setup(VCPU_SREG_ES
);
1258 seg_setup(VCPU_SREG_FS
);
1259 seg_setup(VCPU_SREG_GS
);
1260 seg_setup(VCPU_SREG_SS
);
1262 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1263 vmcs_writel(GUEST_TR_BASE
, 0);
1264 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1265 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1267 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1268 vmcs_writel(GUEST_LDTR_BASE
, 0);
1269 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1270 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1272 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1273 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1274 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1276 vmcs_writel(GUEST_RFLAGS
, 0x02);
1277 vmcs_writel(GUEST_RIP
, 0xfff0);
1278 vmcs_writel(GUEST_RSP
, 0);
1280 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1281 vmcs_writel(GUEST_DR7
, 0x400);
1283 vmcs_writel(GUEST_GDTR_BASE
, 0);
1284 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1286 vmcs_writel(GUEST_IDTR_BASE
, 0);
1287 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1289 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1290 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1291 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1294 vmcs_write64(IO_BITMAP_A
, page_to_phys(vmx_io_bitmap_a
));
1295 vmcs_write64(IO_BITMAP_B
, page_to_phys(vmx_io_bitmap_b
));
1299 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1301 /* Special registers */
1302 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1305 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1306 PIN_BASED_VM_EXEC_CONTROL
,
1307 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1308 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1310 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1311 CPU_BASED_VM_EXEC_CONTROL
,
1312 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1313 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1314 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1315 | CPU_BASED_ACTIVATE_IO_BITMAP
/* 20.6.2 */
1316 | CPU_BASED_MOV_DR_EXITING
1317 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1320 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1321 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1322 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1324 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1325 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1326 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1328 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1329 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1330 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1331 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1332 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1333 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1334 #ifdef CONFIG_X86_64
1335 rdmsrl(MSR_FS_BASE
, a
);
1336 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1337 rdmsrl(MSR_GS_BASE
, a
);
1338 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1340 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1341 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1344 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1347 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1349 asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return
));
1350 vmcs_writel(HOST_RIP
, kvm_vmx_return
); /* 22.2.5 */
1351 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, 0);
1352 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, 0);
1353 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, 0);
1355 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1356 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1357 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1358 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1359 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1360 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1362 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1363 u32 index
= vmx_msr_index
[i
];
1364 u32 data_low
, data_high
;
1366 int j
= vcpu
->nmsrs
;
1368 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1370 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1372 data
= data_low
| ((u64
)data_high
<< 32);
1373 vcpu
->host_msrs
[j
].index
= index
;
1374 vcpu
->host_msrs
[j
].reserved
= 0;
1375 vcpu
->host_msrs
[j
].data
= data
;
1376 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1382 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1383 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1385 /* 22.2.1, 20.8.1 */
1386 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1387 VM_ENTRY_CONTROLS
, 0);
1388 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1390 #ifdef CONFIG_X86_64
1391 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1392 vmcs_writel(TPR_THRESHOLD
, 0);
1395 vmcs_writel(CR0_GUEST_HOST_MASK
, ~0UL);
1396 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1398 vcpu
->cr0
= 0x60000010;
1399 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1400 vmx_set_cr4(vcpu
, 0);
1401 #ifdef CONFIG_X86_64
1402 vmx_set_efer(vcpu
, 0);
1404 vmx_fpu_activate(vcpu
);
1405 update_exception_bitmap(vcpu
);
1413 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1418 unsigned long flags
;
1419 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1420 u16 sp
= vmcs_readl(GUEST_RSP
);
1421 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1423 if (sp
> ss_limit
|| sp
< 6 ) {
1424 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1426 vmcs_readl(GUEST_RSP
),
1427 vmcs_readl(GUEST_SS_BASE
),
1428 vmcs_read32(GUEST_SS_LIMIT
));
1432 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1434 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1438 flags
= vmcs_readl(GUEST_RFLAGS
);
1439 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1440 ip
= vmcs_readl(GUEST_RIP
);
1443 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1444 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1445 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1446 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1450 vmcs_writel(GUEST_RFLAGS
, flags
&
1451 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1452 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1453 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1454 vmcs_writel(GUEST_RIP
, ent
[0]);
1455 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1458 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1460 int word_index
= __ffs(vcpu
->irq_summary
);
1461 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1462 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1464 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1465 if (!vcpu
->irq_pending
[word_index
])
1466 clear_bit(word_index
, &vcpu
->irq_summary
);
1468 if (vcpu
->rmode
.active
) {
1469 inject_rmode_irq(vcpu
, irq
);
1472 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1473 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1477 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1478 struct kvm_run
*kvm_run
)
1480 u32 cpu_based_vm_exec_control
;
1482 vcpu
->interrupt_window_open
=
1483 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1484 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1486 if (vcpu
->interrupt_window_open
&&
1487 vcpu
->irq_summary
&&
1488 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1490 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1492 kvm_do_inject_irq(vcpu
);
1494 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1495 if (!vcpu
->interrupt_window_open
&&
1496 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1498 * Interrupts blocked. Wait for unblock.
1500 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1502 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1503 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1506 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1508 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1510 set_debugreg(dbg
->bp
[0], 0);
1511 set_debugreg(dbg
->bp
[1], 1);
1512 set_debugreg(dbg
->bp
[2], 2);
1513 set_debugreg(dbg
->bp
[3], 3);
1515 if (dbg
->singlestep
) {
1516 unsigned long flags
;
1518 flags
= vmcs_readl(GUEST_RFLAGS
);
1519 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1520 vmcs_writel(GUEST_RFLAGS
, flags
);
1524 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1525 int vec
, u32 err_code
)
1527 if (!vcpu
->rmode
.active
)
1531 * Instruction with address size override prefix opcode 0x67
1532 * Cause the #SS fault with 0 error code in VM86 mode.
1534 if (((vec
== GP_VECTOR
) || (vec
== SS_VECTOR
)) && err_code
== 0)
1535 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1540 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1542 u32 intr_info
, error_code
;
1543 unsigned long cr2
, rip
;
1545 enum emulation_result er
;
1548 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1549 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1551 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1552 !is_page_fault(intr_info
)) {
1553 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1554 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1557 if (is_external_interrupt(vect_info
)) {
1558 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1559 set_bit(irq
, vcpu
->irq_pending
);
1560 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1563 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1568 if (is_no_device(intr_info
)) {
1569 vmx_fpu_activate(vcpu
);
1574 rip
= vmcs_readl(GUEST_RIP
);
1575 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1576 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1577 if (is_page_fault(intr_info
)) {
1578 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1580 spin_lock(&vcpu
->kvm
->lock
);
1581 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1583 spin_unlock(&vcpu
->kvm
->lock
);
1587 spin_unlock(&vcpu
->kvm
->lock
);
1591 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1592 spin_unlock(&vcpu
->kvm
->lock
);
1597 case EMULATE_DO_MMIO
:
1598 ++vcpu
->stat
.mmio_exits
;
1599 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1602 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1609 if (vcpu
->rmode
.active
&&
1610 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1612 if (vcpu
->halt_request
) {
1613 vcpu
->halt_request
= 0;
1614 return kvm_emulate_halt(vcpu
);
1619 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1620 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1623 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1624 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1625 kvm_run
->ex
.error_code
= error_code
;
1629 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1630 struct kvm_run
*kvm_run
)
1632 ++vcpu
->stat
.irq_exits
;
1636 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1638 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1642 static int get_io_count(struct kvm_vcpu
*vcpu
, unsigned long *count
)
1649 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1652 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1654 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1655 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1658 rip
= vmcs_readl(GUEST_RIP
);
1659 if (countr_size
!= 8)
1660 rip
+= vmcs_readl(GUEST_CS_BASE
);
1662 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1664 for (i
= 0; i
< n
; i
++) {
1665 switch (((u8
*)&inst
)[i
]) {
1678 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1686 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1687 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1691 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1693 u64 exit_qualification
;
1694 int size
, down
, in
, string
, rep
;
1696 unsigned long count
;
1699 ++vcpu
->stat
.io_exits
;
1700 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1701 in
= (exit_qualification
& 8) != 0;
1702 size
= (exit_qualification
& 7) + 1;
1703 string
= (exit_qualification
& 16) != 0;
1704 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1706 rep
= (exit_qualification
& 32) != 0;
1707 port
= exit_qualification
>> 16;
1710 if (rep
&& !get_io_count(vcpu
, &count
))
1712 address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1714 return kvm_setup_pio(vcpu
, kvm_run
, in
, size
, count
, string
, down
,
1715 address
, rep
, port
);
1719 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1722 * Patch in the VMCALL instruction:
1724 hypercall
[0] = 0x0f;
1725 hypercall
[1] = 0x01;
1726 hypercall
[2] = 0xc1;
1727 hypercall
[3] = 0xc3;
1730 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1732 u64 exit_qualification
;
1736 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1737 cr
= exit_qualification
& 15;
1738 reg
= (exit_qualification
>> 8) & 15;
1739 switch ((exit_qualification
>> 4) & 3) {
1740 case 0: /* mov to cr */
1743 vcpu_load_rsp_rip(vcpu
);
1744 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1745 skip_emulated_instruction(vcpu
);
1748 vcpu_load_rsp_rip(vcpu
);
1749 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1750 skip_emulated_instruction(vcpu
);
1753 vcpu_load_rsp_rip(vcpu
);
1754 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1755 skip_emulated_instruction(vcpu
);
1758 vcpu_load_rsp_rip(vcpu
);
1759 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1760 skip_emulated_instruction(vcpu
);
1765 vcpu_load_rsp_rip(vcpu
);
1766 vmx_fpu_deactivate(vcpu
);
1767 vcpu
->cr0
&= ~CR0_TS_MASK
;
1768 vmcs_writel(CR0_READ_SHADOW
, vcpu
->cr0
);
1769 vmx_fpu_activate(vcpu
);
1770 skip_emulated_instruction(vcpu
);
1772 case 1: /*mov from cr*/
1775 vcpu_load_rsp_rip(vcpu
);
1776 vcpu
->regs
[reg
] = vcpu
->cr3
;
1777 vcpu_put_rsp_rip(vcpu
);
1778 skip_emulated_instruction(vcpu
);
1781 vcpu_load_rsp_rip(vcpu
);
1782 vcpu
->regs
[reg
] = vcpu
->cr8
;
1783 vcpu_put_rsp_rip(vcpu
);
1784 skip_emulated_instruction(vcpu
);
1789 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1791 skip_emulated_instruction(vcpu
);
1796 kvm_run
->exit_reason
= 0;
1797 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1798 (int)(exit_qualification
>> 4) & 3, cr
);
1802 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1804 u64 exit_qualification
;
1809 * FIXME: this code assumes the host is debugging the guest.
1810 * need to deal with guest debugging itself too.
1812 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1813 dr
= exit_qualification
& 7;
1814 reg
= (exit_qualification
>> 8) & 15;
1815 vcpu_load_rsp_rip(vcpu
);
1816 if (exit_qualification
& 16) {
1828 vcpu
->regs
[reg
] = val
;
1832 vcpu_put_rsp_rip(vcpu
);
1833 skip_emulated_instruction(vcpu
);
1837 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1839 kvm_emulate_cpuid(vcpu
);
1843 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1845 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1848 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1849 vmx_inject_gp(vcpu
, 0);
1853 /* FIXME: handling of bits 32:63 of rax, rdx */
1854 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1855 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1856 skip_emulated_instruction(vcpu
);
1860 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1862 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1863 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1864 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1866 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1867 vmx_inject_gp(vcpu
, 0);
1871 skip_emulated_instruction(vcpu
);
1875 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1876 struct kvm_run
*kvm_run
)
1878 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1879 kvm_run
->cr8
= vcpu
->cr8
;
1880 kvm_run
->apic_base
= vcpu
->apic_base
;
1881 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1882 vcpu
->irq_summary
== 0);
1885 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1886 struct kvm_run
*kvm_run
)
1889 * If the user space waits to inject interrupts, exit as soon as
1892 if (kvm_run
->request_interrupt_window
&&
1893 !vcpu
->irq_summary
) {
1894 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1895 ++vcpu
->stat
.irq_window_exits
;
1901 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1903 skip_emulated_instruction(vcpu
);
1904 return kvm_emulate_halt(vcpu
);
1907 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1909 skip_emulated_instruction(vcpu
);
1910 return kvm_hypercall(vcpu
, kvm_run
);
1914 * The exit handlers return 1 if the exit was handled fully and guest execution
1915 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1916 * to be done to userspace and return 0.
1918 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1919 struct kvm_run
*kvm_run
) = {
1920 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1921 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1922 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1923 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1924 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1925 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1926 [EXIT_REASON_CPUID
] = handle_cpuid
,
1927 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1928 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1929 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1930 [EXIT_REASON_HLT
] = handle_halt
,
1931 [EXIT_REASON_VMCALL
] = handle_vmcall
,
1934 static const int kvm_vmx_max_exit_handlers
=
1935 ARRAY_SIZE(kvm_vmx_exit_handlers
);
1938 * The guest has exited. See if we can fix it or if we need userspace
1941 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1943 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1944 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1946 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1947 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1948 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1949 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1950 if (exit_reason
< kvm_vmx_max_exit_handlers
1951 && kvm_vmx_exit_handlers
[exit_reason
])
1952 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1954 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1955 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1961 * Check if userspace requested an interrupt window, and that the
1962 * interrupt window is open.
1964 * No need to exit to userspace if we already have an interrupt queued.
1966 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1967 struct kvm_run
*kvm_run
)
1969 return (!vcpu
->irq_summary
&&
1970 kvm_run
->request_interrupt_window
&&
1971 vcpu
->interrupt_window_open
&&
1972 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1975 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1981 if (!vcpu
->mmio_read_completed
)
1982 do_interrupt_requests(vcpu
, kvm_run
);
1984 if (vcpu
->guest_debug
.enabled
)
1985 kvm_guest_debug_pre(vcpu
);
1988 vmx_save_host_state(vcpu
);
1989 kvm_load_guest_fpu(vcpu
);
1991 r
= kvm_mmu_reload(vcpu
);
1996 * Loading guest fpu may have cleared host cr0.ts
1998 vmcs_writel(HOST_CR0
, read_cr0());
2001 /* Store host registers */
2003 #ifdef CONFIG_X86_64
2004 "push %%rax; push %%rbx; push %%rdx;"
2005 "push %%rsi; push %%rdi; push %%rbp;"
2006 "push %%r8; push %%r9; push %%r10; push %%r11;"
2007 "push %%r12; push %%r13; push %%r14; push %%r15;"
2009 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
2011 "pusha; push %%ecx \n\t"
2012 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
2014 /* Check if vmlaunch of vmresume is needed */
2016 /* Load guest registers. Don't clobber flags. */
2017 #ifdef CONFIG_X86_64
2018 "mov %c[cr2](%3), %%rax \n\t"
2019 "mov %%rax, %%cr2 \n\t"
2020 "mov %c[rax](%3), %%rax \n\t"
2021 "mov %c[rbx](%3), %%rbx \n\t"
2022 "mov %c[rdx](%3), %%rdx \n\t"
2023 "mov %c[rsi](%3), %%rsi \n\t"
2024 "mov %c[rdi](%3), %%rdi \n\t"
2025 "mov %c[rbp](%3), %%rbp \n\t"
2026 "mov %c[r8](%3), %%r8 \n\t"
2027 "mov %c[r9](%3), %%r9 \n\t"
2028 "mov %c[r10](%3), %%r10 \n\t"
2029 "mov %c[r11](%3), %%r11 \n\t"
2030 "mov %c[r12](%3), %%r12 \n\t"
2031 "mov %c[r13](%3), %%r13 \n\t"
2032 "mov %c[r14](%3), %%r14 \n\t"
2033 "mov %c[r15](%3), %%r15 \n\t"
2034 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2036 "mov %c[cr2](%3), %%eax \n\t"
2037 "mov %%eax, %%cr2 \n\t"
2038 "mov %c[rax](%3), %%eax \n\t"
2039 "mov %c[rbx](%3), %%ebx \n\t"
2040 "mov %c[rdx](%3), %%edx \n\t"
2041 "mov %c[rsi](%3), %%esi \n\t"
2042 "mov %c[rdi](%3), %%edi \n\t"
2043 "mov %c[rbp](%3), %%ebp \n\t"
2044 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2046 /* Enter guest mode */
2047 "jne .Llaunched \n\t"
2048 ASM_VMX_VMLAUNCH
"\n\t"
2049 "jmp .Lkvm_vmx_return \n\t"
2050 ".Llaunched: " ASM_VMX_VMRESUME
"\n\t"
2051 ".Lkvm_vmx_return: "
2052 /* Save guest registers, load host registers, keep flags */
2053 #ifdef CONFIG_X86_64
2054 "xchg %3, (%%rsp) \n\t"
2055 "mov %%rax, %c[rax](%3) \n\t"
2056 "mov %%rbx, %c[rbx](%3) \n\t"
2057 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2058 "mov %%rdx, %c[rdx](%3) \n\t"
2059 "mov %%rsi, %c[rsi](%3) \n\t"
2060 "mov %%rdi, %c[rdi](%3) \n\t"
2061 "mov %%rbp, %c[rbp](%3) \n\t"
2062 "mov %%r8, %c[r8](%3) \n\t"
2063 "mov %%r9, %c[r9](%3) \n\t"
2064 "mov %%r10, %c[r10](%3) \n\t"
2065 "mov %%r11, %c[r11](%3) \n\t"
2066 "mov %%r12, %c[r12](%3) \n\t"
2067 "mov %%r13, %c[r13](%3) \n\t"
2068 "mov %%r14, %c[r14](%3) \n\t"
2069 "mov %%r15, %c[r15](%3) \n\t"
2070 "mov %%cr2, %%rax \n\t"
2071 "mov %%rax, %c[cr2](%3) \n\t"
2072 "mov (%%rsp), %3 \n\t"
2074 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
2075 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
2076 "pop %%rbp; pop %%rdi; pop %%rsi;"
2077 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
2079 "xchg %3, (%%esp) \n\t"
2080 "mov %%eax, %c[rax](%3) \n\t"
2081 "mov %%ebx, %c[rbx](%3) \n\t"
2082 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2083 "mov %%edx, %c[rdx](%3) \n\t"
2084 "mov %%esi, %c[rsi](%3) \n\t"
2085 "mov %%edi, %c[rdi](%3) \n\t"
2086 "mov %%ebp, %c[rbp](%3) \n\t"
2087 "mov %%cr2, %%eax \n\t"
2088 "mov %%eax, %c[cr2](%3) \n\t"
2089 "mov (%%esp), %3 \n\t"
2091 "pop %%ecx; popa \n\t"
2096 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
2098 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
2099 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
2100 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
2101 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
2102 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
2103 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
2104 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
2105 #ifdef CONFIG_X86_64
2106 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
2107 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
2108 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
2109 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
2110 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
2111 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
2112 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
2113 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
2115 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
2120 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
2122 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
2124 if (unlikely(fail
)) {
2125 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
2126 kvm_run
->fail_entry
.hardware_entry_failure_reason
2127 = vmcs_read32(VM_INSTRUCTION_ERROR
);
2132 * Profile KVM exit RIPs:
2134 if (unlikely(prof_on
== KVM_PROFILING
))
2135 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
2138 r
= kvm_handle_exit(kvm_run
, vcpu
);
2140 /* Give scheduler a change to reschedule. */
2141 if (signal_pending(current
)) {
2143 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
2144 ++vcpu
->stat
.signal_exits
;
2148 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
2150 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
2151 ++vcpu
->stat
.request_irq_exits
;
2154 if (!need_resched()) {
2155 ++vcpu
->stat
.light_exits
;
2166 post_kvm_run_save(vcpu
, kvm_run
);
2170 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
2172 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
2175 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
2179 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2181 ++vcpu
->stat
.pf_guest
;
2183 if (is_page_fault(vect_info
)) {
2184 printk(KERN_DEBUG
"inject_page_fault: "
2185 "double fault 0x%lx @ 0x%lx\n",
2186 addr
, vmcs_readl(GUEST_RIP
));
2187 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
2188 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2190 INTR_TYPE_EXCEPTION
|
2191 INTR_INFO_DELIEVER_CODE_MASK
|
2192 INTR_INFO_VALID_MASK
);
2196 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
2197 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2199 INTR_TYPE_EXCEPTION
|
2200 INTR_INFO_DELIEVER_CODE_MASK
|
2201 INTR_INFO_VALID_MASK
);
2205 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2208 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
2209 free_vmcs(vcpu
->vmcs
);
2214 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2216 vmx_free_vmcs(vcpu
);
2219 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
2223 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2224 if (!vcpu
->guest_msrs
)
2227 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2228 if (!vcpu
->host_msrs
)
2229 goto out_free_guest_msrs
;
2231 vmcs
= alloc_vmcs();
2242 kfree(vcpu
->host_msrs
);
2243 vcpu
->host_msrs
= NULL
;
2245 out_free_guest_msrs
:
2246 kfree(vcpu
->guest_msrs
);
2247 vcpu
->guest_msrs
= NULL
;
2252 static struct kvm_arch_ops vmx_arch_ops
= {
2253 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2254 .disabled_by_bios
= vmx_disabled_by_bios
,
2255 .hardware_setup
= hardware_setup
,
2256 .hardware_unsetup
= hardware_unsetup
,
2257 .hardware_enable
= hardware_enable
,
2258 .hardware_disable
= hardware_disable
,
2260 .vcpu_create
= vmx_create_vcpu
,
2261 .vcpu_free
= vmx_free_vcpu
,
2263 .vcpu_load
= vmx_vcpu_load
,
2264 .vcpu_put
= vmx_vcpu_put
,
2265 .vcpu_decache
= vmx_vcpu_decache
,
2267 .set_guest_debug
= set_guest_debug
,
2268 .get_msr
= vmx_get_msr
,
2269 .set_msr
= vmx_set_msr
,
2270 .get_segment_base
= vmx_get_segment_base
,
2271 .get_segment
= vmx_get_segment
,
2272 .set_segment
= vmx_set_segment
,
2273 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2274 .decache_cr4_guest_bits
= vmx_decache_cr4_guest_bits
,
2275 .set_cr0
= vmx_set_cr0
,
2276 .set_cr3
= vmx_set_cr3
,
2277 .set_cr4
= vmx_set_cr4
,
2278 #ifdef CONFIG_X86_64
2279 .set_efer
= vmx_set_efer
,
2281 .get_idt
= vmx_get_idt
,
2282 .set_idt
= vmx_set_idt
,
2283 .get_gdt
= vmx_get_gdt
,
2284 .set_gdt
= vmx_set_gdt
,
2285 .cache_regs
= vcpu_load_rsp_rip
,
2286 .decache_regs
= vcpu_put_rsp_rip
,
2287 .get_rflags
= vmx_get_rflags
,
2288 .set_rflags
= vmx_set_rflags
,
2290 .tlb_flush
= vmx_flush_tlb
,
2291 .inject_page_fault
= vmx_inject_page_fault
,
2293 .inject_gp
= vmx_inject_gp
,
2295 .run
= vmx_vcpu_run
,
2296 .skip_emulated_instruction
= skip_emulated_instruction
,
2297 .vcpu_setup
= vmx_vcpu_setup
,
2298 .patch_hypercall
= vmx_patch_hypercall
,
2301 static int __init
vmx_init(void)
2306 vmx_io_bitmap_a
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2307 if (!vmx_io_bitmap_a
)
2310 vmx_io_bitmap_b
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2311 if (!vmx_io_bitmap_b
) {
2317 * Allow direct access to the PC debug port (it is often used for I/O
2318 * delays, but the vmexits simply slow things down).
2320 iova
= kmap(vmx_io_bitmap_a
);
2321 memset(iova
, 0xff, PAGE_SIZE
);
2322 clear_bit(0x80, iova
);
2323 kunmap(vmx_io_bitmap_a
);
2325 iova
= kmap(vmx_io_bitmap_b
);
2326 memset(iova
, 0xff, PAGE_SIZE
);
2327 kunmap(vmx_io_bitmap_b
);
2329 r
= kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2336 __free_page(vmx_io_bitmap_b
);
2338 __free_page(vmx_io_bitmap_a
);
2342 static void __exit
vmx_exit(void)
2344 __free_page(vmx_io_bitmap_b
);
2345 __free_page(vmx_io_bitmap_a
);
2350 module_init(vmx_init
)
2351 module_exit(vmx_exit
)