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KVM: Rationalize exception bitmap usage
[mirror_ubuntu-artful-kernel.git] / drivers / kvm / vmx.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
8 *
9 * Authors:
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
12 *
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
15 *
16 */
17
18 #include "kvm.h"
19 #include "vmx.h"
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <linux/sched.h>
26 #include <asm/io.h>
27 #include <asm/desc.h>
28
29 #include "segment_descriptor.h"
30
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
33
34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
36
37 static struct page *vmx_io_bitmap_a;
38 static struct page *vmx_io_bitmap_b;
39
40 #ifdef CONFIG_X86_64
41 #define HOST_IS_64 1
42 #else
43 #define HOST_IS_64 0
44 #endif
45
46 static struct vmcs_descriptor {
47 int size;
48 int order;
49 u32 revision_id;
50 } vmcs_descriptor;
51
52 #define VMX_SEGMENT_FIELD(seg) \
53 [VCPU_SREG_##seg] = { \
54 .selector = GUEST_##seg##_SELECTOR, \
55 .base = GUEST_##seg##_BASE, \
56 .limit = GUEST_##seg##_LIMIT, \
57 .ar_bytes = GUEST_##seg##_AR_BYTES, \
58 }
59
60 static struct kvm_vmx_segment_field {
61 unsigned selector;
62 unsigned base;
63 unsigned limit;
64 unsigned ar_bytes;
65 } kvm_vmx_segment_fields[] = {
66 VMX_SEGMENT_FIELD(CS),
67 VMX_SEGMENT_FIELD(DS),
68 VMX_SEGMENT_FIELD(ES),
69 VMX_SEGMENT_FIELD(FS),
70 VMX_SEGMENT_FIELD(GS),
71 VMX_SEGMENT_FIELD(SS),
72 VMX_SEGMENT_FIELD(TR),
73 VMX_SEGMENT_FIELD(LDTR),
74 };
75
76 /*
77 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
78 * away by decrementing the array size.
79 */
80 static const u32 vmx_msr_index[] = {
81 #ifdef CONFIG_X86_64
82 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
83 #endif
84 MSR_EFER, MSR_K6_STAR,
85 };
86 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
87
88 #ifdef CONFIG_X86_64
89 static unsigned msr_offset_kernel_gs_base;
90 #define NR_64BIT_MSRS 4
91 /*
92 * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
93 * mechanism (cpu bug AA24)
94 */
95 #define NR_BAD_MSRS 2
96 #else
97 #define NR_64BIT_MSRS 0
98 #define NR_BAD_MSRS 0
99 #endif
100
101 static inline int is_page_fault(u32 intr_info)
102 {
103 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
104 INTR_INFO_VALID_MASK)) ==
105 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
106 }
107
108 static inline int is_no_device(u32 intr_info)
109 {
110 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
111 INTR_INFO_VALID_MASK)) ==
112 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
113 }
114
115 static inline int is_external_interrupt(u32 intr_info)
116 {
117 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
118 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
119 }
120
121 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
122 {
123 int i;
124
125 for (i = 0; i < vcpu->nmsrs; ++i)
126 if (vcpu->guest_msrs[i].index == msr)
127 return &vcpu->guest_msrs[i];
128 return NULL;
129 }
130
131 static void vmcs_clear(struct vmcs *vmcs)
132 {
133 u64 phys_addr = __pa(vmcs);
134 u8 error;
135
136 asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
137 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
138 : "cc", "memory");
139 if (error)
140 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
141 vmcs, phys_addr);
142 }
143
144 static void __vcpu_clear(void *arg)
145 {
146 struct kvm_vcpu *vcpu = arg;
147 int cpu = raw_smp_processor_id();
148
149 if (vcpu->cpu == cpu)
150 vmcs_clear(vcpu->vmcs);
151 if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
152 per_cpu(current_vmcs, cpu) = NULL;
153 }
154
155 static void vcpu_clear(struct kvm_vcpu *vcpu)
156 {
157 if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
158 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
159 else
160 __vcpu_clear(vcpu);
161 vcpu->launched = 0;
162 }
163
164 static unsigned long vmcs_readl(unsigned long field)
165 {
166 unsigned long value;
167
168 asm volatile (ASM_VMX_VMREAD_RDX_RAX
169 : "=a"(value) : "d"(field) : "cc");
170 return value;
171 }
172
173 static u16 vmcs_read16(unsigned long field)
174 {
175 return vmcs_readl(field);
176 }
177
178 static u32 vmcs_read32(unsigned long field)
179 {
180 return vmcs_readl(field);
181 }
182
183 static u64 vmcs_read64(unsigned long field)
184 {
185 #ifdef CONFIG_X86_64
186 return vmcs_readl(field);
187 #else
188 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
189 #endif
190 }
191
192 static noinline void vmwrite_error(unsigned long field, unsigned long value)
193 {
194 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
195 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
196 dump_stack();
197 }
198
199 static void vmcs_writel(unsigned long field, unsigned long value)
200 {
201 u8 error;
202
203 asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
204 : "=q"(error) : "a"(value), "d"(field) : "cc" );
205 if (unlikely(error))
206 vmwrite_error(field, value);
207 }
208
209 static void vmcs_write16(unsigned long field, u16 value)
210 {
211 vmcs_writel(field, value);
212 }
213
214 static void vmcs_write32(unsigned long field, u32 value)
215 {
216 vmcs_writel(field, value);
217 }
218
219 static void vmcs_write64(unsigned long field, u64 value)
220 {
221 #ifdef CONFIG_X86_64
222 vmcs_writel(field, value);
223 #else
224 vmcs_writel(field, value);
225 asm volatile ("");
226 vmcs_writel(field+1, value >> 32);
227 #endif
228 }
229
230 static void vmcs_clear_bits(unsigned long field, u32 mask)
231 {
232 vmcs_writel(field, vmcs_readl(field) & ~mask);
233 }
234
235 static void vmcs_set_bits(unsigned long field, u32 mask)
236 {
237 vmcs_writel(field, vmcs_readl(field) | mask);
238 }
239
240 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
241 {
242 u32 eb;
243
244 eb = 1u << PF_VECTOR;
245 if (!vcpu->fpu_active)
246 eb |= 1u << NM_VECTOR;
247 if (vcpu->guest_debug.enabled)
248 eb |= 1u << 1;
249 if (vcpu->rmode.active)
250 eb = ~0;
251 vmcs_write32(EXCEPTION_BITMAP, eb);
252 }
253
254 static void reload_tss(void)
255 {
256 #ifndef CONFIG_X86_64
257
258 /*
259 * VT restores TR but not its size. Useless.
260 */
261 struct descriptor_table gdt;
262 struct segment_descriptor *descs;
263
264 get_gdt(&gdt);
265 descs = (void *)gdt.base;
266 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
267 load_TR_desc();
268 #endif
269 }
270
271 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
272 {
273 struct vmx_host_state *hs = &vcpu->vmx_host_state;
274
275 if (hs->loaded)
276 return;
277
278 hs->loaded = 1;
279 /*
280 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
281 * allow segment selectors with cpl > 0 or ti == 1.
282 */
283 hs->ldt_sel = read_ldt();
284 hs->fs_gs_ldt_reload_needed = hs->ldt_sel;
285 hs->fs_sel = read_fs();
286 if (!(hs->fs_sel & 7))
287 vmcs_write16(HOST_FS_SELECTOR, hs->fs_sel);
288 else {
289 vmcs_write16(HOST_FS_SELECTOR, 0);
290 hs->fs_gs_ldt_reload_needed = 1;
291 }
292 hs->gs_sel = read_gs();
293 if (!(hs->gs_sel & 7))
294 vmcs_write16(HOST_GS_SELECTOR, hs->gs_sel);
295 else {
296 vmcs_write16(HOST_GS_SELECTOR, 0);
297 hs->fs_gs_ldt_reload_needed = 1;
298 }
299
300 #ifdef CONFIG_X86_64
301 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
302 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
303 #else
304 vmcs_writel(HOST_FS_BASE, segment_base(hs->fs_sel));
305 vmcs_writel(HOST_GS_BASE, segment_base(hs->gs_sel));
306 #endif
307
308 #ifdef CONFIG_X86_64
309 if (is_long_mode(vcpu)) {
310 save_msrs(vcpu->host_msrs + msr_offset_kernel_gs_base, 1);
311 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
312 }
313 #endif
314 }
315
316 static void vmx_load_host_state(struct kvm_vcpu *vcpu)
317 {
318 struct vmx_host_state *hs = &vcpu->vmx_host_state;
319
320 if (!hs->loaded)
321 return;
322
323 hs->loaded = 0;
324 if (hs->fs_gs_ldt_reload_needed) {
325 load_ldt(hs->ldt_sel);
326 load_fs(hs->fs_sel);
327 /*
328 * If we have to reload gs, we must take care to
329 * preserve our gs base.
330 */
331 local_irq_disable();
332 load_gs(hs->gs_sel);
333 #ifdef CONFIG_X86_64
334 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
335 #endif
336 local_irq_enable();
337
338 reload_tss();
339 }
340 #ifdef CONFIG_X86_64
341 if (is_long_mode(vcpu)) {
342 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
343 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
344 }
345 #endif
346 }
347
348 /*
349 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
350 * vcpu mutex is already taken.
351 */
352 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
353 {
354 u64 phys_addr = __pa(vcpu->vmcs);
355 int cpu;
356
357 cpu = get_cpu();
358
359 if (vcpu->cpu != cpu)
360 vcpu_clear(vcpu);
361
362 if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
363 u8 error;
364
365 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
366 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
367 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
368 : "cc");
369 if (error)
370 printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
371 vcpu->vmcs, phys_addr);
372 }
373
374 if (vcpu->cpu != cpu) {
375 struct descriptor_table dt;
376 unsigned long sysenter_esp;
377
378 vcpu->cpu = cpu;
379 /*
380 * Linux uses per-cpu TSS and GDT, so set these when switching
381 * processors.
382 */
383 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
384 get_gdt(&dt);
385 vmcs_writel(HOST_GDTR_BASE, dt.base); /* 22.2.4 */
386
387 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
388 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
389 }
390 }
391
392 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
393 {
394 vmx_load_host_state(vcpu);
395 kvm_put_guest_fpu(vcpu);
396 put_cpu();
397 }
398
399 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
400 {
401 vcpu_clear(vcpu);
402 }
403
404 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
405 {
406 return vmcs_readl(GUEST_RFLAGS);
407 }
408
409 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
410 {
411 vmcs_writel(GUEST_RFLAGS, rflags);
412 }
413
414 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
415 {
416 unsigned long rip;
417 u32 interruptibility;
418
419 rip = vmcs_readl(GUEST_RIP);
420 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
421 vmcs_writel(GUEST_RIP, rip);
422
423 /*
424 * We emulated an instruction, so temporary interrupt blocking
425 * should be removed, if set.
426 */
427 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
428 if (interruptibility & 3)
429 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
430 interruptibility & ~3);
431 vcpu->interrupt_window_open = 1;
432 }
433
434 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
435 {
436 printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
437 vmcs_readl(GUEST_RIP));
438 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
439 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
440 GP_VECTOR |
441 INTR_TYPE_EXCEPTION |
442 INTR_INFO_DELIEVER_CODE_MASK |
443 INTR_INFO_VALID_MASK);
444 }
445
446 /*
447 * Set up the vmcs to automatically save and restore system
448 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
449 * mode, as fiddling with msrs is very expensive.
450 */
451 static void setup_msrs(struct kvm_vcpu *vcpu)
452 {
453 int nr_skip, nr_good_msrs;
454
455 if (is_long_mode(vcpu))
456 nr_skip = NR_BAD_MSRS;
457 else
458 nr_skip = NR_64BIT_MSRS;
459 nr_good_msrs = vcpu->nmsrs - nr_skip;
460
461 /*
462 * MSR_K6_STAR is only needed on long mode guests, and only
463 * if efer.sce is enabled.
464 */
465 if (find_msr_entry(vcpu, MSR_K6_STAR)) {
466 --nr_good_msrs;
467 #ifdef CONFIG_X86_64
468 if (is_long_mode(vcpu) && (vcpu->shadow_efer & EFER_SCE))
469 ++nr_good_msrs;
470 #endif
471 }
472
473 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
474 virt_to_phys(vcpu->guest_msrs + nr_skip));
475 vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
476 virt_to_phys(vcpu->guest_msrs + nr_skip));
477 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
478 virt_to_phys(vcpu->host_msrs + nr_skip));
479 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
480 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
481 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
482 }
483
484 /*
485 * reads and returns guest's timestamp counter "register"
486 * guest_tsc = host_tsc + tsc_offset -- 21.3
487 */
488 static u64 guest_read_tsc(void)
489 {
490 u64 host_tsc, tsc_offset;
491
492 rdtscll(host_tsc);
493 tsc_offset = vmcs_read64(TSC_OFFSET);
494 return host_tsc + tsc_offset;
495 }
496
497 /*
498 * writes 'guest_tsc' into guest's timestamp counter "register"
499 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
500 */
501 static void guest_write_tsc(u64 guest_tsc)
502 {
503 u64 host_tsc;
504
505 rdtscll(host_tsc);
506 vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
507 }
508
509 /*
510 * Reads an msr value (of 'msr_index') into 'pdata'.
511 * Returns 0 on success, non-0 otherwise.
512 * Assumes vcpu_load() was already called.
513 */
514 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
515 {
516 u64 data;
517 struct vmx_msr_entry *msr;
518
519 if (!pdata) {
520 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
521 return -EINVAL;
522 }
523
524 switch (msr_index) {
525 #ifdef CONFIG_X86_64
526 case MSR_FS_BASE:
527 data = vmcs_readl(GUEST_FS_BASE);
528 break;
529 case MSR_GS_BASE:
530 data = vmcs_readl(GUEST_GS_BASE);
531 break;
532 case MSR_EFER:
533 return kvm_get_msr_common(vcpu, msr_index, pdata);
534 #endif
535 case MSR_IA32_TIME_STAMP_COUNTER:
536 data = guest_read_tsc();
537 break;
538 case MSR_IA32_SYSENTER_CS:
539 data = vmcs_read32(GUEST_SYSENTER_CS);
540 break;
541 case MSR_IA32_SYSENTER_EIP:
542 data = vmcs_readl(GUEST_SYSENTER_EIP);
543 break;
544 case MSR_IA32_SYSENTER_ESP:
545 data = vmcs_readl(GUEST_SYSENTER_ESP);
546 break;
547 default:
548 msr = find_msr_entry(vcpu, msr_index);
549 if (msr) {
550 data = msr->data;
551 break;
552 }
553 return kvm_get_msr_common(vcpu, msr_index, pdata);
554 }
555
556 *pdata = data;
557 return 0;
558 }
559
560 /*
561 * Writes msr value into into the appropriate "register".
562 * Returns 0 on success, non-0 otherwise.
563 * Assumes vcpu_load() was already called.
564 */
565 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
566 {
567 struct vmx_msr_entry *msr;
568 switch (msr_index) {
569 #ifdef CONFIG_X86_64
570 case MSR_EFER:
571 return kvm_set_msr_common(vcpu, msr_index, data);
572 case MSR_FS_BASE:
573 vmcs_writel(GUEST_FS_BASE, data);
574 break;
575 case MSR_GS_BASE:
576 vmcs_writel(GUEST_GS_BASE, data);
577 break;
578 case MSR_LSTAR:
579 case MSR_SYSCALL_MASK:
580 msr = find_msr_entry(vcpu, msr_index);
581 if (msr)
582 msr->data = data;
583 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
584 break;
585 #endif
586 case MSR_IA32_SYSENTER_CS:
587 vmcs_write32(GUEST_SYSENTER_CS, data);
588 break;
589 case MSR_IA32_SYSENTER_EIP:
590 vmcs_writel(GUEST_SYSENTER_EIP, data);
591 break;
592 case MSR_IA32_SYSENTER_ESP:
593 vmcs_writel(GUEST_SYSENTER_ESP, data);
594 break;
595 case MSR_IA32_TIME_STAMP_COUNTER:
596 guest_write_tsc(data);
597 break;
598 default:
599 msr = find_msr_entry(vcpu, msr_index);
600 if (msr) {
601 msr->data = data;
602 break;
603 }
604 return kvm_set_msr_common(vcpu, msr_index, data);
605 msr->data = data;
606 break;
607 }
608
609 return 0;
610 }
611
612 /*
613 * Sync the rsp and rip registers into the vcpu structure. This allows
614 * registers to be accessed by indexing vcpu->regs.
615 */
616 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
617 {
618 vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
619 vcpu->rip = vmcs_readl(GUEST_RIP);
620 }
621
622 /*
623 * Syncs rsp and rip back into the vmcs. Should be called after possible
624 * modification.
625 */
626 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
627 {
628 vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
629 vmcs_writel(GUEST_RIP, vcpu->rip);
630 }
631
632 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
633 {
634 unsigned long dr7 = 0x400;
635 int old_singlestep;
636
637 old_singlestep = vcpu->guest_debug.singlestep;
638
639 vcpu->guest_debug.enabled = dbg->enabled;
640 if (vcpu->guest_debug.enabled) {
641 int i;
642
643 dr7 |= 0x200; /* exact */
644 for (i = 0; i < 4; ++i) {
645 if (!dbg->breakpoints[i].enabled)
646 continue;
647 vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
648 dr7 |= 2 << (i*2); /* global enable */
649 dr7 |= 0 << (i*4+16); /* execution breakpoint */
650 }
651
652 vcpu->guest_debug.singlestep = dbg->singlestep;
653 } else
654 vcpu->guest_debug.singlestep = 0;
655
656 if (old_singlestep && !vcpu->guest_debug.singlestep) {
657 unsigned long flags;
658
659 flags = vmcs_readl(GUEST_RFLAGS);
660 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
661 vmcs_writel(GUEST_RFLAGS, flags);
662 }
663
664 update_exception_bitmap(vcpu);
665 vmcs_writel(GUEST_DR7, dr7);
666
667 return 0;
668 }
669
670 static __init int cpu_has_kvm_support(void)
671 {
672 unsigned long ecx = cpuid_ecx(1);
673 return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
674 }
675
676 static __init int vmx_disabled_by_bios(void)
677 {
678 u64 msr;
679
680 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
681 return (msr & 5) == 1; /* locked but not enabled */
682 }
683
684 static void hardware_enable(void *garbage)
685 {
686 int cpu = raw_smp_processor_id();
687 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
688 u64 old;
689
690 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
691 if ((old & 5) != 5)
692 /* enable and lock */
693 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
694 write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
695 asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
696 : "memory", "cc");
697 }
698
699 static void hardware_disable(void *garbage)
700 {
701 asm volatile (ASM_VMX_VMXOFF : : : "cc");
702 }
703
704 static __init void setup_vmcs_descriptor(void)
705 {
706 u32 vmx_msr_low, vmx_msr_high;
707
708 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
709 vmcs_descriptor.size = vmx_msr_high & 0x1fff;
710 vmcs_descriptor.order = get_order(vmcs_descriptor.size);
711 vmcs_descriptor.revision_id = vmx_msr_low;
712 }
713
714 static struct vmcs *alloc_vmcs_cpu(int cpu)
715 {
716 int node = cpu_to_node(cpu);
717 struct page *pages;
718 struct vmcs *vmcs;
719
720 pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
721 if (!pages)
722 return NULL;
723 vmcs = page_address(pages);
724 memset(vmcs, 0, vmcs_descriptor.size);
725 vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
726 return vmcs;
727 }
728
729 static struct vmcs *alloc_vmcs(void)
730 {
731 return alloc_vmcs_cpu(raw_smp_processor_id());
732 }
733
734 static void free_vmcs(struct vmcs *vmcs)
735 {
736 free_pages((unsigned long)vmcs, vmcs_descriptor.order);
737 }
738
739 static void free_kvm_area(void)
740 {
741 int cpu;
742
743 for_each_online_cpu(cpu)
744 free_vmcs(per_cpu(vmxarea, cpu));
745 }
746
747 extern struct vmcs *alloc_vmcs_cpu(int cpu);
748
749 static __init int alloc_kvm_area(void)
750 {
751 int cpu;
752
753 for_each_online_cpu(cpu) {
754 struct vmcs *vmcs;
755
756 vmcs = alloc_vmcs_cpu(cpu);
757 if (!vmcs) {
758 free_kvm_area();
759 return -ENOMEM;
760 }
761
762 per_cpu(vmxarea, cpu) = vmcs;
763 }
764 return 0;
765 }
766
767 static __init int hardware_setup(void)
768 {
769 setup_vmcs_descriptor();
770 return alloc_kvm_area();
771 }
772
773 static __exit void hardware_unsetup(void)
774 {
775 free_kvm_area();
776 }
777
778 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
779 {
780 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
781
782 if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
783 vmcs_write16(sf->selector, save->selector);
784 vmcs_writel(sf->base, save->base);
785 vmcs_write32(sf->limit, save->limit);
786 vmcs_write32(sf->ar_bytes, save->ar);
787 } else {
788 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
789 << AR_DPL_SHIFT;
790 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
791 }
792 }
793
794 static void enter_pmode(struct kvm_vcpu *vcpu)
795 {
796 unsigned long flags;
797
798 vcpu->rmode.active = 0;
799
800 vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
801 vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
802 vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
803
804 flags = vmcs_readl(GUEST_RFLAGS);
805 flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
806 flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
807 vmcs_writel(GUEST_RFLAGS, flags);
808
809 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
810 (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
811
812 update_exception_bitmap(vcpu);
813
814 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
815 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
816 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
817 fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
818
819 vmcs_write16(GUEST_SS_SELECTOR, 0);
820 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
821
822 vmcs_write16(GUEST_CS_SELECTOR,
823 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
824 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
825 }
826
827 static int rmode_tss_base(struct kvm* kvm)
828 {
829 gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
830 return base_gfn << PAGE_SHIFT;
831 }
832
833 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
834 {
835 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
836
837 save->selector = vmcs_read16(sf->selector);
838 save->base = vmcs_readl(sf->base);
839 save->limit = vmcs_read32(sf->limit);
840 save->ar = vmcs_read32(sf->ar_bytes);
841 vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
842 vmcs_write32(sf->limit, 0xffff);
843 vmcs_write32(sf->ar_bytes, 0xf3);
844 }
845
846 static void enter_rmode(struct kvm_vcpu *vcpu)
847 {
848 unsigned long flags;
849
850 vcpu->rmode.active = 1;
851
852 vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
853 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
854
855 vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
856 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
857
858 vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
859 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
860
861 flags = vmcs_readl(GUEST_RFLAGS);
862 vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
863
864 flags |= IOPL_MASK | X86_EFLAGS_VM;
865
866 vmcs_writel(GUEST_RFLAGS, flags);
867 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
868 update_exception_bitmap(vcpu);
869
870 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
871 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
872 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
873
874 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
875 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
876 if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
877 vmcs_writel(GUEST_CS_BASE, 0xf0000);
878 vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
879
880 fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
881 fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
882 fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
883 fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
884 }
885
886 #ifdef CONFIG_X86_64
887
888 static void enter_lmode(struct kvm_vcpu *vcpu)
889 {
890 u32 guest_tr_ar;
891
892 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
893 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
894 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
895 __FUNCTION__);
896 vmcs_write32(GUEST_TR_AR_BYTES,
897 (guest_tr_ar & ~AR_TYPE_MASK)
898 | AR_TYPE_BUSY_64_TSS);
899 }
900
901 vcpu->shadow_efer |= EFER_LMA;
902
903 find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
904 vmcs_write32(VM_ENTRY_CONTROLS,
905 vmcs_read32(VM_ENTRY_CONTROLS)
906 | VM_ENTRY_CONTROLS_IA32E_MASK);
907 }
908
909 static void exit_lmode(struct kvm_vcpu *vcpu)
910 {
911 vcpu->shadow_efer &= ~EFER_LMA;
912
913 vmcs_write32(VM_ENTRY_CONTROLS,
914 vmcs_read32(VM_ENTRY_CONTROLS)
915 & ~VM_ENTRY_CONTROLS_IA32E_MASK);
916 }
917
918 #endif
919
920 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
921 {
922 vcpu->cr4 &= KVM_GUEST_CR4_MASK;
923 vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
924 }
925
926 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
927 {
928 if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
929 enter_pmode(vcpu);
930
931 if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
932 enter_rmode(vcpu);
933
934 #ifdef CONFIG_X86_64
935 if (vcpu->shadow_efer & EFER_LME) {
936 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
937 enter_lmode(vcpu);
938 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
939 exit_lmode(vcpu);
940 }
941 #endif
942
943 if (!(cr0 & CR0_TS_MASK)) {
944 vcpu->fpu_active = 1;
945 update_exception_bitmap(vcpu);
946 }
947
948 vmcs_writel(CR0_READ_SHADOW, cr0);
949 vmcs_writel(GUEST_CR0,
950 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
951 vcpu->cr0 = cr0;
952 }
953
954 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
955 {
956 vmcs_writel(GUEST_CR3, cr3);
957
958 if (!(vcpu->cr0 & CR0_TS_MASK)) {
959 vcpu->fpu_active = 0;
960 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
961 update_exception_bitmap(vcpu);
962 }
963 }
964
965 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
966 {
967 vmcs_writel(CR4_READ_SHADOW, cr4);
968 vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
969 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
970 vcpu->cr4 = cr4;
971 }
972
973 #ifdef CONFIG_X86_64
974
975 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
976 {
977 struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
978
979 vcpu->shadow_efer = efer;
980 if (efer & EFER_LMA) {
981 vmcs_write32(VM_ENTRY_CONTROLS,
982 vmcs_read32(VM_ENTRY_CONTROLS) |
983 VM_ENTRY_CONTROLS_IA32E_MASK);
984 msr->data = efer;
985
986 } else {
987 vmcs_write32(VM_ENTRY_CONTROLS,
988 vmcs_read32(VM_ENTRY_CONTROLS) &
989 ~VM_ENTRY_CONTROLS_IA32E_MASK);
990
991 msr->data = efer & ~EFER_LME;
992 }
993 setup_msrs(vcpu);
994 }
995
996 #endif
997
998 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
999 {
1000 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1001
1002 return vmcs_readl(sf->base);
1003 }
1004
1005 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1006 struct kvm_segment *var, int seg)
1007 {
1008 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1009 u32 ar;
1010
1011 var->base = vmcs_readl(sf->base);
1012 var->limit = vmcs_read32(sf->limit);
1013 var->selector = vmcs_read16(sf->selector);
1014 ar = vmcs_read32(sf->ar_bytes);
1015 if (ar & AR_UNUSABLE_MASK)
1016 ar = 0;
1017 var->type = ar & 15;
1018 var->s = (ar >> 4) & 1;
1019 var->dpl = (ar >> 5) & 3;
1020 var->present = (ar >> 7) & 1;
1021 var->avl = (ar >> 12) & 1;
1022 var->l = (ar >> 13) & 1;
1023 var->db = (ar >> 14) & 1;
1024 var->g = (ar >> 15) & 1;
1025 var->unusable = (ar >> 16) & 1;
1026 }
1027
1028 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1029 struct kvm_segment *var, int seg)
1030 {
1031 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1032 u32 ar;
1033
1034 vmcs_writel(sf->base, var->base);
1035 vmcs_write32(sf->limit, var->limit);
1036 vmcs_write16(sf->selector, var->selector);
1037 if (vcpu->rmode.active && var->s) {
1038 /*
1039 * Hack real-mode segments into vm86 compatibility.
1040 */
1041 if (var->base == 0xffff0000 && var->selector == 0xf000)
1042 vmcs_writel(sf->base, 0xf0000);
1043 ar = 0xf3;
1044 } else if (var->unusable)
1045 ar = 1 << 16;
1046 else {
1047 ar = var->type & 15;
1048 ar |= (var->s & 1) << 4;
1049 ar |= (var->dpl & 3) << 5;
1050 ar |= (var->present & 1) << 7;
1051 ar |= (var->avl & 1) << 12;
1052 ar |= (var->l & 1) << 13;
1053 ar |= (var->db & 1) << 14;
1054 ar |= (var->g & 1) << 15;
1055 }
1056 if (ar == 0) /* a 0 value means unusable */
1057 ar = AR_UNUSABLE_MASK;
1058 vmcs_write32(sf->ar_bytes, ar);
1059 }
1060
1061 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1062 {
1063 u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1064
1065 *db = (ar >> 14) & 1;
1066 *l = (ar >> 13) & 1;
1067 }
1068
1069 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1070 {
1071 dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1072 dt->base = vmcs_readl(GUEST_IDTR_BASE);
1073 }
1074
1075 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1076 {
1077 vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1078 vmcs_writel(GUEST_IDTR_BASE, dt->base);
1079 }
1080
1081 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1082 {
1083 dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1084 dt->base = vmcs_readl(GUEST_GDTR_BASE);
1085 }
1086
1087 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1088 {
1089 vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1090 vmcs_writel(GUEST_GDTR_BASE, dt->base);
1091 }
1092
1093 static int init_rmode_tss(struct kvm* kvm)
1094 {
1095 struct page *p1, *p2, *p3;
1096 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1097 char *page;
1098
1099 p1 = gfn_to_page(kvm, fn++);
1100 p2 = gfn_to_page(kvm, fn++);
1101 p3 = gfn_to_page(kvm, fn);
1102
1103 if (!p1 || !p2 || !p3) {
1104 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1105 return 0;
1106 }
1107
1108 page = kmap_atomic(p1, KM_USER0);
1109 memset(page, 0, PAGE_SIZE);
1110 *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1111 kunmap_atomic(page, KM_USER0);
1112
1113 page = kmap_atomic(p2, KM_USER0);
1114 memset(page, 0, PAGE_SIZE);
1115 kunmap_atomic(page, KM_USER0);
1116
1117 page = kmap_atomic(p3, KM_USER0);
1118 memset(page, 0, PAGE_SIZE);
1119 *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1120 kunmap_atomic(page, KM_USER0);
1121
1122 return 1;
1123 }
1124
1125 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1126 {
1127 u32 msr_high, msr_low;
1128
1129 rdmsr(msr, msr_low, msr_high);
1130
1131 val &= msr_high;
1132 val |= msr_low;
1133 vmcs_write32(vmcs_field, val);
1134 }
1135
1136 static void seg_setup(int seg)
1137 {
1138 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1139
1140 vmcs_write16(sf->selector, 0);
1141 vmcs_writel(sf->base, 0);
1142 vmcs_write32(sf->limit, 0xffff);
1143 vmcs_write32(sf->ar_bytes, 0x93);
1144 }
1145
1146 /*
1147 * Sets up the vmcs for emulated real mode.
1148 */
1149 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1150 {
1151 u32 host_sysenter_cs;
1152 u32 junk;
1153 unsigned long a;
1154 struct descriptor_table dt;
1155 int i;
1156 int ret = 0;
1157 extern asmlinkage void kvm_vmx_return(void);
1158
1159 if (!init_rmode_tss(vcpu->kvm)) {
1160 ret = -ENOMEM;
1161 goto out;
1162 }
1163
1164 memset(vcpu->regs, 0, sizeof(vcpu->regs));
1165 vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1166 vcpu->cr8 = 0;
1167 vcpu->apic_base = 0xfee00000 |
1168 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1169 MSR_IA32_APICBASE_ENABLE;
1170
1171 fx_init(vcpu);
1172
1173 /*
1174 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1175 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1176 */
1177 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1178 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1179 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1180 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1181
1182 seg_setup(VCPU_SREG_DS);
1183 seg_setup(VCPU_SREG_ES);
1184 seg_setup(VCPU_SREG_FS);
1185 seg_setup(VCPU_SREG_GS);
1186 seg_setup(VCPU_SREG_SS);
1187
1188 vmcs_write16(GUEST_TR_SELECTOR, 0);
1189 vmcs_writel(GUEST_TR_BASE, 0);
1190 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1191 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1192
1193 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1194 vmcs_writel(GUEST_LDTR_BASE, 0);
1195 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1196 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1197
1198 vmcs_write32(GUEST_SYSENTER_CS, 0);
1199 vmcs_writel(GUEST_SYSENTER_ESP, 0);
1200 vmcs_writel(GUEST_SYSENTER_EIP, 0);
1201
1202 vmcs_writel(GUEST_RFLAGS, 0x02);
1203 vmcs_writel(GUEST_RIP, 0xfff0);
1204 vmcs_writel(GUEST_RSP, 0);
1205
1206 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1207 vmcs_writel(GUEST_DR7, 0x400);
1208
1209 vmcs_writel(GUEST_GDTR_BASE, 0);
1210 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1211
1212 vmcs_writel(GUEST_IDTR_BASE, 0);
1213 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1214
1215 vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1216 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1217 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1218
1219 /* I/O */
1220 vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1221 vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1222
1223 guest_write_tsc(0);
1224
1225 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1226
1227 /* Special registers */
1228 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1229
1230 /* Control */
1231 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1232 PIN_BASED_VM_EXEC_CONTROL,
1233 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */
1234 | PIN_BASED_NMI_EXITING /* 20.6.1 */
1235 );
1236 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1237 CPU_BASED_VM_EXEC_CONTROL,
1238 CPU_BASED_HLT_EXITING /* 20.6.2 */
1239 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */
1240 | CPU_BASED_CR8_STORE_EXITING /* 20.6.2 */
1241 | CPU_BASED_ACTIVATE_IO_BITMAP /* 20.6.2 */
1242 | CPU_BASED_MOV_DR_EXITING
1243 | CPU_BASED_USE_TSC_OFFSETING /* 21.3 */
1244 );
1245
1246 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1247 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1248 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
1249
1250 vmcs_writel(HOST_CR0, read_cr0()); /* 22.2.3 */
1251 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
1252 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1253
1254 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
1255 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1256 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1257 vmcs_write16(HOST_FS_SELECTOR, read_fs()); /* 22.2.4 */
1258 vmcs_write16(HOST_GS_SELECTOR, read_gs()); /* 22.2.4 */
1259 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1260 #ifdef CONFIG_X86_64
1261 rdmsrl(MSR_FS_BASE, a);
1262 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1263 rdmsrl(MSR_GS_BASE, a);
1264 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1265 #else
1266 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1267 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1268 #endif
1269
1270 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
1271
1272 get_idt(&dt);
1273 vmcs_writel(HOST_IDTR_BASE, dt.base); /* 22.2.4 */
1274
1275
1276 vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1277
1278 rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1279 vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1280 rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1281 vmcs_writel(HOST_IA32_SYSENTER_ESP, a); /* 22.2.3 */
1282 rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1283 vmcs_writel(HOST_IA32_SYSENTER_EIP, a); /* 22.2.3 */
1284
1285 for (i = 0; i < NR_VMX_MSR; ++i) {
1286 u32 index = vmx_msr_index[i];
1287 u32 data_low, data_high;
1288 u64 data;
1289 int j = vcpu->nmsrs;
1290
1291 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1292 continue;
1293 if (wrmsr_safe(index, data_low, data_high) < 0)
1294 continue;
1295 data = data_low | ((u64)data_high << 32);
1296 vcpu->host_msrs[j].index = index;
1297 vcpu->host_msrs[j].reserved = 0;
1298 vcpu->host_msrs[j].data = data;
1299 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1300 #ifdef CONFIG_X86_64
1301 if (index == MSR_KERNEL_GS_BASE)
1302 msr_offset_kernel_gs_base = j;
1303 #endif
1304 ++vcpu->nmsrs;
1305 }
1306
1307 setup_msrs(vcpu);
1308
1309 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1310 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */
1311
1312 /* 22.2.1, 20.8.1 */
1313 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1314 VM_ENTRY_CONTROLS, 0);
1315 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
1316
1317 #ifdef CONFIG_X86_64
1318 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1319 vmcs_writel(TPR_THRESHOLD, 0);
1320 #endif
1321
1322 vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1323 vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1324
1325 vcpu->cr0 = 0x60000010;
1326 vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1327 vmx_set_cr4(vcpu, 0);
1328 #ifdef CONFIG_X86_64
1329 vmx_set_efer(vcpu, 0);
1330 #endif
1331 update_exception_bitmap(vcpu);
1332
1333 return 0;
1334
1335 out:
1336 return ret;
1337 }
1338
1339 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1340 {
1341 u16 ent[2];
1342 u16 cs;
1343 u16 ip;
1344 unsigned long flags;
1345 unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1346 u16 sp = vmcs_readl(GUEST_RSP);
1347 u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1348
1349 if (sp > ss_limit || sp < 6 ) {
1350 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1351 __FUNCTION__,
1352 vmcs_readl(GUEST_RSP),
1353 vmcs_readl(GUEST_SS_BASE),
1354 vmcs_read32(GUEST_SS_LIMIT));
1355 return;
1356 }
1357
1358 if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1359 sizeof(ent)) {
1360 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1361 return;
1362 }
1363
1364 flags = vmcs_readl(GUEST_RFLAGS);
1365 cs = vmcs_readl(GUEST_CS_BASE) >> 4;
1366 ip = vmcs_readl(GUEST_RIP);
1367
1368
1369 if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1370 kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1371 kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1372 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1373 return;
1374 }
1375
1376 vmcs_writel(GUEST_RFLAGS, flags &
1377 ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1378 vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1379 vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1380 vmcs_writel(GUEST_RIP, ent[0]);
1381 vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1382 }
1383
1384 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1385 {
1386 int word_index = __ffs(vcpu->irq_summary);
1387 int bit_index = __ffs(vcpu->irq_pending[word_index]);
1388 int irq = word_index * BITS_PER_LONG + bit_index;
1389
1390 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1391 if (!vcpu->irq_pending[word_index])
1392 clear_bit(word_index, &vcpu->irq_summary);
1393
1394 if (vcpu->rmode.active) {
1395 inject_rmode_irq(vcpu, irq);
1396 return;
1397 }
1398 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1399 irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1400 }
1401
1402
1403 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1404 struct kvm_run *kvm_run)
1405 {
1406 u32 cpu_based_vm_exec_control;
1407
1408 vcpu->interrupt_window_open =
1409 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1410 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1411
1412 if (vcpu->interrupt_window_open &&
1413 vcpu->irq_summary &&
1414 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1415 /*
1416 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1417 */
1418 kvm_do_inject_irq(vcpu);
1419
1420 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1421 if (!vcpu->interrupt_window_open &&
1422 (vcpu->irq_summary || kvm_run->request_interrupt_window))
1423 /*
1424 * Interrupts blocked. Wait for unblock.
1425 */
1426 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1427 else
1428 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1429 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1430 }
1431
1432 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1433 {
1434 struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1435
1436 set_debugreg(dbg->bp[0], 0);
1437 set_debugreg(dbg->bp[1], 1);
1438 set_debugreg(dbg->bp[2], 2);
1439 set_debugreg(dbg->bp[3], 3);
1440
1441 if (dbg->singlestep) {
1442 unsigned long flags;
1443
1444 flags = vmcs_readl(GUEST_RFLAGS);
1445 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1446 vmcs_writel(GUEST_RFLAGS, flags);
1447 }
1448 }
1449
1450 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1451 int vec, u32 err_code)
1452 {
1453 if (!vcpu->rmode.active)
1454 return 0;
1455
1456 if (vec == GP_VECTOR && err_code == 0)
1457 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1458 return 1;
1459 return 0;
1460 }
1461
1462 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1463 {
1464 u32 intr_info, error_code;
1465 unsigned long cr2, rip;
1466 u32 vect_info;
1467 enum emulation_result er;
1468 int r;
1469
1470 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1471 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1472
1473 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1474 !is_page_fault(intr_info)) {
1475 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1476 "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1477 }
1478
1479 if (is_external_interrupt(vect_info)) {
1480 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1481 set_bit(irq, vcpu->irq_pending);
1482 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1483 }
1484
1485 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1486 asm ("int $2");
1487 return 1;
1488 }
1489
1490 if (is_no_device(intr_info)) {
1491 vcpu->fpu_active = 1;
1492 update_exception_bitmap(vcpu);
1493 if (!(vcpu->cr0 & CR0_TS_MASK))
1494 vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
1495 return 1;
1496 }
1497
1498 error_code = 0;
1499 rip = vmcs_readl(GUEST_RIP);
1500 if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1501 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1502 if (is_page_fault(intr_info)) {
1503 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1504
1505 spin_lock(&vcpu->kvm->lock);
1506 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1507 if (r < 0) {
1508 spin_unlock(&vcpu->kvm->lock);
1509 return r;
1510 }
1511 if (!r) {
1512 spin_unlock(&vcpu->kvm->lock);
1513 return 1;
1514 }
1515
1516 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1517 spin_unlock(&vcpu->kvm->lock);
1518
1519 switch (er) {
1520 case EMULATE_DONE:
1521 return 1;
1522 case EMULATE_DO_MMIO:
1523 ++vcpu->stat.mmio_exits;
1524 kvm_run->exit_reason = KVM_EXIT_MMIO;
1525 return 0;
1526 case EMULATE_FAIL:
1527 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1528 break;
1529 default:
1530 BUG();
1531 }
1532 }
1533
1534 if (vcpu->rmode.active &&
1535 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1536 error_code))
1537 return 1;
1538
1539 if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1540 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1541 return 0;
1542 }
1543 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1544 kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1545 kvm_run->ex.error_code = error_code;
1546 return 0;
1547 }
1548
1549 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1550 struct kvm_run *kvm_run)
1551 {
1552 ++vcpu->stat.irq_exits;
1553 return 1;
1554 }
1555
1556 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1557 {
1558 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1559 return 0;
1560 }
1561
1562 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1563 {
1564 u64 inst;
1565 gva_t rip;
1566 int countr_size;
1567 int i, n;
1568
1569 if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1570 countr_size = 2;
1571 } else {
1572 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1573
1574 countr_size = (cs_ar & AR_L_MASK) ? 8:
1575 (cs_ar & AR_DB_MASK) ? 4: 2;
1576 }
1577
1578 rip = vmcs_readl(GUEST_RIP);
1579 if (countr_size != 8)
1580 rip += vmcs_readl(GUEST_CS_BASE);
1581
1582 n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1583
1584 for (i = 0; i < n; i++) {
1585 switch (((u8*)&inst)[i]) {
1586 case 0xf0:
1587 case 0xf2:
1588 case 0xf3:
1589 case 0x2e:
1590 case 0x36:
1591 case 0x3e:
1592 case 0x26:
1593 case 0x64:
1594 case 0x65:
1595 case 0x66:
1596 break;
1597 case 0x67:
1598 countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1599 default:
1600 goto done;
1601 }
1602 }
1603 return 0;
1604 done:
1605 countr_size *= 8;
1606 *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1607 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1608 return 1;
1609 }
1610
1611 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1612 {
1613 u64 exit_qualification;
1614 int size, down, in, string, rep;
1615 unsigned port;
1616 unsigned long count;
1617 gva_t address;
1618
1619 ++vcpu->stat.io_exits;
1620 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1621 in = (exit_qualification & 8) != 0;
1622 size = (exit_qualification & 7) + 1;
1623 string = (exit_qualification & 16) != 0;
1624 down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1625 count = 1;
1626 rep = (exit_qualification & 32) != 0;
1627 port = exit_qualification >> 16;
1628 address = 0;
1629 if (string) {
1630 if (rep && !get_io_count(vcpu, &count))
1631 return 1;
1632 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1633 }
1634 return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1635 address, rep, port);
1636 }
1637
1638 static void
1639 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1640 {
1641 /*
1642 * Patch in the VMCALL instruction:
1643 */
1644 hypercall[0] = 0x0f;
1645 hypercall[1] = 0x01;
1646 hypercall[2] = 0xc1;
1647 hypercall[3] = 0xc3;
1648 }
1649
1650 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1651 {
1652 u64 exit_qualification;
1653 int cr;
1654 int reg;
1655
1656 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1657 cr = exit_qualification & 15;
1658 reg = (exit_qualification >> 8) & 15;
1659 switch ((exit_qualification >> 4) & 3) {
1660 case 0: /* mov to cr */
1661 switch (cr) {
1662 case 0:
1663 vcpu_load_rsp_rip(vcpu);
1664 set_cr0(vcpu, vcpu->regs[reg]);
1665 skip_emulated_instruction(vcpu);
1666 return 1;
1667 case 3:
1668 vcpu_load_rsp_rip(vcpu);
1669 set_cr3(vcpu, vcpu->regs[reg]);
1670 skip_emulated_instruction(vcpu);
1671 return 1;
1672 case 4:
1673 vcpu_load_rsp_rip(vcpu);
1674 set_cr4(vcpu, vcpu->regs[reg]);
1675 skip_emulated_instruction(vcpu);
1676 return 1;
1677 case 8:
1678 vcpu_load_rsp_rip(vcpu);
1679 set_cr8(vcpu, vcpu->regs[reg]);
1680 skip_emulated_instruction(vcpu);
1681 return 1;
1682 };
1683 break;
1684 case 2: /* clts */
1685 vcpu_load_rsp_rip(vcpu);
1686 vcpu->fpu_active = 1;
1687 update_exception_bitmap(vcpu);
1688 vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
1689 vcpu->cr0 &= ~CR0_TS_MASK;
1690 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1691 skip_emulated_instruction(vcpu);
1692 return 1;
1693 case 1: /*mov from cr*/
1694 switch (cr) {
1695 case 3:
1696 vcpu_load_rsp_rip(vcpu);
1697 vcpu->regs[reg] = vcpu->cr3;
1698 vcpu_put_rsp_rip(vcpu);
1699 skip_emulated_instruction(vcpu);
1700 return 1;
1701 case 8:
1702 vcpu_load_rsp_rip(vcpu);
1703 vcpu->regs[reg] = vcpu->cr8;
1704 vcpu_put_rsp_rip(vcpu);
1705 skip_emulated_instruction(vcpu);
1706 return 1;
1707 }
1708 break;
1709 case 3: /* lmsw */
1710 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1711
1712 skip_emulated_instruction(vcpu);
1713 return 1;
1714 default:
1715 break;
1716 }
1717 kvm_run->exit_reason = 0;
1718 printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1719 (int)(exit_qualification >> 4) & 3, cr);
1720 return 0;
1721 }
1722
1723 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1724 {
1725 u64 exit_qualification;
1726 unsigned long val;
1727 int dr, reg;
1728
1729 /*
1730 * FIXME: this code assumes the host is debugging the guest.
1731 * need to deal with guest debugging itself too.
1732 */
1733 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1734 dr = exit_qualification & 7;
1735 reg = (exit_qualification >> 8) & 15;
1736 vcpu_load_rsp_rip(vcpu);
1737 if (exit_qualification & 16) {
1738 /* mov from dr */
1739 switch (dr) {
1740 case 6:
1741 val = 0xffff0ff0;
1742 break;
1743 case 7:
1744 val = 0x400;
1745 break;
1746 default:
1747 val = 0;
1748 }
1749 vcpu->regs[reg] = val;
1750 } else {
1751 /* mov to dr */
1752 }
1753 vcpu_put_rsp_rip(vcpu);
1754 skip_emulated_instruction(vcpu);
1755 return 1;
1756 }
1757
1758 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1759 {
1760 kvm_emulate_cpuid(vcpu);
1761 return 1;
1762 }
1763
1764 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1765 {
1766 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1767 u64 data;
1768
1769 if (vmx_get_msr(vcpu, ecx, &data)) {
1770 vmx_inject_gp(vcpu, 0);
1771 return 1;
1772 }
1773
1774 /* FIXME: handling of bits 32:63 of rax, rdx */
1775 vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1776 vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1777 skip_emulated_instruction(vcpu);
1778 return 1;
1779 }
1780
1781 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1782 {
1783 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1784 u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1785 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1786
1787 if (vmx_set_msr(vcpu, ecx, data) != 0) {
1788 vmx_inject_gp(vcpu, 0);
1789 return 1;
1790 }
1791
1792 skip_emulated_instruction(vcpu);
1793 return 1;
1794 }
1795
1796 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1797 struct kvm_run *kvm_run)
1798 {
1799 kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1800 kvm_run->cr8 = vcpu->cr8;
1801 kvm_run->apic_base = vcpu->apic_base;
1802 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1803 vcpu->irq_summary == 0);
1804 }
1805
1806 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1807 struct kvm_run *kvm_run)
1808 {
1809 /*
1810 * If the user space waits to inject interrupts, exit as soon as
1811 * possible
1812 */
1813 if (kvm_run->request_interrupt_window &&
1814 !vcpu->irq_summary) {
1815 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1816 ++vcpu->stat.irq_window_exits;
1817 return 0;
1818 }
1819 return 1;
1820 }
1821
1822 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1823 {
1824 skip_emulated_instruction(vcpu);
1825 if (vcpu->irq_summary)
1826 return 1;
1827
1828 kvm_run->exit_reason = KVM_EXIT_HLT;
1829 ++vcpu->stat.halt_exits;
1830 return 0;
1831 }
1832
1833 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1834 {
1835 skip_emulated_instruction(vcpu);
1836 return kvm_hypercall(vcpu, kvm_run);
1837 }
1838
1839 /*
1840 * The exit handlers return 1 if the exit was handled fully and guest execution
1841 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1842 * to be done to userspace and return 0.
1843 */
1844 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1845 struct kvm_run *kvm_run) = {
1846 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
1847 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
1848 [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault,
1849 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
1850 [EXIT_REASON_CR_ACCESS] = handle_cr,
1851 [EXIT_REASON_DR_ACCESS] = handle_dr,
1852 [EXIT_REASON_CPUID] = handle_cpuid,
1853 [EXIT_REASON_MSR_READ] = handle_rdmsr,
1854 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
1855 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
1856 [EXIT_REASON_HLT] = handle_halt,
1857 [EXIT_REASON_VMCALL] = handle_vmcall,
1858 };
1859
1860 static const int kvm_vmx_max_exit_handlers =
1861 sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1862
1863 /*
1864 * The guest has exited. See if we can fix it or if we need userspace
1865 * assistance.
1866 */
1867 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1868 {
1869 u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1870 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1871
1872 if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1873 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1874 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1875 "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1876 if (exit_reason < kvm_vmx_max_exit_handlers
1877 && kvm_vmx_exit_handlers[exit_reason])
1878 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1879 else {
1880 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1881 kvm_run->hw.hardware_exit_reason = exit_reason;
1882 }
1883 return 0;
1884 }
1885
1886 /*
1887 * Check if userspace requested an interrupt window, and that the
1888 * interrupt window is open.
1889 *
1890 * No need to exit to userspace if we already have an interrupt queued.
1891 */
1892 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1893 struct kvm_run *kvm_run)
1894 {
1895 return (!vcpu->irq_summary &&
1896 kvm_run->request_interrupt_window &&
1897 vcpu->interrupt_window_open &&
1898 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1899 }
1900
1901 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1902 {
1903 u8 fail;
1904 int r;
1905
1906 preempted:
1907 if (!vcpu->mmio_read_completed)
1908 do_interrupt_requests(vcpu, kvm_run);
1909
1910 if (vcpu->guest_debug.enabled)
1911 kvm_guest_debug_pre(vcpu);
1912
1913 again:
1914 vmx_save_host_state(vcpu);
1915 kvm_load_guest_fpu(vcpu);
1916
1917 /*
1918 * Loading guest fpu may have cleared host cr0.ts
1919 */
1920 vmcs_writel(HOST_CR0, read_cr0());
1921
1922 asm (
1923 /* Store host registers */
1924 "pushf \n\t"
1925 #ifdef CONFIG_X86_64
1926 "push %%rax; push %%rbx; push %%rdx;"
1927 "push %%rsi; push %%rdi; push %%rbp;"
1928 "push %%r8; push %%r9; push %%r10; push %%r11;"
1929 "push %%r12; push %%r13; push %%r14; push %%r15;"
1930 "push %%rcx \n\t"
1931 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1932 #else
1933 "pusha; push %%ecx \n\t"
1934 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1935 #endif
1936 /* Check if vmlaunch of vmresume is needed */
1937 "cmp $0, %1 \n\t"
1938 /* Load guest registers. Don't clobber flags. */
1939 #ifdef CONFIG_X86_64
1940 "mov %c[cr2](%3), %%rax \n\t"
1941 "mov %%rax, %%cr2 \n\t"
1942 "mov %c[rax](%3), %%rax \n\t"
1943 "mov %c[rbx](%3), %%rbx \n\t"
1944 "mov %c[rdx](%3), %%rdx \n\t"
1945 "mov %c[rsi](%3), %%rsi \n\t"
1946 "mov %c[rdi](%3), %%rdi \n\t"
1947 "mov %c[rbp](%3), %%rbp \n\t"
1948 "mov %c[r8](%3), %%r8 \n\t"
1949 "mov %c[r9](%3), %%r9 \n\t"
1950 "mov %c[r10](%3), %%r10 \n\t"
1951 "mov %c[r11](%3), %%r11 \n\t"
1952 "mov %c[r12](%3), %%r12 \n\t"
1953 "mov %c[r13](%3), %%r13 \n\t"
1954 "mov %c[r14](%3), %%r14 \n\t"
1955 "mov %c[r15](%3), %%r15 \n\t"
1956 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1957 #else
1958 "mov %c[cr2](%3), %%eax \n\t"
1959 "mov %%eax, %%cr2 \n\t"
1960 "mov %c[rax](%3), %%eax \n\t"
1961 "mov %c[rbx](%3), %%ebx \n\t"
1962 "mov %c[rdx](%3), %%edx \n\t"
1963 "mov %c[rsi](%3), %%esi \n\t"
1964 "mov %c[rdi](%3), %%edi \n\t"
1965 "mov %c[rbp](%3), %%ebp \n\t"
1966 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1967 #endif
1968 /* Enter guest mode */
1969 "jne launched \n\t"
1970 ASM_VMX_VMLAUNCH "\n\t"
1971 "jmp kvm_vmx_return \n\t"
1972 "launched: " ASM_VMX_VMRESUME "\n\t"
1973 ".globl kvm_vmx_return \n\t"
1974 "kvm_vmx_return: "
1975 /* Save guest registers, load host registers, keep flags */
1976 #ifdef CONFIG_X86_64
1977 "xchg %3, (%%rsp) \n\t"
1978 "mov %%rax, %c[rax](%3) \n\t"
1979 "mov %%rbx, %c[rbx](%3) \n\t"
1980 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1981 "mov %%rdx, %c[rdx](%3) \n\t"
1982 "mov %%rsi, %c[rsi](%3) \n\t"
1983 "mov %%rdi, %c[rdi](%3) \n\t"
1984 "mov %%rbp, %c[rbp](%3) \n\t"
1985 "mov %%r8, %c[r8](%3) \n\t"
1986 "mov %%r9, %c[r9](%3) \n\t"
1987 "mov %%r10, %c[r10](%3) \n\t"
1988 "mov %%r11, %c[r11](%3) \n\t"
1989 "mov %%r12, %c[r12](%3) \n\t"
1990 "mov %%r13, %c[r13](%3) \n\t"
1991 "mov %%r14, %c[r14](%3) \n\t"
1992 "mov %%r15, %c[r15](%3) \n\t"
1993 "mov %%cr2, %%rax \n\t"
1994 "mov %%rax, %c[cr2](%3) \n\t"
1995 "mov (%%rsp), %3 \n\t"
1996
1997 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1998 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1999 "pop %%rbp; pop %%rdi; pop %%rsi;"
2000 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
2001 #else
2002 "xchg %3, (%%esp) \n\t"
2003 "mov %%eax, %c[rax](%3) \n\t"
2004 "mov %%ebx, %c[rbx](%3) \n\t"
2005 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2006 "mov %%edx, %c[rdx](%3) \n\t"
2007 "mov %%esi, %c[rsi](%3) \n\t"
2008 "mov %%edi, %c[rdi](%3) \n\t"
2009 "mov %%ebp, %c[rbp](%3) \n\t"
2010 "mov %%cr2, %%eax \n\t"
2011 "mov %%eax, %c[cr2](%3) \n\t"
2012 "mov (%%esp), %3 \n\t"
2013
2014 "pop %%ecx; popa \n\t"
2015 #endif
2016 "setbe %0 \n\t"
2017 "popf \n\t"
2018 : "=q" (fail)
2019 : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
2020 "c"(vcpu),
2021 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2022 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2023 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2024 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2025 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2026 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2027 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2028 #ifdef CONFIG_X86_64
2029 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2030 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2031 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2032 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2033 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2034 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2035 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2036 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2037 #endif
2038 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2039 : "cc", "memory" );
2040
2041 ++vcpu->stat.exits;
2042
2043 vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2044
2045 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2046
2047 if (unlikely(fail)) {
2048 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2049 kvm_run->fail_entry.hardware_entry_failure_reason
2050 = vmcs_read32(VM_INSTRUCTION_ERROR);
2051 r = 0;
2052 goto out;
2053 }
2054 /*
2055 * Profile KVM exit RIPs:
2056 */
2057 if (unlikely(prof_on == KVM_PROFILING))
2058 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2059
2060 vcpu->launched = 1;
2061 r = kvm_handle_exit(kvm_run, vcpu);
2062 if (r > 0) {
2063 /* Give scheduler a change to reschedule. */
2064 if (signal_pending(current)) {
2065 r = -EINTR;
2066 kvm_run->exit_reason = KVM_EXIT_INTR;
2067 ++vcpu->stat.signal_exits;
2068 goto out;
2069 }
2070
2071 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2072 r = -EINTR;
2073 kvm_run->exit_reason = KVM_EXIT_INTR;
2074 ++vcpu->stat.request_irq_exits;
2075 goto out;
2076 }
2077 if (!need_resched()) {
2078 ++vcpu->stat.light_exits;
2079 goto again;
2080 }
2081 }
2082
2083 out:
2084 if (r > 0) {
2085 kvm_resched(vcpu);
2086 goto preempted;
2087 }
2088
2089 post_kvm_run_save(vcpu, kvm_run);
2090 return r;
2091 }
2092
2093 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2094 {
2095 vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
2096 }
2097
2098 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2099 unsigned long addr,
2100 u32 err_code)
2101 {
2102 u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2103
2104 ++vcpu->stat.pf_guest;
2105
2106 if (is_page_fault(vect_info)) {
2107 printk(KERN_DEBUG "inject_page_fault: "
2108 "double fault 0x%lx @ 0x%lx\n",
2109 addr, vmcs_readl(GUEST_RIP));
2110 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2111 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2112 DF_VECTOR |
2113 INTR_TYPE_EXCEPTION |
2114 INTR_INFO_DELIEVER_CODE_MASK |
2115 INTR_INFO_VALID_MASK);
2116 return;
2117 }
2118 vcpu->cr2 = addr;
2119 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2120 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2121 PF_VECTOR |
2122 INTR_TYPE_EXCEPTION |
2123 INTR_INFO_DELIEVER_CODE_MASK |
2124 INTR_INFO_VALID_MASK);
2125
2126 }
2127
2128 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2129 {
2130 if (vcpu->vmcs) {
2131 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2132 free_vmcs(vcpu->vmcs);
2133 vcpu->vmcs = NULL;
2134 }
2135 }
2136
2137 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2138 {
2139 vmx_free_vmcs(vcpu);
2140 }
2141
2142 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2143 {
2144 struct vmcs *vmcs;
2145
2146 vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2147 if (!vcpu->guest_msrs)
2148 return -ENOMEM;
2149
2150 vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2151 if (!vcpu->host_msrs)
2152 goto out_free_guest_msrs;
2153
2154 vmcs = alloc_vmcs();
2155 if (!vmcs)
2156 goto out_free_msrs;
2157
2158 vmcs_clear(vmcs);
2159 vcpu->vmcs = vmcs;
2160 vcpu->launched = 0;
2161 vcpu->fpu_active = 1;
2162
2163 return 0;
2164
2165 out_free_msrs:
2166 kfree(vcpu->host_msrs);
2167 vcpu->host_msrs = NULL;
2168
2169 out_free_guest_msrs:
2170 kfree(vcpu->guest_msrs);
2171 vcpu->guest_msrs = NULL;
2172
2173 return -ENOMEM;
2174 }
2175
2176 static struct kvm_arch_ops vmx_arch_ops = {
2177 .cpu_has_kvm_support = cpu_has_kvm_support,
2178 .disabled_by_bios = vmx_disabled_by_bios,
2179 .hardware_setup = hardware_setup,
2180 .hardware_unsetup = hardware_unsetup,
2181 .hardware_enable = hardware_enable,
2182 .hardware_disable = hardware_disable,
2183
2184 .vcpu_create = vmx_create_vcpu,
2185 .vcpu_free = vmx_free_vcpu,
2186
2187 .vcpu_load = vmx_vcpu_load,
2188 .vcpu_put = vmx_vcpu_put,
2189 .vcpu_decache = vmx_vcpu_decache,
2190
2191 .set_guest_debug = set_guest_debug,
2192 .get_msr = vmx_get_msr,
2193 .set_msr = vmx_set_msr,
2194 .get_segment_base = vmx_get_segment_base,
2195 .get_segment = vmx_get_segment,
2196 .set_segment = vmx_set_segment,
2197 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2198 .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2199 .set_cr0 = vmx_set_cr0,
2200 .set_cr3 = vmx_set_cr3,
2201 .set_cr4 = vmx_set_cr4,
2202 #ifdef CONFIG_X86_64
2203 .set_efer = vmx_set_efer,
2204 #endif
2205 .get_idt = vmx_get_idt,
2206 .set_idt = vmx_set_idt,
2207 .get_gdt = vmx_get_gdt,
2208 .set_gdt = vmx_set_gdt,
2209 .cache_regs = vcpu_load_rsp_rip,
2210 .decache_regs = vcpu_put_rsp_rip,
2211 .get_rflags = vmx_get_rflags,
2212 .set_rflags = vmx_set_rflags,
2213
2214 .tlb_flush = vmx_flush_tlb,
2215 .inject_page_fault = vmx_inject_page_fault,
2216
2217 .inject_gp = vmx_inject_gp,
2218
2219 .run = vmx_vcpu_run,
2220 .skip_emulated_instruction = skip_emulated_instruction,
2221 .vcpu_setup = vmx_vcpu_setup,
2222 .patch_hypercall = vmx_patch_hypercall,
2223 };
2224
2225 static int __init vmx_init(void)
2226 {
2227 void *iova;
2228 int r;
2229
2230 vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2231 if (!vmx_io_bitmap_a)
2232 return -ENOMEM;
2233
2234 vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2235 if (!vmx_io_bitmap_b) {
2236 r = -ENOMEM;
2237 goto out;
2238 }
2239
2240 /*
2241 * Allow direct access to the PC debug port (it is often used for I/O
2242 * delays, but the vmexits simply slow things down).
2243 */
2244 iova = kmap(vmx_io_bitmap_a);
2245 memset(iova, 0xff, PAGE_SIZE);
2246 clear_bit(0x80, iova);
2247 kunmap(iova);
2248
2249 iova = kmap(vmx_io_bitmap_b);
2250 memset(iova, 0xff, PAGE_SIZE);
2251 kunmap(iova);
2252
2253 r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2254 if (r)
2255 goto out1;
2256
2257 return 0;
2258
2259 out1:
2260 __free_page(vmx_io_bitmap_b);
2261 out:
2262 __free_page(vmx_io_bitmap_a);
2263 return r;
2264 }
2265
2266 static void __exit vmx_exit(void)
2267 {
2268 __free_page(vmx_io_bitmap_b);
2269 __free_page(vmx_io_bitmap_a);
2270
2271 kvm_exit_arch();
2272 }
2273
2274 module_init(vmx_init)
2275 module_exit(vmx_exit)
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