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[mirror_ubuntu-jammy-kernel.git] / drivers / media / i2c / hm11b1.c
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2020-2021 Intel Corporation.
3
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/i2c.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-fwnode.h>
13 #include "power_ctrl_logic.h"
14
15 #define HM11B1_LINK_FREQ_384MHZ 384000000ULL
16 #define HM11B1_SCLK 72000000LL
17 #define HM11B1_MCLK 19200000
18 #define HM11B1_DATA_LANES 1
19 #define HM11B1_RGB_DEPTH 10
20
21 #define HM11B1_REG_CHIP_ID 0x0000
22 #define HM11B1_CHIP_ID 0x11B1
23
24 #define HM11B1_REG_MODE_SELECT 0x0100
25 #define HM11B1_MODE_STANDBY 0x00
26 #define HM11B1_MODE_STREAMING 0x01
27
28 /* vertical-timings from sensor */
29 #define HM11B1_REG_VTS 0x3402
30 #define HM11B1_VTS_DEF 0x037d
31 #define HM11B1_VTS_MIN 0x0346
32 #define HM11B1_VTS_MAX 0xffff
33
34 /* horizontal-timings from sensor */
35 #define HM11B1_REG_HTS 0x3404
36
37 /* Exposure controls from sensor */
38 #define HM11B1_REG_EXPOSURE 0x0202
39 #define HM11B1_EXPOSURE_MIN 2
40 #define HM11B1_EXPOSURE_MAX_MARGIN 2
41 #define HM11B1_EXPOSURE_STEP 1
42
43 /* Analog gain controls from sensor */
44 #define HM11B1_REG_ANALOG_GAIN 0x0205
45 #define HM11B1_ANAL_GAIN_MIN 0
46 #define HM11B1_ANAL_GAIN_MAX 0x50
47 #define HM11B1_ANAL_GAIN_STEP 1
48
49 /* Digital gain controls from sensor */
50 #define HM11B1_REG_DGTL_GAIN 0x0207
51 #define HM11B1_DGTL_GAIN_MIN 0x0
52 #define HM11B1_DGTL_GAIN_MAX 0x0200
53 #define HM11B1_DGTL_GAIN_STEP 1
54 #define HM11B1_DGTL_GAIN_DEFAULT 0x0100
55
56 /* Test Pattern Control */
57 #define HM11B1_REG_TEST_PATTERN 0x0601
58 #define HM11B1_TEST_PATTERN_ENABLE 1
59 #define HM11B1_TEST_PATTERN_BAR_SHIFT 1
60
61 enum {
62 HM11B1_LINK_FREQ_384MHZ_INDEX,
63 };
64
65 struct hm11b1_reg {
66 u16 address;
67 u8 val;
68 };
69
70 struct hm11b1_reg_list {
71 u32 num_of_regs;
72 const struct hm11b1_reg *regs;
73 };
74
75 struct hm11b1_link_freq_config {
76 const struct hm11b1_reg_list reg_list;
77 };
78
79 struct hm11b1_mode {
80 /* Frame width in pixels */
81 u32 width;
82
83 /* Frame height in pixels */
84 u32 height;
85
86 /* Horizontal timining size */
87 u32 hts;
88
89 /* Default vertical timining size */
90 u32 vts_def;
91
92 /* Min vertical timining size */
93 u32 vts_min;
94
95 /* Link frequency needed for this resolution */
96 u32 link_freq_index;
97
98 /* Sensor register settings for this resolution */
99 const struct hm11b1_reg_list reg_list;
100 };
101
102 static const struct hm11b1_reg mipi_data_rate_384mbps[] = {
103 };
104
105 //RAW 10bit 1292x800_30fps_MIPI 384Mbps/lane
106 static const struct hm11b1_reg sensor_1292x800_30fps_setting[] = {
107 {0x0103, 0x00},
108 {0x0102, 0x01},
109 {0x0202, 0x03},
110 {0x0203, 0x7C},
111 {0x0205, 0x20},
112 {0x0207, 0x01},
113 {0x0208, 0x00},
114 {0x0209, 0x01},
115 {0x020A, 0x00},
116 {0x0300, 0x91},
117 {0x0301, 0x0A},
118 {0x0302, 0x02},
119 {0x0303, 0x2E},
120 {0x0304, 0x43},
121 {0x0306, 0x00},
122 {0x0307, 0x00},
123 {0x0340, 0x03},
124 {0x0341, 0x60},
125 {0x0342, 0x05},
126 {0x0343, 0xA0},
127 {0x0344, 0x00},
128 {0x0345, 0x00},
129 {0x0346, 0x03},
130 {0x0347, 0x2F},
131 {0x0350, 0xFF},
132 {0x0351, 0x00},
133 {0x0352, 0x00},
134 {0x0370, 0x00},
135 {0x0371, 0x00},
136 {0x0380, 0x00},
137 {0x0381, 0x00},
138 {0x0382, 0x00},
139 {0x1000, 0xC3},
140 {0x1001, 0xD0},
141 {0x100A, 0x13},
142 {0x2000, 0x00},
143 {0x2061, 0x01},
144 {0x2062, 0x00},
145 {0x2063, 0xC8},
146 {0x2100, 0x03},
147 {0x2101, 0xF0},
148 {0x2102, 0xF0},
149 {0x2103, 0x01},
150 {0x2104, 0x10},
151 {0x2105, 0x10},
152 {0x2106, 0x02},
153 {0x2107, 0x0A},
154 {0x2108, 0x10},
155 {0x2109, 0x15},
156 {0x210A, 0x1A},
157 {0x210B, 0x20},
158 {0x210C, 0x08},
159 {0x210D, 0x0A},
160 {0x210E, 0x0F},
161 {0x210F, 0x12},
162 {0x2110, 0x1C},
163 {0x2111, 0x20},
164 {0x2112, 0x23},
165 {0x2113, 0x2A},
166 {0x2114, 0x30},
167 {0x2115, 0x10},
168 {0x2116, 0x00},
169 {0x2117, 0x01},
170 {0x2118, 0x00},
171 {0x2119, 0x06},
172 {0x211A, 0x00},
173 {0x211B, 0x00},
174 {0x2615, 0x08},
175 {0x2616, 0x00},
176 {0x2700, 0x01},
177 {0x2711, 0x01},
178 {0x272F, 0x01},
179 {0x2800, 0x29},
180 {0x2821, 0xCE},
181 {0x2839, 0x27},
182 {0x283A, 0x01},
183 {0x2842, 0x01},
184 {0x2843, 0x00},
185 {0x3022, 0x11},
186 {0x3024, 0x30},
187 {0x3025, 0x12},
188 {0x3026, 0x00},
189 {0x3027, 0x81},
190 {0x3028, 0x01},
191 {0x3029, 0x00},
192 {0x302A, 0x30},
193 {0x3030, 0x00},
194 {0x3032, 0x00},
195 {0x3035, 0x01},
196 {0x303E, 0x00},
197 {0x3051, 0x00},
198 {0x3082, 0x0E},
199 {0x3084, 0x0D},
200 {0x30A8, 0x03},
201 {0x30C4, 0xA0},
202 {0x30D5, 0xC1},
203 {0x30D8, 0x00},
204 {0x30D9, 0x0D},
205 {0x30DB, 0xC2},
206 {0x30DE, 0x25},
207 {0x30E1, 0xC3},
208 {0x30E4, 0x25},
209 {0x30E7, 0xC4},
210 {0x30EA, 0x25},
211 {0x30ED, 0xC5},
212 {0x30F0, 0x25},
213 {0x30F2, 0x0C},
214 {0x30F3, 0x85},
215 {0x30F6, 0x25},
216 {0x30F8, 0x0C},
217 {0x30F9, 0x05},
218 {0x30FB, 0x40},
219 {0x30FC, 0x25},
220 {0x30FD, 0x54},
221 {0x30FE, 0x0C},
222 {0x3100, 0xC2},
223 {0x3103, 0x00},
224 {0x3104, 0x2B},
225 {0x3106, 0xC3},
226 {0x3109, 0x25},
227 {0x310C, 0xC4},
228 {0x310F, 0x25},
229 {0x3112, 0xC5},
230 {0x3115, 0x25},
231 {0x3117, 0x0C},
232 {0x3118, 0x85},
233 {0x311B, 0x25},
234 {0x311D, 0x0C},
235 {0x311E, 0x05},
236 {0x3121, 0x25},
237 {0x3123, 0x0C},
238 {0x3124, 0x0D},
239 {0x3126, 0x40},
240 {0x3127, 0x25},
241 {0x3128, 0x54},
242 {0x3129, 0x0C},
243 {0x3130, 0x20},
244 {0x3134, 0x60},
245 {0x3135, 0xC2},
246 {0x3139, 0x12},
247 {0x313A, 0x07},
248 {0x313F, 0x52},
249 {0x3140, 0x34},
250 {0x3141, 0x2E},
251 {0x314F, 0x07},
252 {0x3151, 0x47},
253 {0x3153, 0xB0},
254 {0x3154, 0x4A},
255 {0x3155, 0xC0},
256 {0x3157, 0x55},
257 {0x3158, 0x01},
258 {0x3165, 0xFF},
259 {0x316B, 0x12},
260 {0x316E, 0x12},
261 {0x3176, 0x12},
262 {0x3178, 0x01},
263 {0x317C, 0x10},
264 {0x317D, 0x05},
265 {0x317F, 0x07},
266 {0x3182, 0x07},
267 {0x3183, 0x11},
268 {0x3184, 0x88},
269 {0x3186, 0x28},
270 {0x3191, 0x00},
271 {0x3192, 0x20},
272 {0x3400, 0x48},
273 {0x3401, 0x00},
274 {0x3402, 0x06},
275 {0x3403, 0xFA},
276 {0x3404, 0x05},
277 {0x3405, 0x40},
278 {0x3406, 0x00},
279 {0x3407, 0x00},
280 {0x3408, 0x03},
281 {0x3409, 0x2F},
282 {0x340A, 0x00},
283 {0x340B, 0x00},
284 {0x340C, 0x00},
285 {0x340D, 0x00},
286 {0x340E, 0x00},
287 {0x340F, 0x00},
288 {0x3410, 0x00},
289 {0x3411, 0x01},
290 {0x3412, 0x00},
291 {0x3413, 0x03},
292 {0x3414, 0xB0},
293 {0x3415, 0x4A},
294 {0x3416, 0xC0},
295 {0x3418, 0x55},
296 {0x3419, 0x03},
297 {0x341B, 0x7D},
298 {0x341C, 0x00},
299 {0x341F, 0x03},
300 {0x3420, 0x00},
301 {0x3421, 0x02},
302 {0x3422, 0x00},
303 {0x3423, 0x02},
304 {0x3424, 0x01},
305 {0x3425, 0x02},
306 {0x3426, 0x00},
307 {0x3427, 0xA2},
308 {0x3428, 0x01},
309 {0x3429, 0x06},
310 {0x342A, 0xF8},
311 {0x3440, 0x01},
312 {0x3441, 0xBE},
313 {0x3442, 0x02},
314 {0x3443, 0x18},
315 {0x3444, 0x03},
316 {0x3445, 0x0C},
317 {0x3446, 0x06},
318 {0x3447, 0x18},
319 {0x3448, 0x09},
320 {0x3449, 0x24},
321 {0x344A, 0x08},
322 {0x344B, 0x08},
323 {0x345C, 0x00},
324 {0x345D, 0x44},
325 {0x345E, 0x02},
326 {0x345F, 0x43},
327 {0x3460, 0x04},
328 {0x3461, 0x3B},
329 {0x3466, 0xF8},
330 {0x3467, 0x43},
331 {0x347D, 0x02},
332 {0x3483, 0x05},
333 {0x3484, 0x0C},
334 {0x3485, 0x03},
335 {0x3486, 0x20},
336 {0x3487, 0x00},
337 {0x3488, 0x00},
338 {0x3489, 0x00},
339 {0x348A, 0x09},
340 {0x348B, 0x00},
341 {0x348C, 0x00},
342 {0x348D, 0x02},
343 {0x348E, 0x01},
344 {0x348F, 0x40},
345 {0x3490, 0x00},
346 {0x3491, 0xC8},
347 {0x3492, 0x00},
348 {0x3493, 0x02},
349 {0x3494, 0x00},
350 {0x3495, 0x02},
351 {0x3496, 0x02},
352 {0x3497, 0x06},
353 {0x3498, 0x05},
354 {0x3499, 0x04},
355 {0x349A, 0x09},
356 {0x349B, 0x05},
357 {0x349C, 0x17},
358 {0x349D, 0x05},
359 {0x349E, 0x00},
360 {0x349F, 0x00},
361 {0x34A0, 0x00},
362 {0x34A1, 0x00},
363 {0x34A2, 0x08},
364 {0x34A3, 0x08},
365 {0x34A4, 0x00},
366 {0x34A5, 0x0B},
367 {0x34A6, 0x0C},
368 {0x34A7, 0x32},
369 {0x34A8, 0x10},
370 {0x34A9, 0xE0},
371 {0x34AA, 0x52},
372 {0x34AB, 0x00},
373 {0x34AC, 0x60},
374 {0x34AD, 0x2B},
375 {0x34AE, 0x25},
376 {0x34AF, 0x48},
377 {0x34B1, 0x06},
378 {0x34B2, 0xF8},
379 {0x34C3, 0xB0},
380 {0x34C4, 0x4A},
381 {0x34C5, 0xC0},
382 {0x34C7, 0x55},
383 {0x34C8, 0x03},
384 {0x34CB, 0x00},
385 {0x353A, 0x00},
386 {0x355E, 0x48},
387 {0x3572, 0xB0},
388 {0x3573, 0x4A},
389 {0x3574, 0xC0},
390 {0x3576, 0x55},
391 {0x3577, 0x03},
392 {0x357A, 0x00},
393 {0x35DA, 0x00},
394 {0x4003, 0x02},
395 {0x4004, 0x02},
396 };
397
398 //RAW 10bit 1292x800_60fps_MIPI 384Mbps/lane
399 static const struct hm11b1_reg sensor_1292x800_60fps_setting[] = {
400 {0x0103, 0x00},
401 {0x0102, 0x01},
402 {0x0202, 0x03},
403 {0x0203, 0x7C},
404 {0x0205, 0x20},
405 {0x0207, 0x01},
406 {0x0208, 0x00},
407 {0x0209, 0x01},
408 {0x020A, 0x00},
409 {0x0300, 0x91},
410 {0x0301, 0x0A},
411 {0x0302, 0x02},
412 {0x0303, 0x2E},
413 {0x0304, 0x43},
414 {0x0306, 0x00},
415 {0x0307, 0x00},
416 {0x0340, 0x03},
417 {0x0341, 0x60},
418 {0x0342, 0x05},
419 {0x0343, 0xA0},
420 {0x0344, 0x00},
421 {0x0345, 0x00},
422 {0x0346, 0x03},
423 {0x0347, 0x2F},
424 {0x0350, 0xFF},
425 {0x0351, 0x00},
426 {0x0352, 0x00},
427 {0x0370, 0x00},
428 {0x0371, 0x00},
429 {0x0380, 0x00},
430 {0x0381, 0x00},
431 {0x0382, 0x00},
432 {0x1000, 0xC3},
433 {0x1001, 0xD0},
434 {0x100A, 0x13},
435 {0x2000, 0x00},
436 {0x2061, 0x01},
437 {0x2062, 0x00},
438 {0x2063, 0xC8},
439 {0x2100, 0x03},
440 {0x2101, 0xF0},
441 {0x2102, 0xF0},
442 {0x2103, 0x01},
443 {0x2104, 0x10},
444 {0x2105, 0x10},
445 {0x2106, 0x02},
446 {0x2107, 0x0A},
447 {0x2108, 0x10},
448 {0x2109, 0x15},
449 {0x210A, 0x1A},
450 {0x210B, 0x20},
451 {0x210C, 0x08},
452 {0x210D, 0x0A},
453 {0x210E, 0x0F},
454 {0x210F, 0x12},
455 {0x2110, 0x1C},
456 {0x2111, 0x20},
457 {0x2112, 0x23},
458 {0x2113, 0x2A},
459 {0x2114, 0x30},
460 {0x2115, 0x10},
461 {0x2116, 0x00},
462 {0x2117, 0x01},
463 {0x2118, 0x00},
464 {0x2119, 0x06},
465 {0x211A, 0x00},
466 {0x211B, 0x00},
467 {0x2615, 0x08},
468 {0x2616, 0x00},
469 {0x2700, 0x01},
470 {0x2711, 0x01},
471 {0x272F, 0x01},
472 {0x2800, 0x29},
473 {0x2821, 0xCE},
474 {0x2839, 0x27},
475 {0x283A, 0x01},
476 {0x2842, 0x01},
477 {0x2843, 0x00},
478 {0x3022, 0x11},
479 {0x3024, 0x30},
480 {0x3025, 0x12},
481 {0x3026, 0x00},
482 {0x3027, 0x81},
483 {0x3028, 0x01},
484 {0x3029, 0x00},
485 {0x302A, 0x30},
486 {0x3030, 0x00},
487 {0x3032, 0x00},
488 {0x3035, 0x01},
489 {0x303E, 0x00},
490 {0x3051, 0x00},
491 {0x3082, 0x0E},
492 {0x3084, 0x0D},
493 {0x30A8, 0x03},
494 {0x30C4, 0xA0},
495 {0x30D5, 0xC1},
496 {0x30D8, 0x00},
497 {0x30D9, 0x0D},
498 {0x30DB, 0xC2},
499 {0x30DE, 0x25},
500 {0x30E1, 0xC3},
501 {0x30E4, 0x25},
502 {0x30E7, 0xC4},
503 {0x30EA, 0x25},
504 {0x30ED, 0xC5},
505 {0x30F0, 0x25},
506 {0x30F2, 0x0C},
507 {0x30F3, 0x85},
508 {0x30F6, 0x25},
509 {0x30F8, 0x0C},
510 {0x30F9, 0x05},
511 {0x30FB, 0x40},
512 {0x30FC, 0x25},
513 {0x30FD, 0x54},
514 {0x30FE, 0x0C},
515 {0x3100, 0xC2},
516 {0x3103, 0x00},
517 {0x3104, 0x2B},
518 {0x3106, 0xC3},
519 {0x3109, 0x25},
520 {0x310C, 0xC4},
521 {0x310F, 0x25},
522 {0x3112, 0xC5},
523 {0x3115, 0x25},
524 {0x3117, 0x0C},
525 {0x3118, 0x85},
526 {0x311B, 0x25},
527 {0x311D, 0x0C},
528 {0x311E, 0x05},
529 {0x3121, 0x25},
530 {0x3123, 0x0C},
531 {0x3124, 0x0D},
532 {0x3126, 0x40},
533 {0x3127, 0x25},
534 {0x3128, 0x54},
535 {0x3129, 0x0C},
536 {0x3130, 0x20},
537 {0x3134, 0x60},
538 {0x3135, 0xC2},
539 {0x3139, 0x12},
540 {0x313A, 0x07},
541 {0x313F, 0x52},
542 {0x3140, 0x34},
543 {0x3141, 0x2E},
544 {0x314F, 0x07},
545 {0x3151, 0x47},
546 {0x3153, 0xB0},
547 {0x3154, 0x4A},
548 {0x3155, 0xC0},
549 {0x3157, 0x55},
550 {0x3158, 0x01},
551 {0x3165, 0xFF},
552 {0x316B, 0x12},
553 {0x316E, 0x12},
554 {0x3176, 0x12},
555 {0x3178, 0x01},
556 {0x317C, 0x10},
557 {0x317D, 0x05},
558 {0x317F, 0x07},
559 {0x3182, 0x07},
560 {0x3183, 0x11},
561 {0x3184, 0x88},
562 {0x3186, 0x28},
563 {0x3191, 0x00},
564 {0x3192, 0x20},
565 {0x3400, 0x48},
566 {0x3401, 0x00},
567 {0x3402, 0x03},
568 {0x3403, 0x7D},
569 {0x3404, 0x05},
570 {0x3405, 0x40},
571 {0x3406, 0x00},
572 {0x3407, 0x00},
573 {0x3408, 0x03},
574 {0x3409, 0x2F},
575 {0x340A, 0x00},
576 {0x340B, 0x00},
577 {0x340C, 0x00},
578 {0x340D, 0x00},
579 {0x340E, 0x00},
580 {0x340F, 0x00},
581 {0x3410, 0x00},
582 {0x3411, 0x01},
583 {0x3412, 0x00},
584 {0x3413, 0x03},
585 {0x3414, 0xB0},
586 {0x3415, 0x4A},
587 {0x3416, 0xC0},
588 {0x3418, 0x55},
589 {0x3419, 0x03},
590 {0x341B, 0x7D},
591 {0x341C, 0x00},
592 {0x341F, 0x03},
593 {0x3420, 0x00},
594 {0x3421, 0x02},
595 {0x3422, 0x00},
596 {0x3423, 0x02},
597 {0x3424, 0x01},
598 {0x3425, 0x02},
599 {0x3426, 0x00},
600 {0x3427, 0xA2},
601 {0x3428, 0x01},
602 {0x3429, 0x06},
603 {0x342A, 0xF8},
604 {0x3440, 0x01},
605 {0x3441, 0xBE},
606 {0x3442, 0x02},
607 {0x3443, 0x18},
608 {0x3444, 0x03},
609 {0x3445, 0x0C},
610 {0x3446, 0x06},
611 {0x3447, 0x18},
612 {0x3448, 0x09},
613 {0x3449, 0x24},
614 {0x344A, 0x08},
615 {0x344B, 0x08},
616 {0x345C, 0x00},
617 {0x345D, 0x44},
618 {0x345E, 0x02},
619 {0x345F, 0x43},
620 {0x3460, 0x04},
621 {0x3461, 0x3B},
622 {0x3466, 0xF8},
623 {0x3467, 0x43},
624 {0x347D, 0x02},
625 {0x3483, 0x05},
626 {0x3484, 0x0C},
627 {0x3485, 0x03},
628 {0x3486, 0x20},
629 {0x3487, 0x00},
630 {0x3488, 0x00},
631 {0x3489, 0x00},
632 {0x348A, 0x09},
633 {0x348B, 0x00},
634 {0x348C, 0x00},
635 {0x348D, 0x02},
636 {0x348E, 0x01},
637 {0x348F, 0x40},
638 {0x3490, 0x00},
639 {0x3491, 0xC8},
640 {0x3492, 0x00},
641 {0x3493, 0x02},
642 {0x3494, 0x00},
643 {0x3495, 0x02},
644 {0x3496, 0x02},
645 {0x3497, 0x06},
646 {0x3498, 0x05},
647 {0x3499, 0x04},
648 {0x349A, 0x09},
649 {0x349B, 0x05},
650 {0x349C, 0x17},
651 {0x349D, 0x05},
652 {0x349E, 0x00},
653 {0x349F, 0x00},
654 {0x34A0, 0x00},
655 {0x34A1, 0x00},
656 {0x34A2, 0x08},
657 {0x34A3, 0x08},
658 {0x34A4, 0x00},
659 {0x34A5, 0x0B},
660 {0x34A6, 0x0C},
661 {0x34A7, 0x32},
662 {0x34A8, 0x10},
663 {0x34A9, 0xE0},
664 {0x34AA, 0x52},
665 {0x34AB, 0x00},
666 {0x34AC, 0x60},
667 {0x34AD, 0x2B},
668 {0x34AE, 0x25},
669 {0x34AF, 0x48},
670 {0x34B1, 0x06},
671 {0x34B2, 0xF8},
672 {0x34C3, 0xB0},
673 {0x34C4, 0x4A},
674 {0x34C5, 0xC0},
675 {0x34C7, 0x55},
676 {0x34C8, 0x03},
677 {0x34CB, 0x00},
678 {0x353A, 0x00},
679 {0x355E, 0x48},
680 {0x3572, 0xB0},
681 {0x3573, 0x4A},
682 {0x3574, 0xC0},
683 {0x3576, 0x55},
684 {0x3577, 0x03},
685 {0x357A, 0x00},
686 {0x35DA, 0x00},
687 {0x4003, 0x02},
688 {0x4004, 0x02},
689 };
690
691 static const char * const hm11b1_test_pattern_menu[] = {
692 "Disabled",
693 "Solid Color",
694 "Color Bar",
695 "Color Bar Blending",
696 "PN11",
697 };
698
699 static const s64 link_freq_menu_items[] = {
700 HM11B1_LINK_FREQ_384MHZ,
701 };
702
703 static const struct hm11b1_link_freq_config link_freq_configs[] = {
704 [HM11B1_LINK_FREQ_384MHZ_INDEX] = {
705 .reg_list = {
706 .num_of_regs = ARRAY_SIZE(mipi_data_rate_384mbps),
707 .regs = mipi_data_rate_384mbps,
708 }
709 },
710 };
711
712 static const struct hm11b1_mode supported_modes[] = {
713 {
714 .width = 1292,
715 .height = 800,
716 .hts = 1344,
717 .vts_def = HM11B1_VTS_DEF,
718 .vts_min = HM11B1_VTS_MIN,
719 .reg_list = {
720 .num_of_regs =
721 ARRAY_SIZE(sensor_1292x800_30fps_setting),
722 .regs = sensor_1292x800_30fps_setting,
723 },
724 .link_freq_index = HM11B1_LINK_FREQ_384MHZ_INDEX,
725 },
726 };
727
728 struct hm11b1 {
729 struct v4l2_subdev sd;
730 struct media_pad pad;
731 struct v4l2_ctrl_handler ctrl_handler;
732
733 /* V4L2 Controls */
734 struct v4l2_ctrl *link_freq;
735 struct v4l2_ctrl *pixel_rate;
736 struct v4l2_ctrl *vblank;
737 struct v4l2_ctrl *hblank;
738 struct v4l2_ctrl *exposure;
739
740 /* Current mode */
741 const struct hm11b1_mode *cur_mode;
742
743 /* To serialize asynchronus callbacks */
744 struct mutex mutex;
745
746 /* Streaming on/off */
747 bool streaming;
748 };
749
750 static inline struct hm11b1 *to_hm11b1(struct v4l2_subdev *subdev)
751 {
752 return container_of(subdev, struct hm11b1, sd);
753 }
754
755 static u64 to_pixel_rate(u32 f_index)
756 {
757 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HM11B1_DATA_LANES;
758
759 do_div(pixel_rate, HM11B1_RGB_DEPTH);
760
761 return pixel_rate;
762 }
763
764 static u64 to_pixels_per_line(u32 hts, u32 f_index)
765 {
766 u64 ppl = hts * to_pixel_rate(f_index);
767
768 do_div(ppl, HM11B1_SCLK);
769
770 return ppl;
771 }
772
773 static int hm11b1_read_reg(struct hm11b1 *hm11b1, u16 reg, u16 len, u32 *val)
774 {
775 struct i2c_client *client = v4l2_get_subdevdata(&hm11b1->sd);
776 struct i2c_msg msgs[2];
777 u8 addr_buf[2];
778 u8 data_buf[4] = {0};
779 int ret = 0;
780
781 if (len > sizeof(data_buf))
782 return -EINVAL;
783
784 put_unaligned_be16(reg, addr_buf);
785 msgs[0].addr = client->addr;
786 msgs[0].flags = 0;
787 msgs[0].len = sizeof(addr_buf);
788 msgs[0].buf = addr_buf;
789 msgs[1].addr = client->addr;
790 msgs[1].flags = I2C_M_RD;
791 msgs[1].len = len;
792 msgs[1].buf = &data_buf[sizeof(data_buf) - len];
793
794 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
795 if (ret != ARRAY_SIZE(msgs))
796 return ret < 0 ? ret : -EIO;
797
798 *val = get_unaligned_be32(data_buf);
799
800 return 0;
801 }
802
803 static int hm11b1_write_reg(struct hm11b1 *hm11b1, u16 reg, u16 len, u32 val)
804 {
805 struct i2c_client *client = v4l2_get_subdevdata(&hm11b1->sd);
806 u8 buf[6];
807 int ret = 0;
808
809 if (len > 4)
810 return -EINVAL;
811
812 put_unaligned_be16(reg, buf);
813 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
814
815 ret = i2c_master_send(client, buf, len + 2);
816 if (ret != len + 2)
817 return ret < 0 ? ret : -EIO;
818
819 return 0;
820 }
821
822 static int hm11b1_write_reg_list(struct hm11b1 *hm11b1,
823 const struct hm11b1_reg_list *r_list)
824 {
825 struct i2c_client *client = v4l2_get_subdevdata(&hm11b1->sd);
826 unsigned int i;
827 int ret = 0;
828
829 for (i = 0; i < r_list->num_of_regs; i++) {
830 ret = hm11b1_write_reg(hm11b1, r_list->regs[i].address, 1,
831 r_list->regs[i].val);
832 if (ret) {
833 dev_err_ratelimited(&client->dev,
834 "write reg 0x%4.4x return err = %d",
835 r_list->regs[i].address, ret);
836 return ret;
837 }
838 }
839
840 return 0;
841 }
842
843 static int hm11b1_update_digital_gain(struct hm11b1 *hm11b1, u32 d_gain)
844 {
845 return hm11b1_write_reg(hm11b1, HM11B1_REG_DGTL_GAIN, 2, d_gain);
846 }
847
848 static int hm11b1_test_pattern(struct hm11b1 *hm11b1, u32 pattern)
849 {
850 if (pattern)
851 pattern = pattern << HM11B1_TEST_PATTERN_BAR_SHIFT |
852 HM11B1_TEST_PATTERN_ENABLE;
853
854 return hm11b1_write_reg(hm11b1, HM11B1_REG_TEST_PATTERN, 1, pattern);
855 }
856
857 static int hm11b1_set_ctrl(struct v4l2_ctrl *ctrl)
858 {
859 struct hm11b1 *hm11b1 = container_of(ctrl->handler,
860 struct hm11b1, ctrl_handler);
861 struct i2c_client *client = v4l2_get_subdevdata(&hm11b1->sd);
862 s64 exposure_max;
863 int ret = 0;
864
865 /* Propagate change of current control to all related controls */
866 if (ctrl->id == V4L2_CID_VBLANK) {
867 /* Update max exposure while meeting expected vblanking */
868 exposure_max = hm11b1->cur_mode->height + ctrl->val -
869 HM11B1_EXPOSURE_MAX_MARGIN;
870 __v4l2_ctrl_modify_range(hm11b1->exposure,
871 hm11b1->exposure->minimum,
872 exposure_max, hm11b1->exposure->step,
873 exposure_max);
874 }
875
876 /* V4L2 controls values will be applied only when power is already up */
877 if (!pm_runtime_get_if_in_use(&client->dev))
878 return 0;
879
880 switch (ctrl->id) {
881 case V4L2_CID_ANALOGUE_GAIN:
882 ret = hm11b1_write_reg(hm11b1, HM11B1_REG_ANALOG_GAIN, 1,
883 ctrl->val);
884 break;
885
886 case V4L2_CID_DIGITAL_GAIN:
887 ret = hm11b1_update_digital_gain(hm11b1, ctrl->val);
888 break;
889
890 case V4L2_CID_EXPOSURE:
891 /* 4 least significant bits of expsoure are fractional part */
892 ret = hm11b1_write_reg(hm11b1, HM11B1_REG_EXPOSURE, 2,
893 ctrl->val);
894 break;
895
896 case V4L2_CID_VBLANK:
897 ret = hm11b1_write_reg(hm11b1, HM11B1_REG_VTS, 2,
898 hm11b1->cur_mode->height + ctrl->val);
899 break;
900
901 case V4L2_CID_TEST_PATTERN:
902 ret = hm11b1_test_pattern(hm11b1, ctrl->val);
903 break;
904
905 default:
906 ret = -EINVAL;
907 break;
908 }
909
910 pm_runtime_put(&client->dev);
911
912 return ret;
913 }
914
915 static const struct v4l2_ctrl_ops hm11b1_ctrl_ops = {
916 .s_ctrl = hm11b1_set_ctrl,
917 };
918
919 static int hm11b1_init_controls(struct hm11b1 *hm11b1)
920 {
921 struct v4l2_ctrl_handler *ctrl_hdlr;
922 const struct hm11b1_mode *cur_mode;
923 s64 exposure_max, h_blank, pixel_rate;
924 u32 vblank_min, vblank_max, vblank_default;
925 int size;
926 int ret = 0;
927
928 ctrl_hdlr = &hm11b1->ctrl_handler;
929 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
930 if (ret)
931 return ret;
932
933 ctrl_hdlr->lock = &hm11b1->mutex;
934 cur_mode = hm11b1->cur_mode;
935 size = ARRAY_SIZE(link_freq_menu_items);
936
937 hm11b1->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &hm11b1_ctrl_ops,
938 V4L2_CID_LINK_FREQ,
939 size - 1, 0,
940 link_freq_menu_items);
941 if (hm11b1->link_freq)
942 hm11b1->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
943
944 pixel_rate = to_pixel_rate(HM11B1_LINK_FREQ_384MHZ_INDEX);
945 hm11b1->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &hm11b1_ctrl_ops,
946 V4L2_CID_PIXEL_RATE, 0,
947 pixel_rate, 1, pixel_rate);
948
949 vblank_min = cur_mode->vts_min - cur_mode->height;
950 vblank_max = HM11B1_VTS_MAX - cur_mode->height;
951 vblank_default = cur_mode->vts_def - cur_mode->height;
952 hm11b1->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &hm11b1_ctrl_ops,
953 V4L2_CID_VBLANK, vblank_min,
954 vblank_max, 1, vblank_default);
955
956 h_blank = to_pixels_per_line(cur_mode->hts, cur_mode->link_freq_index);
957 h_blank -= cur_mode->width;
958 hm11b1->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &hm11b1_ctrl_ops,
959 V4L2_CID_HBLANK, h_blank, h_blank, 1,
960 h_blank);
961 if (hm11b1->hblank)
962 hm11b1->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
963
964 v4l2_ctrl_new_std(ctrl_hdlr, &hm11b1_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
965 HM11B1_ANAL_GAIN_MIN, HM11B1_ANAL_GAIN_MAX,
966 HM11B1_ANAL_GAIN_STEP, HM11B1_ANAL_GAIN_MIN);
967 v4l2_ctrl_new_std(ctrl_hdlr, &hm11b1_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
968 HM11B1_DGTL_GAIN_MIN, HM11B1_DGTL_GAIN_MAX,
969 HM11B1_DGTL_GAIN_STEP, HM11B1_DGTL_GAIN_DEFAULT);
970 exposure_max = cur_mode->vts_def - HM11B1_EXPOSURE_MAX_MARGIN;
971 hm11b1->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &hm11b1_ctrl_ops,
972 V4L2_CID_EXPOSURE,
973 HM11B1_EXPOSURE_MIN, exposure_max,
974 HM11B1_EXPOSURE_STEP,
975 exposure_max);
976 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &hm11b1_ctrl_ops,
977 V4L2_CID_TEST_PATTERN,
978 ARRAY_SIZE(hm11b1_test_pattern_menu) - 1,
979 0, 0, hm11b1_test_pattern_menu);
980 if (ctrl_hdlr->error)
981 return ctrl_hdlr->error;
982
983 hm11b1->sd.ctrl_handler = ctrl_hdlr;
984
985 return 0;
986 }
987
988 static void hm11b1_update_pad_format(const struct hm11b1_mode *mode,
989 struct v4l2_mbus_framefmt *fmt)
990 {
991 fmt->width = mode->width;
992 fmt->height = mode->height;
993 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
994 fmt->field = V4L2_FIELD_NONE;
995 }
996
997 static int hm11b1_start_streaming(struct hm11b1 *hm11b1)
998 {
999 struct i2c_client *client = v4l2_get_subdevdata(&hm11b1->sd);
1000 const struct hm11b1_reg_list *reg_list;
1001 int link_freq_index;
1002 int ret = 0;
1003
1004 power_ctrl_logic_set_power(1);
1005 link_freq_index = hm11b1->cur_mode->link_freq_index;
1006 reg_list = &link_freq_configs[link_freq_index].reg_list;
1007 ret = hm11b1_write_reg_list(hm11b1, reg_list);
1008 if (ret) {
1009 dev_err(&client->dev, "failed to set plls");
1010 return ret;
1011 }
1012
1013 reg_list = &hm11b1->cur_mode->reg_list;
1014 ret = hm11b1_write_reg_list(hm11b1, reg_list);
1015 if (ret) {
1016 dev_err(&client->dev, "failed to set mode");
1017 return ret;
1018 }
1019
1020 ret = __v4l2_ctrl_handler_setup(hm11b1->sd.ctrl_handler);
1021 if (ret)
1022 return ret;
1023
1024 ret = hm11b1_write_reg(hm11b1, HM11B1_REG_MODE_SELECT, 1,
1025 HM11B1_MODE_STREAMING);
1026 if (ret)
1027 dev_err(&client->dev, "failed to start streaming");
1028
1029 return ret;
1030 }
1031
1032 static void hm11b1_stop_streaming(struct hm11b1 *hm11b1)
1033 {
1034 struct i2c_client *client = v4l2_get_subdevdata(&hm11b1->sd);
1035
1036 if (hm11b1_write_reg(hm11b1, HM11B1_REG_MODE_SELECT, 1,
1037 HM11B1_MODE_STANDBY))
1038 dev_err(&client->dev, "failed to stop streaming");
1039 power_ctrl_logic_set_power(0);
1040 }
1041
1042 static int hm11b1_set_stream(struct v4l2_subdev *sd, int enable)
1043 {
1044 struct hm11b1 *hm11b1 = to_hm11b1(sd);
1045 struct i2c_client *client = v4l2_get_subdevdata(sd);
1046 int ret = 0;
1047
1048 if (hm11b1->streaming == enable)
1049 return 0;
1050
1051 mutex_lock(&hm11b1->mutex);
1052 if (enable) {
1053 ret = pm_runtime_get_sync(&client->dev);
1054 if (ret < 0) {
1055 pm_runtime_put_noidle(&client->dev);
1056 mutex_unlock(&hm11b1->mutex);
1057 return ret;
1058 }
1059
1060 ret = hm11b1_start_streaming(hm11b1);
1061 if (ret) {
1062 enable = 0;
1063 hm11b1_stop_streaming(hm11b1);
1064 pm_runtime_put(&client->dev);
1065 }
1066 } else {
1067 hm11b1_stop_streaming(hm11b1);
1068 pm_runtime_put(&client->dev);
1069 }
1070
1071 hm11b1->streaming = enable;
1072 mutex_unlock(&hm11b1->mutex);
1073
1074 return ret;
1075 }
1076
1077 static int __maybe_unused hm11b1_suspend(struct device *dev)
1078 {
1079 struct i2c_client *client = to_i2c_client(dev);
1080 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1081 struct hm11b1 *hm11b1 = to_hm11b1(sd);
1082
1083 mutex_lock(&hm11b1->mutex);
1084 if (hm11b1->streaming)
1085 hm11b1_stop_streaming(hm11b1);
1086
1087 mutex_unlock(&hm11b1->mutex);
1088
1089 return 0;
1090 }
1091
1092 static int __maybe_unused hm11b1_resume(struct device *dev)
1093 {
1094 struct i2c_client *client = to_i2c_client(dev);
1095 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1096 struct hm11b1 *hm11b1 = to_hm11b1(sd);
1097 int ret = 0;
1098
1099 mutex_lock(&hm11b1->mutex);
1100 if (!hm11b1->streaming)
1101 goto exit;
1102
1103 ret = hm11b1_start_streaming(hm11b1);
1104 if (ret) {
1105 hm11b1->streaming = false;
1106 hm11b1_stop_streaming(hm11b1);
1107 }
1108
1109 exit:
1110 mutex_unlock(&hm11b1->mutex);
1111 return ret;
1112 }
1113
1114 static int hm11b1_set_format(struct v4l2_subdev *sd,
1115 struct v4l2_subdev_pad_config *cfg,
1116 struct v4l2_subdev_format *fmt)
1117 {
1118 struct hm11b1 *hm11b1 = to_hm11b1(sd);
1119 const struct hm11b1_mode *mode;
1120 s32 vblank_def, h_blank;
1121
1122 mode = v4l2_find_nearest_size(supported_modes,
1123 ARRAY_SIZE(supported_modes), width,
1124 height, fmt->format.width,
1125 fmt->format.height);
1126
1127 mutex_lock(&hm11b1->mutex);
1128 hm11b1_update_pad_format(mode, &fmt->format);
1129 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1130 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
1131 } else {
1132 hm11b1->cur_mode = mode;
1133 __v4l2_ctrl_s_ctrl(hm11b1->link_freq, mode->link_freq_index);
1134 __v4l2_ctrl_s_ctrl_int64(hm11b1->pixel_rate,
1135 to_pixel_rate(mode->link_freq_index));
1136
1137 /* Update limits and set FPS to default */
1138 vblank_def = mode->vts_def - mode->height;
1139 __v4l2_ctrl_modify_range(hm11b1->vblank,
1140 mode->vts_min - mode->height,
1141 HM11B1_VTS_MAX - mode->height, 1,
1142 vblank_def);
1143 __v4l2_ctrl_s_ctrl(hm11b1->vblank, vblank_def);
1144 h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
1145 mode->width;
1146 __v4l2_ctrl_modify_range(hm11b1->hblank, h_blank, h_blank, 1,
1147 h_blank);
1148 }
1149 mutex_unlock(&hm11b1->mutex);
1150
1151 return 0;
1152 }
1153
1154 static int hm11b1_get_format(struct v4l2_subdev *sd,
1155 struct v4l2_subdev_pad_config *cfg,
1156 struct v4l2_subdev_format *fmt)
1157 {
1158 struct hm11b1 *hm11b1 = to_hm11b1(sd);
1159
1160 mutex_lock(&hm11b1->mutex);
1161 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1162 fmt->format = *v4l2_subdev_get_try_format(&hm11b1->sd, cfg,
1163 fmt->pad);
1164 else
1165 hm11b1_update_pad_format(hm11b1->cur_mode, &fmt->format);
1166
1167 mutex_unlock(&hm11b1->mutex);
1168
1169 return 0;
1170 }
1171
1172 static int hm11b1_enum_mbus_code(struct v4l2_subdev *sd,
1173 struct v4l2_subdev_pad_config *cfg,
1174 struct v4l2_subdev_mbus_code_enum *code)
1175 {
1176 if (code->index > 0)
1177 return -EINVAL;
1178
1179 code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1180
1181 return 0;
1182 }
1183
1184 static int hm11b1_enum_frame_size(struct v4l2_subdev *sd,
1185 struct v4l2_subdev_pad_config *cfg,
1186 struct v4l2_subdev_frame_size_enum *fse)
1187 {
1188 if (fse->index >= ARRAY_SIZE(supported_modes))
1189 return -EINVAL;
1190
1191 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1192 return -EINVAL;
1193
1194 fse->min_width = supported_modes[fse->index].width;
1195 fse->max_width = fse->min_width;
1196 fse->min_height = supported_modes[fse->index].height;
1197 fse->max_height = fse->min_height;
1198
1199 return 0;
1200 }
1201
1202 static int hm11b1_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1203 {
1204 struct hm11b1 *hm11b1 = to_hm11b1(sd);
1205
1206 mutex_lock(&hm11b1->mutex);
1207 hm11b1_update_pad_format(&supported_modes[0],
1208 v4l2_subdev_get_try_format(sd, fh->pad, 0));
1209 mutex_unlock(&hm11b1->mutex);
1210
1211 return 0;
1212 }
1213
1214 static const struct v4l2_subdev_video_ops hm11b1_video_ops = {
1215 .s_stream = hm11b1_set_stream,
1216 };
1217
1218 static const struct v4l2_subdev_pad_ops hm11b1_pad_ops = {
1219 .set_fmt = hm11b1_set_format,
1220 .get_fmt = hm11b1_get_format,
1221 .enum_mbus_code = hm11b1_enum_mbus_code,
1222 .enum_frame_size = hm11b1_enum_frame_size,
1223 };
1224
1225 static const struct v4l2_subdev_ops hm11b1_subdev_ops = {
1226 .video = &hm11b1_video_ops,
1227 .pad = &hm11b1_pad_ops,
1228 };
1229
1230 static const struct media_entity_operations hm11b1_subdev_entity_ops = {
1231 .link_validate = v4l2_subdev_link_validate,
1232 };
1233
1234 static const struct v4l2_subdev_internal_ops hm11b1_internal_ops = {
1235 .open = hm11b1_open,
1236 };
1237
1238 static int hm11b1_identify_module(struct hm11b1 *hm11b1)
1239 {
1240 struct i2c_client *client = v4l2_get_subdevdata(&hm11b1->sd);
1241 int ret;
1242 u32 val;
1243
1244 ret = hm11b1_read_reg(hm11b1, HM11B1_REG_CHIP_ID, 2, &val);
1245 if (ret)
1246 return ret;
1247
1248 if (val != HM11B1_CHIP_ID) {
1249 dev_err(&client->dev, "chip id mismatch: %x!=%x",
1250 HM11B1_CHIP_ID, val);
1251 return -ENXIO;
1252 }
1253
1254 return 0;
1255 }
1256
1257 static int hm11b1_remove(struct i2c_client *client)
1258 {
1259 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1260 struct hm11b1 *hm11b1 = to_hm11b1(sd);
1261
1262 v4l2_async_unregister_subdev(sd);
1263 media_entity_cleanup(&sd->entity);
1264 v4l2_ctrl_handler_free(sd->ctrl_handler);
1265 pm_runtime_disable(&client->dev);
1266 mutex_destroy(&hm11b1->mutex);
1267
1268 return 0;
1269 }
1270
1271 static int hm11b1_probe(struct i2c_client *client)
1272 {
1273 struct hm11b1 *hm11b1;
1274 int ret = 0;
1275
1276 hm11b1 = devm_kzalloc(&client->dev, sizeof(*hm11b1), GFP_KERNEL);
1277 if (!hm11b1)
1278 return -ENOMEM;
1279
1280 v4l2_i2c_subdev_init(&hm11b1->sd, client, &hm11b1_subdev_ops);
1281 power_ctrl_logic_set_power(0);
1282 power_ctrl_logic_set_power(1);
1283 ret = hm11b1_identify_module(hm11b1);
1284 if (ret) {
1285 dev_err(&client->dev, "failed to find sensor: %d", ret);
1286 return ret;
1287 }
1288
1289 mutex_init(&hm11b1->mutex);
1290 hm11b1->cur_mode = &supported_modes[0];
1291 ret = hm11b1_init_controls(hm11b1);
1292 if (ret) {
1293 dev_err(&client->dev, "failed to init controls: %d", ret);
1294 goto probe_error_v4l2_ctrl_handler_free;
1295 }
1296
1297 hm11b1->sd.internal_ops = &hm11b1_internal_ops;
1298 hm11b1->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1299 hm11b1->sd.entity.ops = &hm11b1_subdev_entity_ops;
1300 hm11b1->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1301 hm11b1->pad.flags = MEDIA_PAD_FL_SOURCE;
1302 ret = media_entity_pads_init(&hm11b1->sd.entity, 1, &hm11b1->pad);
1303 if (ret) {
1304 dev_err(&client->dev, "failed to init entity pads: %d", ret);
1305 goto probe_error_v4l2_ctrl_handler_free;
1306 }
1307
1308 ret = v4l2_async_register_subdev_sensor_common(&hm11b1->sd);
1309 if (ret < 0) {
1310 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1311 ret);
1312 goto probe_error_media_entity_cleanup;
1313 }
1314
1315 /*
1316 * Device is already turned on by i2c-core with ACPI domain PM.
1317 * Enable runtime PM and turn off the device.
1318 */
1319 pm_runtime_set_active(&client->dev);
1320 pm_runtime_enable(&client->dev);
1321 pm_runtime_idle(&client->dev);
1322
1323 power_ctrl_logic_set_power(0);
1324 return 0;
1325
1326 probe_error_media_entity_cleanup:
1327 media_entity_cleanup(&hm11b1->sd.entity);
1328
1329 probe_error_v4l2_ctrl_handler_free:
1330 v4l2_ctrl_handler_free(hm11b1->sd.ctrl_handler);
1331 mutex_destroy(&hm11b1->mutex);
1332
1333 return ret;
1334 }
1335
1336 static const struct dev_pm_ops hm11b1_pm_ops = {
1337 SET_SYSTEM_SLEEP_PM_OPS(hm11b1_suspend, hm11b1_resume)
1338 };
1339
1340 #ifdef CONFIG_ACPI
1341 static const struct acpi_device_id hm11b1_acpi_ids[] = {
1342 {"HIMX11B1"},
1343 {}
1344 };
1345
1346 MODULE_DEVICE_TABLE(acpi, hm11b1_acpi_ids);
1347 #endif
1348
1349 static struct i2c_driver hm11b1_i2c_driver = {
1350 .driver = {
1351 .name = "hm11b1",
1352 .pm = &hm11b1_pm_ops,
1353 .acpi_match_table = ACPI_PTR(hm11b1_acpi_ids),
1354 },
1355 .probe_new = hm11b1_probe,
1356 .remove = hm11b1_remove,
1357 };
1358
1359 module_i2c_driver(hm11b1_i2c_driver);
1360
1361 MODULE_AUTHOR("Qiu, Tianshu <tian.shu.qiu@intel.com>");
1362 MODULE_AUTHOR("Shawn Tu <shawnx.tu@intel.com>");
1363 MODULE_AUTHOR("Bingbu Cao <bingbu.cao@intel.com>");
1364 MODULE_AUTHOR("Lai, Jim <jim.lai@intel.com>");
1365 MODULE_DESCRIPTION("Himax HM11B1 sensor driver");
1366 MODULE_LICENSE("GPL v2");
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