2 * Motorola CPCAP PMIC core driver
4 * Copyright (C) 2016 Tony Lindgren <tony@atomide.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/device.h>
12 #include <linux/err.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regmap.h>
19 #include <linux/sysfs.h>
21 #include <linux/mfd/motorola-cpcap.h>
22 #include <linux/spi/spi.h>
24 #define CPCAP_NR_IRQ_REG_BANKS 6
25 #define CPCAP_NR_IRQ_CHIPS 3
28 struct spi_device
*spi
;
29 struct regmap_irq
*irqs
;
30 struct regmap_irq_chip_data
*irqdata
[CPCAP_NR_IRQ_CHIPS
];
31 const struct regmap_config
*regmap_conf
;
32 struct regmap
*regmap
;
35 static int cpcap_check_revision(struct cpcap_ddata
*cpcap
)
40 ret
= cpcap_get_vendor(&cpcap
->spi
->dev
, cpcap
->regmap
, &vendor
);
44 ret
= cpcap_get_revision(&cpcap
->spi
->dev
, cpcap
->regmap
, &rev
);
48 dev_info(&cpcap
->spi
->dev
, "CPCAP vendor: %s rev: %i.%i (%x)\n",
49 vendor
== CPCAP_VENDOR_ST
? "ST" : "TI",
50 CPCAP_REVISION_MAJOR(rev
), CPCAP_REVISION_MINOR(rev
),
53 if (rev
< CPCAP_REVISION_2_1
) {
54 dev_info(&cpcap
->spi
->dev
,
55 "Please add old CPCAP revision support as needed\n");
63 * First two irq chips are the two private macro interrupt chips, the third
64 * irq chip is for register banks 1 - 4 and is available for drivers to use.
66 static struct regmap_irq_chip cpcap_irq_chip
[CPCAP_NR_IRQ_CHIPS
] = {
70 .status_base
= CPCAP_REG_MI1
,
71 .ack_base
= CPCAP_REG_MI1
,
72 .mask_base
= CPCAP_REG_MIM1
,
78 .status_base
= CPCAP_REG_MI2
,
79 .ack_base
= CPCAP_REG_MI2
,
80 .mask_base
= CPCAP_REG_MIM2
,
86 .status_base
= CPCAP_REG_INT1
,
87 .ack_base
= CPCAP_REG_INT1
,
88 .mask_base
= CPCAP_REG_INTM1
,
89 .type_base
= CPCAP_REG_INTS1
,
94 static void cpcap_init_one_regmap_irq(struct cpcap_ddata
*cpcap
,
95 struct regmap_irq
*rirq
,
96 int irq_base
, int irq
)
98 unsigned int reg_offset
;
99 unsigned int bit
, mask
;
101 reg_offset
= irq
- irq_base
;
102 reg_offset
/= cpcap
->regmap_conf
->val_bits
;
103 reg_offset
*= cpcap
->regmap_conf
->reg_stride
;
105 bit
= irq
% cpcap
->regmap_conf
->val_bits
;
108 rirq
->reg_offset
= reg_offset
;
112 static int cpcap_init_irq_chip(struct cpcap_ddata
*cpcap
, int irq_chip
,
113 int irq_start
, int nr_irqs
)
115 struct regmap_irq_chip
*chip
= &cpcap_irq_chip
[irq_chip
];
118 for (i
= irq_start
; i
< irq_start
+ nr_irqs
; i
++) {
119 struct regmap_irq
*rirq
= &cpcap
->irqs
[i
];
121 cpcap_init_one_regmap_irq(cpcap
, rirq
, irq_start
, i
);
123 chip
->irqs
= &cpcap
->irqs
[irq_start
];
124 chip
->num_irqs
= nr_irqs
;
125 chip
->irq_drv_data
= cpcap
;
127 ret
= devm_regmap_add_irq_chip(&cpcap
->spi
->dev
, cpcap
->regmap
,
129 IRQF_TRIGGER_RISING
|
131 chip
, &cpcap
->irqdata
[irq_chip
]);
133 dev_err(&cpcap
->spi
->dev
, "could not add irq chip %i: %i\n",
141 static int cpcap_init_irq(struct cpcap_ddata
*cpcap
)
145 cpcap
->irqs
= devm_kzalloc(&cpcap
->spi
->dev
,
146 sizeof(*cpcap
->irqs
) *
147 CPCAP_NR_IRQ_REG_BANKS
*
148 cpcap
->regmap_conf
->val_bits
,
153 ret
= cpcap_init_irq_chip(cpcap
, 0, 0, 16);
157 ret
= cpcap_init_irq_chip(cpcap
, 1, 16, 16);
161 ret
= cpcap_init_irq_chip(cpcap
, 2, 32, 64);
165 enable_irq_wake(cpcap
->spi
->irq
);
170 static const struct of_device_id cpcap_of_match
[] = {
171 { .compatible
= "motorola,cpcap", },
172 { .compatible
= "st,6556002", },
175 MODULE_DEVICE_TABLE(of
, cpcap_of_match
);
177 static const struct regmap_config cpcap_regmap_config
= {
182 .write_flag_mask
= 0x8000,
183 .max_register
= CPCAP_REG_ST_TEST2
,
184 .cache_type
= REGCACHE_NONE
,
185 .reg_format_endian
= REGMAP_ENDIAN_LITTLE
,
186 .val_format_endian
= REGMAP_ENDIAN_LITTLE
,
189 static int cpcap_probe(struct spi_device
*spi
)
191 const struct of_device_id
*match
;
192 struct cpcap_ddata
*cpcap
;
195 match
= of_match_device(of_match_ptr(cpcap_of_match
), &spi
->dev
);
199 cpcap
= devm_kzalloc(&spi
->dev
, sizeof(*cpcap
), GFP_KERNEL
);
204 spi_set_drvdata(spi
, cpcap
);
206 spi
->bits_per_word
= 16;
207 spi
->mode
= SPI_MODE_0
| SPI_CS_HIGH
;
209 ret
= spi_setup(spi
);
213 cpcap
->regmap_conf
= &cpcap_regmap_config
;
214 cpcap
->regmap
= devm_regmap_init_spi(spi
, &cpcap_regmap_config
);
215 if (IS_ERR(cpcap
->regmap
)) {
216 ret
= PTR_ERR(cpcap
->regmap
);
217 dev_err(&cpcap
->spi
->dev
, "Failed to initialize regmap: %d\n",
223 ret
= cpcap_check_revision(cpcap
);
225 dev_err(&cpcap
->spi
->dev
, "Failed to detect CPCAP: %i\n", ret
);
229 ret
= cpcap_init_irq(cpcap
);
233 return of_platform_populate(spi
->dev
.of_node
, NULL
, NULL
,
237 static int cpcap_remove(struct spi_device
*pdev
)
239 struct cpcap_ddata
*cpcap
= spi_get_drvdata(pdev
);
241 of_platform_depopulate(&cpcap
->spi
->dev
);
246 static struct spi_driver cpcap_driver
= {
248 .name
= "cpcap-core",
249 .of_match_table
= cpcap_of_match
,
251 .probe
= cpcap_probe
,
252 .remove
= cpcap_remove
,
254 module_spi_driver(cpcap_driver
);
256 MODULE_ALIAS("platform:cpcap");
257 MODULE_DESCRIPTION("CPCAP driver");
258 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
259 MODULE_LICENSE("GPL v2");