1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #include <linux/delay.h>
9 #include <linux/module.h>
10 #include <linux/printk.h>
11 #include <linux/spi/spi.h>
12 #include <linux/errno.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/phylink.h>
16 #include <linux/of_net.h>
17 #include <linux/of_mdio.h>
18 #include <linux/of_device.h>
19 #include <linux/pcs/pcs-xpcs.h>
20 #include <linux/netdev_features.h>
21 #include <linux/netdevice.h>
22 #include <linux/if_bridge.h>
23 #include <linux/if_ether.h>
24 #include <linux/dsa/8021q.h>
26 #include "sja1105_tas.h"
28 #define SJA1105_UNKNOWN_MULTICAST 0x010000000000ull
29 #define SJA1105_DEFAULT_VLAN (VLAN_N_VID - 1)
31 static const struct dsa_switch_ops sja1105_switch_ops
;
33 static void sja1105_hw_reset(struct gpio_desc
*gpio
, unsigned int pulse_len
,
34 unsigned int startup_delay
)
36 gpiod_set_value_cansleep(gpio
, 1);
37 /* Wait for minimum reset pulse length */
39 gpiod_set_value_cansleep(gpio
, 0);
40 /* Wait until chip is ready after reset */
41 msleep(startup_delay
);
45 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry
*l2_fwd
,
46 int from
, int to
, bool allow
)
49 l2_fwd
[from
].reach_port
|= BIT(to
);
51 l2_fwd
[from
].reach_port
&= ~BIT(to
);
54 static bool sja1105_can_forward(struct sja1105_l2_forwarding_entry
*l2_fwd
,
57 return !!(l2_fwd
[from
].reach_port
& BIT(to
));
60 static int sja1105_init_mac_settings(struct sja1105_private
*priv
)
62 struct sja1105_mac_config_entry default_mac
= {
63 /* Enable all 8 priority queues on egress.
64 * Every queue i holds top[i] - base[i] frames.
65 * Sum of top[i] - base[i] is 511 (max hardware limit).
67 .top
= {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
68 .base
= {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
69 .enabled
= {true, true, true, true, true, true, true, true},
70 /* Keep standard IFG of 12 bytes on egress. */
72 /* Always put the MAC speed in automatic mode, where it can be
73 * adjusted at runtime by PHYLINK.
75 .speed
= priv
->info
->port_speed
[SJA1105_SPEED_AUTO
],
76 /* No static correction for 1-step 1588 events */
79 /* Disable aging for critical TTEthernet traffic */
81 /* Internal VLAN (pvid) to apply to untagged ingress */
86 /* Don't drop traffic with other EtherType than ETH_P_IP */
88 /* Don't drop double-tagged traffic */
90 /* Don't drop untagged traffic */
92 /* Don't retag 802.1p (VID 0) traffic with the pvid */
94 /* Disable learning and I/O on user ports by default -
101 struct sja1105_mac_config_entry
*mac
;
102 struct dsa_switch
*ds
= priv
->ds
;
103 struct sja1105_table
*table
;
106 table
= &priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
];
108 /* Discard previous MAC Configuration Table */
109 if (table
->entry_count
) {
110 kfree(table
->entries
);
111 table
->entry_count
= 0;
114 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
115 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
119 table
->entry_count
= table
->ops
->max_entry_count
;
121 mac
= table
->entries
;
123 for (i
= 0; i
< ds
->num_ports
; i
++) {
124 mac
[i
] = default_mac
;
126 /* Let sja1105_bridge_stp_state_set() keep address learning
127 * enabled for the CPU port.
129 if (dsa_is_cpu_port(ds
, i
))
130 priv
->learn_ena
|= BIT(i
);
136 static int sja1105_init_mii_settings(struct sja1105_private
*priv
)
138 struct device
*dev
= &priv
->spidev
->dev
;
139 struct sja1105_xmii_params_entry
*mii
;
140 struct dsa_switch
*ds
= priv
->ds
;
141 struct sja1105_table
*table
;
144 table
= &priv
->static_config
.tables
[BLK_IDX_XMII_PARAMS
];
146 /* Discard previous xMII Mode Parameters Table */
147 if (table
->entry_count
) {
148 kfree(table
->entries
);
149 table
->entry_count
= 0;
152 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
153 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
157 /* Override table based on PHYLINK DT bindings */
158 table
->entry_count
= table
->ops
->max_entry_count
;
160 mii
= table
->entries
;
162 for (i
= 0; i
< ds
->num_ports
; i
++) {
163 sja1105_mii_role_t role
= XMII_MAC
;
165 if (dsa_is_unused_port(priv
->ds
, i
))
168 switch (priv
->phy_mode
[i
]) {
169 case PHY_INTERFACE_MODE_INTERNAL
:
170 if (priv
->info
->internal_phy
[i
] == SJA1105_NO_PHY
)
173 mii
->xmii_mode
[i
] = XMII_MODE_MII
;
174 if (priv
->info
->internal_phy
[i
] == SJA1105_PHY_BASE_TX
)
175 mii
->special
[i
] = true;
178 case PHY_INTERFACE_MODE_REVMII
:
181 case PHY_INTERFACE_MODE_MII
:
182 if (!priv
->info
->supports_mii
[i
])
185 mii
->xmii_mode
[i
] = XMII_MODE_MII
;
187 case PHY_INTERFACE_MODE_REVRMII
:
190 case PHY_INTERFACE_MODE_RMII
:
191 if (!priv
->info
->supports_rmii
[i
])
194 mii
->xmii_mode
[i
] = XMII_MODE_RMII
;
196 case PHY_INTERFACE_MODE_RGMII
:
197 case PHY_INTERFACE_MODE_RGMII_ID
:
198 case PHY_INTERFACE_MODE_RGMII_RXID
:
199 case PHY_INTERFACE_MODE_RGMII_TXID
:
200 if (!priv
->info
->supports_rgmii
[i
])
203 mii
->xmii_mode
[i
] = XMII_MODE_RGMII
;
205 case PHY_INTERFACE_MODE_SGMII
:
206 if (!priv
->info
->supports_sgmii
[i
])
209 mii
->xmii_mode
[i
] = XMII_MODE_SGMII
;
210 mii
->special
[i
] = true;
212 case PHY_INTERFACE_MODE_2500BASEX
:
213 if (!priv
->info
->supports_2500basex
[i
])
216 mii
->xmii_mode
[i
] = XMII_MODE_SGMII
;
217 mii
->special
[i
] = true;
221 dev_err(dev
, "Unsupported PHY mode %s on port %d!\n",
222 phy_modes(priv
->phy_mode
[i
]), i
);
226 mii
->phy_mac
[i
] = role
;
231 static int sja1105_init_static_fdb(struct sja1105_private
*priv
)
233 struct sja1105_l2_lookup_entry
*l2_lookup
;
234 struct sja1105_table
*table
;
237 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
239 /* We only populate the FDB table through dynamic L2 Address Lookup
240 * entries, except for a special entry at the end which is a catch-all
241 * for unknown multicast and will be used to control flooding domain.
243 if (table
->entry_count
) {
244 kfree(table
->entries
);
245 table
->entry_count
= 0;
248 if (!priv
->info
->can_limit_mcast_flood
)
251 table
->entries
= kcalloc(1, table
->ops
->unpacked_entry_size
,
256 table
->entry_count
= 1;
257 l2_lookup
= table
->entries
;
259 /* All L2 multicast addresses have an odd first octet */
260 l2_lookup
[0].macaddr
= SJA1105_UNKNOWN_MULTICAST
;
261 l2_lookup
[0].mask_macaddr
= SJA1105_UNKNOWN_MULTICAST
;
262 l2_lookup
[0].lockeds
= true;
263 l2_lookup
[0].index
= SJA1105_MAX_L2_LOOKUP_COUNT
- 1;
265 /* Flood multicast to every port by default */
266 for (port
= 0; port
< priv
->ds
->num_ports
; port
++)
267 if (!dsa_is_unused_port(priv
->ds
, port
))
268 l2_lookup
[0].destports
|= BIT(port
);
273 static int sja1105_init_l2_lookup_params(struct sja1105_private
*priv
)
275 struct sja1105_l2_lookup_params_entry default_l2_lookup_params
= {
276 /* Learned FDB entries are forgotten after 300 seconds */
277 .maxage
= SJA1105_AGEING_TIME_MS(300000),
278 /* All entries within a FDB bin are available for learning */
279 .dyn_tbsz
= SJA1105ET_FDB_BIN_SIZE
,
280 /* And the P/Q/R/S equivalent setting: */
282 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
284 /* This selects between Independent VLAN Learning (IVL) and
285 * Shared VLAN Learning (SVL)
287 .shared_learn
= true,
288 /* Don't discard management traffic based on ENFPORT -
289 * we don't perform SMAC port enforcement anyway, so
290 * what we are setting here doesn't matter.
292 .no_enf_hostprt
= false,
293 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
294 * Maybe correlate with no_linklocal_learn from bridge driver?
296 .no_mgmt_learn
= true,
299 /* Dynamically learned FDB entries can overwrite other (older)
300 * dynamic FDB entries
305 struct dsa_switch
*ds
= priv
->ds
;
306 int port
, num_used_ports
= 0;
307 struct sja1105_table
*table
;
310 for (port
= 0; port
< ds
->num_ports
; port
++)
311 if (!dsa_is_unused_port(ds
, port
))
314 max_fdb_entries
= SJA1105_MAX_L2_LOOKUP_COUNT
/ num_used_ports
;
316 for (port
= 0; port
< ds
->num_ports
; port
++) {
317 if (dsa_is_unused_port(ds
, port
))
320 default_l2_lookup_params
.maxaddrp
[port
] = max_fdb_entries
;
323 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP_PARAMS
];
325 if (table
->entry_count
) {
326 kfree(table
->entries
);
327 table
->entry_count
= 0;
330 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
331 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
335 table
->entry_count
= table
->ops
->max_entry_count
;
337 /* This table only has a single entry */
338 ((struct sja1105_l2_lookup_params_entry
*)table
->entries
)[0] =
339 default_l2_lookup_params
;
344 /* Set up a default VLAN for untagged traffic injected from the CPU
345 * using management routes (e.g. STP, PTP) as opposed to tag_8021q.
346 * All DT-defined ports are members of this VLAN, and there are no
347 * restrictions on forwarding (since the CPU selects the destination).
348 * Frames from this VLAN will always be transmitted as untagged, and
349 * neither the bridge nor the 8021q module cannot create this VLAN ID.
351 static int sja1105_init_static_vlan(struct sja1105_private
*priv
)
353 struct sja1105_table
*table
;
354 struct sja1105_vlan_lookup_entry pvid
= {
355 .type_entry
= SJA1110_VLAN_D_TAG
,
361 .vlanid
= SJA1105_DEFAULT_VLAN
,
363 struct dsa_switch
*ds
= priv
->ds
;
366 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
368 if (table
->entry_count
) {
369 kfree(table
->entries
);
370 table
->entry_count
= 0;
373 table
->entries
= kzalloc(table
->ops
->unpacked_entry_size
,
378 table
->entry_count
= 1;
380 for (port
= 0; port
< ds
->num_ports
; port
++) {
381 struct sja1105_bridge_vlan
*v
;
383 if (dsa_is_unused_port(ds
, port
))
386 pvid
.vmemb_port
|= BIT(port
);
387 pvid
.vlan_bc
|= BIT(port
);
388 pvid
.tag_port
&= ~BIT(port
);
390 v
= kzalloc(sizeof(*v
), GFP_KERNEL
);
395 v
->vid
= SJA1105_DEFAULT_VLAN
;
397 if (dsa_is_cpu_port(ds
, port
))
399 list_add(&v
->list
, &priv
->dsa_8021q_vlans
);
401 v
= kmemdup(v
, sizeof(*v
), GFP_KERNEL
);
405 list_add(&v
->list
, &priv
->bridge_vlans
);
408 ((struct sja1105_vlan_lookup_entry
*)table
->entries
)[0] = pvid
;
412 static int sja1105_init_l2_forwarding(struct sja1105_private
*priv
)
414 struct sja1105_l2_forwarding_entry
*l2fwd
;
415 struct dsa_switch
*ds
= priv
->ds
;
416 struct sja1105_table
*table
;
419 table
= &priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING
];
421 if (table
->entry_count
) {
422 kfree(table
->entries
);
423 table
->entry_count
= 0;
426 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
427 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
431 table
->entry_count
= table
->ops
->max_entry_count
;
433 l2fwd
= table
->entries
;
435 /* First 5 entries define the forwarding rules */
436 for (i
= 0; i
< ds
->num_ports
; i
++) {
437 unsigned int upstream
= dsa_upstream_port(priv
->ds
, i
);
439 if (dsa_is_unused_port(ds
, i
))
442 for (j
= 0; j
< SJA1105_NUM_TC
; j
++)
443 l2fwd
[i
].vlan_pmap
[j
] = j
;
445 /* All ports start up with egress flooding enabled,
446 * including the CPU port.
448 priv
->ucast_egress_floods
|= BIT(i
);
449 priv
->bcast_egress_floods
|= BIT(i
);
454 sja1105_port_allow_traffic(l2fwd
, i
, upstream
, true);
455 sja1105_port_allow_traffic(l2fwd
, upstream
, i
, true);
457 l2fwd
[i
].bc_domain
= BIT(upstream
);
458 l2fwd
[i
].fl_domain
= BIT(upstream
);
460 l2fwd
[upstream
].bc_domain
|= BIT(i
);
461 l2fwd
[upstream
].fl_domain
|= BIT(i
);
464 /* Next 8 entries define VLAN PCP mapping from ingress to egress.
465 * Create a one-to-one mapping.
467 for (i
= 0; i
< SJA1105_NUM_TC
; i
++) {
468 for (j
= 0; j
< ds
->num_ports
; j
++) {
469 if (dsa_is_unused_port(ds
, j
))
472 l2fwd
[ds
->num_ports
+ i
].vlan_pmap
[j
] = i
;
475 l2fwd
[ds
->num_ports
+ i
].type_egrpcp2outputq
= true;
481 static int sja1110_init_pcp_remapping(struct sja1105_private
*priv
)
483 struct sja1110_pcp_remapping_entry
*pcp_remap
;
484 struct dsa_switch
*ds
= priv
->ds
;
485 struct sja1105_table
*table
;
488 table
= &priv
->static_config
.tables
[BLK_IDX_PCP_REMAPPING
];
490 /* Nothing to do for SJA1105 */
491 if (!table
->ops
->max_entry_count
)
494 if (table
->entry_count
) {
495 kfree(table
->entries
);
496 table
->entry_count
= 0;
499 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
500 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
504 table
->entry_count
= table
->ops
->max_entry_count
;
506 pcp_remap
= table
->entries
;
508 /* Repeat the configuration done for vlan_pmap */
509 for (port
= 0; port
< ds
->num_ports
; port
++) {
510 if (dsa_is_unused_port(ds
, port
))
513 for (tc
= 0; tc
< SJA1105_NUM_TC
; tc
++)
514 pcp_remap
[port
].egrpcp
[tc
] = tc
;
520 static int sja1105_init_l2_forwarding_params(struct sja1105_private
*priv
)
522 struct sja1105_l2_forwarding_params_entry
*l2fwd_params
;
523 struct sja1105_table
*table
;
525 table
= &priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING_PARAMS
];
527 if (table
->entry_count
) {
528 kfree(table
->entries
);
529 table
->entry_count
= 0;
532 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
533 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
537 table
->entry_count
= table
->ops
->max_entry_count
;
539 /* This table only has a single entry */
540 l2fwd_params
= table
->entries
;
542 /* Disallow dynamic reconfiguration of vlan_pmap */
543 l2fwd_params
->max_dynp
= 0;
544 /* Use a single memory partition for all ingress queues */
545 l2fwd_params
->part_spc
[0] = priv
->info
->max_frame_mem
;
550 void sja1105_frame_memory_partitioning(struct sja1105_private
*priv
)
552 struct sja1105_l2_forwarding_params_entry
*l2_fwd_params
;
553 struct sja1105_vl_forwarding_params_entry
*vl_fwd_params
;
554 int max_mem
= priv
->info
->max_frame_mem
;
555 struct sja1105_table
*table
;
557 /* VLAN retagging is implemented using a loopback port that consumes
558 * frame buffers. That leaves less for us.
560 if (priv
->vlan_state
== SJA1105_VLAN_BEST_EFFORT
)
561 max_mem
-= SJA1105_FRAME_MEMORY_RETAGGING_OVERHEAD
;
563 table
= &priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING_PARAMS
];
564 l2_fwd_params
= table
->entries
;
565 l2_fwd_params
->part_spc
[0] = max_mem
;
567 /* If we have any critical-traffic virtual links, we need to reserve
568 * some frame buffer memory for them. At the moment, hardcode the value
569 * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks
570 * remaining for best-effort traffic. TODO: figure out a more flexible
571 * way to perform the frame buffer partitioning.
573 if (!priv
->static_config
.tables
[BLK_IDX_VL_FORWARDING
].entry_count
)
576 table
= &priv
->static_config
.tables
[BLK_IDX_VL_FORWARDING_PARAMS
];
577 vl_fwd_params
= table
->entries
;
579 l2_fwd_params
->part_spc
[0] -= SJA1105_VL_FRAME_MEMORY
;
580 vl_fwd_params
->partspc
[0] = SJA1105_VL_FRAME_MEMORY
;
583 /* SJA1110 TDMACONFIGIDX values:
585 * | 100 Mbps ports | 1Gbps ports | 2.5Gbps ports | Disabled ports
586 * -----+----------------+---------------+---------------+---------------
587 * 0 | 0, [5:10] | [1:2] | [3:4] | retag
588 * 1 |0, [5:10], retag| [1:2] | [3:4] | -
589 * 2 | 0, [5:10] | [1:3], retag | 4 | -
590 * 3 | 0, [5:10] |[1:2], 4, retag| 3 | -
591 * 4 | 0, 2, [5:10] | 1, retag | [3:4] | -
592 * 5 | 0, 1, [5:10] | 2, retag | [3:4] | -
593 * 14 | 0, [5:10] | [1:4], retag | - | -
594 * 15 | [5:10] | [0:4], retag | - | -
596 static void sja1110_select_tdmaconfigidx(struct sja1105_private
*priv
)
598 struct sja1105_general_params_entry
*general_params
;
599 struct sja1105_table
*table
;
600 bool port_1_is_base_tx
;
605 if (priv
->info
->device_id
!= SJA1110_DEVICE_ID
)
608 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
609 general_params
= table
->entries
;
611 /* All the settings below are "as opposed to SGMII", which is the
612 * other pinmuxing option.
614 port_1_is_base_tx
= priv
->phy_mode
[1] == PHY_INTERFACE_MODE_INTERNAL
;
615 port_3_is_2500
= priv
->phy_mode
[3] == PHY_INTERFACE_MODE_2500BASEX
;
616 port_4_is_2500
= priv
->phy_mode
[4] == PHY_INTERFACE_MODE_2500BASEX
;
618 if (port_1_is_base_tx
)
619 /* Retagging port will operate at 1 Gbps */
621 else if (port_3_is_2500
&& port_4_is_2500
)
622 /* Retagging port will operate at 100 Mbps */
624 else if (port_3_is_2500
)
625 /* Retagging port will operate at 1 Gbps */
627 else if (port_4_is_2500
)
628 /* Retagging port will operate at 1 Gbps */
631 /* Retagging port will operate at 1 Gbps */
634 general_params
->tdmaconfigidx
= tdmaconfigidx
;
637 static int sja1105_init_general_params(struct sja1105_private
*priv
)
639 struct sja1105_general_params_entry default_general_params
= {
640 /* Allow dynamic changing of the mirror port */
642 .switchid
= priv
->ds
->index
,
643 /* Priority queue for link-local management frames
644 * (both ingress to and egress from CPU - PTP, STP etc)
647 .mac_fltres1
= SJA1105_LINKLOCAL_FILTER_A
,
648 .mac_flt1
= SJA1105_LINKLOCAL_FILTER_A_MASK
,
649 .incl_srcpt1
= false,
651 .mac_fltres0
= SJA1105_LINKLOCAL_FILTER_B
,
652 .mac_flt0
= SJA1105_LINKLOCAL_FILTER_B_MASK
,
653 .incl_srcpt0
= false,
655 /* The destination for traffic matching mac_fltres1 and
656 * mac_fltres0 on all ports except host_port. Such traffic
657 * receieved on host_port itself would be dropped, except
658 * by installing a temporary 'management route'
660 .host_port
= priv
->ds
->num_ports
,
661 /* Default to an invalid value */
662 .mirr_port
= priv
->ds
->num_ports
,
664 .vllupformat
= SJA1105_VL_FORMAT_PSFP
,
667 /* Only update correctionField for 1-step PTP (L2 transport) */
669 /* Forcefully disable VLAN filtering by telling
670 * the switch that VLAN has a different EtherType.
672 .tpid
= ETH_P_SJA1105
,
673 .tpid2
= ETH_P_SJA1105
,
674 /* Enable the TTEthernet engine on SJA1110 */
676 /* Set up the EtherType for control packets on SJA1110 */
677 .header_type
= ETH_P_SJA1110
,
679 struct sja1105_general_params_entry
*general_params
;
680 struct dsa_switch
*ds
= priv
->ds
;
681 struct sja1105_table
*table
;
684 for (port
= 0; port
< ds
->num_ports
; port
++) {
685 if (dsa_is_cpu_port(ds
, port
)) {
686 default_general_params
.host_port
= port
;
691 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
693 if (table
->entry_count
) {
694 kfree(table
->entries
);
695 table
->entry_count
= 0;
698 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
699 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
703 table
->entry_count
= table
->ops
->max_entry_count
;
705 general_params
= table
->entries
;
707 /* This table only has a single entry */
708 general_params
[0] = default_general_params
;
710 sja1110_select_tdmaconfigidx(priv
);
712 /* Link-local traffic received on casc_port will be forwarded
713 * to host_port without embedding the source port and device ID
714 * info in the destination MAC address, and no RX timestamps will be
715 * taken either (presumably because it is a cascaded port and a
716 * downstream SJA switch already did that).
717 * To disable the feature, we need to do different things depending on
718 * switch generation. On SJA1105 we need to set an invalid port, while
719 * on SJA1110 which support multiple cascaded ports, this field is a
720 * bitmask so it must be left zero.
722 if (!priv
->info
->multiple_cascade_ports
)
723 general_params
->casc_port
= ds
->num_ports
;
728 static int sja1105_init_avb_params(struct sja1105_private
*priv
)
730 struct sja1105_avb_params_entry
*avb
;
731 struct sja1105_table
*table
;
733 table
= &priv
->static_config
.tables
[BLK_IDX_AVB_PARAMS
];
735 /* Discard previous AVB Parameters Table */
736 if (table
->entry_count
) {
737 kfree(table
->entries
);
738 table
->entry_count
= 0;
741 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
742 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
746 table
->entry_count
= table
->ops
->max_entry_count
;
748 avb
= table
->entries
;
750 /* Configure the MAC addresses for meta frames */
751 avb
->destmeta
= SJA1105_META_DMAC
;
752 avb
->srcmeta
= SJA1105_META_SMAC
;
753 /* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by
754 * default. This is because there might be boards with a hardware
755 * layout where enabling the pin as output might cause an electrical
756 * clash. On E/T the pin is always an output, which the board designers
757 * probably already knew, so even if there are going to be electrical
758 * issues, there's nothing we can do.
760 avb
->cas_master
= false;
765 /* The L2 policing table is 2-stage. The table is looked up for each frame
766 * according to the ingress port, whether it was broadcast or not, and the
767 * classified traffic class (given by VLAN PCP). This portion of the lookup is
768 * fixed, and gives access to the SHARINDX, an indirection register pointing
769 * within the policing table itself, which is used to resolve the policer that
770 * will be used for this frame.
773 * +------------+--------+ +---------------------------------+
774 * |Port 0 TC 0 |SHARINDX| | Policer 0: Rate, Burst, MTU |
775 * +------------+--------+ +---------------------------------+
776 * |Port 0 TC 1 |SHARINDX| | Policer 1: Rate, Burst, MTU |
777 * +------------+--------+ +---------------------------------+
778 * ... | Policer 2: Rate, Burst, MTU |
779 * +------------+--------+ +---------------------------------+
780 * |Port 0 TC 7 |SHARINDX| | Policer 3: Rate, Burst, MTU |
781 * +------------+--------+ +---------------------------------+
782 * |Port 1 TC 0 |SHARINDX| | Policer 4: Rate, Burst, MTU |
783 * +------------+--------+ +---------------------------------+
784 * ... | Policer 5: Rate, Burst, MTU |
785 * +------------+--------+ +---------------------------------+
786 * |Port 1 TC 7 |SHARINDX| | Policer 6: Rate, Burst, MTU |
787 * +------------+--------+ +---------------------------------+
788 * ... | Policer 7: Rate, Burst, MTU |
789 * +------------+--------+ +---------------------------------+
790 * |Port 4 TC 7 |SHARINDX| ...
791 * +------------+--------+
792 * |Port 0 BCAST|SHARINDX| ...
793 * +------------+--------+
794 * |Port 1 BCAST|SHARINDX| ...
795 * +------------+--------+
797 * +------------+--------+ +---------------------------------+
798 * |Port 4 BCAST|SHARINDX| | Policer 44: Rate, Burst, MTU |
799 * +------------+--------+ +---------------------------------+
801 * In this driver, we shall use policers 0-4 as statically alocated port
802 * (matchall) policers. So we need to make the SHARINDX for all lookups
803 * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast
805 * The remaining policers (40) shall be dynamically allocated for flower
806 * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff.
808 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
810 static int sja1105_init_l2_policing(struct sja1105_private
*priv
)
812 struct sja1105_l2_policing_entry
*policing
;
813 struct dsa_switch
*ds
= priv
->ds
;
814 struct sja1105_table
*table
;
817 table
= &priv
->static_config
.tables
[BLK_IDX_L2_POLICING
];
819 /* Discard previous L2 Policing Table */
820 if (table
->entry_count
) {
821 kfree(table
->entries
);
822 table
->entry_count
= 0;
825 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
826 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
830 table
->entry_count
= table
->ops
->max_entry_count
;
832 policing
= table
->entries
;
834 /* Setup shared indices for the matchall policers */
835 for (port
= 0; port
< ds
->num_ports
; port
++) {
836 int mcast
= (ds
->num_ports
* (SJA1105_NUM_TC
+ 1)) + port
;
837 int bcast
= (ds
->num_ports
* SJA1105_NUM_TC
) + port
;
839 for (tc
= 0; tc
< SJA1105_NUM_TC
; tc
++)
840 policing
[port
* SJA1105_NUM_TC
+ tc
].sharindx
= port
;
842 policing
[bcast
].sharindx
= port
;
843 /* Only SJA1110 has multicast policers */
844 if (mcast
<= table
->ops
->max_entry_count
)
845 policing
[mcast
].sharindx
= port
;
848 /* Setup the matchall policer parameters */
849 for (port
= 0; port
< ds
->num_ports
; port
++) {
850 int mtu
= VLAN_ETH_FRAME_LEN
+ ETH_FCS_LEN
;
852 if (dsa_is_cpu_port(priv
->ds
, port
))
855 policing
[port
].smax
= 65535; /* Burst size in bytes */
856 policing
[port
].rate
= SJA1105_RATE_MBPS(1000);
857 policing
[port
].maxlen
= mtu
;
858 policing
[port
].partition
= 0;
864 static int sja1105_static_config_load(struct sja1105_private
*priv
)
868 sja1105_static_config_free(&priv
->static_config
);
869 rc
= sja1105_static_config_init(&priv
->static_config
,
870 priv
->info
->static_ops
,
871 priv
->info
->device_id
);
875 /* Build static configuration */
876 rc
= sja1105_init_mac_settings(priv
);
879 rc
= sja1105_init_mii_settings(priv
);
882 rc
= sja1105_init_static_fdb(priv
);
885 rc
= sja1105_init_static_vlan(priv
);
888 rc
= sja1105_init_l2_lookup_params(priv
);
891 rc
= sja1105_init_l2_forwarding(priv
);
894 rc
= sja1105_init_l2_forwarding_params(priv
);
897 rc
= sja1105_init_l2_policing(priv
);
900 rc
= sja1105_init_general_params(priv
);
903 rc
= sja1105_init_avb_params(priv
);
906 rc
= sja1110_init_pcp_remapping(priv
);
910 /* Send initial configuration to hardware via SPI */
911 return sja1105_static_config_upload(priv
);
914 static int sja1105_parse_rgmii_delays(struct sja1105_private
*priv
)
916 struct dsa_switch
*ds
= priv
->ds
;
919 for (port
= 0; port
< ds
->num_ports
; port
++) {
920 if (!priv
->fixed_link
[port
])
923 if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_RXID
||
924 priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_ID
)
925 priv
->rgmii_rx_delay
[port
] = true;
927 if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_TXID
||
928 priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_ID
)
929 priv
->rgmii_tx_delay
[port
] = true;
931 if ((priv
->rgmii_rx_delay
[port
] || priv
->rgmii_tx_delay
[port
]) &&
932 !priv
->info
->setup_rgmii_delay
)
938 static int sja1105_parse_ports_node(struct sja1105_private
*priv
,
939 struct device_node
*ports_node
)
941 struct device
*dev
= &priv
->spidev
->dev
;
942 struct device_node
*child
;
944 for_each_available_child_of_node(ports_node
, child
) {
945 struct device_node
*phy_node
;
946 phy_interface_t phy_mode
;
950 /* Get switch port number from DT */
951 if (of_property_read_u32(child
, "reg", &index
) < 0) {
952 dev_err(dev
, "Port number not defined in device tree "
953 "(property \"reg\")\n");
958 /* Get PHY mode from DT */
959 err
= of_get_phy_mode(child
, &phy_mode
);
961 dev_err(dev
, "Failed to read phy-mode or "
962 "phy-interface-type property for port %d\n",
968 phy_node
= of_parse_phandle(child
, "phy-handle", 0);
970 if (!of_phy_is_fixed_link(child
)) {
971 dev_err(dev
, "phy-handle or fixed-link "
972 "properties missing!\n");
976 /* phy-handle is missing, but fixed-link isn't.
977 * So it's a fixed link. Default to PHY role.
979 priv
->fixed_link
[index
] = true;
981 of_node_put(phy_node
);
984 priv
->phy_mode
[index
] = phy_mode
;
990 static int sja1105_parse_dt(struct sja1105_private
*priv
)
992 struct device
*dev
= &priv
->spidev
->dev
;
993 struct device_node
*switch_node
= dev
->of_node
;
994 struct device_node
*ports_node
;
997 ports_node
= of_get_child_by_name(switch_node
, "ports");
999 ports_node
= of_get_child_by_name(switch_node
, "ethernet-ports");
1001 dev_err(dev
, "Incorrect bindings: absent \"ports\" node\n");
1005 rc
= sja1105_parse_ports_node(priv
, ports_node
);
1006 of_node_put(ports_node
);
1011 /* Convert link speed from SJA1105 to ethtool encoding */
1012 static int sja1105_port_speed_to_ethtool(struct sja1105_private
*priv
,
1015 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_10MBPS
])
1017 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_100MBPS
])
1019 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_1000MBPS
])
1021 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_2500MBPS
])
1023 return SPEED_UNKNOWN
;
1026 /* Set link speed in the MAC configuration for a specific port. */
1027 static int sja1105_adjust_port_config(struct sja1105_private
*priv
, int port
,
1030 struct sja1105_mac_config_entry
*mac
;
1031 struct device
*dev
= priv
->ds
->dev
;
1035 /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
1036 * tables. On E/T, MAC reconfig tables are not readable, only writable.
1037 * We have to *know* what the MAC looks like. For the sake of keeping
1038 * the code common, we'll use the static configuration tables as a
1039 * reasonable approximation for both E/T and P/Q/R/S.
1041 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
1043 switch (speed_mbps
) {
1045 /* PHYLINK called sja1105_mac_config() to inform us about
1046 * the state->interface, but AN has not completed and the
1047 * speed is not yet valid. UM10944.pdf says that setting
1048 * SJA1105_SPEED_AUTO at runtime disables the port, so that is
1049 * ok for power consumption in case AN will never complete -
1050 * otherwise PHYLINK should come back with a new update.
1052 speed
= priv
->info
->port_speed
[SJA1105_SPEED_AUTO
];
1055 speed
= priv
->info
->port_speed
[SJA1105_SPEED_10MBPS
];
1058 speed
= priv
->info
->port_speed
[SJA1105_SPEED_100MBPS
];
1061 speed
= priv
->info
->port_speed
[SJA1105_SPEED_1000MBPS
];
1064 speed
= priv
->info
->port_speed
[SJA1105_SPEED_2500MBPS
];
1067 dev_err(dev
, "Invalid speed %iMbps\n", speed_mbps
);
1071 /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
1072 * table, since this will be used for the clocking setup, and we no
1073 * longer need to store it in the static config (already told hardware
1074 * we want auto during upload phase).
1075 * Actually for the SGMII port, the MAC is fixed at 1 Gbps and
1076 * we need to configure the PCS only (if even that).
1078 if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_SGMII
)
1079 mac
[port
].speed
= priv
->info
->port_speed
[SJA1105_SPEED_1000MBPS
];
1080 else if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_2500BASEX
)
1081 mac
[port
].speed
= priv
->info
->port_speed
[SJA1105_SPEED_2500MBPS
];
1083 mac
[port
].speed
= speed
;
1085 /* Write to the dynamic reconfiguration tables */
1086 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
1089 dev_err(dev
, "Failed to write MAC config: %d\n", rc
);
1093 /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
1094 * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
1095 * RMII no change of the clock setup is required. Actually, changing
1096 * the clock setup does interrupt the clock signal for a certain time
1097 * which causes trouble for all PHYs relying on this signal.
1099 if (!phy_interface_mode_is_rgmii(priv
->phy_mode
[port
]))
1102 return sja1105_clocking_setup_port(priv
, port
);
1105 /* The SJA1105 MAC programming model is through the static config (the xMII
1106 * Mode table cannot be dynamically reconfigured), and we have to program
1107 * that early (earlier than PHYLINK calls us, anyway).
1108 * So just error out in case the connected PHY attempts to change the initial
1109 * system interface MII protocol from what is defined in the DT, at least for
1112 static bool sja1105_phy_mode_mismatch(struct sja1105_private
*priv
, int port
,
1113 phy_interface_t interface
)
1115 return priv
->phy_mode
[port
] != interface
;
1118 static void sja1105_mac_config(struct dsa_switch
*ds
, int port
,
1120 const struct phylink_link_state
*state
)
1122 struct dsa_port
*dp
= dsa_to_port(ds
, port
);
1123 struct sja1105_private
*priv
= ds
->priv
;
1124 struct dw_xpcs
*xpcs
;
1126 if (sja1105_phy_mode_mismatch(priv
, port
, state
->interface
)) {
1127 dev_err(ds
->dev
, "Changing PHY mode to %s not supported!\n",
1128 phy_modes(state
->interface
));
1132 xpcs
= priv
->xpcs
[port
];
1135 phylink_set_pcs(dp
->pl
, &xpcs
->pcs
);
1138 static void sja1105_mac_link_down(struct dsa_switch
*ds
, int port
,
1140 phy_interface_t interface
)
1142 sja1105_inhibit_tx(ds
->priv
, BIT(port
), true);
1145 static void sja1105_mac_link_up(struct dsa_switch
*ds
, int port
,
1147 phy_interface_t interface
,
1148 struct phy_device
*phydev
,
1149 int speed
, int duplex
,
1150 bool tx_pause
, bool rx_pause
)
1152 struct sja1105_private
*priv
= ds
->priv
;
1154 sja1105_adjust_port_config(priv
, port
, speed
);
1156 sja1105_inhibit_tx(priv
, BIT(port
), false);
1159 static void sja1105_phylink_validate(struct dsa_switch
*ds
, int port
,
1160 unsigned long *supported
,
1161 struct phylink_link_state
*state
)
1163 /* Construct a new mask which exhaustively contains all link features
1164 * supported by the MAC, and then apply that (logical AND) to what will
1165 * be sent to the PHY for "marketing".
1167 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask
) = { 0, };
1168 struct sja1105_private
*priv
= ds
->priv
;
1169 struct sja1105_xmii_params_entry
*mii
;
1171 mii
= priv
->static_config
.tables
[BLK_IDX_XMII_PARAMS
].entries
;
1173 /* include/linux/phylink.h says:
1174 * When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
1175 * expects the MAC driver to return all supported link modes.
1177 if (state
->interface
!= PHY_INTERFACE_MODE_NA
&&
1178 sja1105_phy_mode_mismatch(priv
, port
, state
->interface
)) {
1179 bitmap_zero(supported
, __ETHTOOL_LINK_MODE_MASK_NBITS
);
1183 /* The MAC does not support pause frames, and also doesn't
1184 * support half-duplex traffic modes.
1186 phylink_set(mask
, Autoneg
);
1187 phylink_set(mask
, MII
);
1188 phylink_set(mask
, 10baseT_Full
);
1189 phylink_set(mask
, 100baseT_Full
);
1190 phylink_set(mask
, 100baseT1_Full
);
1191 if (mii
->xmii_mode
[port
] == XMII_MODE_RGMII
||
1192 mii
->xmii_mode
[port
] == XMII_MODE_SGMII
)
1193 phylink_set(mask
, 1000baseT_Full
);
1194 if (priv
->info
->supports_2500basex
[port
]) {
1195 phylink_set(mask
, 2500baseT_Full
);
1196 phylink_set(mask
, 2500baseX_Full
);
1199 bitmap_and(supported
, supported
, mask
, __ETHTOOL_LINK_MODE_MASK_NBITS
);
1200 bitmap_and(state
->advertising
, state
->advertising
, mask
,
1201 __ETHTOOL_LINK_MODE_MASK_NBITS
);
1205 sja1105_find_static_fdb_entry(struct sja1105_private
*priv
, int port
,
1206 const struct sja1105_l2_lookup_entry
*requested
)
1208 struct sja1105_l2_lookup_entry
*l2_lookup
;
1209 struct sja1105_table
*table
;
1212 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
1213 l2_lookup
= table
->entries
;
1215 for (i
= 0; i
< table
->entry_count
; i
++)
1216 if (l2_lookup
[i
].macaddr
== requested
->macaddr
&&
1217 l2_lookup
[i
].vlanid
== requested
->vlanid
&&
1218 l2_lookup
[i
].destports
& BIT(port
))
1224 /* We want FDB entries added statically through the bridge command to persist
1225 * across switch resets, which are a common thing during normal SJA1105
1226 * operation. So we have to back them up in the static configuration tables
1227 * and hence apply them on next static config upload... yay!
1230 sja1105_static_fdb_change(struct sja1105_private
*priv
, int port
,
1231 const struct sja1105_l2_lookup_entry
*requested
,
1234 struct sja1105_l2_lookup_entry
*l2_lookup
;
1235 struct sja1105_table
*table
;
1238 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
1240 match
= sja1105_find_static_fdb_entry(priv
, port
, requested
);
1242 /* Can't delete a missing entry. */
1246 /* No match => new entry */
1247 rc
= sja1105_table_resize(table
, table
->entry_count
+ 1);
1251 match
= table
->entry_count
- 1;
1254 /* Assign pointer after the resize (it may be new memory) */
1255 l2_lookup
= table
->entries
;
1258 * If the job was to add this FDB entry, it's already done (mostly
1259 * anyway, since the port forwarding mask may have changed, case in
1260 * which we update it).
1261 * Otherwise we have to delete it.
1264 l2_lookup
[match
] = *requested
;
1268 /* To remove, the strategy is to overwrite the element with
1269 * the last one, and then reduce the array size by 1
1271 l2_lookup
[match
] = l2_lookup
[table
->entry_count
- 1];
1272 return sja1105_table_resize(table
, table
->entry_count
- 1);
1275 /* First-generation switches have a 4-way set associative TCAM that
1276 * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
1277 * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
1278 * For the placement of a newly learnt FDB entry, the switch selects the bin
1279 * based on a hash function, and the way within that bin incrementally.
1281 static int sja1105et_fdb_index(int bin
, int way
)
1283 return bin
* SJA1105ET_FDB_BIN_SIZE
+ way
;
1286 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private
*priv
, int bin
,
1287 const u8
*addr
, u16 vid
,
1288 struct sja1105_l2_lookup_entry
*match
,
1293 for (way
= 0; way
< SJA1105ET_FDB_BIN_SIZE
; way
++) {
1294 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1295 int index
= sja1105et_fdb_index(bin
, way
);
1297 /* Skip unused entries, optionally marking them
1298 * into the return value
1300 if (sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1301 index
, &l2_lookup
)) {
1307 if (l2_lookup
.macaddr
== ether_addr_to_u64(addr
) &&
1308 l2_lookup
.vlanid
== vid
) {
1314 /* Return an invalid entry index if not found */
1318 int sja1105et_fdb_add(struct dsa_switch
*ds
, int port
,
1319 const unsigned char *addr
, u16 vid
)
1321 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1322 struct sja1105_private
*priv
= ds
->priv
;
1323 struct device
*dev
= ds
->dev
;
1324 int last_unused
= -1;
1327 bin
= sja1105et_fdb_hash(priv
, addr
, vid
);
1329 way
= sja1105et_is_fdb_entry_in_bin(priv
, bin
, addr
, vid
,
1330 &l2_lookup
, &last_unused
);
1332 /* We have an FDB entry. Is our port in the destination
1333 * mask? If yes, we need to do nothing. If not, we need
1334 * to rewrite the entry by adding this port to it.
1336 if (l2_lookup
.destports
& BIT(port
))
1338 l2_lookup
.destports
|= BIT(port
);
1340 int index
= sja1105et_fdb_index(bin
, way
);
1342 /* We don't have an FDB entry. We construct a new one and
1343 * try to find a place for it within the FDB table.
1345 l2_lookup
.macaddr
= ether_addr_to_u64(addr
);
1346 l2_lookup
.destports
= BIT(port
);
1347 l2_lookup
.vlanid
= vid
;
1349 if (last_unused
>= 0) {
1352 /* Bin is full, need to evict somebody.
1353 * Choose victim at random. If you get these messages
1354 * often, you may need to consider changing the
1355 * distribution function:
1356 * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
1358 get_random_bytes(&way
, sizeof(u8
));
1359 way
%= SJA1105ET_FDB_BIN_SIZE
;
1360 dev_warn(dev
, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
1363 sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1364 index
, NULL
, false);
1367 l2_lookup
.index
= sja1105et_fdb_index(bin
, way
);
1369 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1370 l2_lookup
.index
, &l2_lookup
,
1375 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, true);
1378 int sja1105et_fdb_del(struct dsa_switch
*ds
, int port
,
1379 const unsigned char *addr
, u16 vid
)
1381 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1382 struct sja1105_private
*priv
= ds
->priv
;
1383 int index
, bin
, way
, rc
;
1386 bin
= sja1105et_fdb_hash(priv
, addr
, vid
);
1387 way
= sja1105et_is_fdb_entry_in_bin(priv
, bin
, addr
, vid
,
1391 index
= sja1105et_fdb_index(bin
, way
);
1393 /* We have an FDB entry. Is our port in the destination mask? If yes,
1394 * we need to remove it. If the resulting port mask becomes empty, we
1395 * need to completely evict the FDB entry.
1396 * Otherwise we just write it back.
1398 l2_lookup
.destports
&= ~BIT(port
);
1400 if (l2_lookup
.destports
)
1405 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1406 index
, &l2_lookup
, keep
);
1410 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, keep
);
1413 int sja1105pqrs_fdb_add(struct dsa_switch
*ds
, int port
,
1414 const unsigned char *addr
, u16 vid
)
1416 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1417 struct sja1105_private
*priv
= ds
->priv
;
1420 /* Search for an existing entry in the FDB table */
1421 l2_lookup
.macaddr
= ether_addr_to_u64(addr
);
1422 l2_lookup
.vlanid
= vid
;
1423 l2_lookup
.iotag
= SJA1105_S_TAG
;
1424 l2_lookup
.mask_macaddr
= GENMASK_ULL(ETH_ALEN
* 8 - 1, 0);
1425 if (priv
->vlan_state
!= SJA1105_VLAN_UNAWARE
) {
1426 l2_lookup
.mask_vlanid
= VLAN_VID_MASK
;
1427 l2_lookup
.mask_iotag
= BIT(0);
1429 l2_lookup
.mask_vlanid
= 0;
1430 l2_lookup
.mask_iotag
= 0;
1432 l2_lookup
.destports
= BIT(port
);
1434 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1435 SJA1105_SEARCH
, &l2_lookup
);
1437 /* Found and this port is already in the entry's
1438 * port mask => job done
1440 if (l2_lookup
.destports
& BIT(port
))
1442 /* l2_lookup.index is populated by the switch in case it
1445 l2_lookup
.destports
|= BIT(port
);
1446 goto skip_finding_an_index
;
1449 /* Not found, so try to find an unused spot in the FDB.
1450 * This is slightly inefficient because the strategy is knock-knock at
1451 * every possible position from 0 to 1023.
1453 for (i
= 0; i
< SJA1105_MAX_L2_LOOKUP_COUNT
; i
++) {
1454 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1459 if (i
== SJA1105_MAX_L2_LOOKUP_COUNT
) {
1460 dev_err(ds
->dev
, "FDB is full, cannot add entry.\n");
1463 l2_lookup
.lockeds
= true;
1464 l2_lookup
.index
= i
;
1466 skip_finding_an_index
:
1467 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1468 l2_lookup
.index
, &l2_lookup
,
1473 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, true);
1476 int sja1105pqrs_fdb_del(struct dsa_switch
*ds
, int port
,
1477 const unsigned char *addr
, u16 vid
)
1479 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1480 struct sja1105_private
*priv
= ds
->priv
;
1484 l2_lookup
.macaddr
= ether_addr_to_u64(addr
);
1485 l2_lookup
.vlanid
= vid
;
1486 l2_lookup
.iotag
= SJA1105_S_TAG
;
1487 l2_lookup
.mask_macaddr
= GENMASK_ULL(ETH_ALEN
* 8 - 1, 0);
1488 if (priv
->vlan_state
!= SJA1105_VLAN_UNAWARE
) {
1489 l2_lookup
.mask_vlanid
= VLAN_VID_MASK
;
1490 l2_lookup
.mask_iotag
= BIT(0);
1492 l2_lookup
.mask_vlanid
= 0;
1493 l2_lookup
.mask_iotag
= 0;
1495 l2_lookup
.destports
= BIT(port
);
1497 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1498 SJA1105_SEARCH
, &l2_lookup
);
1502 l2_lookup
.destports
&= ~BIT(port
);
1504 /* Decide whether we remove just this port from the FDB entry,
1505 * or if we remove it completely.
1507 if (l2_lookup
.destports
)
1512 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1513 l2_lookup
.index
, &l2_lookup
, keep
);
1517 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, keep
);
1520 static int sja1105_fdb_add(struct dsa_switch
*ds
, int port
,
1521 const unsigned char *addr
, u16 vid
)
1523 struct sja1105_private
*priv
= ds
->priv
;
1525 /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1526 * so the switch still does some VLAN processing internally.
1527 * But Shared VLAN Learning (SVL) is also active, and it will take
1528 * care of autonomous forwarding between the unique pvid's of each
1529 * port. Here we just make sure that users can't add duplicate FDB
1530 * entries when in this mode - the actual VID doesn't matter except
1531 * for what gets printed in 'bridge fdb show'. In the case of zero,
1532 * no VID gets printed at all.
1534 if (priv
->vlan_state
!= SJA1105_VLAN_FILTERING_FULL
)
1537 return priv
->info
->fdb_add_cmd(ds
, port
, addr
, vid
);
1540 static int sja1105_fdb_del(struct dsa_switch
*ds
, int port
,
1541 const unsigned char *addr
, u16 vid
)
1543 struct sja1105_private
*priv
= ds
->priv
;
1545 if (priv
->vlan_state
!= SJA1105_VLAN_FILTERING_FULL
)
1548 return priv
->info
->fdb_del_cmd(ds
, port
, addr
, vid
);
1551 static int sja1105_fdb_dump(struct dsa_switch
*ds
, int port
,
1552 dsa_fdb_dump_cb_t
*cb
, void *data
)
1554 struct sja1105_private
*priv
= ds
->priv
;
1555 struct device
*dev
= ds
->dev
;
1558 for (i
= 0; i
< SJA1105_MAX_L2_LOOKUP_COUNT
; i
++) {
1559 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1560 u8 macaddr
[ETH_ALEN
];
1563 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1565 /* No fdb entry at i, not an issue */
1569 dev_err(dev
, "Failed to dump FDB: %d\n", rc
);
1573 /* FDB dump callback is per port. This means we have to
1574 * disregard a valid entry if it's not for this port, even if
1575 * only to revisit it later. This is inefficient because the
1576 * 1024-sized FDB table needs to be traversed 4 times through
1577 * SPI during a 'bridge fdb show' command.
1579 if (!(l2_lookup
.destports
& BIT(port
)))
1582 /* We need to hide the FDB entry for unknown multicast */
1583 if (l2_lookup
.macaddr
== SJA1105_UNKNOWN_MULTICAST
&&
1584 l2_lookup
.mask_macaddr
== SJA1105_UNKNOWN_MULTICAST
)
1587 u64_to_ether_addr(l2_lookup
.macaddr
, macaddr
);
1589 /* We need to hide the dsa_8021q VLANs from the user. */
1590 if (priv
->vlan_state
== SJA1105_VLAN_UNAWARE
)
1591 l2_lookup
.vlanid
= 0;
1592 cb(macaddr
, l2_lookup
.vlanid
, l2_lookup
.lockeds
, data
);
1597 static int sja1105_mdb_add(struct dsa_switch
*ds
, int port
,
1598 const struct switchdev_obj_port_mdb
*mdb
)
1600 return sja1105_fdb_add(ds
, port
, mdb
->addr
, mdb
->vid
);
1603 static int sja1105_mdb_del(struct dsa_switch
*ds
, int port
,
1604 const struct switchdev_obj_port_mdb
*mdb
)
1606 return sja1105_fdb_del(ds
, port
, mdb
->addr
, mdb
->vid
);
1609 /* Common function for unicast and broadcast flood configuration.
1610 * Flooding is configured between each {ingress, egress} port pair, and since
1611 * the bridge's semantics are those of "egress flooding", it means we must
1612 * enable flooding towards this port from all ingress ports that are in the
1613 * same forwarding domain.
1615 static int sja1105_manage_flood_domains(struct sja1105_private
*priv
)
1617 struct sja1105_l2_forwarding_entry
*l2_fwd
;
1618 struct dsa_switch
*ds
= priv
->ds
;
1621 l2_fwd
= priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING
].entries
;
1623 for (from
= 0; from
< ds
->num_ports
; from
++) {
1624 u64 fl_domain
= 0, bc_domain
= 0;
1626 for (to
= 0; to
< priv
->ds
->num_ports
; to
++) {
1627 if (!sja1105_can_forward(l2_fwd
, from
, to
))
1630 if (priv
->ucast_egress_floods
& BIT(to
))
1631 fl_domain
|= BIT(to
);
1632 if (priv
->bcast_egress_floods
& BIT(to
))
1633 bc_domain
|= BIT(to
);
1636 /* Nothing changed, nothing to do */
1637 if (l2_fwd
[from
].fl_domain
== fl_domain
&&
1638 l2_fwd
[from
].bc_domain
== bc_domain
)
1641 l2_fwd
[from
].fl_domain
= fl_domain
;
1642 l2_fwd
[from
].bc_domain
= bc_domain
;
1644 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_FORWARDING
,
1645 from
, &l2_fwd
[from
], true);
1653 static int sja1105_bridge_member(struct dsa_switch
*ds
, int port
,
1654 struct net_device
*br
, bool member
)
1656 struct sja1105_l2_forwarding_entry
*l2_fwd
;
1657 struct sja1105_private
*priv
= ds
->priv
;
1660 l2_fwd
= priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING
].entries
;
1662 for (i
= 0; i
< ds
->num_ports
; i
++) {
1663 /* Add this port to the forwarding matrix of the
1664 * other ports in the same bridge, and viceversa.
1666 if (!dsa_is_user_port(ds
, i
))
1668 /* For the ports already under the bridge, only one thing needs
1669 * to be done, and that is to add this port to their
1670 * reachability domain. So we can perform the SPI write for
1671 * them immediately. However, for this port itself (the one
1672 * that is new to the bridge), we need to add all other ports
1673 * to its reachability domain. So we do that incrementally in
1674 * this loop, and perform the SPI write only at the end, once
1675 * the domain contains all other bridge ports.
1679 if (dsa_to_port(ds
, i
)->bridge_dev
!= br
)
1681 sja1105_port_allow_traffic(l2_fwd
, i
, port
, member
);
1682 sja1105_port_allow_traffic(l2_fwd
, port
, i
, member
);
1684 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_FORWARDING
,
1685 i
, &l2_fwd
[i
], true);
1690 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_FORWARDING
,
1691 port
, &l2_fwd
[port
], true);
1695 return sja1105_manage_flood_domains(priv
);
1698 static void sja1105_bridge_stp_state_set(struct dsa_switch
*ds
, int port
,
1701 struct sja1105_private
*priv
= ds
->priv
;
1702 struct sja1105_mac_config_entry
*mac
;
1704 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
1707 case BR_STATE_DISABLED
:
1708 case BR_STATE_BLOCKING
:
1709 /* From UM10944 description of DRPDTAG (why put this there?):
1710 * "Management traffic flows to the port regardless of the state
1711 * of the INGRESS flag". So BPDUs are still be allowed to pass.
1712 * At the moment no difference between DISABLED and BLOCKING.
1714 mac
[port
].ingress
= false;
1715 mac
[port
].egress
= false;
1716 mac
[port
].dyn_learn
= false;
1718 case BR_STATE_LISTENING
:
1719 mac
[port
].ingress
= true;
1720 mac
[port
].egress
= false;
1721 mac
[port
].dyn_learn
= false;
1723 case BR_STATE_LEARNING
:
1724 mac
[port
].ingress
= true;
1725 mac
[port
].egress
= false;
1726 mac
[port
].dyn_learn
= !!(priv
->learn_ena
& BIT(port
));
1728 case BR_STATE_FORWARDING
:
1729 mac
[port
].ingress
= true;
1730 mac
[port
].egress
= true;
1731 mac
[port
].dyn_learn
= !!(priv
->learn_ena
& BIT(port
));
1734 dev_err(ds
->dev
, "invalid STP state: %d\n", state
);
1738 sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
1742 static int sja1105_bridge_join(struct dsa_switch
*ds
, int port
,
1743 struct net_device
*br
)
1745 return sja1105_bridge_member(ds
, port
, br
, true);
1748 static void sja1105_bridge_leave(struct dsa_switch
*ds
, int port
,
1749 struct net_device
*br
)
1751 sja1105_bridge_member(ds
, port
, br
, false);
1754 #define BYTES_PER_KBIT (1000LL / 8)
1756 static int sja1105_find_unused_cbs_shaper(struct sja1105_private
*priv
)
1760 for (i
= 0; i
< priv
->info
->num_cbs_shapers
; i
++)
1761 if (!priv
->cbs
[i
].idle_slope
&& !priv
->cbs
[i
].send_slope
)
1767 static int sja1105_delete_cbs_shaper(struct sja1105_private
*priv
, int port
,
1772 for (i
= 0; i
< priv
->info
->num_cbs_shapers
; i
++) {
1773 struct sja1105_cbs_entry
*cbs
= &priv
->cbs
[i
];
1775 if (cbs
->port
== port
&& cbs
->prio
== prio
) {
1776 memset(cbs
, 0, sizeof(*cbs
));
1777 return sja1105_dynamic_config_write(priv
, BLK_IDX_CBS
,
1785 static int sja1105_setup_tc_cbs(struct dsa_switch
*ds
, int port
,
1786 struct tc_cbs_qopt_offload
*offload
)
1788 struct sja1105_private
*priv
= ds
->priv
;
1789 struct sja1105_cbs_entry
*cbs
;
1792 if (!offload
->enable
)
1793 return sja1105_delete_cbs_shaper(priv
, port
, offload
->queue
);
1795 index
= sja1105_find_unused_cbs_shaper(priv
);
1799 cbs
= &priv
->cbs
[index
];
1801 cbs
->prio
= offload
->queue
;
1802 /* locredit and sendslope are negative by definition. In hardware,
1803 * positive values must be provided, and the negative sign is implicit.
1805 cbs
->credit_hi
= offload
->hicredit
;
1806 cbs
->credit_lo
= abs(offload
->locredit
);
1807 /* User space is in kbits/sec, hardware in bytes/sec */
1808 cbs
->idle_slope
= offload
->idleslope
* BYTES_PER_KBIT
;
1809 cbs
->send_slope
= abs(offload
->sendslope
* BYTES_PER_KBIT
);
1810 /* Convert the negative values from 64-bit 2's complement
1811 * to 32-bit 2's complement (for the case of 0x80000000 whose
1812 * negative is still negative).
1814 cbs
->credit_lo
&= GENMASK_ULL(31, 0);
1815 cbs
->send_slope
&= GENMASK_ULL(31, 0);
1817 return sja1105_dynamic_config_write(priv
, BLK_IDX_CBS
, index
, cbs
,
1821 static int sja1105_reload_cbs(struct sja1105_private
*priv
)
1825 /* The credit based shapers are only allocated if
1826 * CONFIG_NET_SCH_CBS is enabled.
1831 for (i
= 0; i
< priv
->info
->num_cbs_shapers
; i
++) {
1832 struct sja1105_cbs_entry
*cbs
= &priv
->cbs
[i
];
1834 if (!cbs
->idle_slope
&& !cbs
->send_slope
)
1837 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_CBS
, i
, cbs
,
1846 static const char * const sja1105_reset_reasons
[] = {
1847 [SJA1105_VLAN_FILTERING
] = "VLAN filtering",
1848 [SJA1105_RX_HWTSTAMPING
] = "RX timestamping",
1849 [SJA1105_AGEING_TIME
] = "Ageing time",
1850 [SJA1105_SCHEDULING
] = "Time-aware scheduling",
1851 [SJA1105_BEST_EFFORT_POLICING
] = "Best-effort policing",
1852 [SJA1105_VIRTUAL_LINKS
] = "Virtual links",
1855 /* For situations where we need to change a setting at runtime that is only
1856 * available through the static configuration, resetting the switch in order
1857 * to upload the new static config is unavoidable. Back up the settings we
1858 * modify at runtime (currently only MAC) and restore them after uploading,
1859 * such that this operation is relatively seamless.
1861 int sja1105_static_config_reload(struct sja1105_private
*priv
,
1862 enum sja1105_reset_reason reason
)
1864 struct ptp_system_timestamp ptp_sts_before
;
1865 struct ptp_system_timestamp ptp_sts_after
;
1866 int speed_mbps
[SJA1105_MAX_NUM_PORTS
];
1867 u16 bmcr
[SJA1105_MAX_NUM_PORTS
] = {0};
1868 struct sja1105_mac_config_entry
*mac
;
1869 struct dsa_switch
*ds
= priv
->ds
;
1875 mutex_lock(&priv
->mgmt_lock
);
1877 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
1879 /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1880 * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1881 * switch wants to see in the static config in order to allow us to
1882 * change it through the dynamic interface later.
1884 for (i
= 0; i
< ds
->num_ports
; i
++) {
1885 u32 reg_addr
= mdiobus_c45_addr(MDIO_MMD_VEND2
, MDIO_CTRL1
);
1887 speed_mbps
[i
] = sja1105_port_speed_to_ethtool(priv
,
1889 mac
[i
].speed
= priv
->info
->port_speed
[SJA1105_SPEED_AUTO
];
1892 bmcr
[i
] = mdiobus_read(priv
->mdio_pcs
, i
, reg_addr
);
1895 /* No PTP operations can run right now */
1896 mutex_lock(&priv
->ptp_data
.lock
);
1898 rc
= __sja1105_ptp_gettimex(ds
, &now
, &ptp_sts_before
);
1900 mutex_unlock(&priv
->ptp_data
.lock
);
1904 /* Reset switch and send updated static configuration */
1905 rc
= sja1105_static_config_upload(priv
);
1907 mutex_unlock(&priv
->ptp_data
.lock
);
1911 rc
= __sja1105_ptp_settime(ds
, 0, &ptp_sts_after
);
1913 mutex_unlock(&priv
->ptp_data
.lock
);
1917 t1
= timespec64_to_ns(&ptp_sts_before
.pre_ts
);
1918 t2
= timespec64_to_ns(&ptp_sts_before
.post_ts
);
1919 t3
= timespec64_to_ns(&ptp_sts_after
.pre_ts
);
1920 t4
= timespec64_to_ns(&ptp_sts_after
.post_ts
);
1921 /* Mid point, corresponds to pre-reset PTPCLKVAL */
1922 t12
= t1
+ (t2
- t1
) / 2;
1923 /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */
1924 t34
= t3
+ (t4
- t3
) / 2;
1925 /* Advance PTPCLKVAL by the time it took since its readout */
1928 __sja1105_ptp_adjtime(ds
, now
);
1930 mutex_unlock(&priv
->ptp_data
.lock
);
1932 dev_info(priv
->ds
->dev
,
1933 "Reset switch and programmed static config. Reason: %s\n",
1934 sja1105_reset_reasons
[reason
]);
1936 /* Configure the CGU (PLLs) for MII and RMII PHYs.
1937 * For these interfaces there is no dynamic configuration
1938 * needed, since PLLs have same settings at all speeds.
1940 if (priv
->info
->clocking_setup
) {
1941 rc
= priv
->info
->clocking_setup(priv
);
1946 for (i
= 0; i
< ds
->num_ports
; i
++) {
1947 struct dw_xpcs
*xpcs
= priv
->xpcs
[i
];
1950 rc
= sja1105_adjust_port_config(priv
, i
, speed_mbps
[i
]);
1957 if (bmcr
[i
] & BMCR_ANENABLE
)
1958 mode
= MLO_AN_INBAND
;
1959 else if (priv
->fixed_link
[i
])
1960 mode
= MLO_AN_FIXED
;
1964 rc
= xpcs_do_config(xpcs
, priv
->phy_mode
[i
], mode
);
1968 if (!phylink_autoneg_inband(mode
)) {
1969 int speed
= SPEED_UNKNOWN
;
1971 if (priv
->phy_mode
[i
] == PHY_INTERFACE_MODE_2500BASEX
)
1973 else if (bmcr
[i
] & BMCR_SPEED1000
)
1975 else if (bmcr
[i
] & BMCR_SPEED100
)
1980 xpcs_link_up(&xpcs
->pcs
, mode
, priv
->phy_mode
[i
],
1981 speed
, DUPLEX_FULL
);
1985 rc
= sja1105_reload_cbs(priv
);
1989 mutex_unlock(&priv
->mgmt_lock
);
1994 static int sja1105_pvid_apply(struct sja1105_private
*priv
, int port
, u16 pvid
)
1996 struct sja1105_mac_config_entry
*mac
;
1998 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
2000 mac
[port
].vlanid
= pvid
;
2002 return sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
2006 static int sja1105_crosschip_bridge_join(struct dsa_switch
*ds
,
2007 int tree_index
, int sw_index
,
2008 int other_port
, struct net_device
*br
)
2010 struct dsa_switch
*other_ds
= dsa_switch_find(tree_index
, sw_index
);
2011 struct sja1105_private
*other_priv
= other_ds
->priv
;
2012 struct sja1105_private
*priv
= ds
->priv
;
2015 if (other_ds
->ops
!= &sja1105_switch_ops
)
2018 for (port
= 0; port
< ds
->num_ports
; port
++) {
2019 if (!dsa_is_user_port(ds
, port
))
2021 if (dsa_to_port(ds
, port
)->bridge_dev
!= br
)
2024 rc
= dsa_8021q_crosschip_bridge_join(priv
->dsa_8021q_ctx
,
2026 other_priv
->dsa_8021q_ctx
,
2031 rc
= dsa_8021q_crosschip_bridge_join(other_priv
->dsa_8021q_ctx
,
2033 priv
->dsa_8021q_ctx
,
2042 static void sja1105_crosschip_bridge_leave(struct dsa_switch
*ds
,
2043 int tree_index
, int sw_index
,
2045 struct net_device
*br
)
2047 struct dsa_switch
*other_ds
= dsa_switch_find(tree_index
, sw_index
);
2048 struct sja1105_private
*other_priv
= other_ds
->priv
;
2049 struct sja1105_private
*priv
= ds
->priv
;
2052 if (other_ds
->ops
!= &sja1105_switch_ops
)
2055 for (port
= 0; port
< ds
->num_ports
; port
++) {
2056 if (!dsa_is_user_port(ds
, port
))
2058 if (dsa_to_port(ds
, port
)->bridge_dev
!= br
)
2061 dsa_8021q_crosschip_bridge_leave(priv
->dsa_8021q_ctx
, port
,
2062 other_priv
->dsa_8021q_ctx
,
2065 dsa_8021q_crosschip_bridge_leave(other_priv
->dsa_8021q_ctx
,
2067 priv
->dsa_8021q_ctx
, port
);
2071 static int sja1105_setup_8021q_tagging(struct dsa_switch
*ds
, bool enabled
)
2073 struct sja1105_private
*priv
= ds
->priv
;
2076 rc
= dsa_8021q_setup(priv
->dsa_8021q_ctx
, enabled
);
2080 dev_info(ds
->dev
, "%s switch tagging\n",
2081 enabled
? "Enabled" : "Disabled");
2085 static enum dsa_tag_protocol
2086 sja1105_get_tag_protocol(struct dsa_switch
*ds
, int port
,
2087 enum dsa_tag_protocol mp
)
2089 struct sja1105_private
*priv
= ds
->priv
;
2091 return priv
->info
->tag_proto
;
2094 static int sja1105_find_free_subvlan(u16
*subvlan_map
, bool pvid
)
2101 for (subvlan
= 1; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2102 if (subvlan_map
[subvlan
] == VLAN_N_VID
)
2108 static int sja1105_find_subvlan(u16
*subvlan_map
, u16 vid
)
2112 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2113 if (subvlan_map
[subvlan
] == vid
)
2119 static int sja1105_find_committed_subvlan(struct sja1105_private
*priv
,
2122 struct sja1105_port
*sp
= &priv
->ports
[port
];
2124 return sja1105_find_subvlan(sp
->subvlan_map
, vid
);
2127 static void sja1105_init_subvlan_map(u16
*subvlan_map
)
2131 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2132 subvlan_map
[subvlan
] = VLAN_N_VID
;
2135 static void sja1105_commit_subvlan_map(struct sja1105_private
*priv
, int port
,
2138 struct sja1105_port
*sp
= &priv
->ports
[port
];
2141 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2142 sp
->subvlan_map
[subvlan
] = subvlan_map
[subvlan
];
2145 static int sja1105_is_vlan_configured(struct sja1105_private
*priv
, u16 vid
)
2147 struct sja1105_vlan_lookup_entry
*vlan
;
2150 vlan
= priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
].entries
;
2151 count
= priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
].entry_count
;
2153 for (i
= 0; i
< count
; i
++)
2154 if (vlan
[i
].vlanid
== vid
)
2157 /* Return an invalid entry index if not found */
2162 sja1105_find_retagging_entry(struct sja1105_retagging_entry
*retagging
,
2163 int count
, int from_port
, u16 from_vid
,
2168 for (i
= 0; i
< count
; i
++)
2169 if (retagging
[i
].ing_port
== BIT(from_port
) &&
2170 retagging
[i
].vlan_ing
== from_vid
&&
2171 retagging
[i
].vlan_egr
== to_vid
)
2174 /* Return an invalid entry index if not found */
2178 static int sja1105_commit_vlans(struct sja1105_private
*priv
,
2179 struct sja1105_vlan_lookup_entry
*new_vlan
,
2180 struct sja1105_retagging_entry
*new_retagging
,
2183 struct sja1105_retagging_entry
*retagging
;
2184 struct sja1105_vlan_lookup_entry
*vlan
;
2185 struct sja1105_table
*table
;
2190 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
2191 vlan
= table
->entries
;
2193 for (i
= 0; i
< VLAN_N_VID
; i
++) {
2194 int match
= sja1105_is_vlan_configured(priv
, i
);
2196 if (new_vlan
[i
].vlanid
!= VLAN_N_VID
)
2199 if (new_vlan
[i
].vlanid
== VLAN_N_VID
&& match
>= 0) {
2200 /* Was there before, no longer is. Delete */
2201 dev_dbg(priv
->ds
->dev
, "Deleting VLAN %d\n", i
);
2202 rc
= sja1105_dynamic_config_write(priv
,
2203 BLK_IDX_VLAN_LOOKUP
,
2204 i
, &vlan
[match
], false);
2207 } else if (new_vlan
[i
].vlanid
!= VLAN_N_VID
) {
2208 /* Nothing changed, don't do anything */
2210 vlan
[match
].vlanid
== new_vlan
[i
].vlanid
&&
2211 vlan
[match
].tag_port
== new_vlan
[i
].tag_port
&&
2212 vlan
[match
].vlan_bc
== new_vlan
[i
].vlan_bc
&&
2213 vlan
[match
].vmemb_port
== new_vlan
[i
].vmemb_port
)
2216 dev_dbg(priv
->ds
->dev
, "Updating VLAN %d\n", i
);
2217 rc
= sja1105_dynamic_config_write(priv
,
2218 BLK_IDX_VLAN_LOOKUP
,
2226 if (table
->entry_count
)
2227 kfree(table
->entries
);
2229 table
->entries
= kcalloc(num_vlans
, table
->ops
->unpacked_entry_size
,
2231 if (!table
->entries
)
2234 table
->entry_count
= num_vlans
;
2235 vlan
= table
->entries
;
2237 for (i
= 0; i
< VLAN_N_VID
; i
++) {
2238 if (new_vlan
[i
].vlanid
== VLAN_N_VID
)
2240 vlan
[k
++] = new_vlan
[i
];
2243 /* VLAN Retagging Table */
2244 table
= &priv
->static_config
.tables
[BLK_IDX_RETAGGING
];
2245 retagging
= table
->entries
;
2247 for (i
= 0; i
< table
->entry_count
; i
++) {
2248 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_RETAGGING
,
2249 i
, &retagging
[i
], false);
2254 if (table
->entry_count
)
2255 kfree(table
->entries
);
2257 table
->entries
= kcalloc(num_retagging
, table
->ops
->unpacked_entry_size
,
2259 if (!table
->entries
)
2262 table
->entry_count
= num_retagging
;
2263 retagging
= table
->entries
;
2265 for (i
= 0; i
< num_retagging
; i
++) {
2266 retagging
[i
] = new_retagging
[i
];
2269 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_RETAGGING
,
2270 i
, &retagging
[i
], true);
2278 struct sja1105_crosschip_vlan
{
2279 struct list_head list
;
2284 struct dsa_8021q_context
*other_ctx
;
2287 struct sja1105_crosschip_switch
{
2288 struct list_head list
;
2289 struct dsa_8021q_context
*other_ctx
;
2292 static int sja1105_commit_pvid(struct sja1105_private
*priv
)
2294 struct sja1105_bridge_vlan
*v
;
2295 struct list_head
*vlan_list
;
2298 if (priv
->vlan_state
== SJA1105_VLAN_FILTERING_FULL
)
2299 vlan_list
= &priv
->bridge_vlans
;
2301 vlan_list
= &priv
->dsa_8021q_vlans
;
2303 list_for_each_entry(v
, vlan_list
, list
) {
2305 rc
= sja1105_pvid_apply(priv
, v
->port
, v
->vid
);
2315 sja1105_build_bridge_vlans(struct sja1105_private
*priv
,
2316 struct sja1105_vlan_lookup_entry
*new_vlan
)
2318 struct sja1105_bridge_vlan
*v
;
2320 if (priv
->vlan_state
== SJA1105_VLAN_UNAWARE
)
2323 list_for_each_entry(v
, &priv
->bridge_vlans
, list
) {
2326 new_vlan
[match
].vlanid
= v
->vid
;
2327 new_vlan
[match
].vmemb_port
|= BIT(v
->port
);
2328 new_vlan
[match
].vlan_bc
|= BIT(v
->port
);
2330 new_vlan
[match
].tag_port
|= BIT(v
->port
);
2331 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2338 sja1105_build_dsa_8021q_vlans(struct sja1105_private
*priv
,
2339 struct sja1105_vlan_lookup_entry
*new_vlan
)
2341 struct sja1105_bridge_vlan
*v
;
2343 if (priv
->vlan_state
== SJA1105_VLAN_FILTERING_FULL
)
2346 list_for_each_entry(v
, &priv
->dsa_8021q_vlans
, list
) {
2349 new_vlan
[match
].vlanid
= v
->vid
;
2350 new_vlan
[match
].vmemb_port
|= BIT(v
->port
);
2351 new_vlan
[match
].vlan_bc
|= BIT(v
->port
);
2353 new_vlan
[match
].tag_port
|= BIT(v
->port
);
2354 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2360 static int sja1105_build_subvlans(struct sja1105_private
*priv
,
2361 u16 subvlan_map
[][DSA_8021Q_N_SUBVLAN
],
2362 struct sja1105_vlan_lookup_entry
*new_vlan
,
2363 struct sja1105_retagging_entry
*new_retagging
,
2366 struct sja1105_bridge_vlan
*v
;
2367 int k
= *num_retagging
;
2369 if (priv
->vlan_state
!= SJA1105_VLAN_BEST_EFFORT
)
2372 list_for_each_entry(v
, &priv
->bridge_vlans
, list
) {
2373 int upstream
= dsa_upstream_port(priv
->ds
, v
->port
);
2377 /* Only sub-VLANs on user ports need to be applied.
2378 * Bridge VLANs also include VLANs added automatically
2379 * by DSA on the CPU port.
2381 if (!dsa_is_user_port(priv
->ds
, v
->port
))
2384 subvlan
= sja1105_find_subvlan(subvlan_map
[v
->port
],
2387 subvlan
= sja1105_find_free_subvlan(subvlan_map
[v
->port
],
2390 dev_err(priv
->ds
->dev
, "No more free subvlans\n");
2395 rx_vid
= dsa_8021q_rx_vid_subvlan(priv
->ds
, v
->port
, subvlan
);
2397 /* @v->vid on @v->port needs to be retagged to @rx_vid
2398 * on @upstream. Assume @v->vid on @v->port and on
2399 * @upstream was already configured by the previous
2400 * iteration over bridge_vlans.
2403 new_vlan
[match
].vlanid
= rx_vid
;
2404 new_vlan
[match
].vmemb_port
|= BIT(v
->port
);
2405 new_vlan
[match
].vmemb_port
|= BIT(upstream
);
2406 new_vlan
[match
].vlan_bc
|= BIT(v
->port
);
2407 new_vlan
[match
].vlan_bc
|= BIT(upstream
);
2408 /* The "untagged" flag is set the same as for the
2412 new_vlan
[match
].tag_port
|= BIT(v
->port
);
2413 /* But it's always tagged towards the CPU */
2414 new_vlan
[match
].tag_port
|= BIT(upstream
);
2415 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2417 /* The Retagging Table generates packet *clones* with
2418 * the new VLAN. This is a very odd hardware quirk
2419 * which we need to suppress by dropping the original
2421 * Deny egress of the original VLAN towards the CPU
2422 * port. This will force the switch to drop it, and
2423 * we'll see only the retagged packets.
2426 new_vlan
[match
].vlan_bc
&= ~BIT(upstream
);
2428 /* And the retagging itself */
2429 new_retagging
[k
].vlan_ing
= v
->vid
;
2430 new_retagging
[k
].vlan_egr
= rx_vid
;
2431 new_retagging
[k
].ing_port
= BIT(v
->port
);
2432 new_retagging
[k
].egr_port
= BIT(upstream
);
2433 if (k
++ == SJA1105_MAX_RETAGGING_COUNT
) {
2434 dev_err(priv
->ds
->dev
, "No more retagging rules\n");
2438 subvlan_map
[v
->port
][subvlan
] = v
->vid
;
2446 /* Sadly, in crosschip scenarios where the CPU port is also the link to another
2447 * switch, we should retag backwards (the dsa_8021q vid to the original vid) on
2448 * the CPU port of neighbour switches.
2451 sja1105_build_crosschip_subvlans(struct sja1105_private
*priv
,
2452 struct sja1105_vlan_lookup_entry
*new_vlan
,
2453 struct sja1105_retagging_entry
*new_retagging
,
2456 struct sja1105_crosschip_vlan
*tmp
, *pos
;
2457 struct dsa_8021q_crosschip_link
*c
;
2458 struct sja1105_bridge_vlan
*v
, *w
;
2459 struct list_head crosschip_vlans
;
2460 int k
= *num_retagging
;
2463 if (priv
->vlan_state
!= SJA1105_VLAN_BEST_EFFORT
)
2466 INIT_LIST_HEAD(&crosschip_vlans
);
2468 list_for_each_entry(c
, &priv
->dsa_8021q_ctx
->crosschip_links
, list
) {
2469 struct sja1105_private
*other_priv
= c
->other_ctx
->ds
->priv
;
2471 if (other_priv
->vlan_state
== SJA1105_VLAN_FILTERING_FULL
)
2474 /* Crosschip links are also added to the CPU ports.
2477 if (!dsa_is_user_port(priv
->ds
, c
->port
))
2479 if (!dsa_is_user_port(c
->other_ctx
->ds
, c
->other_port
))
2482 /* Search for VLANs on the remote port */
2483 list_for_each_entry(v
, &other_priv
->bridge_vlans
, list
) {
2484 bool already_added
= false;
2485 bool we_have_it
= false;
2487 if (v
->port
!= c
->other_port
)
2490 /* If @v is a pvid on @other_ds, it does not need
2491 * re-retagging, because its SVL field is 0 and we
2492 * already allow that, via the dsa_8021q crosschip
2498 /* Search for the VLAN on our local port */
2499 list_for_each_entry(w
, &priv
->bridge_vlans
, list
) {
2500 if (w
->port
== c
->port
&& w
->vid
== v
->vid
) {
2509 list_for_each_entry(tmp
, &crosschip_vlans
, list
) {
2510 if (tmp
->vid
== v
->vid
&&
2511 tmp
->untagged
== v
->untagged
&&
2512 tmp
->port
== c
->port
&&
2513 tmp
->other_port
== v
->port
&&
2514 tmp
->other_ctx
== c
->other_ctx
) {
2515 already_added
= true;
2523 tmp
= kzalloc(sizeof(*tmp
), GFP_KERNEL
);
2525 dev_err(priv
->ds
->dev
, "Failed to allocate memory\n");
2530 tmp
->port
= c
->port
;
2531 tmp
->other_port
= v
->port
;
2532 tmp
->other_ctx
= c
->other_ctx
;
2533 tmp
->untagged
= v
->untagged
;
2534 list_add(&tmp
->list
, &crosschip_vlans
);
2538 list_for_each_entry(tmp
, &crosschip_vlans
, list
) {
2539 struct sja1105_private
*other_priv
= tmp
->other_ctx
->ds
->priv
;
2540 int upstream
= dsa_upstream_port(priv
->ds
, tmp
->port
);
2544 subvlan
= sja1105_find_committed_subvlan(other_priv
,
2547 /* If this happens, it's a bug. The neighbour switch does not
2548 * have a subvlan for tmp->vid on tmp->other_port, but it
2549 * should, since we already checked for its vlan_state.
2551 if (WARN_ON(subvlan
< 0)) {
2556 rx_vid
= dsa_8021q_rx_vid_subvlan(tmp
->other_ctx
->ds
,
2560 /* The @rx_vid retagged from @tmp->vid on
2561 * {@tmp->other_ds, @tmp->other_port} needs to be
2562 * re-retagged to @tmp->vid on the way back to us.
2564 * Assume the original @tmp->vid is already configured
2565 * on this local switch, otherwise we wouldn't be
2566 * retagging its subvlan on the other switch in the
2567 * first place. We just need to add a reverse retagging
2568 * rule for @rx_vid and install @rx_vid on our ports.
2571 new_vlan
[match
].vlanid
= rx_vid
;
2572 new_vlan
[match
].vmemb_port
|= BIT(tmp
->port
);
2573 new_vlan
[match
].vmemb_port
|= BIT(upstream
);
2574 /* The "untagged" flag is set the same as for the
2575 * original VLAN. And towards the CPU, it doesn't
2576 * really matter, because @rx_vid will only receive
2577 * traffic on that port. For consistency with other dsa_8021q
2578 * VLANs, we'll keep the CPU port tagged.
2581 new_vlan
[match
].tag_port
|= BIT(tmp
->port
);
2582 new_vlan
[match
].tag_port
|= BIT(upstream
);
2583 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2584 /* Deny egress of @rx_vid towards our front-panel port.
2585 * This will force the switch to drop it, and we'll see
2586 * only the re-retagged packets (having the original,
2587 * pre-initial-retagging, VLAN @tmp->vid).
2589 new_vlan
[match
].vlan_bc
&= ~BIT(tmp
->port
);
2591 /* On reverse retagging, the same ingress VLAN goes to multiple
2592 * ports. So we have an opportunity to create composite rules
2593 * to not waste the limited space in the retagging table.
2595 k
= sja1105_find_retagging_entry(new_retagging
, *num_retagging
,
2596 upstream
, rx_vid
, tmp
->vid
);
2598 if (*num_retagging
== SJA1105_MAX_RETAGGING_COUNT
) {
2599 dev_err(priv
->ds
->dev
, "No more retagging rules\n");
2603 k
= (*num_retagging
)++;
2605 /* And the retagging itself */
2606 new_retagging
[k
].vlan_ing
= rx_vid
;
2607 new_retagging
[k
].vlan_egr
= tmp
->vid
;
2608 new_retagging
[k
].ing_port
= BIT(upstream
);
2609 new_retagging
[k
].egr_port
|= BIT(tmp
->port
);
2613 list_for_each_entry_safe(tmp
, pos
, &crosschip_vlans
, list
) {
2614 list_del(&tmp
->list
);
2621 static int sja1105_build_vlan_table(struct sja1105_private
*priv
, bool notify
);
2623 static int sja1105_notify_crosschip_switches(struct sja1105_private
*priv
)
2625 struct sja1105_crosschip_switch
*s
, *pos
;
2626 struct list_head crosschip_switches
;
2627 struct dsa_8021q_crosschip_link
*c
;
2630 INIT_LIST_HEAD(&crosschip_switches
);
2632 list_for_each_entry(c
, &priv
->dsa_8021q_ctx
->crosschip_links
, list
) {
2633 bool already_added
= false;
2635 list_for_each_entry(s
, &crosschip_switches
, list
) {
2636 if (s
->other_ctx
== c
->other_ctx
) {
2637 already_added
= true;
2645 s
= kzalloc(sizeof(*s
), GFP_KERNEL
);
2647 dev_err(priv
->ds
->dev
, "Failed to allocate memory\n");
2651 s
->other_ctx
= c
->other_ctx
;
2652 list_add(&s
->list
, &crosschip_switches
);
2655 list_for_each_entry(s
, &crosschip_switches
, list
) {
2656 struct sja1105_private
*other_priv
= s
->other_ctx
->ds
->priv
;
2658 rc
= sja1105_build_vlan_table(other_priv
, false);
2664 list_for_each_entry_safe(s
, pos
, &crosschip_switches
, list
) {
2672 static int sja1105_build_vlan_table(struct sja1105_private
*priv
, bool notify
)
2674 u16 subvlan_map
[SJA1105_MAX_NUM_PORTS
][DSA_8021Q_N_SUBVLAN
];
2675 struct sja1105_retagging_entry
*new_retagging
;
2676 struct sja1105_vlan_lookup_entry
*new_vlan
;
2677 struct sja1105_table
*table
;
2678 int i
, num_retagging
= 0;
2681 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
2682 new_vlan
= kcalloc(VLAN_N_VID
,
2683 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
2687 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
2688 new_retagging
= kcalloc(SJA1105_MAX_RETAGGING_COUNT
,
2689 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
2690 if (!new_retagging
) {
2695 for (i
= 0; i
< VLAN_N_VID
; i
++)
2696 new_vlan
[i
].vlanid
= VLAN_N_VID
;
2698 for (i
= 0; i
< SJA1105_MAX_RETAGGING_COUNT
; i
++)
2699 new_retagging
[i
].vlan_ing
= VLAN_N_VID
;
2701 for (i
= 0; i
< priv
->ds
->num_ports
; i
++)
2702 sja1105_init_subvlan_map(subvlan_map
[i
]);
2705 rc
= sja1105_build_bridge_vlans(priv
, new_vlan
);
2709 /* VLANs necessary for dsa_8021q operation, given to us by tag_8021q.c:
2714 rc
= sja1105_build_dsa_8021q_vlans(priv
, new_vlan
);
2718 /* Private VLANs necessary for dsa_8021q operation, which we need to
2719 * determine on our own:
2721 * - Sub-VLANs of crosschip switches
2723 rc
= sja1105_build_subvlans(priv
, subvlan_map
, new_vlan
, new_retagging
,
2728 rc
= sja1105_build_crosschip_subvlans(priv
, new_vlan
, new_retagging
,
2733 rc
= sja1105_commit_vlans(priv
, new_vlan
, new_retagging
, num_retagging
);
2737 rc
= sja1105_commit_pvid(priv
);
2741 for (i
= 0; i
< priv
->ds
->num_ports
; i
++)
2742 sja1105_commit_subvlan_map(priv
, i
, subvlan_map
[i
]);
2745 rc
= sja1105_notify_crosschip_switches(priv
);
2752 kfree(new_retagging
);
2757 /* The TPID setting belongs to the General Parameters table,
2758 * which can only be partially reconfigured at runtime (and not the TPID).
2759 * So a switch reset is required.
2761 int sja1105_vlan_filtering(struct dsa_switch
*ds
, int port
, bool enabled
,
2762 struct netlink_ext_ack
*extack
)
2764 struct sja1105_l2_lookup_params_entry
*l2_lookup_params
;
2765 struct sja1105_general_params_entry
*general_params
;
2766 struct sja1105_private
*priv
= ds
->priv
;
2767 enum sja1105_vlan_state state
;
2768 struct sja1105_table
*table
;
2769 struct sja1105_rule
*rule
;
2774 list_for_each_entry(rule
, &priv
->flow_block
.rules
, list
) {
2775 if (rule
->type
== SJA1105_RULE_VL
) {
2776 NL_SET_ERR_MSG_MOD(extack
,
2777 "Cannot change VLAN filtering with active VL rules");
2783 /* Enable VLAN filtering. */
2785 tpid2
= ETH_P_8021AD
;
2787 /* Disable VLAN filtering. */
2788 tpid
= ETH_P_SJA1105
;
2789 tpid2
= ETH_P_SJA1105
;
2792 for (port
= 0; port
< ds
->num_ports
; port
++) {
2793 struct sja1105_port
*sp
= &priv
->ports
[port
];
2796 sp
->xmit_tpid
= priv
->info
->qinq_tpid
;
2798 sp
->xmit_tpid
= ETH_P_SJA1105
;
2802 state
= SJA1105_VLAN_UNAWARE
;
2803 else if (priv
->best_effort_vlan_filtering
)
2804 state
= SJA1105_VLAN_BEST_EFFORT
;
2806 state
= SJA1105_VLAN_FILTERING_FULL
;
2808 if (priv
->vlan_state
== state
)
2811 priv
->vlan_state
= state
;
2812 want_tagging
= (state
== SJA1105_VLAN_UNAWARE
||
2813 state
== SJA1105_VLAN_BEST_EFFORT
);
2815 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
2816 general_params
= table
->entries
;
2817 /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
2818 general_params
->tpid
= tpid
;
2819 /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
2820 general_params
->tpid2
= tpid2
;
2821 /* When VLAN filtering is on, we need to at least be able to
2822 * decode management traffic through the "backup plan".
2824 general_params
->incl_srcpt1
= enabled
;
2825 general_params
->incl_srcpt0
= enabled
;
2827 want_tagging
= priv
->best_effort_vlan_filtering
|| !enabled
;
2829 /* VLAN filtering => independent VLAN learning.
2830 * No VLAN filtering (or best effort) => shared VLAN learning.
2832 * In shared VLAN learning mode, untagged traffic still gets
2833 * pvid-tagged, and the FDB table gets populated with entries
2834 * containing the "real" (pvid or from VLAN tag) VLAN ID.
2835 * However the switch performs a masked L2 lookup in the FDB,
2836 * effectively only looking up a frame's DMAC (and not VID) for the
2837 * forwarding decision.
2839 * This is extremely convenient for us, because in modes with
2840 * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
2841 * each front panel port. This is good for identification but breaks
2842 * learning badly - the VID of the learnt FDB entry is unique, aka
2843 * no frames coming from any other port are going to have it. So
2844 * for forwarding purposes, this is as though learning was broken
2845 * (all frames get flooded).
2847 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP_PARAMS
];
2848 l2_lookup_params
= table
->entries
;
2849 l2_lookup_params
->shared_learn
= want_tagging
;
2851 sja1105_frame_memory_partitioning(priv
);
2853 rc
= sja1105_build_vlan_table(priv
, false);
2857 rc
= sja1105_static_config_reload(priv
, SJA1105_VLAN_FILTERING
);
2859 NL_SET_ERR_MSG_MOD(extack
, "Failed to change VLAN Ethertype");
2861 /* Switch port identification based on 802.1Q is only passable
2862 * if we are not under a vlan_filtering bridge. So make sure
2863 * the two configurations are mutually exclusive (of course, the
2864 * user may know better, i.e. best_effort_vlan_filtering).
2866 return sja1105_setup_8021q_tagging(ds
, want_tagging
);
2869 /* Returns number of VLANs added (0 or 1) on success,
2870 * or a negative error code.
2872 static int sja1105_vlan_add_one(struct dsa_switch
*ds
, int port
, u16 vid
,
2873 u16 flags
, struct list_head
*vlan_list
)
2875 bool untagged
= flags
& BRIDGE_VLAN_INFO_UNTAGGED
;
2876 bool pvid
= flags
& BRIDGE_VLAN_INFO_PVID
;
2877 struct sja1105_bridge_vlan
*v
;
2879 list_for_each_entry(v
, vlan_list
, list
) {
2880 if (v
->port
== port
&& v
->vid
== vid
) {
2882 if (v
->untagged
== untagged
&& v
->pvid
== pvid
)
2883 /* Nothing changed */
2886 /* It's the same VLAN, but some of the flags changed
2887 * and the user did not bother to delete it first.
2888 * Update it and trigger sja1105_build_vlan_table.
2890 v
->untagged
= untagged
;
2896 v
= kzalloc(sizeof(*v
), GFP_KERNEL
);
2898 dev_err(ds
->dev
, "Out of memory while storing VLAN\n");
2904 v
->untagged
= untagged
;
2906 list_add(&v
->list
, vlan_list
);
2911 /* Returns number of VLANs deleted (0 or 1) */
2912 static int sja1105_vlan_del_one(struct dsa_switch
*ds
, int port
, u16 vid
,
2913 struct list_head
*vlan_list
)
2915 struct sja1105_bridge_vlan
*v
, *n
;
2917 list_for_each_entry_safe(v
, n
, vlan_list
, list
) {
2918 if (v
->port
== port
&& v
->vid
== vid
) {
2928 static int sja1105_vlan_add(struct dsa_switch
*ds
, int port
,
2929 const struct switchdev_obj_port_vlan
*vlan
,
2930 struct netlink_ext_ack
*extack
)
2932 struct sja1105_private
*priv
= ds
->priv
;
2933 bool vlan_table_changed
= false;
2936 /* If the user wants best-effort VLAN filtering (aka vlan_filtering
2937 * bridge plus tagging), be sure to at least deny alterations to the
2938 * configuration done by dsa_8021q.
2940 if (priv
->vlan_state
!= SJA1105_VLAN_FILTERING_FULL
&&
2941 vid_is_dsa_8021q(vlan
->vid
)) {
2942 NL_SET_ERR_MSG_MOD(extack
,
2943 "Range 1024-3071 reserved for dsa_8021q operation");
2947 rc
= sja1105_vlan_add_one(ds
, port
, vlan
->vid
, vlan
->flags
,
2948 &priv
->bridge_vlans
);
2952 vlan_table_changed
= true;
2954 if (!vlan_table_changed
)
2957 return sja1105_build_vlan_table(priv
, true);
2960 static int sja1105_vlan_del(struct dsa_switch
*ds
, int port
,
2961 const struct switchdev_obj_port_vlan
*vlan
)
2963 struct sja1105_private
*priv
= ds
->priv
;
2964 bool vlan_table_changed
= false;
2967 rc
= sja1105_vlan_del_one(ds
, port
, vlan
->vid
, &priv
->bridge_vlans
);
2969 vlan_table_changed
= true;
2971 if (!vlan_table_changed
)
2974 return sja1105_build_vlan_table(priv
, true);
2977 static int sja1105_dsa_8021q_vlan_add(struct dsa_switch
*ds
, int port
, u16 vid
,
2980 struct sja1105_private
*priv
= ds
->priv
;
2983 rc
= sja1105_vlan_add_one(ds
, port
, vid
, flags
, &priv
->dsa_8021q_vlans
);
2987 return sja1105_build_vlan_table(priv
, true);
2990 static int sja1105_dsa_8021q_vlan_del(struct dsa_switch
*ds
, int port
, u16 vid
)
2992 struct sja1105_private
*priv
= ds
->priv
;
2995 rc
= sja1105_vlan_del_one(ds
, port
, vid
, &priv
->dsa_8021q_vlans
);
2999 return sja1105_build_vlan_table(priv
, true);
3002 static const struct dsa_8021q_ops sja1105_dsa_8021q_ops
= {
3003 .vlan_add
= sja1105_dsa_8021q_vlan_add
,
3004 .vlan_del
= sja1105_dsa_8021q_vlan_del
,
3007 /* The programming model for the SJA1105 switch is "all-at-once" via static
3008 * configuration tables. Some of these can be dynamically modified at runtime,
3009 * but not the xMII mode parameters table.
3010 * Furthermode, some PHYs may not have crystals for generating their clocks
3011 * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
3012 * ref_clk pin. So port clocking needs to be initialized early, before
3013 * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
3014 * Setting correct PHY link speed does not matter now.
3015 * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
3016 * bindings are not yet parsed by DSA core. We need to parse early so that we
3017 * can populate the xMII mode parameters table.
3019 static int sja1105_setup(struct dsa_switch
*ds
)
3021 struct sja1105_private
*priv
= ds
->priv
;
3024 rc
= sja1105_parse_dt(priv
);
3026 dev_err(ds
->dev
, "Failed to parse DT: %d\n", rc
);
3030 /* Error out early if internal delays are required through DT
3031 * and we can't apply them.
3033 rc
= sja1105_parse_rgmii_delays(priv
);
3035 dev_err(ds
->dev
, "RGMII delay not supported\n");
3039 rc
= sja1105_ptp_clock_register(ds
);
3041 dev_err(ds
->dev
, "Failed to register PTP clock: %d\n", rc
);
3045 rc
= sja1105_mdiobus_register(ds
);
3047 dev_err(ds
->dev
, "Failed to register MDIO bus: %pe\n",
3049 goto out_ptp_clock_unregister
;
3052 if (priv
->info
->disable_microcontroller
) {
3053 rc
= priv
->info
->disable_microcontroller(priv
);
3056 "Failed to disable microcontroller: %pe\n",
3058 goto out_mdiobus_unregister
;
3062 /* Create and send configuration down to device */
3063 rc
= sja1105_static_config_load(priv
);
3065 dev_err(ds
->dev
, "Failed to load static config: %d\n", rc
);
3066 goto out_mdiobus_unregister
;
3069 /* Configure the CGU (PHY link modes and speeds) */
3070 if (priv
->info
->clocking_setup
) {
3071 rc
= priv
->info
->clocking_setup(priv
);
3074 "Failed to configure MII clocking: %pe\n",
3076 goto out_static_config_free
;
3080 /* On SJA1105, VLAN filtering per se is always enabled in hardware.
3081 * The only thing we can do to disable it is lie about what the 802.1Q
3083 * So it will still try to apply VLAN filtering, but all ingress
3084 * traffic (except frames received with EtherType of ETH_P_SJA1105)
3085 * will be internally tagged with a distorted VLAN header where the
3086 * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
3088 ds
->vlan_filtering_is_global
= true;
3090 /* Advertise the 8 egress queues */
3091 ds
->num_tx_queues
= SJA1105_NUM_TC
;
3093 ds
->mtu_enforcement_ingress
= true;
3095 priv
->best_effort_vlan_filtering
= true;
3097 rc
= sja1105_devlink_setup(ds
);
3099 goto out_static_config_free
;
3101 /* The DSA/switchdev model brings up switch ports in standalone mode by
3102 * default, and that means vlan_filtering is 0 since they're not under
3103 * a bridge, so it's safe to set up switch tagging at this time.
3106 rc
= sja1105_setup_8021q_tagging(ds
, true);
3109 goto out_devlink_teardown
;
3113 out_devlink_teardown
:
3114 sja1105_devlink_teardown(ds
);
3115 out_mdiobus_unregister
:
3116 sja1105_mdiobus_unregister(ds
);
3117 out_ptp_clock_unregister
:
3118 sja1105_ptp_clock_unregister(ds
);
3119 out_static_config_free
:
3120 sja1105_static_config_free(&priv
->static_config
);
3125 static void sja1105_teardown(struct dsa_switch
*ds
)
3127 struct sja1105_private
*priv
= ds
->priv
;
3128 struct sja1105_bridge_vlan
*v
, *n
;
3131 for (port
= 0; port
< ds
->num_ports
; port
++) {
3132 struct sja1105_port
*sp
= &priv
->ports
[port
];
3134 if (!dsa_is_user_port(ds
, port
))
3137 if (sp
->xmit_worker
)
3138 kthread_destroy_worker(sp
->xmit_worker
);
3141 sja1105_devlink_teardown(ds
);
3142 sja1105_flower_teardown(ds
);
3143 sja1105_tas_teardown(ds
);
3144 sja1105_ptp_clock_unregister(ds
);
3145 sja1105_static_config_free(&priv
->static_config
);
3147 list_for_each_entry_safe(v
, n
, &priv
->dsa_8021q_vlans
, list
) {
3152 list_for_each_entry_safe(v
, n
, &priv
->bridge_vlans
, list
) {
3158 static void sja1105_port_disable(struct dsa_switch
*ds
, int port
)
3160 struct sja1105_private
*priv
= ds
->priv
;
3161 struct sja1105_port
*sp
= &priv
->ports
[port
];
3163 if (!dsa_is_user_port(ds
, port
))
3166 kthread_cancel_work_sync(&sp
->xmit_work
);
3167 skb_queue_purge(&sp
->xmit_queue
);
3170 static int sja1105_mgmt_xmit(struct dsa_switch
*ds
, int port
, int slot
,
3171 struct sk_buff
*skb
, bool takets
)
3173 struct sja1105_mgmt_entry mgmt_route
= {0};
3174 struct sja1105_private
*priv
= ds
->priv
;
3181 mgmt_route
.macaddr
= ether_addr_to_u64(hdr
->h_dest
);
3182 mgmt_route
.destports
= BIT(port
);
3183 mgmt_route
.enfport
= 1;
3184 mgmt_route
.tsreg
= 0;
3185 mgmt_route
.takets
= takets
;
3187 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_MGMT_ROUTE
,
3188 slot
, &mgmt_route
, true);
3194 /* Transfer skb to the host port. */
3195 dsa_enqueue_skb(skb
, dsa_to_port(ds
, port
)->slave
);
3197 /* Wait until the switch has processed the frame */
3199 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_MGMT_ROUTE
,
3202 dev_err_ratelimited(priv
->ds
->dev
,
3203 "failed to poll for mgmt route\n");
3207 /* UM10944: The ENFPORT flag of the respective entry is
3208 * cleared when a match is found. The host can use this
3209 * flag as an acknowledgment.
3212 } while (mgmt_route
.enfport
&& --timeout
);
3215 /* Clean up the management route so that a follow-up
3216 * frame may not match on it by mistake.
3217 * This is only hardware supported on P/Q/R/S - on E/T it is
3218 * a no-op and we are silently discarding the -EOPNOTSUPP.
3220 sja1105_dynamic_config_write(priv
, BLK_IDX_MGMT_ROUTE
,
3221 slot
, &mgmt_route
, false);
3222 dev_err_ratelimited(priv
->ds
->dev
, "xmit timed out\n");
3225 return NETDEV_TX_OK
;
3228 #define work_to_port(work) \
3229 container_of((work), struct sja1105_port, xmit_work)
3230 #define tagger_to_sja1105(t) \
3231 container_of((t), struct sja1105_private, tagger_data)
3233 /* Deferred work is unfortunately necessary because setting up the management
3234 * route cannot be done from atomit context (SPI transfer takes a sleepable
3237 static void sja1105_port_deferred_xmit(struct kthread_work
*work
)
3239 struct sja1105_port
*sp
= work_to_port(work
);
3240 struct sja1105_tagger_data
*tagger_data
= sp
->data
;
3241 struct sja1105_private
*priv
= tagger_to_sja1105(tagger_data
);
3242 int port
= sp
- priv
->ports
;
3243 struct sk_buff
*skb
;
3245 while ((skb
= skb_dequeue(&sp
->xmit_queue
)) != NULL
) {
3246 struct sk_buff
*clone
= SJA1105_SKB_CB(skb
)->clone
;
3248 mutex_lock(&priv
->mgmt_lock
);
3250 sja1105_mgmt_xmit(priv
->ds
, port
, 0, skb
, !!clone
);
3252 /* The clone, if there, was made by dsa_skb_tx_timestamp */
3254 sja1105_ptp_txtstamp_skb(priv
->ds
, port
, clone
);
3256 mutex_unlock(&priv
->mgmt_lock
);
3260 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
3261 * which cannot be reconfigured at runtime. So a switch reset is required.
3263 static int sja1105_set_ageing_time(struct dsa_switch
*ds
,
3264 unsigned int ageing_time
)
3266 struct sja1105_l2_lookup_params_entry
*l2_lookup_params
;
3267 struct sja1105_private
*priv
= ds
->priv
;
3268 struct sja1105_table
*table
;
3269 unsigned int maxage
;
3271 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP_PARAMS
];
3272 l2_lookup_params
= table
->entries
;
3274 maxage
= SJA1105_AGEING_TIME_MS(ageing_time
);
3276 if (l2_lookup_params
->maxage
== maxage
)
3279 l2_lookup_params
->maxage
= maxage
;
3281 return sja1105_static_config_reload(priv
, SJA1105_AGEING_TIME
);
3284 static int sja1105_change_mtu(struct dsa_switch
*ds
, int port
, int new_mtu
)
3286 struct sja1105_l2_policing_entry
*policing
;
3287 struct sja1105_private
*priv
= ds
->priv
;
3289 new_mtu
+= VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
3291 if (dsa_is_cpu_port(ds
, port
))
3292 new_mtu
+= VLAN_HLEN
;
3294 policing
= priv
->static_config
.tables
[BLK_IDX_L2_POLICING
].entries
;
3296 if (policing
[port
].maxlen
== new_mtu
)
3299 policing
[port
].maxlen
= new_mtu
;
3301 return sja1105_static_config_reload(priv
, SJA1105_BEST_EFFORT_POLICING
);
3304 static int sja1105_get_max_mtu(struct dsa_switch
*ds
, int port
)
3306 return 2043 - VLAN_ETH_HLEN
- ETH_FCS_LEN
;
3309 static int sja1105_port_setup_tc(struct dsa_switch
*ds
, int port
,
3310 enum tc_setup_type type
,
3314 case TC_SETUP_QDISC_TAPRIO
:
3315 return sja1105_setup_tc_taprio(ds
, port
, type_data
);
3316 case TC_SETUP_QDISC_CBS
:
3317 return sja1105_setup_tc_cbs(ds
, port
, type_data
);
3323 /* We have a single mirror (@to) port, but can configure ingress and egress
3324 * mirroring on all other (@from) ports.
3325 * We need to allow mirroring rules only as long as the @to port is always the
3326 * same, and we need to unset the @to port from mirr_port only when there is no
3327 * mirroring rule that references it.
3329 static int sja1105_mirror_apply(struct sja1105_private
*priv
, int from
, int to
,
3330 bool ingress
, bool enabled
)
3332 struct sja1105_general_params_entry
*general_params
;
3333 struct sja1105_mac_config_entry
*mac
;
3334 struct dsa_switch
*ds
= priv
->ds
;
3335 struct sja1105_table
*table
;
3336 bool already_enabled
;
3340 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
3341 general_params
= table
->entries
;
3343 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
3345 already_enabled
= (general_params
->mirr_port
!= ds
->num_ports
);
3346 if (already_enabled
&& enabled
&& general_params
->mirr_port
!= to
) {
3347 dev_err(priv
->ds
->dev
,
3348 "Delete mirroring rules towards port %llu first\n",
3349 general_params
->mirr_port
);
3358 /* Anybody still referencing mirr_port? */
3359 for (port
= 0; port
< ds
->num_ports
; port
++) {
3360 if (mac
[port
].ing_mirr
|| mac
[port
].egr_mirr
) {
3365 /* Unset already_enabled for next time */
3367 new_mirr_port
= ds
->num_ports
;
3369 if (new_mirr_port
!= general_params
->mirr_port
) {
3370 general_params
->mirr_port
= new_mirr_port
;
3372 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_GENERAL_PARAMS
,
3373 0, general_params
, true);
3379 mac
[from
].ing_mirr
= enabled
;
3381 mac
[from
].egr_mirr
= enabled
;
3383 return sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, from
,
3387 static int sja1105_mirror_add(struct dsa_switch
*ds
, int port
,
3388 struct dsa_mall_mirror_tc_entry
*mirror
,
3391 return sja1105_mirror_apply(ds
->priv
, port
, mirror
->to_local_port
,
3395 static void sja1105_mirror_del(struct dsa_switch
*ds
, int port
,
3396 struct dsa_mall_mirror_tc_entry
*mirror
)
3398 sja1105_mirror_apply(ds
->priv
, port
, mirror
->to_local_port
,
3399 mirror
->ingress
, false);
3402 static int sja1105_port_policer_add(struct dsa_switch
*ds
, int port
,
3403 struct dsa_mall_policer_tc_entry
*policer
)
3405 struct sja1105_l2_policing_entry
*policing
;
3406 struct sja1105_private
*priv
= ds
->priv
;
3408 policing
= priv
->static_config
.tables
[BLK_IDX_L2_POLICING
].entries
;
3410 /* In hardware, every 8 microseconds the credit level is incremented by
3411 * the value of RATE bytes divided by 64, up to a maximum of SMAX
3414 policing
[port
].rate
= div_u64(512 * policer
->rate_bytes_per_sec
,
3416 policing
[port
].smax
= policer
->burst
;
3418 return sja1105_static_config_reload(priv
, SJA1105_BEST_EFFORT_POLICING
);
3421 static void sja1105_port_policer_del(struct dsa_switch
*ds
, int port
)
3423 struct sja1105_l2_policing_entry
*policing
;
3424 struct sja1105_private
*priv
= ds
->priv
;
3426 policing
= priv
->static_config
.tables
[BLK_IDX_L2_POLICING
].entries
;
3428 policing
[port
].rate
= SJA1105_RATE_MBPS(1000);
3429 policing
[port
].smax
= 65535;
3431 sja1105_static_config_reload(priv
, SJA1105_BEST_EFFORT_POLICING
);
3434 static int sja1105_port_set_learning(struct sja1105_private
*priv
, int port
,
3437 struct sja1105_mac_config_entry
*mac
;
3440 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
3442 mac
[port
].dyn_learn
= enabled
;
3444 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
3450 priv
->learn_ena
|= BIT(port
);
3452 priv
->learn_ena
&= ~BIT(port
);
3457 static int sja1105_port_ucast_bcast_flood(struct sja1105_private
*priv
, int to
,
3458 struct switchdev_brport_flags flags
)
3460 if (flags
.mask
& BR_FLOOD
) {
3461 if (flags
.val
& BR_FLOOD
)
3462 priv
->ucast_egress_floods
|= BIT(to
);
3464 priv
->ucast_egress_floods
&= ~BIT(to
);
3467 if (flags
.mask
& BR_BCAST_FLOOD
) {
3468 if (flags
.val
& BR_BCAST_FLOOD
)
3469 priv
->bcast_egress_floods
|= BIT(to
);
3471 priv
->bcast_egress_floods
&= ~BIT(to
);
3474 return sja1105_manage_flood_domains(priv
);
3477 static int sja1105_port_mcast_flood(struct sja1105_private
*priv
, int to
,
3478 struct switchdev_brport_flags flags
,
3479 struct netlink_ext_ack
*extack
)
3481 struct sja1105_l2_lookup_entry
*l2_lookup
;
3482 struct sja1105_table
*table
;
3485 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
3486 l2_lookup
= table
->entries
;
3488 for (match
= 0; match
< table
->entry_count
; match
++)
3489 if (l2_lookup
[match
].macaddr
== SJA1105_UNKNOWN_MULTICAST
&&
3490 l2_lookup
[match
].mask_macaddr
== SJA1105_UNKNOWN_MULTICAST
)
3493 if (match
== table
->entry_count
) {
3494 NL_SET_ERR_MSG_MOD(extack
,
3495 "Could not find FDB entry for unknown multicast");
3499 if (flags
.val
& BR_MCAST_FLOOD
)
3500 l2_lookup
[match
].destports
|= BIT(to
);
3502 l2_lookup
[match
].destports
&= ~BIT(to
);
3504 return sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
3505 l2_lookup
[match
].index
,
3510 static int sja1105_port_pre_bridge_flags(struct dsa_switch
*ds
, int port
,
3511 struct switchdev_brport_flags flags
,
3512 struct netlink_ext_ack
*extack
)
3514 struct sja1105_private
*priv
= ds
->priv
;
3516 if (flags
.mask
& ~(BR_LEARNING
| BR_FLOOD
| BR_MCAST_FLOOD
|
3520 if (flags
.mask
& (BR_FLOOD
| BR_MCAST_FLOOD
) &&
3521 !priv
->info
->can_limit_mcast_flood
) {
3522 bool multicast
= !!(flags
.val
& BR_MCAST_FLOOD
);
3523 bool unicast
= !!(flags
.val
& BR_FLOOD
);
3525 if (unicast
!= multicast
) {
3526 NL_SET_ERR_MSG_MOD(extack
,
3527 "This chip cannot configure multicast flooding independently of unicast");
3535 static int sja1105_port_bridge_flags(struct dsa_switch
*ds
, int port
,
3536 struct switchdev_brport_flags flags
,
3537 struct netlink_ext_ack
*extack
)
3539 struct sja1105_private
*priv
= ds
->priv
;
3542 if (flags
.mask
& BR_LEARNING
) {
3543 bool learn_ena
= !!(flags
.val
& BR_LEARNING
);
3545 rc
= sja1105_port_set_learning(priv
, port
, learn_ena
);
3550 if (flags
.mask
& (BR_FLOOD
| BR_BCAST_FLOOD
)) {
3551 rc
= sja1105_port_ucast_bcast_flood(priv
, port
, flags
);
3556 /* For chips that can't offload BR_MCAST_FLOOD independently, there
3557 * is nothing to do here, we ensured the configuration is in sync by
3558 * offloading BR_FLOOD.
3560 if (flags
.mask
& BR_MCAST_FLOOD
&& priv
->info
->can_limit_mcast_flood
) {
3561 rc
= sja1105_port_mcast_flood(priv
, port
, flags
,
3570 static const struct dsa_switch_ops sja1105_switch_ops
= {
3571 .get_tag_protocol
= sja1105_get_tag_protocol
,
3572 .setup
= sja1105_setup
,
3573 .teardown
= sja1105_teardown
,
3574 .set_ageing_time
= sja1105_set_ageing_time
,
3575 .port_change_mtu
= sja1105_change_mtu
,
3576 .port_max_mtu
= sja1105_get_max_mtu
,
3577 .phylink_validate
= sja1105_phylink_validate
,
3578 .phylink_mac_config
= sja1105_mac_config
,
3579 .phylink_mac_link_up
= sja1105_mac_link_up
,
3580 .phylink_mac_link_down
= sja1105_mac_link_down
,
3581 .get_strings
= sja1105_get_strings
,
3582 .get_ethtool_stats
= sja1105_get_ethtool_stats
,
3583 .get_sset_count
= sja1105_get_sset_count
,
3584 .get_ts_info
= sja1105_get_ts_info
,
3585 .port_disable
= sja1105_port_disable
,
3586 .port_fdb_dump
= sja1105_fdb_dump
,
3587 .port_fdb_add
= sja1105_fdb_add
,
3588 .port_fdb_del
= sja1105_fdb_del
,
3589 .port_bridge_join
= sja1105_bridge_join
,
3590 .port_bridge_leave
= sja1105_bridge_leave
,
3591 .port_pre_bridge_flags
= sja1105_port_pre_bridge_flags
,
3592 .port_bridge_flags
= sja1105_port_bridge_flags
,
3593 .port_stp_state_set
= sja1105_bridge_stp_state_set
,
3594 .port_vlan_filtering
= sja1105_vlan_filtering
,
3595 .port_vlan_add
= sja1105_vlan_add
,
3596 .port_vlan_del
= sja1105_vlan_del
,
3597 .port_mdb_add
= sja1105_mdb_add
,
3598 .port_mdb_del
= sja1105_mdb_del
,
3599 .port_hwtstamp_get
= sja1105_hwtstamp_get
,
3600 .port_hwtstamp_set
= sja1105_hwtstamp_set
,
3601 .port_rxtstamp
= sja1105_port_rxtstamp
,
3602 .port_txtstamp
= sja1105_port_txtstamp
,
3603 .port_setup_tc
= sja1105_port_setup_tc
,
3604 .port_mirror_add
= sja1105_mirror_add
,
3605 .port_mirror_del
= sja1105_mirror_del
,
3606 .port_policer_add
= sja1105_port_policer_add
,
3607 .port_policer_del
= sja1105_port_policer_del
,
3608 .cls_flower_add
= sja1105_cls_flower_add
,
3609 .cls_flower_del
= sja1105_cls_flower_del
,
3610 .cls_flower_stats
= sja1105_cls_flower_stats
,
3611 .crosschip_bridge_join
= sja1105_crosschip_bridge_join
,
3612 .crosschip_bridge_leave
= sja1105_crosschip_bridge_leave
,
3613 .devlink_param_get
= sja1105_devlink_param_get
,
3614 .devlink_param_set
= sja1105_devlink_param_set
,
3615 .devlink_info_get
= sja1105_devlink_info_get
,
3618 static const struct of_device_id sja1105_dt_ids
[];
3620 static int sja1105_check_device_id(struct sja1105_private
*priv
)
3622 const struct sja1105_regs
*regs
= priv
->info
->regs
;
3623 u8 prod_id
[SJA1105_SIZE_DEVICE_ID
] = {0};
3624 struct device
*dev
= &priv
->spidev
->dev
;
3625 const struct of_device_id
*match
;
3630 rc
= sja1105_xfer_u32(priv
, SPI_READ
, regs
->device_id
, &device_id
,
3635 rc
= sja1105_xfer_buf(priv
, SPI_READ
, regs
->prod_id
, prod_id
,
3636 SJA1105_SIZE_DEVICE_ID
);
3640 sja1105_unpack(prod_id
, &part_no
, 19, 4, SJA1105_SIZE_DEVICE_ID
);
3642 for (match
= sja1105_dt_ids
; match
->compatible
[0]; match
++) {
3643 const struct sja1105_info
*info
= match
->data
;
3645 /* Is what's been probed in our match table at all? */
3646 if (info
->device_id
!= device_id
|| info
->part_no
!= part_no
)
3649 /* But is it what's in the device tree? */
3650 if (priv
->info
->device_id
!= device_id
||
3651 priv
->info
->part_no
!= part_no
) {
3652 dev_warn(dev
, "Device tree specifies chip %s but found %s, please fix it!\n",
3653 priv
->info
->name
, info
->name
);
3654 /* It isn't. No problem, pick that up. */
3661 dev_err(dev
, "Unexpected {device ID, part number}: 0x%x 0x%llx\n",
3662 device_id
, part_no
);
3667 static int sja1105_probe(struct spi_device
*spi
)
3669 struct sja1105_tagger_data
*tagger_data
;
3670 struct device
*dev
= &spi
->dev
;
3671 struct sja1105_private
*priv
;
3672 size_t max_xfer
, max_msg
;
3673 struct dsa_switch
*ds
;
3676 if (!dev
->of_node
) {
3677 dev_err(dev
, "No DTS bindings for SJA1105 driver\n");
3681 priv
= devm_kzalloc(dev
, sizeof(struct sja1105_private
), GFP_KERNEL
);
3685 /* Configure the optional reset pin and bring up switch */
3686 priv
->reset_gpio
= devm_gpiod_get(dev
, "reset", GPIOD_OUT_HIGH
);
3687 if (IS_ERR(priv
->reset_gpio
))
3688 dev_dbg(dev
, "reset-gpios not defined, ignoring\n");
3690 sja1105_hw_reset(priv
->reset_gpio
, 1, 1);
3692 /* Populate our driver private structure (priv) based on
3693 * the device tree node that was probed (spi)
3696 spi_set_drvdata(spi
, priv
);
3698 /* Configure the SPI bus */
3699 spi
->bits_per_word
= 8;
3700 rc
= spi_setup(spi
);
3702 dev_err(dev
, "Could not init SPI\n");
3706 /* In sja1105_xfer, we send spi_messages composed of two spi_transfers:
3707 * a small one for the message header and another one for the current
3708 * chunk of the packed buffer.
3709 * Check that the restrictions imposed by the SPI controller are
3710 * respected: the chunk buffer is smaller than the max transfer size,
3711 * and the total length of the chunk plus its message header is smaller
3712 * than the max message size.
3713 * We do that during probe time since the maximum transfer size is a
3714 * runtime invariant.
3716 max_xfer
= spi_max_transfer_size(spi
);
3717 max_msg
= spi_max_message_size(spi
);
3719 /* We need to send at least one 64-bit word of SPI payload per message
3720 * in order to be able to make useful progress.
3722 if (max_msg
< SJA1105_SIZE_SPI_MSG_HEADER
+ 8) {
3723 dev_err(dev
, "SPI master cannot send large enough buffers, aborting\n");
3727 priv
->max_xfer_len
= SJA1105_SIZE_SPI_MSG_MAXLEN
;
3728 if (priv
->max_xfer_len
> max_xfer
)
3729 priv
->max_xfer_len
= max_xfer
;
3730 if (priv
->max_xfer_len
> max_msg
- SJA1105_SIZE_SPI_MSG_HEADER
)
3731 priv
->max_xfer_len
= max_msg
- SJA1105_SIZE_SPI_MSG_HEADER
;
3733 priv
->info
= of_device_get_match_data(dev
);
3735 /* Detect hardware device */
3736 rc
= sja1105_check_device_id(priv
);
3738 dev_err(dev
, "Device ID check failed: %d\n", rc
);
3742 dev_info(dev
, "Probed switch chip: %s\n", priv
->info
->name
);
3744 ds
= devm_kzalloc(dev
, sizeof(*ds
), GFP_KERNEL
);
3749 ds
->num_ports
= priv
->info
->num_ports
;
3750 ds
->ops
= &sja1105_switch_ops
;
3754 tagger_data
= &priv
->tagger_data
;
3756 mutex_init(&priv
->ptp_data
.lock
);
3757 mutex_init(&priv
->mgmt_lock
);
3759 priv
->dsa_8021q_ctx
= devm_kzalloc(dev
, sizeof(*priv
->dsa_8021q_ctx
),
3761 if (!priv
->dsa_8021q_ctx
)
3764 priv
->dsa_8021q_ctx
->ops
= &sja1105_dsa_8021q_ops
;
3765 priv
->dsa_8021q_ctx
->proto
= htons(ETH_P_8021Q
);
3766 priv
->dsa_8021q_ctx
->ds
= ds
;
3768 INIT_LIST_HEAD(&priv
->dsa_8021q_ctx
->crosschip_links
);
3769 INIT_LIST_HEAD(&priv
->bridge_vlans
);
3770 INIT_LIST_HEAD(&priv
->dsa_8021q_vlans
);
3772 sja1105_tas_setup(ds
);
3773 sja1105_flower_setup(ds
);
3775 rc
= dsa_register_switch(priv
->ds
);
3779 if (IS_ENABLED(CONFIG_NET_SCH_CBS
)) {
3780 priv
->cbs
= devm_kcalloc(dev
, priv
->info
->num_cbs_shapers
,
3781 sizeof(struct sja1105_cbs_entry
),
3785 goto out_unregister_switch
;
3789 /* Connections between dsa_port and sja1105_port */
3790 for (port
= 0; port
< ds
->num_ports
; port
++) {
3791 struct sja1105_port
*sp
= &priv
->ports
[port
];
3792 struct dsa_port
*dp
= dsa_to_port(ds
, port
);
3793 struct net_device
*slave
;
3796 if (!dsa_is_user_port(ds
, port
))
3801 sp
->data
= tagger_data
;
3803 kthread_init_work(&sp
->xmit_work
, sja1105_port_deferred_xmit
);
3804 sp
->xmit_worker
= kthread_create_worker(0, "%s_xmit",
3806 if (IS_ERR(sp
->xmit_worker
)) {
3807 rc
= PTR_ERR(sp
->xmit_worker
);
3809 "failed to create deferred xmit thread: %d\n",
3811 goto out_destroy_workers
;
3813 skb_queue_head_init(&sp
->xmit_queue
);
3814 sp
->xmit_tpid
= ETH_P_SJA1105
;
3816 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
3817 sp
->subvlan_map
[subvlan
] = VLAN_N_VID
;
3822 out_destroy_workers
:
3823 while (port
-- > 0) {
3824 struct sja1105_port
*sp
= &priv
->ports
[port
];
3826 if (!dsa_is_user_port(ds
, port
))
3829 kthread_destroy_worker(sp
->xmit_worker
);
3832 out_unregister_switch
:
3833 dsa_unregister_switch(ds
);
3838 static int sja1105_remove(struct spi_device
*spi
)
3840 struct sja1105_private
*priv
= spi_get_drvdata(spi
);
3842 dsa_unregister_switch(priv
->ds
);
3846 static const struct of_device_id sja1105_dt_ids
[] = {
3847 { .compatible
= "nxp,sja1105e", .data
= &sja1105e_info
},
3848 { .compatible
= "nxp,sja1105t", .data
= &sja1105t_info
},
3849 { .compatible
= "nxp,sja1105p", .data
= &sja1105p_info
},
3850 { .compatible
= "nxp,sja1105q", .data
= &sja1105q_info
},
3851 { .compatible
= "nxp,sja1105r", .data
= &sja1105r_info
},
3852 { .compatible
= "nxp,sja1105s", .data
= &sja1105s_info
},
3853 { .compatible
= "nxp,sja1110a", .data
= &sja1110a_info
},
3854 { .compatible
= "nxp,sja1110b", .data
= &sja1110b_info
},
3855 { .compatible
= "nxp,sja1110c", .data
= &sja1110c_info
},
3856 { .compatible
= "nxp,sja1110d", .data
= &sja1110d_info
},
3859 MODULE_DEVICE_TABLE(of
, sja1105_dt_ids
);
3861 static struct spi_driver sja1105_driver
= {
3864 .owner
= THIS_MODULE
,
3865 .of_match_table
= of_match_ptr(sja1105_dt_ids
),
3867 .probe
= sja1105_probe
,
3868 .remove
= sja1105_remove
,
3871 module_spi_driver(sja1105_driver
);
3873 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
3874 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
3875 MODULE_DESCRIPTION("SJA1105 Driver");
3876 MODULE_LICENSE("GPL v2");