1 /* Altera Triple-Speed Ethernet MAC driver
2 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
15 * Original driver contributed by SLS.
16 * Major updates contributed by GlobalLogic
18 * This program is free software; you can redistribute it and/or modify it
19 * under the terms and conditions of the GNU General Public License,
20 * version 2, as published by the Free Software Foundation.
22 * This program is distributed in the hope it will be useful, but WITHOUT
23 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
27 * You should have received a copy of the GNU General Public License along with
28 * this program. If not, see <http://www.gnu.org/licenses/>.
31 #include <linux/atomic.h>
32 #include <linux/delay.h>
33 #include <linux/etherdevice.h>
34 #include <linux/if_vlan.h>
35 #include <linux/init.h>
36 #include <linux/interrupt.h>
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/of_device.h>
42 #include <linux/of_mdio.h>
43 #include <linux/of_net.h>
44 #include <linux/of_platform.h>
45 #include <linux/phy.h>
46 #include <linux/platform_device.h>
47 #include <linux/skbuff.h>
48 #include <asm/cacheflush.h>
50 #include "altera_utils.h"
51 #include "altera_tse.h"
52 #include "altera_sgdma.h"
53 #include "altera_msgdma.h"
55 static atomic_t instance_count
= ATOMIC_INIT(~0);
56 /* Module parameters */
57 static int debug
= -1;
58 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
59 MODULE_PARM_DESC(debug
, "Message Level (-1: default, 0: no output, 16: all)");
61 static const u32 default_msg_level
= (NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
62 NETIF_MSG_LINK
| NETIF_MSG_IFUP
|
65 #define RX_DESCRIPTORS 64
66 static int dma_rx_num
= RX_DESCRIPTORS
;
67 module_param(dma_rx_num
, int, S_IRUGO
| S_IWUSR
);
68 MODULE_PARM_DESC(dma_rx_num
, "Number of descriptors in the RX list");
70 #define TX_DESCRIPTORS 64
71 static int dma_tx_num
= TX_DESCRIPTORS
;
72 module_param(dma_tx_num
, int, S_IRUGO
| S_IWUSR
);
73 MODULE_PARM_DESC(dma_tx_num
, "Number of descriptors in the TX list");
78 /* Make sure DMA buffer size is larger than the max frame size
79 * plus some alignment offset and a VLAN header. If the max frame size is
80 * 1518, a VLAN header would be additional 4 bytes and additional
81 * headroom for alignment is 2 bytes, 2048 is just fine.
83 #define ALTERA_RXDMABUFFER_SIZE 2048
85 /* Allow network stack to resume queueing packets after we've
86 * finished transmitting at least 1/4 of the packets in the queue.
88 #define TSE_TX_THRESH(x) (x->tx_ring_size / 4)
90 #define TXQUEUESTOP_THRESHHOLD 2
92 static const struct of_device_id altera_tse_ids
[];
94 static inline u32
tse_tx_avail(struct altera_tse_private
*priv
)
96 return priv
->tx_cons
+ priv
->tx_ring_size
- priv
->tx_prod
- 1;
99 /* MDIO specific functions
101 static int altera_tse_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
)
103 struct net_device
*ndev
= bus
->priv
;
104 struct altera_tse_private
*priv
= netdev_priv(ndev
);
106 /* set MDIO address */
107 csrwr32((mii_id
& 0x1f), priv
->mac_dev
,
108 tse_csroffs(mdio_phy1_addr
));
111 return csrrd32(priv
->mac_dev
,
112 tse_csroffs(mdio_phy1
) + regnum
* 4) & 0xffff;
115 static int altera_tse_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
,
118 struct net_device
*ndev
= bus
->priv
;
119 struct altera_tse_private
*priv
= netdev_priv(ndev
);
121 /* set MDIO address */
122 csrwr32((mii_id
& 0x1f), priv
->mac_dev
,
123 tse_csroffs(mdio_phy1_addr
));
126 csrwr32(value
, priv
->mac_dev
, tse_csroffs(mdio_phy1
) + regnum
* 4);
130 static int altera_tse_mdio_create(struct net_device
*dev
, unsigned int id
)
132 struct altera_tse_private
*priv
= netdev_priv(dev
);
134 struct device_node
*mdio_node
= NULL
;
135 struct mii_bus
*mdio
= NULL
;
136 struct device_node
*child_node
= NULL
;
138 for_each_child_of_node(priv
->device
->of_node
, child_node
) {
139 if (of_device_is_compatible(child_node
, "altr,tse-mdio")) {
140 mdio_node
= child_node
;
146 netdev_dbg(dev
, "FOUND MDIO subnode\n");
148 netdev_dbg(dev
, "NO MDIO subnode\n");
152 mdio
= mdiobus_alloc();
154 netdev_err(dev
, "Error allocating MDIO bus\n");
158 mdio
->name
= ALTERA_TSE_RESOURCE_NAME
;
159 mdio
->read
= &altera_tse_mdio_read
;
160 mdio
->write
= &altera_tse_mdio_write
;
161 snprintf(mdio
->id
, MII_BUS_ID_SIZE
, "%s-%u", mdio
->name
, id
);
164 mdio
->parent
= priv
->device
;
166 ret
= of_mdiobus_register(mdio
, mdio_node
);
168 netdev_err(dev
, "Cannot register MDIO bus %s\n",
173 if (netif_msg_drv(priv
))
174 netdev_info(dev
, "MDIO bus %s: created\n", mdio
->id
);
184 static void altera_tse_mdio_destroy(struct net_device
*dev
)
186 struct altera_tse_private
*priv
= netdev_priv(dev
);
188 if (priv
->mdio
== NULL
)
191 if (netif_msg_drv(priv
))
192 netdev_info(dev
, "MDIO bus %s: removed\n",
195 mdiobus_unregister(priv
->mdio
);
196 kfree(priv
->mdio
->irq
);
197 mdiobus_free(priv
->mdio
);
201 static int tse_init_rx_buffer(struct altera_tse_private
*priv
,
202 struct tse_buffer
*rxbuffer
, int len
)
204 rxbuffer
->skb
= netdev_alloc_skb_ip_align(priv
->dev
, len
);
208 rxbuffer
->dma_addr
= dma_map_single(priv
->device
, rxbuffer
->skb
->data
,
212 if (dma_mapping_error(priv
->device
, rxbuffer
->dma_addr
)) {
213 netdev_err(priv
->dev
, "%s: DMA mapping error\n", __func__
);
214 dev_kfree_skb_any(rxbuffer
->skb
);
217 rxbuffer
->dma_addr
&= (dma_addr_t
)~3;
222 static void tse_free_rx_buffer(struct altera_tse_private
*priv
,
223 struct tse_buffer
*rxbuffer
)
225 struct sk_buff
*skb
= rxbuffer
->skb
;
226 dma_addr_t dma_addr
= rxbuffer
->dma_addr
;
230 dma_unmap_single(priv
->device
, dma_addr
,
233 dev_kfree_skb_any(skb
);
234 rxbuffer
->skb
= NULL
;
235 rxbuffer
->dma_addr
= 0;
239 /* Unmap and free Tx buffer resources
241 static void tse_free_tx_buffer(struct altera_tse_private
*priv
,
242 struct tse_buffer
*buffer
)
244 if (buffer
->dma_addr
) {
245 if (buffer
->mapped_as_page
)
246 dma_unmap_page(priv
->device
, buffer
->dma_addr
,
247 buffer
->len
, DMA_TO_DEVICE
);
249 dma_unmap_single(priv
->device
, buffer
->dma_addr
,
250 buffer
->len
, DMA_TO_DEVICE
);
251 buffer
->dma_addr
= 0;
254 dev_kfree_skb_any(buffer
->skb
);
259 static int alloc_init_skbufs(struct altera_tse_private
*priv
)
261 unsigned int rx_descs
= priv
->rx_ring_size
;
262 unsigned int tx_descs
= priv
->tx_ring_size
;
266 /* Create Rx ring buffer */
267 priv
->rx_ring
= kcalloc(rx_descs
, sizeof(struct tse_buffer
),
272 /* Create Tx ring buffer */
273 priv
->tx_ring
= kcalloc(tx_descs
, sizeof(struct tse_buffer
),
282 for (i
= 0; i
< rx_descs
; i
++) {
283 ret
= tse_init_rx_buffer(priv
, &priv
->rx_ring
[i
],
284 priv
->rx_dma_buf_sz
);
286 goto err_init_rx_buffers
;
295 tse_free_rx_buffer(priv
, &priv
->rx_ring
[i
]);
296 kfree(priv
->tx_ring
);
298 kfree(priv
->rx_ring
);
303 static void free_skbufs(struct net_device
*dev
)
305 struct altera_tse_private
*priv
= netdev_priv(dev
);
306 unsigned int rx_descs
= priv
->rx_ring_size
;
307 unsigned int tx_descs
= priv
->tx_ring_size
;
310 /* Release the DMA TX/RX socket buffers */
311 for (i
= 0; i
< rx_descs
; i
++)
312 tse_free_rx_buffer(priv
, &priv
->rx_ring
[i
]);
313 for (i
= 0; i
< tx_descs
; i
++)
314 tse_free_tx_buffer(priv
, &priv
->tx_ring
[i
]);
317 kfree(priv
->tx_ring
);
320 /* Reallocate the skb for the reception process
322 static inline void tse_rx_refill(struct altera_tse_private
*priv
)
324 unsigned int rxsize
= priv
->rx_ring_size
;
328 for (; priv
->rx_cons
- priv
->rx_prod
> 0;
330 entry
= priv
->rx_prod
% rxsize
;
331 if (likely(priv
->rx_ring
[entry
].skb
== NULL
)) {
332 ret
= tse_init_rx_buffer(priv
, &priv
->rx_ring
[entry
],
333 priv
->rx_dma_buf_sz
);
334 if (unlikely(ret
!= 0))
336 priv
->dmaops
->add_rx_desc(priv
, &priv
->rx_ring
[entry
]);
341 /* Pull out the VLAN tag and fix up the packet
343 static inline void tse_rx_vlan(struct net_device
*dev
, struct sk_buff
*skb
)
345 struct ethhdr
*eth_hdr
;
347 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
348 !__vlan_get_tag(skb
, &vid
)) {
349 eth_hdr
= (struct ethhdr
*)skb
->data
;
350 memmove(skb
->data
+ VLAN_HLEN
, eth_hdr
, ETH_ALEN
* 2);
351 skb_pull(skb
, VLAN_HLEN
);
352 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
356 /* Receive a packet: retrieve and pass over to upper levels
358 static int tse_rx(struct altera_tse_private
*priv
, int limit
)
360 unsigned int count
= 0;
361 unsigned int next_entry
;
363 unsigned int entry
= priv
->rx_cons
% priv
->rx_ring_size
;
368 /* Check for count < limit first as get_rx_status is changing
369 * the response-fifo so we must process the next packet
370 * after calling get_rx_status if a response is pending.
371 * (reading the last byte of the response pops the value from the fifo.)
373 while ((count
< limit
) &&
374 ((rxstatus
= priv
->dmaops
->get_rx_status(priv
)) != 0)) {
375 pktstatus
= rxstatus
>> 16;
376 pktlength
= rxstatus
& 0xffff;
378 if ((pktstatus
& 0xFF) || (pktlength
== 0))
379 netdev_err(priv
->dev
,
380 "RCV pktstatus %08X pktlength %08X\n",
381 pktstatus
, pktlength
);
383 /* DMA trasfer from TSE starts with 2 aditional bytes for
384 * IP payload alignment. Status returned by get_rx_status()
385 * contains DMA transfer length. Packet is 2 bytes shorter.
390 next_entry
= (++priv
->rx_cons
) % priv
->rx_ring_size
;
392 skb
= priv
->rx_ring
[entry
].skb
;
393 if (unlikely(!skb
)) {
394 netdev_err(priv
->dev
,
395 "%s: Inconsistent Rx descriptor chain\n",
397 priv
->dev
->stats
.rx_dropped
++;
400 priv
->rx_ring
[entry
].skb
= NULL
;
402 skb_put(skb
, pktlength
);
404 /* make cache consistent with receive packet buffer */
405 dma_sync_single_for_cpu(priv
->device
,
406 priv
->rx_ring
[entry
].dma_addr
,
407 priv
->rx_ring
[entry
].len
,
410 dma_unmap_single(priv
->device
, priv
->rx_ring
[entry
].dma_addr
,
411 priv
->rx_ring
[entry
].len
, DMA_FROM_DEVICE
);
413 if (netif_msg_pktdata(priv
)) {
414 netdev_info(priv
->dev
, "frame received %d bytes\n",
416 print_hex_dump(KERN_ERR
, "data: ", DUMP_PREFIX_OFFSET
,
417 16, 1, skb
->data
, pktlength
, true);
420 tse_rx_vlan(priv
->dev
, skb
);
422 skb
->protocol
= eth_type_trans(skb
, priv
->dev
);
423 skb_checksum_none_assert(skb
);
425 napi_gro_receive(&priv
->napi
, skb
);
427 priv
->dev
->stats
.rx_packets
++;
428 priv
->dev
->stats
.rx_bytes
+= pktlength
;
438 /* Reclaim resources after transmission completes
440 static int tse_tx_complete(struct altera_tse_private
*priv
)
442 unsigned int txsize
= priv
->tx_ring_size
;
445 struct tse_buffer
*tx_buff
;
448 spin_lock(&priv
->tx_lock
);
450 ready
= priv
->dmaops
->tx_completions(priv
);
452 /* Free sent buffers */
453 while (ready
&& (priv
->tx_cons
!= priv
->tx_prod
)) {
454 entry
= priv
->tx_cons
% txsize
;
455 tx_buff
= &priv
->tx_ring
[entry
];
457 if (netif_msg_tx_done(priv
))
458 netdev_dbg(priv
->dev
, "%s: curr %d, dirty %d\n",
459 __func__
, priv
->tx_prod
, priv
->tx_cons
);
461 if (likely(tx_buff
->skb
))
462 priv
->dev
->stats
.tx_packets
++;
464 tse_free_tx_buffer(priv
, tx_buff
);
471 if (unlikely(netif_queue_stopped(priv
->dev
) &&
472 tse_tx_avail(priv
) > TSE_TX_THRESH(priv
))) {
473 netif_tx_lock(priv
->dev
);
474 if (netif_queue_stopped(priv
->dev
) &&
475 tse_tx_avail(priv
) > TSE_TX_THRESH(priv
)) {
476 if (netif_msg_tx_done(priv
))
477 netdev_dbg(priv
->dev
, "%s: restart transmit\n",
479 netif_wake_queue(priv
->dev
);
481 netif_tx_unlock(priv
->dev
);
484 spin_unlock(&priv
->tx_lock
);
488 /* NAPI polling function
490 static int tse_poll(struct napi_struct
*napi
, int budget
)
492 struct altera_tse_private
*priv
=
493 container_of(napi
, struct altera_tse_private
, napi
);
495 unsigned long int flags
;
497 tse_tx_complete(priv
);
499 rxcomplete
= tse_rx(priv
, budget
);
501 if (rxcomplete
< budget
) {
505 netdev_dbg(priv
->dev
,
506 "NAPI Complete, did %d packets with budget %d\n",
509 spin_lock_irqsave(&priv
->rxdma_irq_lock
, flags
);
510 priv
->dmaops
->enable_rxirq(priv
);
511 priv
->dmaops
->enable_txirq(priv
);
512 spin_unlock_irqrestore(&priv
->rxdma_irq_lock
, flags
);
517 /* DMA TX & RX FIFO interrupt routing
519 static irqreturn_t
altera_isr(int irq
, void *dev_id
)
521 struct net_device
*dev
= dev_id
;
522 struct altera_tse_private
*priv
;
524 if (unlikely(!dev
)) {
525 pr_err("%s: invalid dev pointer\n", __func__
);
528 priv
= netdev_priv(dev
);
530 spin_lock(&priv
->rxdma_irq_lock
);
532 priv
->dmaops
->clear_rxirq(priv
);
533 priv
->dmaops
->clear_txirq(priv
);
534 spin_unlock(&priv
->rxdma_irq_lock
);
536 if (likely(napi_schedule_prep(&priv
->napi
))) {
537 spin_lock(&priv
->rxdma_irq_lock
);
538 priv
->dmaops
->disable_rxirq(priv
);
539 priv
->dmaops
->disable_txirq(priv
);
540 spin_unlock(&priv
->rxdma_irq_lock
);
541 __napi_schedule(&priv
->napi
);
548 /* Transmit a packet (called by the kernel). Dispatches
549 * either the SGDMA method for transmitting or the
550 * MSGDMA method, assumes no scatter/gather support,
551 * implying an assumption that there's only one
552 * physically contiguous fragment starting at
553 * skb->data, for length of skb_headlen(skb).
555 static int tse_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
557 struct altera_tse_private
*priv
= netdev_priv(dev
);
558 unsigned int txsize
= priv
->tx_ring_size
;
560 struct tse_buffer
*buffer
= NULL
;
561 int nfrags
= skb_shinfo(skb
)->nr_frags
;
562 unsigned int nopaged_len
= skb_headlen(skb
);
563 enum netdev_tx ret
= NETDEV_TX_OK
;
566 spin_lock_bh(&priv
->tx_lock
);
568 if (unlikely(tse_tx_avail(priv
) < nfrags
+ 1)) {
569 if (!netif_queue_stopped(dev
)) {
570 netif_stop_queue(dev
);
571 /* This is a hard error, log it. */
572 netdev_err(priv
->dev
,
573 "%s: Tx list full when queue awake\n",
576 ret
= NETDEV_TX_BUSY
;
580 /* Map the first skb fragment */
581 entry
= priv
->tx_prod
% txsize
;
582 buffer
= &priv
->tx_ring
[entry
];
584 dma_addr
= dma_map_single(priv
->device
, skb
->data
, nopaged_len
,
586 if (dma_mapping_error(priv
->device
, dma_addr
)) {
587 netdev_err(priv
->dev
, "%s: DMA mapping error\n", __func__
);
593 buffer
->dma_addr
= dma_addr
;
594 buffer
->len
= nopaged_len
;
596 /* Push data out of the cache hierarchy into main memory */
597 dma_sync_single_for_device(priv
->device
, buffer
->dma_addr
,
598 buffer
->len
, DMA_TO_DEVICE
);
600 priv
->dmaops
->tx_buffer(priv
, buffer
);
602 skb_tx_timestamp(skb
);
605 dev
->stats
.tx_bytes
+= skb
->len
;
607 if (unlikely(tse_tx_avail(priv
) <= TXQUEUESTOP_THRESHHOLD
)) {
608 if (netif_msg_hw(priv
))
609 netdev_dbg(priv
->dev
, "%s: stop transmitted packets\n",
611 netif_stop_queue(dev
);
615 spin_unlock_bh(&priv
->tx_lock
);
620 /* Called every time the controller might need to be made
621 * aware of new link state. The PHY code conveys this
622 * information through variables in the phydev structure, and this
623 * function converts those variables into the appropriate
624 * register values, and can bring down the device if needed.
626 static void altera_tse_adjust_link(struct net_device
*dev
)
628 struct altera_tse_private
*priv
= netdev_priv(dev
);
629 struct phy_device
*phydev
= priv
->phydev
;
632 /* only change config if there is a link */
633 spin_lock(&priv
->mac_cfg_lock
);
635 /* Read old config */
636 u32 cfg_reg
= ioread32(&priv
->mac_dev
->command_config
);
639 if (phydev
->duplex
!= priv
->oldduplex
) {
641 if (!(phydev
->duplex
))
642 cfg_reg
|= MAC_CMDCFG_HD_ENA
;
644 cfg_reg
&= ~MAC_CMDCFG_HD_ENA
;
646 netdev_dbg(priv
->dev
, "%s: Link duplex = 0x%x\n",
647 dev
->name
, phydev
->duplex
);
649 priv
->oldduplex
= phydev
->duplex
;
653 if (phydev
->speed
!= priv
->oldspeed
) {
655 switch (phydev
->speed
) {
657 cfg_reg
|= MAC_CMDCFG_ETH_SPEED
;
658 cfg_reg
&= ~MAC_CMDCFG_ENA_10
;
661 cfg_reg
&= ~MAC_CMDCFG_ETH_SPEED
;
662 cfg_reg
&= ~MAC_CMDCFG_ENA_10
;
665 cfg_reg
&= ~MAC_CMDCFG_ETH_SPEED
;
666 cfg_reg
|= MAC_CMDCFG_ENA_10
;
669 if (netif_msg_link(priv
))
670 netdev_warn(dev
, "Speed (%d) is not 10/100/1000!\n",
674 priv
->oldspeed
= phydev
->speed
;
676 iowrite32(cfg_reg
, &priv
->mac_dev
->command_config
);
678 if (!priv
->oldlink
) {
682 } else if (priv
->oldlink
) {
686 priv
->oldduplex
= -1;
689 if (new_state
&& netif_msg_link(priv
))
690 phy_print_status(phydev
);
692 spin_unlock(&priv
->mac_cfg_lock
);
694 static struct phy_device
*connect_local_phy(struct net_device
*dev
)
696 struct altera_tse_private
*priv
= netdev_priv(dev
);
697 struct phy_device
*phydev
= NULL
;
698 char phy_id_fmt
[MII_BUS_ID_SIZE
+ 3];
700 if (priv
->phy_addr
!= POLL_PHY
) {
701 snprintf(phy_id_fmt
, MII_BUS_ID_SIZE
+ 3, PHY_ID_FMT
,
702 priv
->mdio
->id
, priv
->phy_addr
);
704 netdev_dbg(dev
, "trying to attach to %s\n", phy_id_fmt
);
706 phydev
= phy_connect(dev
, phy_id_fmt
, &altera_tse_adjust_link
,
709 netdev_err(dev
, "Could not attach to PHY\n");
713 phydev
= phy_find_first(priv
->mdio
);
714 if (phydev
== NULL
) {
715 netdev_err(dev
, "No PHY found\n");
719 ret
= phy_connect_direct(dev
, phydev
, &altera_tse_adjust_link
,
722 netdev_err(dev
, "Could not attach to PHY\n");
729 static int altera_tse_phy_get_addr_mdio_create(struct net_device
*dev
)
731 struct altera_tse_private
*priv
= netdev_priv(dev
);
732 struct device_node
*np
= priv
->device
->of_node
;
735 priv
->phy_iface
= of_get_phy_mode(np
);
737 /* Avoid get phy addr and create mdio if no phy is present */
738 if (!priv
->phy_iface
)
741 /* try to get PHY address from device tree, use PHY autodetection if
742 * no valid address is given
745 if (of_property_read_u32(priv
->device
->of_node
, "phy-addr",
747 priv
->phy_addr
= POLL_PHY
;
750 if (!((priv
->phy_addr
== POLL_PHY
) ||
751 ((priv
->phy_addr
>= 0) && (priv
->phy_addr
< PHY_MAX_ADDR
)))) {
752 netdev_err(dev
, "invalid phy-addr specified %d\n",
757 /* Create/attach to MDIO bus */
758 ret
= altera_tse_mdio_create(dev
,
759 atomic_add_return(1, &instance_count
));
767 /* Initialize driver's PHY state, and attach to the PHY
769 static int init_phy(struct net_device
*dev
)
771 struct altera_tse_private
*priv
= netdev_priv(dev
);
772 struct phy_device
*phydev
;
773 struct device_node
*phynode
;
774 bool fixed_link
= false;
777 /* Avoid init phy in case of no phy present */
778 if (!priv
->phy_iface
)
783 priv
->oldduplex
= -1;
785 phynode
= of_parse_phandle(priv
->device
->of_node
, "phy-handle", 0);
788 /* check if a fixed-link is defined in device-tree */
789 if (of_phy_is_fixed_link(priv
->device
->of_node
)) {
790 rc
= of_phy_register_fixed_link(priv
->device
->of_node
);
792 netdev_err(dev
, "cannot register fixed PHY\n");
796 /* In the case of a fixed PHY, the DT node associated
797 * to the PHY is the Ethernet MAC DT node.
799 phynode
= of_node_get(priv
->device
->of_node
);
802 netdev_dbg(dev
, "fixed-link detected\n");
803 phydev
= of_phy_connect(dev
, phynode
,
804 &altera_tse_adjust_link
,
807 netdev_dbg(dev
, "no phy-handle found\n");
809 netdev_err(dev
, "No phy-handle nor local mdio specified\n");
812 phydev
= connect_local_phy(dev
);
815 netdev_dbg(dev
, "phy-handle found\n");
816 phydev
= of_phy_connect(dev
, phynode
,
817 &altera_tse_adjust_link
, 0, priv
->phy_iface
);
821 netdev_err(dev
, "Could not find the PHY\n");
825 /* Stop Advertising 1000BASE Capability if interface is not GMII
826 * Note: Checkpatch throws CHECKs for the camel case defines below,
829 if ((priv
->phy_iface
== PHY_INTERFACE_MODE_MII
) ||
830 (priv
->phy_iface
== PHY_INTERFACE_MODE_RMII
))
831 phydev
->advertising
&= ~(SUPPORTED_1000baseT_Half
|
832 SUPPORTED_1000baseT_Full
);
834 /* Broken HW is sometimes missing the pull-up resistor on the
835 * MDIO line, which results in reads to non-existent devices returning
836 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
837 * device as well. If a fixed-link is used the phy_id is always 0.
838 * Note: phydev->phy_id is the result of reading the UID PHY registers.
840 if ((phydev
->phy_id
== 0) && !fixed_link
) {
841 netdev_err(dev
, "Bad PHY UID 0x%08x\n", phydev
->phy_id
);
842 phy_disconnect(phydev
);
846 netdev_dbg(dev
, "attached to PHY %d UID 0x%08x Link = %d\n",
847 phydev
->mdio
.addr
, phydev
->phy_id
, phydev
->link
);
849 priv
->phydev
= phydev
;
853 static void tse_update_mac_addr(struct altera_tse_private
*priv
, u8
*addr
)
858 msb
= (addr
[3] << 24) | (addr
[2] << 16) | (addr
[1] << 8) | addr
[0];
859 lsb
= ((addr
[5] << 8) | addr
[4]) & 0xffff;
861 /* Set primary MAC address */
862 csrwr32(msb
, priv
->mac_dev
, tse_csroffs(mac_addr_0
));
863 csrwr32(lsb
, priv
->mac_dev
, tse_csroffs(mac_addr_1
));
866 /* MAC software reset.
867 * When reset is triggered, the MAC function completes the current
868 * transmission or reception, and subsequently disables the transmit and
869 * receive logic, flushes the receive FIFO buffer, and resets the statistics
872 static int reset_mac(struct altera_tse_private
*priv
)
877 dat
= csrrd32(priv
->mac_dev
, tse_csroffs(command_config
));
878 dat
&= ~(MAC_CMDCFG_TX_ENA
| MAC_CMDCFG_RX_ENA
);
879 dat
|= MAC_CMDCFG_SW_RESET
| MAC_CMDCFG_CNT_RESET
;
880 csrwr32(dat
, priv
->mac_dev
, tse_csroffs(command_config
));
883 while (counter
++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR
) {
884 if (tse_bit_is_clear(priv
->mac_dev
, tse_csroffs(command_config
),
885 MAC_CMDCFG_SW_RESET
))
890 if (counter
>= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR
) {
891 dat
= csrrd32(priv
->mac_dev
, tse_csroffs(command_config
));
892 dat
&= ~MAC_CMDCFG_SW_RESET
;
893 csrwr32(dat
, priv
->mac_dev
, tse_csroffs(command_config
));
899 /* Initialize MAC core registers
901 static int init_mac(struct altera_tse_private
*priv
)
903 unsigned int cmd
= 0;
907 csrwr32(priv
->rx_fifo_depth
- ALTERA_TSE_RX_SECTION_EMPTY
,
908 priv
->mac_dev
, tse_csroffs(rx_section_empty
));
910 csrwr32(ALTERA_TSE_RX_SECTION_FULL
, priv
->mac_dev
,
911 tse_csroffs(rx_section_full
));
913 csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY
, priv
->mac_dev
,
914 tse_csroffs(rx_almost_empty
));
916 csrwr32(ALTERA_TSE_RX_ALMOST_FULL
, priv
->mac_dev
,
917 tse_csroffs(rx_almost_full
));
920 csrwr32(priv
->tx_fifo_depth
- ALTERA_TSE_TX_SECTION_EMPTY
,
921 priv
->mac_dev
, tse_csroffs(tx_section_empty
));
923 csrwr32(ALTERA_TSE_TX_SECTION_FULL
, priv
->mac_dev
,
924 tse_csroffs(tx_section_full
));
926 csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY
, priv
->mac_dev
,
927 tse_csroffs(tx_almost_empty
));
929 csrwr32(ALTERA_TSE_TX_ALMOST_FULL
, priv
->mac_dev
,
930 tse_csroffs(tx_almost_full
));
932 /* MAC Address Configuration */
933 tse_update_mac_addr(priv
, priv
->dev
->dev_addr
);
935 /* MAC Function Configuration */
936 frm_length
= ETH_HLEN
+ priv
->dev
->mtu
+ ETH_FCS_LEN
;
937 csrwr32(frm_length
, priv
->mac_dev
, tse_csroffs(frm_length
));
939 csrwr32(ALTERA_TSE_TX_IPG_LENGTH
, priv
->mac_dev
,
940 tse_csroffs(tx_ipg_length
));
942 /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
945 tse_set_bit(priv
->mac_dev
, tse_csroffs(rx_cmd_stat
),
946 ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16
);
948 tse_clear_bit(priv
->mac_dev
, tse_csroffs(tx_cmd_stat
),
949 ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16
|
950 ALTERA_TSE_TX_CMD_STAT_OMIT_CRC
);
952 /* Set the MAC options */
953 cmd
= csrrd32(priv
->mac_dev
, tse_csroffs(command_config
));
954 cmd
&= ~MAC_CMDCFG_PAD_EN
; /* No padding Removal on Receive */
955 cmd
&= ~MAC_CMDCFG_CRC_FWD
; /* CRC Removal */
956 cmd
|= MAC_CMDCFG_RX_ERR_DISC
; /* Automatically discard frames
959 cmd
|= MAC_CMDCFG_CNTL_FRM_ENA
;
960 cmd
&= ~MAC_CMDCFG_TX_ENA
;
961 cmd
&= ~MAC_CMDCFG_RX_ENA
;
963 /* Default speed and duplex setting, full/100 */
964 cmd
&= ~MAC_CMDCFG_HD_ENA
;
965 cmd
&= ~MAC_CMDCFG_ETH_SPEED
;
966 cmd
&= ~MAC_CMDCFG_ENA_10
;
968 csrwr32(cmd
, priv
->mac_dev
, tse_csroffs(command_config
));
970 csrwr32(ALTERA_TSE_PAUSE_QUANTA
, priv
->mac_dev
,
971 tse_csroffs(pause_quanta
));
973 if (netif_msg_hw(priv
))
974 dev_dbg(priv
->device
,
975 "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd
);
980 /* Start/stop MAC transmission logic
982 static void tse_set_mac(struct altera_tse_private
*priv
, bool enable
)
984 u32 value
= csrrd32(priv
->mac_dev
, tse_csroffs(command_config
));
987 value
|= MAC_CMDCFG_TX_ENA
| MAC_CMDCFG_RX_ENA
;
989 value
&= ~(MAC_CMDCFG_TX_ENA
| MAC_CMDCFG_RX_ENA
);
991 csrwr32(value
, priv
->mac_dev
, tse_csroffs(command_config
));
996 static int tse_change_mtu(struct net_device
*dev
, int new_mtu
)
998 struct altera_tse_private
*priv
= netdev_priv(dev
);
999 unsigned int max_mtu
= priv
->max_mtu
;
1000 unsigned int min_mtu
= ETH_ZLEN
+ ETH_FCS_LEN
;
1002 if (netif_running(dev
)) {
1003 netdev_err(dev
, "must be stopped to change its MTU\n");
1007 if ((new_mtu
< min_mtu
) || (new_mtu
> max_mtu
)) {
1008 netdev_err(dev
, "invalid MTU, max MTU is: %u\n", max_mtu
);
1013 netdev_update_features(dev
);
1018 static void altera_tse_set_mcfilter(struct net_device
*dev
)
1020 struct altera_tse_private
*priv
= netdev_priv(dev
);
1022 struct netdev_hw_addr
*ha
;
1024 /* clear the hash filter */
1025 for (i
= 0; i
< 64; i
++)
1026 csrwr32(0, priv
->mac_dev
, tse_csroffs(hash_table
) + i
* 4);
1028 netdev_for_each_mc_addr(ha
, dev
) {
1029 unsigned int hash
= 0;
1032 for (mac_octet
= 5; mac_octet
>= 0; mac_octet
--) {
1033 unsigned char xor_bit
= 0;
1034 unsigned char octet
= ha
->addr
[mac_octet
];
1035 unsigned int bitshift
;
1037 for (bitshift
= 0; bitshift
< 8; bitshift
++)
1038 xor_bit
^= ((octet
>> bitshift
) & 0x01);
1040 hash
= (hash
<< 1) | xor_bit
;
1042 csrwr32(1, priv
->mac_dev
, tse_csroffs(hash_table
) + hash
* 4);
1047 static void altera_tse_set_mcfilterall(struct net_device
*dev
)
1049 struct altera_tse_private
*priv
= netdev_priv(dev
);
1052 /* set the hash filter */
1053 for (i
= 0; i
< 64; i
++)
1054 csrwr32(1, priv
->mac_dev
, tse_csroffs(hash_table
) + i
* 4);
1057 /* Set or clear the multicast filter for this adaptor
1059 static void tse_set_rx_mode_hashfilter(struct net_device
*dev
)
1061 struct altera_tse_private
*priv
= netdev_priv(dev
);
1063 spin_lock(&priv
->mac_cfg_lock
);
1065 if (dev
->flags
& IFF_PROMISC
)
1066 tse_set_bit(priv
->mac_dev
, tse_csroffs(command_config
),
1067 MAC_CMDCFG_PROMIS_EN
);
1069 if (dev
->flags
& IFF_ALLMULTI
)
1070 altera_tse_set_mcfilterall(dev
);
1072 altera_tse_set_mcfilter(dev
);
1074 spin_unlock(&priv
->mac_cfg_lock
);
1077 /* Set or clear the multicast filter for this adaptor
1079 static void tse_set_rx_mode(struct net_device
*dev
)
1081 struct altera_tse_private
*priv
= netdev_priv(dev
);
1083 spin_lock(&priv
->mac_cfg_lock
);
1085 if ((dev
->flags
& IFF_PROMISC
) || (dev
->flags
& IFF_ALLMULTI
) ||
1086 !netdev_mc_empty(dev
) || !netdev_uc_empty(dev
))
1087 tse_set_bit(priv
->mac_dev
, tse_csroffs(command_config
),
1088 MAC_CMDCFG_PROMIS_EN
);
1090 tse_clear_bit(priv
->mac_dev
, tse_csroffs(command_config
),
1091 MAC_CMDCFG_PROMIS_EN
);
1093 spin_unlock(&priv
->mac_cfg_lock
);
1096 /* Open and initialize the interface
1098 static int tse_open(struct net_device
*dev
)
1100 struct altera_tse_private
*priv
= netdev_priv(dev
);
1103 unsigned long int flags
;
1105 /* Reset and configure TSE MAC and probe associated PHY */
1106 ret
= priv
->dmaops
->init_dma(priv
);
1108 netdev_err(dev
, "Cannot initialize DMA\n");
1112 if (netif_msg_ifup(priv
))
1113 netdev_warn(dev
, "device MAC address %pM\n",
1116 if ((priv
->revision
< 0xd00) || (priv
->revision
> 0xe00))
1117 netdev_warn(dev
, "TSE revision %x\n", priv
->revision
);
1119 spin_lock(&priv
->mac_cfg_lock
);
1120 ret
= reset_mac(priv
);
1121 /* Note that reset_mac will fail if the clocks are gated by the PHY
1122 * due to the PHY being put into isolation or power down mode.
1123 * This is not an error if reset fails due to no clock.
1126 netdev_dbg(dev
, "Cannot reset MAC core (error: %d)\n", ret
);
1128 ret
= init_mac(priv
);
1129 spin_unlock(&priv
->mac_cfg_lock
);
1131 netdev_err(dev
, "Cannot init MAC core (error: %d)\n", ret
);
1132 goto alloc_skbuf_error
;
1135 priv
->dmaops
->reset_dma(priv
);
1137 /* Create and initialize the TX/RX descriptors chains. */
1138 priv
->rx_ring_size
= dma_rx_num
;
1139 priv
->tx_ring_size
= dma_tx_num
;
1140 ret
= alloc_init_skbufs(priv
);
1142 netdev_err(dev
, "DMA descriptors initialization failed\n");
1143 goto alloc_skbuf_error
;
1147 /* Register RX interrupt */
1148 ret
= request_irq(priv
->rx_irq
, altera_isr
, IRQF_SHARED
,
1151 netdev_err(dev
, "Unable to register RX interrupt %d\n",
1156 /* Register TX interrupt */
1157 ret
= request_irq(priv
->tx_irq
, altera_isr
, IRQF_SHARED
,
1160 netdev_err(dev
, "Unable to register TX interrupt %d\n",
1162 goto tx_request_irq_error
;
1165 /* Enable DMA interrupts */
1166 spin_lock_irqsave(&priv
->rxdma_irq_lock
, flags
);
1167 priv
->dmaops
->enable_rxirq(priv
);
1168 priv
->dmaops
->enable_txirq(priv
);
1170 /* Setup RX descriptor chain */
1171 for (i
= 0; i
< priv
->rx_ring_size
; i
++)
1172 priv
->dmaops
->add_rx_desc(priv
, &priv
->rx_ring
[i
]);
1174 spin_unlock_irqrestore(&priv
->rxdma_irq_lock
, flags
);
1177 phy_start(priv
->phydev
);
1179 napi_enable(&priv
->napi
);
1180 netif_start_queue(dev
);
1182 priv
->dmaops
->start_rxdma(priv
);
1184 /* Start MAC Rx/Tx */
1185 spin_lock(&priv
->mac_cfg_lock
);
1186 tse_set_mac(priv
, true);
1187 spin_unlock(&priv
->mac_cfg_lock
);
1191 tx_request_irq_error
:
1192 free_irq(priv
->rx_irq
, dev
);
1200 /* Stop TSE MAC interface and put the device in an inactive state
1202 static int tse_shutdown(struct net_device
*dev
)
1204 struct altera_tse_private
*priv
= netdev_priv(dev
);
1206 unsigned long int flags
;
1210 phy_stop(priv
->phydev
);
1212 netif_stop_queue(dev
);
1213 napi_disable(&priv
->napi
);
1215 /* Disable DMA interrupts */
1216 spin_lock_irqsave(&priv
->rxdma_irq_lock
, flags
);
1217 priv
->dmaops
->disable_rxirq(priv
);
1218 priv
->dmaops
->disable_txirq(priv
);
1219 spin_unlock_irqrestore(&priv
->rxdma_irq_lock
, flags
);
1221 /* Free the IRQ lines */
1222 free_irq(priv
->rx_irq
, dev
);
1223 free_irq(priv
->tx_irq
, dev
);
1225 /* disable and reset the MAC, empties fifo */
1226 spin_lock(&priv
->mac_cfg_lock
);
1227 spin_lock(&priv
->tx_lock
);
1229 ret
= reset_mac(priv
);
1230 /* Note that reset_mac will fail if the clocks are gated by the PHY
1231 * due to the PHY being put into isolation or power down mode.
1232 * This is not an error if reset fails due to no clock.
1235 netdev_dbg(dev
, "Cannot reset MAC core (error: %d)\n", ret
);
1236 priv
->dmaops
->reset_dma(priv
);
1239 spin_unlock(&priv
->tx_lock
);
1240 spin_unlock(&priv
->mac_cfg_lock
);
1242 priv
->dmaops
->uninit_dma(priv
);
1247 static struct net_device_ops altera_tse_netdev_ops
= {
1248 .ndo_open
= tse_open
,
1249 .ndo_stop
= tse_shutdown
,
1250 .ndo_start_xmit
= tse_start_xmit
,
1251 .ndo_set_mac_address
= eth_mac_addr
,
1252 .ndo_set_rx_mode
= tse_set_rx_mode
,
1253 .ndo_change_mtu
= tse_change_mtu
,
1254 .ndo_validate_addr
= eth_validate_addr
,
1257 static int request_and_map(struct platform_device
*pdev
, const char *name
,
1258 struct resource
**res
, void __iomem
**ptr
)
1260 struct resource
*region
;
1261 struct device
*device
= &pdev
->dev
;
1263 *res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, name
);
1265 dev_err(device
, "resource %s not defined\n", name
);
1269 region
= devm_request_mem_region(device
, (*res
)->start
,
1270 resource_size(*res
), dev_name(device
));
1271 if (region
== NULL
) {
1272 dev_err(device
, "unable to request %s\n", name
);
1276 *ptr
= devm_ioremap_nocache(device
, region
->start
,
1277 resource_size(region
));
1279 dev_err(device
, "ioremap_nocache of %s failed!", name
);
1286 /* Probe Altera TSE MAC device
1288 static int altera_tse_probe(struct platform_device
*pdev
)
1290 struct net_device
*ndev
;
1292 struct resource
*control_port
;
1293 struct resource
*dma_res
;
1294 struct altera_tse_private
*priv
;
1295 const unsigned char *macaddr
;
1296 void __iomem
*descmap
;
1297 const struct of_device_id
*of_id
= NULL
;
1299 ndev
= alloc_etherdev(sizeof(struct altera_tse_private
));
1301 dev_err(&pdev
->dev
, "Could not allocate network device\n");
1305 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1307 priv
= netdev_priv(ndev
);
1308 priv
->device
= &pdev
->dev
;
1310 priv
->msg_enable
= netif_msg_init(debug
, default_msg_level
);
1312 of_id
= of_match_device(altera_tse_ids
, &pdev
->dev
);
1315 priv
->dmaops
= (struct altera_dmaops
*)of_id
->data
;
1319 priv
->dmaops
->altera_dtype
== ALTERA_DTYPE_SGDMA
) {
1320 /* Get the mapped address to the SGDMA descriptor memory */
1321 ret
= request_and_map(pdev
, "s1", &dma_res
, &descmap
);
1323 goto err_free_netdev
;
1325 /* Start of that memory is for transmit descriptors */
1326 priv
->tx_dma_desc
= descmap
;
1328 /* First half is for tx descriptors, other half for tx */
1329 priv
->txdescmem
= resource_size(dma_res
)/2;
1331 priv
->txdescmem_busaddr
= (dma_addr_t
)dma_res
->start
;
1333 priv
->rx_dma_desc
= (void __iomem
*)((uintptr_t)(descmap
+
1335 priv
->rxdescmem
= resource_size(dma_res
)/2;
1336 priv
->rxdescmem_busaddr
= dma_res
->start
;
1337 priv
->rxdescmem_busaddr
+= priv
->txdescmem
;
1339 if (upper_32_bits(priv
->rxdescmem_busaddr
)) {
1340 dev_dbg(priv
->device
,
1341 "SGDMA bus addresses greater than 32-bits\n");
1342 goto err_free_netdev
;
1344 if (upper_32_bits(priv
->txdescmem_busaddr
)) {
1345 dev_dbg(priv
->device
,
1346 "SGDMA bus addresses greater than 32-bits\n");
1347 goto err_free_netdev
;
1349 } else if (priv
->dmaops
&&
1350 priv
->dmaops
->altera_dtype
== ALTERA_DTYPE_MSGDMA
) {
1351 ret
= request_and_map(pdev
, "rx_resp", &dma_res
,
1352 &priv
->rx_dma_resp
);
1354 goto err_free_netdev
;
1356 ret
= request_and_map(pdev
, "tx_desc", &dma_res
,
1357 &priv
->tx_dma_desc
);
1359 goto err_free_netdev
;
1361 priv
->txdescmem
= resource_size(dma_res
);
1362 priv
->txdescmem_busaddr
= dma_res
->start
;
1364 ret
= request_and_map(pdev
, "rx_desc", &dma_res
,
1365 &priv
->rx_dma_desc
);
1367 goto err_free_netdev
;
1369 priv
->rxdescmem
= resource_size(dma_res
);
1370 priv
->rxdescmem_busaddr
= dma_res
->start
;
1373 goto err_free_netdev
;
1376 if (!dma_set_mask(priv
->device
, DMA_BIT_MASK(priv
->dmaops
->dmamask
)))
1377 dma_set_coherent_mask(priv
->device
,
1378 DMA_BIT_MASK(priv
->dmaops
->dmamask
));
1379 else if (!dma_set_mask(priv
->device
, DMA_BIT_MASK(32)))
1380 dma_set_coherent_mask(priv
->device
, DMA_BIT_MASK(32));
1382 goto err_free_netdev
;
1384 /* MAC address space */
1385 ret
= request_and_map(pdev
, "control_port", &control_port
,
1386 (void __iomem
**)&priv
->mac_dev
);
1388 goto err_free_netdev
;
1390 /* xSGDMA Rx Dispatcher address space */
1391 ret
= request_and_map(pdev
, "rx_csr", &dma_res
,
1394 goto err_free_netdev
;
1397 /* xSGDMA Tx Dispatcher address space */
1398 ret
= request_and_map(pdev
, "tx_csr", &dma_res
,
1401 goto err_free_netdev
;
1405 priv
->rx_irq
= platform_get_irq_byname(pdev
, "rx_irq");
1406 if (priv
->rx_irq
== -ENXIO
) {
1407 dev_err(&pdev
->dev
, "cannot obtain Rx IRQ\n");
1409 goto err_free_netdev
;
1413 priv
->tx_irq
= platform_get_irq_byname(pdev
, "tx_irq");
1414 if (priv
->tx_irq
== -ENXIO
) {
1415 dev_err(&pdev
->dev
, "cannot obtain Tx IRQ\n");
1417 goto err_free_netdev
;
1420 /* get FIFO depths from device tree */
1421 if (of_property_read_u32(pdev
->dev
.of_node
, "rx-fifo-depth",
1422 &priv
->rx_fifo_depth
)) {
1423 dev_err(&pdev
->dev
, "cannot obtain rx-fifo-depth\n");
1425 goto err_free_netdev
;
1428 if (of_property_read_u32(pdev
->dev
.of_node
, "tx-fifo-depth",
1429 &priv
->tx_fifo_depth
)) {
1430 dev_err(&pdev
->dev
, "cannot obtain tx-fifo-depth\n");
1432 goto err_free_netdev
;
1435 /* get hash filter settings for this instance */
1437 of_property_read_bool(pdev
->dev
.of_node
,
1438 "altr,has-hash-multicast-filter");
1440 /* Set hash filter to not set for now until the
1441 * multicast filter receive issue is debugged
1443 priv
->hash_filter
= 0;
1445 /* get supplemental address settings for this instance */
1446 priv
->added_unicast
=
1447 of_property_read_bool(pdev
->dev
.of_node
,
1448 "altr,has-supplementary-unicast");
1450 /* Max MTU is 1500, ETH_DATA_LEN */
1451 priv
->max_mtu
= ETH_DATA_LEN
;
1453 /* Get the max mtu from the device tree. Note that the
1454 * "max-frame-size" parameter is actually max mtu. Definition
1455 * in the ePAPR v1.1 spec and usage differ, so go with usage.
1457 of_property_read_u32(pdev
->dev
.of_node
, "max-frame-size",
1460 /* The DMA buffer size already accounts for an alignment bias
1461 * to avoid unaligned access exceptions for the NIOS processor,
1463 priv
->rx_dma_buf_sz
= ALTERA_RXDMABUFFER_SIZE
;
1465 /* get default MAC address from device tree */
1466 macaddr
= of_get_mac_address(pdev
->dev
.of_node
);
1468 ether_addr_copy(ndev
->dev_addr
, macaddr
);
1470 eth_hw_addr_random(ndev
);
1472 /* get phy addr and create mdio */
1473 ret
= altera_tse_phy_get_addr_mdio_create(ndev
);
1476 goto err_free_netdev
;
1478 /* initialize netdev */
1479 ndev
->mem_start
= control_port
->start
;
1480 ndev
->mem_end
= control_port
->end
;
1481 ndev
->netdev_ops
= &altera_tse_netdev_ops
;
1482 altera_tse_set_ethtool_ops(ndev
);
1484 altera_tse_netdev_ops
.ndo_set_rx_mode
= tse_set_rx_mode
;
1486 if (priv
->hash_filter
)
1487 altera_tse_netdev_ops
.ndo_set_rx_mode
=
1488 tse_set_rx_mode_hashfilter
;
1490 /* Scatter/gather IO is not supported,
1491 * so it is turned off
1493 ndev
->hw_features
&= ~NETIF_F_SG
;
1494 ndev
->features
|= ndev
->hw_features
| NETIF_F_HIGHDMA
;
1496 /* VLAN offloading of tagging, stripping and filtering is not
1497 * supported by hardware, but driver will accommodate the
1498 * extra 4-byte VLAN tag for processing by upper layers
1500 ndev
->features
|= NETIF_F_HW_VLAN_CTAG_RX
;
1502 /* setup NAPI interface */
1503 netif_napi_add(ndev
, &priv
->napi
, tse_poll
, NAPI_POLL_WEIGHT
);
1505 spin_lock_init(&priv
->mac_cfg_lock
);
1506 spin_lock_init(&priv
->tx_lock
);
1507 spin_lock_init(&priv
->rxdma_irq_lock
);
1509 netif_carrier_off(ndev
);
1510 ret
= register_netdev(ndev
);
1512 dev_err(&pdev
->dev
, "failed to register TSE net device\n");
1513 goto err_register_netdev
;
1516 platform_set_drvdata(pdev
, ndev
);
1518 priv
->revision
= ioread32(&priv
->mac_dev
->megacore_revision
);
1520 if (netif_msg_probe(priv
))
1521 dev_info(&pdev
->dev
, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",
1522 (priv
->revision
>> 8) & 0xff,
1523 priv
->revision
& 0xff,
1524 (unsigned long) control_port
->start
, priv
->rx_irq
,
1527 ret
= init_phy(ndev
);
1529 netdev_err(ndev
, "Cannot attach to PHY (error: %d)\n", ret
);
1535 unregister_netdev(ndev
);
1536 err_register_netdev
:
1537 netif_napi_del(&priv
->napi
);
1538 altera_tse_mdio_destroy(ndev
);
1544 /* Remove Altera TSE MAC device
1546 static int altera_tse_remove(struct platform_device
*pdev
)
1548 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1549 struct altera_tse_private
*priv
= netdev_priv(ndev
);
1552 phy_disconnect(priv
->phydev
);
1554 platform_set_drvdata(pdev
, NULL
);
1555 altera_tse_mdio_destroy(ndev
);
1556 unregister_netdev(ndev
);
1562 static const struct altera_dmaops altera_dtype_sgdma
= {
1563 .altera_dtype
= ALTERA_DTYPE_SGDMA
,
1565 .reset_dma
= sgdma_reset
,
1566 .enable_txirq
= sgdma_enable_txirq
,
1567 .enable_rxirq
= sgdma_enable_rxirq
,
1568 .disable_txirq
= sgdma_disable_txirq
,
1569 .disable_rxirq
= sgdma_disable_rxirq
,
1570 .clear_txirq
= sgdma_clear_txirq
,
1571 .clear_rxirq
= sgdma_clear_rxirq
,
1572 .tx_buffer
= sgdma_tx_buffer
,
1573 .tx_completions
= sgdma_tx_completions
,
1574 .add_rx_desc
= sgdma_add_rx_desc
,
1575 .get_rx_status
= sgdma_rx_status
,
1576 .init_dma
= sgdma_initialize
,
1577 .uninit_dma
= sgdma_uninitialize
,
1578 .start_rxdma
= sgdma_start_rxdma
,
1581 static const struct altera_dmaops altera_dtype_msgdma
= {
1582 .altera_dtype
= ALTERA_DTYPE_MSGDMA
,
1584 .reset_dma
= msgdma_reset
,
1585 .enable_txirq
= msgdma_enable_txirq
,
1586 .enable_rxirq
= msgdma_enable_rxirq
,
1587 .disable_txirq
= msgdma_disable_txirq
,
1588 .disable_rxirq
= msgdma_disable_rxirq
,
1589 .clear_txirq
= msgdma_clear_txirq
,
1590 .clear_rxirq
= msgdma_clear_rxirq
,
1591 .tx_buffer
= msgdma_tx_buffer
,
1592 .tx_completions
= msgdma_tx_completions
,
1593 .add_rx_desc
= msgdma_add_rx_desc
,
1594 .get_rx_status
= msgdma_rx_status
,
1595 .init_dma
= msgdma_initialize
,
1596 .uninit_dma
= msgdma_uninitialize
,
1597 .start_rxdma
= msgdma_start_rxdma
,
1600 static const struct of_device_id altera_tse_ids
[] = {
1601 { .compatible
= "altr,tse-msgdma-1.0", .data
= &altera_dtype_msgdma
, },
1602 { .compatible
= "altr,tse-1.0", .data
= &altera_dtype_sgdma
, },
1603 { .compatible
= "ALTR,tse-1.0", .data
= &altera_dtype_sgdma
, },
1606 MODULE_DEVICE_TABLE(of
, altera_tse_ids
);
1608 static struct platform_driver altera_tse_driver
= {
1609 .probe
= altera_tse_probe
,
1610 .remove
= altera_tse_remove
,
1614 .name
= ALTERA_TSE_RESOURCE_NAME
,
1615 .of_match_table
= altera_tse_ids
,
1619 module_platform_driver(altera_tse_driver
);
1621 MODULE_AUTHOR("Altera Corporation");
1622 MODULE_DESCRIPTION("Altera Triple Speed Ethernet MAC driver");
1623 MODULE_LICENSE("GPL v2");