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[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
1 /*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/netdevice.h>
15 #include <linux/platform_device.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_irq.h>
19 #include <linux/device.h>
20 #include <linux/vmalloc.h>
21
22 #include "hns_dsaf_main.h"
23 #include "hns_dsaf_rcb.h"
24 #include "hns_dsaf_ppe.h"
25 #include "hns_dsaf_mac.h"
26
27 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
28 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
29 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
30 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
31 };
32
33 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
34 {
35 int ret, i;
36 u32 desc_num;
37 u32 buf_size;
38 const char *name, *mode_str;
39 struct device_node *np = dsaf_dev->dev->of_node;
40
41 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
42 dsaf_dev->dsaf_ver = AE_VERSION_1;
43 else
44 dsaf_dev->dsaf_ver = AE_VERSION_2;
45
46 ret = of_property_read_string(np, "dsa_name", &name);
47 if (ret) {
48 dev_err(dsaf_dev->dev, "get dsaf name fail, ret=%d!\n", ret);
49 return ret;
50 }
51 strncpy(dsaf_dev->ae_dev.name, name, AE_NAME_SIZE);
52 dsaf_dev->ae_dev.name[AE_NAME_SIZE - 1] = '\0';
53
54 ret = of_property_read_string(np, "mode", &mode_str);
55 if (ret) {
56 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
57 return ret;
58 }
59 for (i = 0; i < DSAF_MODE_MAX; i++) {
60 if (g_dsaf_mode_match[i] &&
61 !strcmp(mode_str, g_dsaf_mode_match[i]))
62 break;
63 }
64 if (i >= DSAF_MODE_MAX ||
65 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
66 dev_err(dsaf_dev->dev,
67 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
68 return -EINVAL;
69 }
70 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
71
72 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
73 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
74 else
75 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
76
77 if ((i == DSAF_MODE_ENABLE_16VM) ||
78 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
79 (i == DSAF_MODE_DISABLE_6PORT_2VM))
80 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
81 else
82 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
83
84 dsaf_dev->sc_base = of_iomap(np, 0);
85 if (!dsaf_dev->sc_base) {
86 dev_err(dsaf_dev->dev,
87 "%s of_iomap 0 fail!\n", dsaf_dev->ae_dev.name);
88 ret = -ENOMEM;
89 goto unmap_base_addr;
90 }
91
92 dsaf_dev->sds_base = of_iomap(np, 1);
93 if (!dsaf_dev->sds_base) {
94 dev_err(dsaf_dev->dev,
95 "%s of_iomap 1 fail!\n", dsaf_dev->ae_dev.name);
96 ret = -ENOMEM;
97 goto unmap_base_addr;
98 }
99
100 dsaf_dev->ppe_base = of_iomap(np, 2);
101 if (!dsaf_dev->ppe_base) {
102 dev_err(dsaf_dev->dev,
103 "%s of_iomap 2 fail!\n", dsaf_dev->ae_dev.name);
104 ret = -ENOMEM;
105 goto unmap_base_addr;
106 }
107
108 dsaf_dev->io_base = of_iomap(np, 3);
109 if (!dsaf_dev->io_base) {
110 dev_err(dsaf_dev->dev,
111 "%s of_iomap 3 fail!\n", dsaf_dev->ae_dev.name);
112 ret = -ENOMEM;
113 goto unmap_base_addr;
114 }
115
116 dsaf_dev->cpld_base = of_iomap(np, 4);
117 if (!dsaf_dev->cpld_base)
118 dev_dbg(dsaf_dev->dev, "NO CPLD ADDR");
119
120 ret = of_property_read_u32(np, "desc-num", &desc_num);
121 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
122 desc_num > HNS_DSAF_MAX_DESC_CNT) {
123 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
124 desc_num, ret);
125 goto unmap_base_addr;
126 }
127 dsaf_dev->desc_num = desc_num;
128
129 ret = of_property_read_u32(np, "buf-size", &buf_size);
130 if (ret < 0) {
131 dev_err(dsaf_dev->dev,
132 "get buf-size fail, ret=%d!\r\n", ret);
133 goto unmap_base_addr;
134 }
135 dsaf_dev->buf_size = buf_size;
136
137 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
138 if (dsaf_dev->buf_size_type < 0) {
139 dev_err(dsaf_dev->dev,
140 "buf_size(%d) is wrong!\n", buf_size);
141 goto unmap_base_addr;
142 }
143
144 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
145 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
146 else
147 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
148
149 return 0;
150
151 unmap_base_addr:
152 if (dsaf_dev->io_base)
153 iounmap(dsaf_dev->io_base);
154 if (dsaf_dev->ppe_base)
155 iounmap(dsaf_dev->ppe_base);
156 if (dsaf_dev->sds_base)
157 iounmap(dsaf_dev->sds_base);
158 if (dsaf_dev->sc_base)
159 iounmap(dsaf_dev->sc_base);
160 if (dsaf_dev->cpld_base)
161 iounmap(dsaf_dev->cpld_base);
162 return ret;
163 }
164
165 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
166 {
167 if (dsaf_dev->io_base)
168 iounmap(dsaf_dev->io_base);
169
170 if (dsaf_dev->ppe_base)
171 iounmap(dsaf_dev->ppe_base);
172
173 if (dsaf_dev->sds_base)
174 iounmap(dsaf_dev->sds_base);
175
176 if (dsaf_dev->sc_base)
177 iounmap(dsaf_dev->sc_base);
178
179 if (dsaf_dev->cpld_base)
180 iounmap(dsaf_dev->cpld_base);
181 }
182
183 /**
184 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
185 * @dsaf_id: dsa fabric id
186 */
187 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
188 {
189 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
190 }
191
192 /**
193 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
194 * @dsaf_id: dsa fabric id
195 * @hns_dsaf_reg_cnt_clr_ce: config value
196 */
197 static void
198 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
199 {
200 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
201 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
202 }
203
204 /**
205 * hns_ppe_qid_cfg - config ppe qid
206 * @dsaf_id: dsa fabric id
207 * @pppe_qid_cfg: value array
208 */
209 static void
210 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
211 {
212 u32 i;
213
214 for (i = 0; i < DSAF_COMM_CHN; i++) {
215 dsaf_set_dev_field(dsaf_dev,
216 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
217 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
218 qid_cfg);
219 }
220 }
221
222 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
223 {
224 u16 max_q_per_vf, max_vfn;
225 u32 q_id, q_num_per_port;
226 u32 i;
227
228 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode,
229 HNS_DSAF_COMM_SERVICE_NW_IDX,
230 &max_vfn, &max_q_per_vf);
231 q_num_per_port = max_vfn * max_q_per_vf;
232
233 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
234 dsaf_set_dev_field(dsaf_dev,
235 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
236 0xff, 0, q_id);
237 q_id += q_num_per_port;
238 }
239 }
240
241 /**
242 * hns_dsaf_sw_port_type_cfg - cfg sw type
243 * @dsaf_id: dsa fabric id
244 * @psw_port_type: array
245 */
246 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
247 enum dsaf_sw_port_type port_type)
248 {
249 u32 i;
250
251 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
252 dsaf_set_dev_field(dsaf_dev,
253 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
254 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
255 port_type);
256 }
257 }
258
259 /**
260 * hns_dsaf_stp_port_type_cfg - cfg stp type
261 * @dsaf_id: dsa fabric id
262 * @pstp_port_type: array
263 */
264 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
265 enum dsaf_stp_port_type port_type)
266 {
267 u32 i;
268
269 for (i = 0; i < DSAF_COMM_CHN; i++) {
270 dsaf_set_dev_field(dsaf_dev,
271 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
272 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
273 port_type);
274 }
275 }
276
277 #define HNS_DSAF_SBM_NUM(dev) \
278 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
279 /**
280 * hns_dsaf_sbm_cfg - config sbm
281 * @dsaf_id: dsa fabric id
282 */
283 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
284 {
285 u32 o_sbm_cfg;
286 u32 i;
287
288 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
289 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
290 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
291 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
292 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
293 dsaf_write_dev(dsaf_dev,
294 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
295 }
296 }
297
298 /**
299 * hns_dsaf_sbm_cfg_mib_en - config sbm
300 * @dsaf_id: dsa fabric id
301 */
302 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
303 {
304 u32 sbm_cfg_mib_en;
305 u32 i;
306 u32 reg;
307 u32 read_cnt;
308
309 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
310 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
311 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
312 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
313 }
314
315 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
316 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
317 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
318 }
319
320 /* waitint for all sbm enable finished */
321 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
322 read_cnt = 0;
323 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
324 do {
325 udelay(1);
326 sbm_cfg_mib_en = dsaf_get_dev_bit(
327 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
328 read_cnt++;
329 } while (sbm_cfg_mib_en == 0 &&
330 read_cnt < DSAF_CFG_READ_CNT);
331
332 if (sbm_cfg_mib_en == 0) {
333 dev_err(dsaf_dev->dev,
334 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
335 dsaf_dev->ae_dev.name, i);
336 return -ENODEV;
337 }
338 }
339
340 return 0;
341 }
342
343 /**
344 * hns_dsaf_sbm_bp_wl_cfg - config sbm
345 * @dsaf_id: dsa fabric id
346 */
347 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
348 {
349 u32 o_sbm_bp_cfg;
350 u32 reg;
351 u32 i;
352
353 /* XGE */
354 for (i = 0; i < DSAF_XGE_NUM; i++) {
355 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
356 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
357 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
358 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
359 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
360 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
361 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
362 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
363 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
364
365 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
366 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
367 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
368 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
369 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
370 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
371 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
372
373 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
374 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
375 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
376 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
377 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
378 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
379 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
380
381 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
382 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
383 dsaf_set_field(o_sbm_bp_cfg,
384 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
385 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
386 dsaf_set_field(o_sbm_bp_cfg,
387 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
388 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
389 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
390
391 /* for no enable pfc mode */
392 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
393 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
394 dsaf_set_field(o_sbm_bp_cfg,
395 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
396 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
397 dsaf_set_field(o_sbm_bp_cfg,
398 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
399 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
400 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
401 }
402
403 /* PPE */
404 for (i = 0; i < DSAF_COMM_CHN; i++) {
405 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
406 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
407 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
408 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
409 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
410 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
411 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
412 }
413
414 /* RoCEE */
415 for (i = 0; i < DSAF_COMM_CHN; i++) {
416 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
417 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
418 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
419 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
420 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
421 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
422 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
423 }
424 }
425
426 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
427 {
428 u32 o_sbm_bp_cfg;
429 u32 reg;
430 u32 i;
431
432 /* XGE */
433 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
434 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
435 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
436 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
437 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
438 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
439 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
440 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
441 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
442 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
443
444 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
445 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
446 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
447 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
448 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
449 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
450 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
451
452 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
453 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
454 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
455 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
456 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
457 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
458 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
459
460 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
461 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
462 dsaf_set_field(o_sbm_bp_cfg,
463 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
464 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
465 dsaf_set_field(o_sbm_bp_cfg,
466 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
467 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
468 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
469
470 /* for no enable pfc mode */
471 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
472 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
473 dsaf_set_field(o_sbm_bp_cfg,
474 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
475 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
476 dsaf_set_field(o_sbm_bp_cfg,
477 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
478 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
479 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
480 }
481
482 /* PPE */
483 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
484 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
485 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
486 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
487 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
488 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
489 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
490 /* RoCEE */
491 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
492 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
493 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
494 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
495 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
496 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
497 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
498 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
499 }
500 }
501
502 /**
503 * hns_dsaf_voq_bp_all_thrd_cfg - voq
504 * @dsaf_id: dsa fabric id
505 */
506 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
507 {
508 u32 voq_bp_all_thrd;
509 u32 i;
510
511 for (i = 0; i < DSAF_VOQ_NUM; i++) {
512 voq_bp_all_thrd = dsaf_read_dev(
513 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
514 if (i < DSAF_XGE_NUM) {
515 dsaf_set_field(voq_bp_all_thrd,
516 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
517 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
518 dsaf_set_field(voq_bp_all_thrd,
519 DSAF_VOQ_BP_ALL_UPTHRD_M,
520 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
521 } else {
522 dsaf_set_field(voq_bp_all_thrd,
523 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
524 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
525 dsaf_set_field(voq_bp_all_thrd,
526 DSAF_VOQ_BP_ALL_UPTHRD_M,
527 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
528 }
529 dsaf_write_dev(
530 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
531 voq_bp_all_thrd);
532 }
533 }
534
535 /**
536 * hns_dsaf_tbl_tcam_data_cfg - tbl
537 * @dsaf_id: dsa fabric id
538 * @ptbl_tcam_data: addr
539 */
540 static void hns_dsaf_tbl_tcam_data_cfg(
541 struct dsaf_device *dsaf_dev,
542 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
543 {
544 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
545 ptbl_tcam_data->tbl_tcam_data_low);
546 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
547 ptbl_tcam_data->tbl_tcam_data_high);
548 }
549
550 /**
551 * dsaf_tbl_tcam_mcast_cfg - tbl
552 * @dsaf_id: dsa fabric id
553 * @ptbl_tcam_mcast: addr
554 */
555 static void hns_dsaf_tbl_tcam_mcast_cfg(
556 struct dsaf_device *dsaf_dev,
557 struct dsaf_tbl_tcam_mcast_cfg *mcast)
558 {
559 u32 mcast_cfg4;
560
561 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
562 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
563 mcast->tbl_mcast_item_vld);
564 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
565 mcast->tbl_mcast_old_en);
566 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
567 DSAF_TBL_MCAST_CFG4_VM128_112_S,
568 mcast->tbl_mcast_port_msk[4]);
569 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
570
571 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
572 mcast->tbl_mcast_port_msk[3]);
573
574 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
575 mcast->tbl_mcast_port_msk[2]);
576
577 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
578 mcast->tbl_mcast_port_msk[1]);
579
580 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
581 mcast->tbl_mcast_port_msk[0]);
582 }
583
584 /**
585 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
586 * @dsaf_id: dsa fabric id
587 * @ptbl_tcam_ucast: addr
588 */
589 static void hns_dsaf_tbl_tcam_ucast_cfg(
590 struct dsaf_device *dsaf_dev,
591 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
592 {
593 u32 ucast_cfg1;
594
595 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
596 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
597 tbl_tcam_ucast->tbl_ucast_mac_discard);
598 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
599 tbl_tcam_ucast->tbl_ucast_item_vld);
600 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
601 tbl_tcam_ucast->tbl_ucast_old_en);
602 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
603 tbl_tcam_ucast->tbl_ucast_dvc);
604 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
605 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
606 tbl_tcam_ucast->tbl_ucast_out_port);
607 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
608 }
609
610 /**
611 * hns_dsaf_tbl_line_cfg - tbl
612 * @dsaf_id: dsa fabric id
613 * @ptbl_lin: addr
614 */
615 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
616 struct dsaf_tbl_line_cfg *tbl_lin)
617 {
618 u32 tbl_line;
619
620 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
621 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
622 tbl_lin->tbl_line_mac_discard);
623 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
624 tbl_lin->tbl_line_dvc);
625 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
626 DSAF_TBL_LINE_CFG_OUT_PORT_S,
627 tbl_lin->tbl_line_out_port);
628 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
629 }
630
631 /**
632 * hns_dsaf_tbl_tcam_mcast_pul - tbl
633 * @dsaf_id: dsa fabric id
634 */
635 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
636 {
637 u32 o_tbl_pul;
638
639 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
640 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
641 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
642 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
643 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
644 }
645
646 /**
647 * hns_dsaf_tbl_line_pul - tbl
648 * @dsaf_id: dsa fabric id
649 */
650 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
651 {
652 u32 tbl_pul;
653
654 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
655 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
656 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
657 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
658 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
659 }
660
661 /**
662 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
663 * @dsaf_id: dsa fabric id
664 */
665 static void hns_dsaf_tbl_tcam_data_mcast_pul(
666 struct dsaf_device *dsaf_dev)
667 {
668 u32 o_tbl_pul;
669
670 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
671 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
672 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
673 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
674 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
675 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
676 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
677 }
678
679 /**
680 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
681 * @dsaf_id: dsa fabric id
682 */
683 static void hns_dsaf_tbl_tcam_data_ucast_pul(
684 struct dsaf_device *dsaf_dev)
685 {
686 u32 o_tbl_pul;
687
688 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
689 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
690 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
691 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
692 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
693 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
694 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
695 }
696
697 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
698 {
699 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_MIX_MODE_S, !!en);
700 }
701
702 /**
703 * hns_dsaf_tbl_stat_en - tbl
704 * @dsaf_id: dsa fabric id
705 * @ptbl_stat_en: addr
706 */
707 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
708 {
709 u32 o_tbl_ctrl;
710
711 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
712 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
713 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
714 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
715 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
716 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
717 }
718
719 /**
720 * hns_dsaf_rocee_bp_en - rocee back press enable
721 * @dsaf_id: dsa fabric id
722 */
723 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
724 {
725 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
726 DSAF_FC_XGE_TX_PAUSE_S, 1);
727 }
728
729 /* set msk for dsaf exception irq*/
730 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
731 u32 chnn_num, u32 mask_set)
732 {
733 dsaf_write_dev(dsaf_dev,
734 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
735 }
736
737 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
738 u32 chnn_num, u32 msk_set)
739 {
740 dsaf_write_dev(dsaf_dev,
741 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
742 }
743
744 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
745 u32 chnn, u32 msk_set)
746 {
747 dsaf_write_dev(dsaf_dev,
748 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
749 }
750
751 static void
752 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
753 {
754 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
755 }
756
757 /* clr dsaf exception irq*/
758 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
759 u32 chnn_num, u32 int_src)
760 {
761 dsaf_write_dev(dsaf_dev,
762 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
763 }
764
765 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
766 u32 chnn, u32 int_src)
767 {
768 dsaf_write_dev(dsaf_dev,
769 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
770 }
771
772 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
773 u32 chnn, u32 int_src)
774 {
775 dsaf_write_dev(dsaf_dev,
776 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
777 }
778
779 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
780 u32 int_src)
781 {
782 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
783 }
784
785 /**
786 * hns_dsaf_single_line_tbl_cfg - INT
787 * @dsaf_id: dsa fabric id
788 * @address:
789 * @ptbl_line:
790 */
791 static void hns_dsaf_single_line_tbl_cfg(
792 struct dsaf_device *dsaf_dev,
793 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
794 {
795 /*Write Addr*/
796 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
797
798 /*Write Line*/
799 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
800
801 /*Write Plus*/
802 hns_dsaf_tbl_line_pul(dsaf_dev);
803 }
804
805 /**
806 * hns_dsaf_tcam_uc_cfg - INT
807 * @dsaf_id: dsa fabric id
808 * @address,
809 * @ptbl_tcam_data,
810 */
811 static void hns_dsaf_tcam_uc_cfg(
812 struct dsaf_device *dsaf_dev, u32 address,
813 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
814 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
815 {
816 /*Write Addr*/
817 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
818 /*Write Tcam Data*/
819 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
820 /*Write Tcam Ucast*/
821 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
822 /*Write Plus*/
823 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
824 }
825
826 /**
827 * hns_dsaf_tcam_mc_cfg - INT
828 * @dsaf_id: dsa fabric id
829 * @address,
830 * @ptbl_tcam_data,
831 * @ptbl_tcam_mcast,
832 */
833 static void hns_dsaf_tcam_mc_cfg(
834 struct dsaf_device *dsaf_dev, u32 address,
835 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
836 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
837 {
838 /*Write Addr*/
839 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
840 /*Write Tcam Data*/
841 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
842 /*Write Tcam Mcast*/
843 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
844 /*Write Plus*/
845 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
846 }
847
848 /**
849 * hns_dsaf_tcam_mc_invld - INT
850 * @dsaf_id: dsa fabric id
851 * @address
852 */
853 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
854 {
855 /*Write Addr*/
856 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
857
858 /*write tcam mcast*/
859 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
860 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
861 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
862 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
863 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
864
865 /*Write Plus*/
866 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
867 }
868
869 /**
870 * hns_dsaf_tcam_uc_get - INT
871 * @dsaf_id: dsa fabric id
872 * @address
873 * @ptbl_tcam_data
874 * @ptbl_tcam_ucast
875 */
876 static void hns_dsaf_tcam_uc_get(
877 struct dsaf_device *dsaf_dev, u32 address,
878 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
879 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
880 {
881 u32 tcam_read_data0;
882 u32 tcam_read_data4;
883
884 /*Write Addr*/
885 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
886
887 /*read tcam item puls*/
888 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
889
890 /*read tcam data*/
891 ptbl_tcam_data->tbl_tcam_data_high
892 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
893 ptbl_tcam_data->tbl_tcam_data_low
894 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
895
896 /*read tcam mcast*/
897 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
898 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
899 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
900 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
901
902 ptbl_tcam_ucast->tbl_ucast_item_vld
903 = dsaf_get_bit(tcam_read_data4,
904 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
905 ptbl_tcam_ucast->tbl_ucast_old_en
906 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
907 ptbl_tcam_ucast->tbl_ucast_mac_discard
908 = dsaf_get_bit(tcam_read_data0,
909 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
910 ptbl_tcam_ucast->tbl_ucast_out_port
911 = dsaf_get_field(tcam_read_data0,
912 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
913 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
914 ptbl_tcam_ucast->tbl_ucast_dvc
915 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
916 }
917
918 /**
919 * hns_dsaf_tcam_mc_get - INT
920 * @dsaf_id: dsa fabric id
921 * @address
922 * @ptbl_tcam_data
923 * @ptbl_tcam_ucast
924 */
925 static void hns_dsaf_tcam_mc_get(
926 struct dsaf_device *dsaf_dev, u32 address,
927 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
928 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
929 {
930 u32 data_tmp;
931
932 /*Write Addr*/
933 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
934
935 /*read tcam item puls*/
936 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
937
938 /*read tcam data*/
939 ptbl_tcam_data->tbl_tcam_data_high =
940 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
941 ptbl_tcam_data->tbl_tcam_data_low =
942 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
943
944 /*read tcam mcast*/
945 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
946 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
947 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
948 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
949 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
950 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
951 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
952 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
953
954 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
955 ptbl_tcam_mcast->tbl_mcast_item_vld =
956 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
957 ptbl_tcam_mcast->tbl_mcast_old_en =
958 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
959 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
960 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
961 DSAF_TBL_MCAST_CFG4_VM128_112_S);
962 }
963
964 /**
965 * hns_dsaf_tbl_line_init - INT
966 * @dsaf_id: dsa fabric id
967 */
968 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
969 {
970 u32 i;
971 /* defaultly set all lineal mac table entry resulting discard */
972 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
973
974 for (i = 0; i < DSAF_LINE_SUM; i++)
975 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
976 }
977
978 /**
979 * hns_dsaf_tbl_tcam_init - INT
980 * @dsaf_id: dsa fabric id
981 */
982 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
983 {
984 u32 i;
985 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
986 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
987
988 /*tcam tbl*/
989 for (i = 0; i < DSAF_TCAM_SUM; i++)
990 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
991 }
992
993 /**
994 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
995 * @mac_cb: mac contrl block
996 */
997 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
998 int mac_id, int en)
999 {
1000 if (!en)
1001 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0);
1002 else
1003 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0xff);
1004 }
1005
1006 /**
1007 * hns_dsaf_tbl_tcam_init - INT
1008 * @dsaf_id: dsa fabric id
1009 * @dsaf_mode
1010 */
1011 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1012 {
1013 u32 i;
1014 u32 o_dsaf_cfg;
1015
1016 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1017 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1018 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1019 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1020 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1021 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1022 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1023
1024 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1025 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1026
1027 /* set 22 queue per tx ppe engine, only used in switch mode */
1028 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1029
1030 /* set promisc def queue id */
1031 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1032
1033 /* in non switch mode, set all port to access mode */
1034 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1035
1036 /*set dsaf pfc to 0 for parseing rx pause*/
1037 for (i = 0; i < DSAF_COMM_CHN; i++)
1038 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1039
1040 /*msk and clr exception irqs */
1041 for (i = 0; i < DSAF_COMM_CHN; i++) {
1042 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1043 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1044 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1045
1046 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1047 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1048 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1049 }
1050 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1051 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1052 }
1053
1054 /**
1055 * hns_dsaf_inode_init - INT
1056 * @dsaf_id: dsa fabric id
1057 */
1058 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1059 {
1060 u32 reg;
1061 u32 tc_cfg;
1062 u32 i;
1063
1064 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1065 tc_cfg = HNS_DSAF_I4TC_CFG;
1066 else
1067 tc_cfg = HNS_DSAF_I8TC_CFG;
1068
1069 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1070 for (i = 0; i < DSAF_INODE_NUM; i++) {
1071 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1072 dsaf_set_dev_field(dsaf_dev, reg,
1073 DSAF_INODE_IN_PORT_NUM_M,
1074 DSAF_INODE_IN_PORT_NUM_S,
1075 i % DSAF_XGE_NUM);
1076 }
1077 } else {
1078 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1079 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1080 dsaf_set_dev_field(dsaf_dev, reg,
1081 DSAF_INODE_IN_PORT_NUM_M,
1082 DSAF_INODE_IN_PORT_NUM_S, 0);
1083 dsaf_set_dev_field(dsaf_dev, reg,
1084 DSAFV2_INODE_IN_PORT1_NUM_M,
1085 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1086 dsaf_set_dev_field(dsaf_dev, reg,
1087 DSAFV2_INODE_IN_PORT2_NUM_M,
1088 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1089 dsaf_set_dev_field(dsaf_dev, reg,
1090 DSAFV2_INODE_IN_PORT3_NUM_M,
1091 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1092 dsaf_set_dev_field(dsaf_dev, reg,
1093 DSAFV2_INODE_IN_PORT4_NUM_M,
1094 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1095 dsaf_set_dev_field(dsaf_dev, reg,
1096 DSAFV2_INODE_IN_PORT5_NUM_M,
1097 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1098 }
1099 }
1100 for (i = 0; i < DSAF_INODE_NUM; i++) {
1101 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1102 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1103 }
1104 }
1105
1106 /**
1107 * hns_dsaf_sbm_init - INT
1108 * @dsaf_id: dsa fabric id
1109 */
1110 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1111 {
1112 u32 flag;
1113 u32 finish_msk;
1114 u32 cnt = 0;
1115 int ret;
1116
1117 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1118 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1119 finish_msk = DSAF_SRAM_INIT_OVER_M;
1120 } else {
1121 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1122 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1123 }
1124
1125 /* enable sbm chanel, disable sbm chanel shcut function*/
1126 hns_dsaf_sbm_cfg(dsaf_dev);
1127
1128 /* enable sbm mib */
1129 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1130 if (ret) {
1131 dev_err(dsaf_dev->dev,
1132 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1133 dsaf_dev->ae_dev.name, ret);
1134 return ret;
1135 }
1136
1137 /* enable sbm initial link sram */
1138 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1139
1140 do {
1141 usleep_range(200, 210);/*udelay(200);*/
1142 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1143 finish_msk, DSAF_SRAM_INIT_OVER_S);
1144 cnt++;
1145 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1146 cnt < DSAF_CFG_READ_CNT);
1147
1148 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1149 dev_err(dsaf_dev->dev,
1150 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1151 dsaf_dev->ae_dev.name, flag, cnt);
1152 return -ENODEV;
1153 }
1154
1155 hns_dsaf_rocee_bp_en(dsaf_dev);
1156
1157 return 0;
1158 }
1159
1160 /**
1161 * hns_dsaf_tbl_init - INT
1162 * @dsaf_id: dsa fabric id
1163 */
1164 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1165 {
1166 hns_dsaf_tbl_stat_en(dsaf_dev);
1167
1168 hns_dsaf_tbl_tcam_init(dsaf_dev);
1169 hns_dsaf_tbl_line_init(dsaf_dev);
1170 }
1171
1172 /**
1173 * hns_dsaf_voq_init - INT
1174 * @dsaf_id: dsa fabric id
1175 */
1176 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1177 {
1178 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1179 }
1180
1181 /**
1182 * hns_dsaf_init_hw - init dsa fabric hardware
1183 * @dsaf_dev: dsa fabric device struct pointer
1184 */
1185 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1186 {
1187 int ret;
1188
1189 dev_dbg(dsaf_dev->dev,
1190 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1191
1192 hns_dsaf_rst(dsaf_dev, 0);
1193 mdelay(10);
1194 hns_dsaf_rst(dsaf_dev, 1);
1195
1196 hns_dsaf_comm_init(dsaf_dev);
1197
1198 /*init XBAR_INODE*/
1199 hns_dsaf_inode_init(dsaf_dev);
1200
1201 /*init SBM*/
1202 ret = hns_dsaf_sbm_init(dsaf_dev);
1203 if (ret)
1204 return ret;
1205
1206 /*init TBL*/
1207 hns_dsaf_tbl_init(dsaf_dev);
1208
1209 /*init VOQ*/
1210 hns_dsaf_voq_init(dsaf_dev);
1211
1212 return 0;
1213 }
1214
1215 /**
1216 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1217 * @dsaf_dev: dsa fabric device struct pointer
1218 */
1219 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1220 {
1221 /*reset*/
1222 hns_dsaf_rst(dsaf_dev, 0);
1223 }
1224
1225 /**
1226 * hns_dsaf_init - init dsa fabric
1227 * @dsaf_dev: dsa fabric device struct pointer
1228 * retuen 0 - success , negative --fail
1229 */
1230 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1231 {
1232 struct dsaf_drv_priv *priv =
1233 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1234 u32 i;
1235 int ret;
1236
1237 ret = hns_dsaf_init_hw(dsaf_dev);
1238 if (ret)
1239 return ret;
1240
1241 /* malloc mem for tcam mac key(vlan+mac) */
1242 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1243 * DSAF_TCAM_SUM);
1244 if (!priv->soft_mac_tbl) {
1245 ret = -ENOMEM;
1246 goto remove_hw;
1247 }
1248
1249 /*all entry invall */
1250 for (i = 0; i < DSAF_TCAM_SUM; i++)
1251 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1252
1253 return 0;
1254
1255 remove_hw:
1256 hns_dsaf_remove_hw(dsaf_dev);
1257 return ret;
1258 }
1259
1260 /**
1261 * hns_dsaf_free - free dsa fabric
1262 * @dsaf_dev: dsa fabric device struct pointer
1263 */
1264 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1265 {
1266 struct dsaf_drv_priv *priv =
1267 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1268
1269 hns_dsaf_remove_hw(dsaf_dev);
1270
1271 /* free all mac mem */
1272 vfree(priv->soft_mac_tbl);
1273 priv->soft_mac_tbl = NULL;
1274 }
1275
1276 /**
1277 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1278 * @dsaf_dev: dsa fabric device struct pointer
1279 * @mac_key: mac entry struct pointer
1280 */
1281 static u16 hns_dsaf_find_soft_mac_entry(
1282 struct dsaf_device *dsaf_dev,
1283 struct dsaf_drv_tbl_tcam_key *mac_key)
1284 {
1285 struct dsaf_drv_priv *priv =
1286 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1287 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1288 u32 i;
1289
1290 soft_mac_entry = priv->soft_mac_tbl;
1291 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1292 /* invall tab entry */
1293 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1294 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1295 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1296 /* return find result --soft index */
1297 return soft_mac_entry->index;
1298
1299 soft_mac_entry++;
1300 }
1301 return DSAF_INVALID_ENTRY_IDX;
1302 }
1303
1304 /**
1305 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1306 * @dsaf_dev: dsa fabric device struct pointer
1307 */
1308 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1309 {
1310 struct dsaf_drv_priv *priv =
1311 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1312 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1313 u32 i;
1314
1315 soft_mac_entry = priv->soft_mac_tbl;
1316 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1317 /* inv all entry */
1318 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1319 /* return find result --soft index */
1320 return i;
1321
1322 soft_mac_entry++;
1323 }
1324 return DSAF_INVALID_ENTRY_IDX;
1325 }
1326
1327 /**
1328 * hns_dsaf_set_mac_key - set mac key
1329 * @dsaf_dev: dsa fabric device struct pointer
1330 * @mac_key: tcam key pointer
1331 * @vlan_id: vlan id
1332 * @in_port_num: input port num
1333 * @addr: mac addr
1334 */
1335 static void hns_dsaf_set_mac_key(
1336 struct dsaf_device *dsaf_dev,
1337 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1338 u8 *addr)
1339 {
1340 u8 port;
1341
1342 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1343 /*DSAF mode : in port id fixed 0*/
1344 port = 0;
1345 else
1346 /*non-dsaf mode*/
1347 port = in_port_num;
1348
1349 mac_key->high.bits.mac_0 = addr[0];
1350 mac_key->high.bits.mac_1 = addr[1];
1351 mac_key->high.bits.mac_2 = addr[2];
1352 mac_key->high.bits.mac_3 = addr[3];
1353 mac_key->low.bits.mac_4 = addr[4];
1354 mac_key->low.bits.mac_5 = addr[5];
1355 mac_key->low.bits.vlan = vlan_id;
1356 mac_key->low.bits.port = port;
1357 }
1358
1359 /**
1360 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1361 * @dsaf_dev: dsa fabric device struct pointer
1362 * @mac_entry: uc-mac entry
1363 */
1364 int hns_dsaf_set_mac_uc_entry(
1365 struct dsaf_device *dsaf_dev,
1366 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1367 {
1368 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1369 struct dsaf_drv_tbl_tcam_key mac_key;
1370 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1371 struct dsaf_drv_priv *priv =
1372 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1373 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1374
1375 /* mac addr check */
1376 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1377 MAC_IS_BROADCAST(mac_entry->addr) ||
1378 MAC_IS_MULTICAST(mac_entry->addr)) {
1379 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1380 dsaf_dev->ae_dev.name, mac_entry->addr);
1381 return -EINVAL;
1382 }
1383
1384 /* config key */
1385 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1386 mac_entry->in_port_num, mac_entry->addr);
1387
1388 /* entry ie exist? */
1389 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1390 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1391 /*if has not inv entry,find a empty entry */
1392 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1393 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1394 /* has not empty,return error */
1395 dev_err(dsaf_dev->dev,
1396 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1397 dsaf_dev->ae_dev.name,
1398 mac_key.high.val, mac_key.low.val);
1399 return -EINVAL;
1400 }
1401 }
1402
1403 dev_dbg(dsaf_dev->dev,
1404 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1405 dsaf_dev->ae_dev.name, mac_key.high.val,
1406 mac_key.low.val, entry_index);
1407
1408 /* config hardware entry */
1409 mac_data.tbl_ucast_item_vld = 1;
1410 mac_data.tbl_ucast_mac_discard = 0;
1411 mac_data.tbl_ucast_old_en = 0;
1412 /* default config dvc to 0 */
1413 mac_data.tbl_ucast_dvc = 0;
1414 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1415 hns_dsaf_tcam_uc_cfg(
1416 dsaf_dev, entry_index,
1417 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1418
1419 /* config software entry */
1420 soft_mac_entry += entry_index;
1421 soft_mac_entry->index = entry_index;
1422 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1423 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1424
1425 return 0;
1426 }
1427
1428 /**
1429 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1430 * @dsaf_dev: dsa fabric device struct pointer
1431 * @mac_entry: mc-mac entry
1432 */
1433 int hns_dsaf_set_mac_mc_entry(
1434 struct dsaf_device *dsaf_dev,
1435 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1436 {
1437 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1438 struct dsaf_drv_tbl_tcam_key mac_key;
1439 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1440 struct dsaf_drv_priv *priv =
1441 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1442 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1443 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1444
1445 /* mac addr check */
1446 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1447 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1448 dsaf_dev->ae_dev.name, mac_entry->addr);
1449 return -EINVAL;
1450 }
1451
1452 /*config key */
1453 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1454 mac_entry->in_vlan_id,
1455 mac_entry->in_port_num, mac_entry->addr);
1456
1457 /* entry ie exist? */
1458 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1459 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1460 /*if hasnot, find enpty entry*/
1461 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1462 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1463 /*if hasnot empty, error*/
1464 dev_err(dsaf_dev->dev,
1465 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1466 dsaf_dev->ae_dev.name,
1467 mac_key.high.val, mac_key.low.val);
1468 return -EINVAL;
1469 }
1470
1471 /* config hardware entry */
1472 memset(mac_data.tbl_mcast_port_msk,
1473 0, sizeof(mac_data.tbl_mcast_port_msk));
1474 } else {
1475 /* config hardware entry */
1476 hns_dsaf_tcam_mc_get(
1477 dsaf_dev, entry_index,
1478 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1479 }
1480 mac_data.tbl_mcast_old_en = 0;
1481 mac_data.tbl_mcast_item_vld = 1;
1482 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1483 0x3F, 0, mac_entry->port_mask[0]);
1484
1485 dev_dbg(dsaf_dev->dev,
1486 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1487 dsaf_dev->ae_dev.name, mac_key.high.val,
1488 mac_key.low.val, entry_index);
1489
1490 hns_dsaf_tcam_mc_cfg(
1491 dsaf_dev, entry_index,
1492 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1493
1494 /* config software entry */
1495 soft_mac_entry += entry_index;
1496 soft_mac_entry->index = entry_index;
1497 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1498 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1499
1500 return 0;
1501 }
1502
1503 /**
1504 * hns_dsaf_add_mac_mc_port - add mac mc-port
1505 * @dsaf_dev: dsa fabric device struct pointer
1506 * @mac_entry: mc-mac entry
1507 */
1508 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1509 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1510 {
1511 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1512 struct dsaf_drv_tbl_tcam_key mac_key;
1513 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1514 struct dsaf_drv_priv *priv =
1515 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1516 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1517 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1518 int mskid;
1519
1520 /*chechk mac addr */
1521 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1522 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1523 mac_entry->addr);
1524 return -EINVAL;
1525 }
1526
1527 /*config key */
1528 hns_dsaf_set_mac_key(
1529 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1530 mac_entry->in_port_num, mac_entry->addr);
1531
1532 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1533
1534 /*check exist? */
1535 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1536 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1537 /*if hasnot , find a empty*/
1538 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1539 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1540 /*if hasnot empty, error*/
1541 dev_err(dsaf_dev->dev,
1542 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1543 dsaf_dev->ae_dev.name, mac_key.high.val,
1544 mac_key.low.val);
1545 return -EINVAL;
1546 }
1547 } else {
1548 /*if exist, add in */
1549 hns_dsaf_tcam_mc_get(
1550 dsaf_dev, entry_index,
1551 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1552 }
1553 /* config hardware entry */
1554 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1555 mskid = mac_entry->port_num;
1556 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1557 mskid = mac_entry->port_num -
1558 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1559 } else {
1560 dev_err(dsaf_dev->dev,
1561 "%s,pnum(%d)error,key(%#x:%#x)\n",
1562 dsaf_dev->ae_dev.name, mac_entry->port_num,
1563 mac_key.high.val, mac_key.low.val);
1564 return -EINVAL;
1565 }
1566 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1567 mac_data.tbl_mcast_old_en = 0;
1568 mac_data.tbl_mcast_item_vld = 1;
1569
1570 dev_dbg(dsaf_dev->dev,
1571 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1572 dsaf_dev->ae_dev.name, mac_key.high.val,
1573 mac_key.low.val, entry_index);
1574
1575 hns_dsaf_tcam_mc_cfg(
1576 dsaf_dev, entry_index,
1577 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1578
1579 /*config software entry */
1580 soft_mac_entry += entry_index;
1581 soft_mac_entry->index = entry_index;
1582 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1583 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1584
1585 return 0;
1586 }
1587
1588 /**
1589 * hns_dsaf_del_mac_entry - del mac mc-port
1590 * @dsaf_dev: dsa fabric device struct pointer
1591 * @vlan_id: vlian id
1592 * @in_port_num: input port num
1593 * @addr : mac addr
1594 */
1595 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1596 u8 in_port_num, u8 *addr)
1597 {
1598 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1599 struct dsaf_drv_tbl_tcam_key mac_key;
1600 struct dsaf_drv_priv *priv =
1601 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1602 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1603
1604 /*check mac addr */
1605 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1606 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1607 addr);
1608 return -EINVAL;
1609 }
1610
1611 /*config key */
1612 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1613
1614 /*exist ?*/
1615 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1616 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1617 /*not exist, error */
1618 dev_err(dsaf_dev->dev,
1619 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1620 dsaf_dev->ae_dev.name,
1621 mac_key.high.val, mac_key.low.val);
1622 return -EINVAL;
1623 }
1624 dev_dbg(dsaf_dev->dev,
1625 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1626 dsaf_dev->ae_dev.name, mac_key.high.val,
1627 mac_key.low.val, entry_index);
1628
1629 /*do del opt*/
1630 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1631
1632 /*del soft emtry */
1633 soft_mac_entry += entry_index;
1634 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1635
1636 return 0;
1637 }
1638
1639 /**
1640 * hns_dsaf_del_mac_mc_port - del mac mc- port
1641 * @dsaf_dev: dsa fabric device struct pointer
1642 * @mac_entry: mac entry
1643 */
1644 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1645 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1646 {
1647 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1648 struct dsaf_drv_tbl_tcam_key mac_key;
1649 struct dsaf_drv_priv *priv =
1650 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1651 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1652 u16 vlan_id;
1653 u8 in_port_num;
1654 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1655 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1656 int mskid;
1657 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1658
1659 if (!(void *)mac_entry) {
1660 dev_err(dsaf_dev->dev,
1661 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1662 return -EINVAL;
1663 }
1664
1665 /*get key info*/
1666 vlan_id = mac_entry->in_vlan_id;
1667 in_port_num = mac_entry->in_port_num;
1668
1669 /*check mac addr */
1670 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1671 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1672 mac_entry->addr);
1673 return -EINVAL;
1674 }
1675
1676 /*config key */
1677 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1678 mac_entry->addr);
1679
1680 /*check is exist? */
1681 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1682 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1683 /*find none */
1684 dev_err(dsaf_dev->dev,
1685 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1686 dsaf_dev->ae_dev.name,
1687 mac_key.high.val, mac_key.low.val);
1688 return -EINVAL;
1689 }
1690
1691 dev_dbg(dsaf_dev->dev,
1692 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1693 dsaf_dev->ae_dev.name, mac_key.high.val,
1694 mac_key.low.val, entry_index);
1695
1696 /*read entry*/
1697 hns_dsaf_tcam_mc_get(
1698 dsaf_dev, entry_index,
1699 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1700
1701 /*del the port*/
1702 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1703 mskid = mac_entry->port_num;
1704 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1705 mskid = mac_entry->port_num -
1706 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1707 } else {
1708 dev_err(dsaf_dev->dev,
1709 "%s,pnum(%d)error,key(%#x:%#x)\n",
1710 dsaf_dev->ae_dev.name, mac_entry->port_num,
1711 mac_key.high.val, mac_key.low.val);
1712 return -EINVAL;
1713 }
1714 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1715
1716 /*check non port, do del entry */
1717 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1718 sizeof(mac_data.tbl_mcast_port_msk))) {
1719 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1720
1721 /* del soft entry */
1722 soft_mac_entry += entry_index;
1723 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1724 } else { /* not zer, just del port, updata*/
1725 hns_dsaf_tcam_mc_cfg(
1726 dsaf_dev, entry_index,
1727 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1728 }
1729
1730 return 0;
1731 }
1732
1733 /**
1734 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1735 * @dsaf_dev: dsa fabric device struct pointer
1736 * @mac_entry: mac entry
1737 */
1738 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1739 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1740 {
1741 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1742 struct dsaf_drv_tbl_tcam_key mac_key;
1743
1744 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1745
1746 /* check macaddr */
1747 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1748 MAC_IS_BROADCAST(mac_entry->addr)) {
1749 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1750 mac_entry->addr);
1751 return -EINVAL;
1752 }
1753
1754 /*config key */
1755 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1756 mac_entry->in_port_num, mac_entry->addr);
1757
1758 /*check exist? */
1759 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1760 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1761 /*find none, error */
1762 dev_err(dsaf_dev->dev,
1763 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1764 dsaf_dev->ae_dev.name,
1765 mac_key.high.val, mac_key.low.val);
1766 return -EINVAL;
1767 }
1768 dev_dbg(dsaf_dev->dev,
1769 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1770 dsaf_dev->ae_dev.name, mac_key.high.val,
1771 mac_key.low.val, entry_index);
1772
1773 /*read entry*/
1774 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1775 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1776 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1777
1778 return 0;
1779 }
1780
1781 /**
1782 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1783 * @dsaf_dev: dsa fabric device struct pointer
1784 * @mac_entry: mac entry
1785 */
1786 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1787 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1788 {
1789 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1790 struct dsaf_drv_tbl_tcam_key mac_key;
1791
1792 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1793
1794 /*check mac addr */
1795 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1796 MAC_IS_BROADCAST(mac_entry->addr)) {
1797 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1798 mac_entry->addr);
1799 return -EINVAL;
1800 }
1801
1802 /*config key */
1803 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1804 mac_entry->in_port_num, mac_entry->addr);
1805
1806 /*check exist? */
1807 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1808 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1809 /* find none, error */
1810 dev_err(dsaf_dev->dev,
1811 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1812 dsaf_dev->ae_dev.name, mac_key.high.val,
1813 mac_key.low.val);
1814 return -EINVAL;
1815 }
1816 dev_dbg(dsaf_dev->dev,
1817 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1818 dsaf_dev->ae_dev.name, mac_key.high.val,
1819 mac_key.low.val, entry_index);
1820
1821 /*read entry */
1822 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1823 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1824
1825 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1826 return 0;
1827 }
1828
1829 /**
1830 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1831 * @dsaf_dev: dsa fabric device struct pointer
1832 * @entry_index: tab entry index
1833 * @mac_entry: mac entry
1834 */
1835 int hns_dsaf_get_mac_entry_by_index(
1836 struct dsaf_device *dsaf_dev,
1837 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1838 {
1839 struct dsaf_drv_tbl_tcam_key mac_key;
1840
1841 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1842 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1843 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1844
1845 if (entry_index >= DSAF_TCAM_SUM) {
1846 /* find none, del error */
1847 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1848 dsaf_dev->ae_dev.name);
1849 return -EINVAL;
1850 }
1851
1852 /* mc entry, do read opt */
1853 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1854 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1855
1856 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1857
1858 /***get mac addr*/
1859 mac_addr[0] = mac_key.high.bits.mac_0;
1860 mac_addr[1] = mac_key.high.bits.mac_1;
1861 mac_addr[2] = mac_key.high.bits.mac_2;
1862 mac_addr[3] = mac_key.high.bits.mac_3;
1863 mac_addr[4] = mac_key.low.bits.mac_4;
1864 mac_addr[5] = mac_key.low.bits.mac_5;
1865 /**is mc or uc*/
1866 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1867 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1868 /**mc donot do*/
1869 } else {
1870 /*is not mc, just uc... */
1871 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1872 (struct dsaf_tbl_tcam_data *)&mac_key,
1873 &mac_uc_data);
1874 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1875 }
1876
1877 return 0;
1878 }
1879
1880 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1881 size_t sizeof_priv)
1882 {
1883 struct dsaf_device *dsaf_dev;
1884
1885 dsaf_dev = devm_kzalloc(dev,
1886 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
1887 if (unlikely(!dsaf_dev)) {
1888 dsaf_dev = ERR_PTR(-ENOMEM);
1889 } else {
1890 dsaf_dev->dev = dev;
1891 dev_set_drvdata(dev, dsaf_dev);
1892 }
1893
1894 return dsaf_dev;
1895 }
1896
1897 /**
1898 * hns_dsaf_free_dev - free dev mem
1899 * @dev: struct device pointer
1900 */
1901 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
1902 {
1903 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
1904 }
1905
1906 /**
1907 * dsaf_pfc_unit_cnt - set pfc unit count
1908 * @dsaf_id: dsa fabric id
1909 * @pport_rate: value array
1910 * @pdsaf_pfc_unit_cnt: value array
1911 */
1912 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
1913 enum dsaf_port_rate_mode rate)
1914 {
1915 u32 unit_cnt;
1916
1917 switch (rate) {
1918 case DSAF_PORT_RATE_10000:
1919 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1920 break;
1921 case DSAF_PORT_RATE_1000:
1922 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1923 break;
1924 case DSAF_PORT_RATE_2500:
1925 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1926 break;
1927 default:
1928 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1929 }
1930
1931 dsaf_set_dev_field(dsaf_dev,
1932 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
1933 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
1934 unit_cnt);
1935 }
1936
1937 /**
1938 * dsaf_port_work_rate_cfg - fifo
1939 * @dsaf_id: dsa fabric id
1940 * @xge_ge_work_mode
1941 */
1942 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
1943 enum dsaf_port_rate_mode rate_mode)
1944 {
1945 u32 port_work_mode;
1946
1947 port_work_mode = dsaf_read_dev(
1948 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
1949
1950 if (rate_mode == DSAF_PORT_RATE_10000)
1951 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
1952 else
1953 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
1954
1955 dsaf_write_dev(dsaf_dev,
1956 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
1957 port_work_mode);
1958
1959 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
1960 }
1961
1962 /**
1963 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
1964 * @mac_cb: mac contrl block
1965 */
1966 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
1967 {
1968 enum dsaf_port_rate_mode mode;
1969 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
1970 int mac_id = mac_cb->mac_id;
1971
1972 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
1973 return;
1974 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
1975 mode = DSAF_PORT_RATE_10000;
1976 else
1977 mode = DSAF_PORT_RATE_1000;
1978
1979 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
1980 }
1981
1982 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
1983 {
1984 struct dsaf_hw_stats *hw_stats
1985 = &dsaf_dev->hw_stats[node_num];
1986
1987 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
1988 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
1989 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
1990 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
1991 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
1992 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
1993 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
1994 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
1995 hw_stats->rx_pause_frame += dsaf_read_dev(dsaf_dev,
1996 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + 0x80 * (u64)node_num);
1997 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
1998 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
1999 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2000 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2001 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2002 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2003 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2004 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2005 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2006 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2007 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2008 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2009
2010 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2011 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2012 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2013 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2014
2015 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2016 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2017 }
2018
2019 /**
2020 *hns_dsaf_get_regs - dump dsaf regs
2021 *@dsaf_dev: dsaf device
2022 *@data:data for value of regs
2023 */
2024 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2025 {
2026 u32 i = 0;
2027 u32 j;
2028 u32 *p = data;
2029
2030 /* dsaf common registers */
2031 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2032 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2033 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2034 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2035 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2036 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2037 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2038 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2039 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2040
2041 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2042 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2043 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2044 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2045 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2046 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2047 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2048 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2049 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2050 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2051 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2052 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2053 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2054 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2055 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2056
2057 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2058 p[24 + i] = dsaf_read_dev(ddev,
2059 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2060
2061 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2062
2063 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2064 p[33 + i] = dsaf_read_dev(ddev,
2065 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2066
2067 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2068 p[41 + i] = dsaf_read_dev(ddev,
2069 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2070
2071 /* dsaf inode registers */
2072 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2073
2074 p[171] = dsaf_read_dev(ddev,
2075 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2076
2077 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2078 j = i * DSAF_COMM_CHN + port;
2079 p[172 + i] = dsaf_read_dev(ddev,
2080 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2081 p[175 + i] = dsaf_read_dev(ddev,
2082 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2083 p[178 + i] = dsaf_read_dev(ddev,
2084 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2085 p[181 + i] = dsaf_read_dev(ddev,
2086 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2087 p[184 + i] = dsaf_read_dev(ddev,
2088 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2089 p[187 + i] = dsaf_read_dev(ddev,
2090 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2091 p[190 + i] = dsaf_read_dev(ddev,
2092 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2093 p[193 + i] = dsaf_read_dev(ddev,
2094 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + j * 0x80);
2095 p[196 + i] = dsaf_read_dev(ddev,
2096 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2097 p[199 + i] = dsaf_read_dev(ddev,
2098 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2099 p[202 + i] = dsaf_read_dev(ddev,
2100 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2101 p[205 + i] = dsaf_read_dev(ddev,
2102 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2103 p[208 + i] = dsaf_read_dev(ddev,
2104 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2105 p[211 + i] = dsaf_read_dev(ddev,
2106 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2107 p[214 + i] = dsaf_read_dev(ddev,
2108 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2109 p[217 + i] = dsaf_read_dev(ddev,
2110 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2111 p[220 + i] = dsaf_read_dev(ddev,
2112 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2113 p[223 + i] = dsaf_read_dev(ddev,
2114 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2115 p[224 + i] = dsaf_read_dev(ddev,
2116 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2117 }
2118
2119 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2120
2121 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2122 j = i * DSAF_COMM_CHN + port;
2123 p[228 + i] = dsaf_read_dev(ddev,
2124 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2125 }
2126
2127 p[231] = dsaf_read_dev(ddev,
2128 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2129
2130 /* dsaf inode registers */
2131 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2132 j = i * DSAF_COMM_CHN + port;
2133 p[232 + i] = dsaf_read_dev(ddev,
2134 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2135 p[235 + i] = dsaf_read_dev(ddev,
2136 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2137 p[238 + i] = dsaf_read_dev(ddev,
2138 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2139 p[241 + i] = dsaf_read_dev(ddev,
2140 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2141 p[244 + i] = dsaf_read_dev(ddev,
2142 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2143 p[245 + i] = dsaf_read_dev(ddev,
2144 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2145 p[248 + i] = dsaf_read_dev(ddev,
2146 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2147 p[251 + i] = dsaf_read_dev(ddev,
2148 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2149 p[254 + i] = dsaf_read_dev(ddev,
2150 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2151 p[257 + i] = dsaf_read_dev(ddev,
2152 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2153 p[260 + i] = dsaf_read_dev(ddev,
2154 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2155 p[263 + i] = dsaf_read_dev(ddev,
2156 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2157 p[266 + i] = dsaf_read_dev(ddev,
2158 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2159 p[269 + i] = dsaf_read_dev(ddev,
2160 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2161 p[272 + i] = dsaf_read_dev(ddev,
2162 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2163 p[275 + i] = dsaf_read_dev(ddev,
2164 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2165 p[278 + i] = dsaf_read_dev(ddev,
2166 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2167 p[281 + i] = dsaf_read_dev(ddev,
2168 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2169 p[284 + i] = dsaf_read_dev(ddev,
2170 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2171 p[287 + i] = dsaf_read_dev(ddev,
2172 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2173 p[290 + i] = dsaf_read_dev(ddev,
2174 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2175 p[293 + i] = dsaf_read_dev(ddev,
2176 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2177 p[296 + i] = dsaf_read_dev(ddev,
2178 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2179 p[299 + i] = dsaf_read_dev(ddev,
2180 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2181 p[302 + i] = dsaf_read_dev(ddev,
2182 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2183 p[305 + i] = dsaf_read_dev(ddev,
2184 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2185 p[308 + i] = dsaf_read_dev(ddev,
2186 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2187 }
2188
2189 /* dsaf onode registers */
2190 for (i = 0; i < DSAF_XOD_NUM; i++) {
2191 p[311 + i] = dsaf_read_dev(ddev,
2192 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + j * 0x90);
2193 p[319 + i] = dsaf_read_dev(ddev,
2194 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + j * 0x90);
2195 p[327 + i] = dsaf_read_dev(ddev,
2196 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + j * 0x90);
2197 p[335 + i] = dsaf_read_dev(ddev,
2198 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + j * 0x90);
2199 p[343 + i] = dsaf_read_dev(ddev,
2200 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + j * 0x90);
2201 p[351 + i] = dsaf_read_dev(ddev,
2202 DSAF_XOD_ETS_TOKEN_CFG_0_REG + j * 0x90);
2203 }
2204
2205 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2206 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2207 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2208
2209 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2210 j = i * DSAF_COMM_CHN + port;
2211 p[362 + i] = dsaf_read_dev(ddev,
2212 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2213 p[365 + i] = dsaf_read_dev(ddev,
2214 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2215 p[368 + i] = dsaf_read_dev(ddev,
2216 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2217 p[371 + i] = dsaf_read_dev(ddev,
2218 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2219 p[374 + i] = dsaf_read_dev(ddev,
2220 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2221 p[377 + i] = dsaf_read_dev(ddev,
2222 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2223 p[380 + i] = dsaf_read_dev(ddev,
2224 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2225 p[383 + i] = dsaf_read_dev(ddev,
2226 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2227 p[386 + i] = dsaf_read_dev(ddev,
2228 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2229 p[389 + i] = dsaf_read_dev(ddev,
2230 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2231 }
2232
2233 p[392] = dsaf_read_dev(ddev,
2234 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2235 p[393] = dsaf_read_dev(ddev,
2236 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2237 p[394] = dsaf_read_dev(ddev,
2238 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2239 p[395] = dsaf_read_dev(ddev,
2240 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2241 p[396] = dsaf_read_dev(ddev,
2242 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2243 p[397] = dsaf_read_dev(ddev,
2244 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2245 p[398] = dsaf_read_dev(ddev,
2246 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2247 p[399] = dsaf_read_dev(ddev,
2248 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2249 p[400] = dsaf_read_dev(ddev,
2250 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2251 p[401] = dsaf_read_dev(ddev,
2252 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2253 p[402] = dsaf_read_dev(ddev,
2254 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2255 p[403] = dsaf_read_dev(ddev,
2256 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2257 p[404] = dsaf_read_dev(ddev,
2258 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2259
2260 /* dsaf voq registers */
2261 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2262 j = (i * DSAF_COMM_CHN + port) * 0x90;
2263 p[405 + i] = dsaf_read_dev(ddev,
2264 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2265 p[408 + i] = dsaf_read_dev(ddev,
2266 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2267 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2268 p[414 + i] = dsaf_read_dev(ddev,
2269 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2270 p[417 + i] = dsaf_read_dev(ddev,
2271 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2272 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2273 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2274 p[426 + i] = dsaf_read_dev(ddev,
2275 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2276 p[429 + i] = dsaf_read_dev(ddev,
2277 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2278 p[432 + i] = dsaf_read_dev(ddev,
2279 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2280 p[435 + i] = dsaf_read_dev(ddev,
2281 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2282 p[438 + i] = dsaf_read_dev(ddev,
2283 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2284 }
2285
2286 /* dsaf tbl registers */
2287 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2288 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2289 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2290 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2291 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2292 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2293 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2294 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2295 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2296 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2297 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2298 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2299 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2300 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2301 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2302 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2303 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2304 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2305 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2306 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2307 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2308 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2309 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2310
2311 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2312 j = i * 0x8;
2313 p[464 + 2 * i] = dsaf_read_dev(ddev,
2314 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2315 p[465 + 2 * i] = dsaf_read_dev(ddev,
2316 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2317 }
2318
2319 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2320 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2321 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2322 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2323 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2324 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2325 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2326 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2327 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2328 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2329 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2330 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2331
2332 /* dsaf other registers */
2333 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2334 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2335 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2336 p[495] = dsaf_read_dev(ddev,
2337 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2338 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2339 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2340
2341 /* mark end of dsaf regs */
2342 for (i = 498; i < 504; i++)
2343 p[i] = 0xdddddddd;
2344 }
2345
2346 static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2347 {
2348 char *buff = data;
2349
2350 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2351 buff = buff + ETH_GSTRING_LEN;
2352 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2353 buff = buff + ETH_GSTRING_LEN;
2354 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2355 buff = buff + ETH_GSTRING_LEN;
2356 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2357 buff = buff + ETH_GSTRING_LEN;
2358 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2359 buff = buff + ETH_GSTRING_LEN;
2360 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2361 buff = buff + ETH_GSTRING_LEN;
2362 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2363 buff = buff + ETH_GSTRING_LEN;
2364 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2365 buff = buff + ETH_GSTRING_LEN;
2366 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2367 buff = buff + ETH_GSTRING_LEN;
2368 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2369 buff = buff + ETH_GSTRING_LEN;
2370 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2371 buff = buff + ETH_GSTRING_LEN;
2372 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2373 buff = buff + ETH_GSTRING_LEN;
2374 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2375 buff = buff + ETH_GSTRING_LEN;
2376 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2377 buff = buff + ETH_GSTRING_LEN;
2378
2379 return buff;
2380 }
2381
2382 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2383 int node_num)
2384 {
2385 u64 *p = data;
2386 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2387
2388 p[0] = hw_stats->pad_drop;
2389 p[1] = hw_stats->man_pkts;
2390 p[2] = hw_stats->rx_pkts;
2391 p[3] = hw_stats->rx_pkt_id;
2392 p[4] = hw_stats->rx_pause_frame;
2393 p[5] = hw_stats->release_buf_num;
2394 p[6] = hw_stats->sbm_drop;
2395 p[7] = hw_stats->crc_false;
2396 p[8] = hw_stats->bp_drop;
2397 p[9] = hw_stats->rslt_drop;
2398 p[10] = hw_stats->local_addr_false;
2399 p[11] = hw_stats->vlan_drop;
2400 p[12] = hw_stats->stp_drop;
2401 p[13] = hw_stats->tx_pkts;
2402
2403 return &p[14];
2404 }
2405
2406 /**
2407 *hns_dsaf_get_stats - get dsaf statistic
2408 *@ddev: dsaf device
2409 *@data:statistic value
2410 *@port: port num
2411 */
2412 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2413 {
2414 u64 *p = data;
2415 int node_num = port;
2416
2417 /* for ge/xge node info */
2418 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2419
2420 /* for ppe node info */
2421 node_num = port + DSAF_PPE_INODE_BASE;
2422 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2423 }
2424
2425 /**
2426 *hns_dsaf_get_sset_count - get dsaf string set count
2427 *@stringset: type of values in data
2428 *return dsaf string name count
2429 */
2430 int hns_dsaf_get_sset_count(int stringset)
2431 {
2432 if (stringset == ETH_SS_STATS)
2433 return DSAF_STATIC_NUM;
2434
2435 return 0;
2436 }
2437
2438 /**
2439 *hns_dsaf_get_strings - get dsaf string set
2440 *@stringset:srting set index
2441 *@data:strings name value
2442 *@port:port index
2443 */
2444 void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2445 {
2446 char *buff = (char *)data;
2447 int node = port;
2448
2449 if (stringset != ETH_SS_STATS)
2450 return;
2451
2452 /* for ge/xge node info */
2453 buff = hns_dsaf_get_node_stats_strings(buff, node);
2454
2455 /* for ppe node info */
2456 node = port + DSAF_PPE_INODE_BASE;
2457 (void)hns_dsaf_get_node_stats_strings(buff, node);
2458 }
2459
2460 /**
2461 *hns_dsaf_get_sset_count - get dsaf regs count
2462 *return dsaf regs count
2463 */
2464 int hns_dsaf_get_regs_count(void)
2465 {
2466 return DSAF_DUMP_REGS_NUM;
2467 }
2468
2469 /**
2470 * dsaf_probe - probo dsaf dev
2471 * @pdev: dasf platform device
2472 * retuen 0 - success , negative --fail
2473 */
2474 static int hns_dsaf_probe(struct platform_device *pdev)
2475 {
2476 struct dsaf_device *dsaf_dev;
2477 int ret;
2478
2479 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2480 if (IS_ERR(dsaf_dev)) {
2481 ret = PTR_ERR(dsaf_dev);
2482 dev_err(&pdev->dev,
2483 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2484 return ret;
2485 }
2486
2487 ret = hns_dsaf_get_cfg(dsaf_dev);
2488 if (ret)
2489 goto free_dev;
2490
2491 ret = hns_dsaf_init(dsaf_dev);
2492 if (ret)
2493 goto free_cfg;
2494
2495 ret = hns_mac_init(dsaf_dev);
2496 if (ret)
2497 goto uninit_dsaf;
2498
2499 ret = hns_ppe_init(dsaf_dev);
2500 if (ret)
2501 goto uninit_mac;
2502
2503 ret = hns_dsaf_ae_init(dsaf_dev);
2504 if (ret)
2505 goto uninit_ppe;
2506
2507 return 0;
2508
2509 uninit_ppe:
2510 hns_ppe_uninit(dsaf_dev);
2511
2512 uninit_mac:
2513 hns_mac_uninit(dsaf_dev);
2514
2515 uninit_dsaf:
2516 hns_dsaf_free(dsaf_dev);
2517
2518 free_cfg:
2519 hns_dsaf_free_cfg(dsaf_dev);
2520
2521 free_dev:
2522 hns_dsaf_free_dev(dsaf_dev);
2523
2524 return ret;
2525 }
2526
2527 /**
2528 * dsaf_remove - remove dsaf dev
2529 * @pdev: dasf platform device
2530 */
2531 static int hns_dsaf_remove(struct platform_device *pdev)
2532 {
2533 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2534
2535 hns_dsaf_ae_uninit(dsaf_dev);
2536
2537 hns_ppe_uninit(dsaf_dev);
2538
2539 hns_mac_uninit(dsaf_dev);
2540
2541 hns_dsaf_free(dsaf_dev);
2542
2543 hns_dsaf_free_cfg(dsaf_dev);
2544
2545 hns_dsaf_free_dev(dsaf_dev);
2546
2547 return 0;
2548 }
2549
2550 static const struct of_device_id g_dsaf_match[] = {
2551 {.compatible = "hisilicon,hns-dsaf-v1"},
2552 {.compatible = "hisilicon,hns-dsaf-v2"},
2553 {}
2554 };
2555
2556 static struct platform_driver g_dsaf_driver = {
2557 .probe = hns_dsaf_probe,
2558 .remove = hns_dsaf_remove,
2559 .driver = {
2560 .name = DSAF_DRV_NAME,
2561 .of_match_table = g_dsaf_match,
2562 },
2563 };
2564
2565 module_platform_driver(g_dsaf_driver);
2566
2567 MODULE_LICENSE("GPL");
2568 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2569 MODULE_DESCRIPTION("HNS DSAF driver");
2570 MODULE_VERSION(DSAF_MOD_VERSION);
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