2 * Huawei HiNIC PCI Express Linux driver
3 * Copyright(c) 2017 Huawei Technologies Co., Ltd
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 #ifndef HINIC_HW_DEV_H
17 #define HINIC_HW_DEV_H
19 #include <linux/pci.h>
20 #include <linux/types.h>
21 #include <linux/bitops.h>
23 #include "hinic_hw_if.h"
24 #include "hinic_hw_eqs.h"
25 #include "hinic_hw_mgmt.h"
26 #include "hinic_hw_qp.h"
27 #include "hinic_hw_io.h"
29 #define HINIC_MAX_QPS 32
31 #define HINIC_MGMT_NUM_MSG_CMD (HINIC_MGMT_MSG_CMD_MAX - \
32 HINIC_MGMT_MSG_CMD_BASE)
40 HINIC_PORT_CMD_CHANGE_MTU
= 2,
42 HINIC_PORT_CMD_ADD_VLAN
= 3,
43 HINIC_PORT_CMD_DEL_VLAN
= 4,
45 HINIC_PORT_CMD_SET_MAC
= 9,
46 HINIC_PORT_CMD_GET_MAC
= 10,
47 HINIC_PORT_CMD_DEL_MAC
= 11,
49 HINIC_PORT_CMD_SET_RX_MODE
= 12,
51 HINIC_PORT_CMD_GET_LINK_STATE
= 24,
53 HINIC_PORT_CMD_SET_RX_CSUM
= 26,
55 HINIC_PORT_CMD_SET_PORT_STATE
= 41,
57 HINIC_PORT_CMD_FWCTXT_INIT
= 69,
59 HINIC_PORT_CMD_SET_FUNC_STATE
= 93,
61 HINIC_PORT_CMD_GET_GLOBAL_QPN
= 102,
63 HINIC_PORT_CMD_SET_TSO
= 112,
65 HINIC_PORT_CMD_GET_CAP
= 170,
68 enum hinic_mgmt_msg_cmd
{
69 HINIC_MGMT_MSG_CMD_BASE
= 160,
71 HINIC_MGMT_MSG_CMD_LINK_STATUS
= 160,
73 HINIC_MGMT_MSG_CMD_MAX
,
77 HINIC_CB_ENABLED
= BIT(0),
78 HINIC_CB_RUNNING
= BIT(1),
81 enum hinic_res_state
{
86 struct hinic_cmd_fw_ctxt
{
97 struct hinic_cmd_hw_ioctxt
{
119 struct hinic_cmd_io_status
{
130 struct hinic_cmd_clear_io_res
{
140 struct hinic_cmd_set_res_state
{
151 struct hinic_cmd_base_qpn
{
160 struct hinic_cmd_hw_ci
{
180 struct hinic_hwif
*hwif
;
181 struct msix_entry
*msix_entries
;
183 struct hinic_aeqs aeqs
;
184 struct hinic_func_to_io func_to_io
;
186 struct hinic_cap nic_cap
;
189 struct hinic_nic_cb
{
190 void (*handler
)(void *handle
, void *buf_in
,
191 u16 in_size
, void *buf_out
,
195 unsigned long cb_state
;
198 struct hinic_pfhwdev
{
199 struct hinic_hwdev hwdev
;
201 struct hinic_pf_to_mgmt pf_to_mgmt
;
203 struct hinic_nic_cb nic_cb
[HINIC_MGMT_NUM_MSG_CMD
];
206 void hinic_hwdev_cb_register(struct hinic_hwdev
*hwdev
,
207 enum hinic_mgmt_msg_cmd cmd
, void *handle
,
208 void (*handler
)(void *handle
, void *buf_in
,
209 u16 in_size
, void *buf_out
,
212 void hinic_hwdev_cb_unregister(struct hinic_hwdev
*hwdev
,
213 enum hinic_mgmt_msg_cmd cmd
);
215 int hinic_port_msg_cmd(struct hinic_hwdev
*hwdev
, enum hinic_port_cmd cmd
,
216 void *buf_in
, u16 in_size
, void *buf_out
,
219 int hinic_hwdev_ifup(struct hinic_hwdev
*hwdev
);
221 void hinic_hwdev_ifdown(struct hinic_hwdev
*hwdev
);
223 struct hinic_hwdev
*hinic_init_hwdev(struct pci_dev
*pdev
);
225 void hinic_free_hwdev(struct hinic_hwdev
*hwdev
);
227 int hinic_hwdev_num_qps(struct hinic_hwdev
*hwdev
);
229 struct hinic_sq
*hinic_hwdev_get_sq(struct hinic_hwdev
*hwdev
, int i
);
231 struct hinic_rq
*hinic_hwdev_get_rq(struct hinic_hwdev
*hwdev
, int i
);
233 int hinic_hwdev_msix_cnt_set(struct hinic_hwdev
*hwdev
, u16 msix_index
);
235 int hinic_hwdev_msix_set(struct hinic_hwdev
*hwdev
, u16 msix_index
,
236 u8 pending_limit
, u8 coalesc_timer
,
237 u8 lli_timer_cfg
, u8 lli_credit_limit
,
240 int hinic_hwdev_hw_ci_addr_set(struct hinic_hwdev
*hwdev
, struct hinic_sq
*sq
,
241 u8 pending_limit
, u8 coalesc_timer
);
243 void hinic_hwdev_set_msix_state(struct hinic_hwdev
*hwdev
, u16 msix_index
,
244 enum hinic_msix_state flag
);