1 /* Intel(R) Gigabit Ethernet Linux driver
2 * Copyright(c) 2007-2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, see <http://www.gnu.org/licenses/>.
16 * The full GNU General Public License is included in this distribution in
17 * the file called "COPYING".
19 * Contact Information:
20 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
21 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/bitops.h>
30 #include <linux/vmalloc.h>
31 #include <linux/pagemap.h>
32 #include <linux/netdevice.h>
33 #include <linux/ipv6.h>
34 #include <linux/slab.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42 #include <linux/pci.h>
43 #include <linux/pci-aspm.h>
44 #include <linux/delay.h>
45 #include <linux/interrupt.h>
47 #include <linux/tcp.h>
48 #include <linux/sctp.h>
49 #include <linux/if_ether.h>
50 #include <linux/aer.h>
51 #include <linux/prefetch.h>
52 #include <linux/pm_runtime.h>
54 #include <linux/dca.h>
56 #include <linux/i2c.h>
62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
63 __stringify(BUILD) "-k"
64 char igb_driver_name
[] = "igb";
65 char igb_driver_version
[] = DRV_VERSION
;
66 static const char igb_driver_string
[] =
67 "Intel(R) Gigabit Ethernet Network Driver";
68 static const char igb_copyright
[] =
69 "Copyright (c) 2007-2014 Intel Corporation.";
71 static const struct e1000_info
*igb_info_tbl
[] = {
72 [board_82575
] = &e1000_82575_info
,
75 static const struct pci_device_id igb_pci_tbl
[] = {
76 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_1GBPS
) },
77 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
) },
78 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
) },
79 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER_FLASHLESS
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES_FLASHLESS
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
110 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
111 /* required last entry */
115 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
117 static int igb_setup_all_tx_resources(struct igb_adapter
*);
118 static int igb_setup_all_rx_resources(struct igb_adapter
*);
119 static void igb_free_all_tx_resources(struct igb_adapter
*);
120 static void igb_free_all_rx_resources(struct igb_adapter
*);
121 static void igb_setup_mrqc(struct igb_adapter
*);
122 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
123 static void igb_remove(struct pci_dev
*pdev
);
124 static int igb_sw_init(struct igb_adapter
*);
125 static int igb_open(struct net_device
*);
126 static int igb_close(struct net_device
*);
127 static void igb_configure(struct igb_adapter
*);
128 static void igb_configure_tx(struct igb_adapter
*);
129 static void igb_configure_rx(struct igb_adapter
*);
130 static void igb_clean_all_tx_rings(struct igb_adapter
*);
131 static void igb_clean_all_rx_rings(struct igb_adapter
*);
132 static void igb_clean_tx_ring(struct igb_ring
*);
133 static void igb_clean_rx_ring(struct igb_ring
*);
134 static void igb_set_rx_mode(struct net_device
*);
135 static void igb_update_phy_info(unsigned long);
136 static void igb_watchdog(unsigned long);
137 static void igb_watchdog_task(struct work_struct
*);
138 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
139 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*dev
,
140 struct rtnl_link_stats64
*stats
);
141 static int igb_change_mtu(struct net_device
*, int);
142 static int igb_set_mac(struct net_device
*, void *);
143 static void igb_set_uta(struct igb_adapter
*adapter
);
144 static irqreturn_t
igb_intr(int irq
, void *);
145 static irqreturn_t
igb_intr_msi(int irq
, void *);
146 static irqreturn_t
igb_msix_other(int irq
, void *);
147 static irqreturn_t
igb_msix_ring(int irq
, void *);
148 #ifdef CONFIG_IGB_DCA
149 static void igb_update_dca(struct igb_q_vector
*);
150 static void igb_setup_dca(struct igb_adapter
*);
151 #endif /* CONFIG_IGB_DCA */
152 static int igb_poll(struct napi_struct
*, int);
153 static bool igb_clean_tx_irq(struct igb_q_vector
*);
154 static bool igb_clean_rx_irq(struct igb_q_vector
*, int);
155 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
156 static void igb_tx_timeout(struct net_device
*);
157 static void igb_reset_task(struct work_struct
*);
158 static void igb_vlan_mode(struct net_device
*netdev
,
159 netdev_features_t features
);
160 static int igb_vlan_rx_add_vid(struct net_device
*, __be16
, u16
);
161 static int igb_vlan_rx_kill_vid(struct net_device
*, __be16
, u16
);
162 static void igb_restore_vlan(struct igb_adapter
*);
163 static void igb_rar_set_qsel(struct igb_adapter
*, u8
*, u32
, u8
);
164 static void igb_ping_all_vfs(struct igb_adapter
*);
165 static void igb_msg_task(struct igb_adapter
*);
166 static void igb_vmm_control(struct igb_adapter
*);
167 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
168 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
169 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
170 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
171 int vf
, u16 vlan
, u8 qos
);
172 static int igb_ndo_set_vf_bw(struct net_device
*, int, int, int);
173 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
175 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
176 struct ifla_vf_info
*ivi
);
177 static void igb_check_vf_rate_limit(struct igb_adapter
*);
179 #ifdef CONFIG_PCI_IOV
180 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
181 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
);
185 #ifdef CONFIG_PM_SLEEP
186 static int igb_suspend(struct device
*);
188 static int igb_resume(struct device
*);
189 #ifdef CONFIG_PM_RUNTIME
190 static int igb_runtime_suspend(struct device
*dev
);
191 static int igb_runtime_resume(struct device
*dev
);
192 static int igb_runtime_idle(struct device
*dev
);
194 static const struct dev_pm_ops igb_pm_ops
= {
195 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
196 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
200 static void igb_shutdown(struct pci_dev
*);
201 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
202 #ifdef CONFIG_IGB_DCA
203 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
204 static struct notifier_block dca_notifier
= {
205 .notifier_call
= igb_notify_dca
,
210 #ifdef CONFIG_NET_POLL_CONTROLLER
211 /* for netdump / net console */
212 static void igb_netpoll(struct net_device
*);
214 #ifdef CONFIG_PCI_IOV
215 static unsigned int max_vfs
;
216 module_param(max_vfs
, uint
, 0);
217 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate per physical function");
218 #endif /* CONFIG_PCI_IOV */
220 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
221 pci_channel_state_t
);
222 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
223 static void igb_io_resume(struct pci_dev
*);
225 static const struct pci_error_handlers igb_err_handler
= {
226 .error_detected
= igb_io_error_detected
,
227 .slot_reset
= igb_io_slot_reset
,
228 .resume
= igb_io_resume
,
231 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
233 static struct pci_driver igb_driver
= {
234 .name
= igb_driver_name
,
235 .id_table
= igb_pci_tbl
,
237 .remove
= igb_remove
,
239 .driver
.pm
= &igb_pm_ops
,
241 .shutdown
= igb_shutdown
,
242 .sriov_configure
= igb_pci_sriov_configure
,
243 .err_handler
= &igb_err_handler
246 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
247 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
248 MODULE_LICENSE("GPL");
249 MODULE_VERSION(DRV_VERSION
);
251 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
252 static int debug
= -1;
253 module_param(debug
, int, 0);
254 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
256 struct igb_reg_info
{
261 static const struct igb_reg_info igb_reg_info_tbl
[] = {
263 /* General Registers */
264 {E1000_CTRL
, "CTRL"},
265 {E1000_STATUS
, "STATUS"},
266 {E1000_CTRL_EXT
, "CTRL_EXT"},
268 /* Interrupt Registers */
272 {E1000_RCTL
, "RCTL"},
273 {E1000_RDLEN(0), "RDLEN"},
274 {E1000_RDH(0), "RDH"},
275 {E1000_RDT(0), "RDT"},
276 {E1000_RXDCTL(0), "RXDCTL"},
277 {E1000_RDBAL(0), "RDBAL"},
278 {E1000_RDBAH(0), "RDBAH"},
281 {E1000_TCTL
, "TCTL"},
282 {E1000_TDBAL(0), "TDBAL"},
283 {E1000_TDBAH(0), "TDBAH"},
284 {E1000_TDLEN(0), "TDLEN"},
285 {E1000_TDH(0), "TDH"},
286 {E1000_TDT(0), "TDT"},
287 {E1000_TXDCTL(0), "TXDCTL"},
288 {E1000_TDFH
, "TDFH"},
289 {E1000_TDFT
, "TDFT"},
290 {E1000_TDFHS
, "TDFHS"},
291 {E1000_TDFPC
, "TDFPC"},
293 /* List Terminator */
297 /* igb_regdump - register printout routine */
298 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
304 switch (reginfo
->ofs
) {
306 for (n
= 0; n
< 4; n
++)
307 regs
[n
] = rd32(E1000_RDLEN(n
));
310 for (n
= 0; n
< 4; n
++)
311 regs
[n
] = rd32(E1000_RDH(n
));
314 for (n
= 0; n
< 4; n
++)
315 regs
[n
] = rd32(E1000_RDT(n
));
317 case E1000_RXDCTL(0):
318 for (n
= 0; n
< 4; n
++)
319 regs
[n
] = rd32(E1000_RXDCTL(n
));
322 for (n
= 0; n
< 4; n
++)
323 regs
[n
] = rd32(E1000_RDBAL(n
));
326 for (n
= 0; n
< 4; n
++)
327 regs
[n
] = rd32(E1000_RDBAH(n
));
330 for (n
= 0; n
< 4; n
++)
331 regs
[n
] = rd32(E1000_RDBAL(n
));
334 for (n
= 0; n
< 4; n
++)
335 regs
[n
] = rd32(E1000_TDBAH(n
));
338 for (n
= 0; n
< 4; n
++)
339 regs
[n
] = rd32(E1000_TDLEN(n
));
342 for (n
= 0; n
< 4; n
++)
343 regs
[n
] = rd32(E1000_TDH(n
));
346 for (n
= 0; n
< 4; n
++)
347 regs
[n
] = rd32(E1000_TDT(n
));
349 case E1000_TXDCTL(0):
350 for (n
= 0; n
< 4; n
++)
351 regs
[n
] = rd32(E1000_TXDCTL(n
));
354 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
358 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
359 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
363 /* igb_dump - Print registers, Tx-rings and Rx-rings */
364 static void igb_dump(struct igb_adapter
*adapter
)
366 struct net_device
*netdev
= adapter
->netdev
;
367 struct e1000_hw
*hw
= &adapter
->hw
;
368 struct igb_reg_info
*reginfo
;
369 struct igb_ring
*tx_ring
;
370 union e1000_adv_tx_desc
*tx_desc
;
371 struct my_u0
{ u64 a
; u64 b
; } *u0
;
372 struct igb_ring
*rx_ring
;
373 union e1000_adv_rx_desc
*rx_desc
;
377 if (!netif_msg_hw(adapter
))
380 /* Print netdevice Info */
382 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
383 pr_info("Device Name state trans_start last_rx\n");
384 pr_info("%-15s %016lX %016lX %016lX\n", netdev
->name
,
385 netdev
->state
, netdev
->trans_start
, netdev
->last_rx
);
388 /* Print Registers */
389 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
390 pr_info(" Register Name Value\n");
391 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
392 reginfo
->name
; reginfo
++) {
393 igb_regdump(hw
, reginfo
);
396 /* Print TX Ring Summary */
397 if (!netdev
|| !netif_running(netdev
))
400 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
401 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
402 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
403 struct igb_tx_buffer
*buffer_info
;
404 tx_ring
= adapter
->tx_ring
[n
];
405 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
406 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
407 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
408 (u64
)dma_unmap_addr(buffer_info
, dma
),
409 dma_unmap_len(buffer_info
, len
),
410 buffer_info
->next_to_watch
,
411 (u64
)buffer_info
->time_stamp
);
415 if (!netif_msg_tx_done(adapter
))
416 goto rx_ring_summary
;
418 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
420 /* Transmit Descriptor Formats
422 * Advanced Transmit Descriptor
423 * +--------------------------------------------------------------+
424 * 0 | Buffer Address [63:0] |
425 * +--------------------------------------------------------------+
426 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
427 * +--------------------------------------------------------------+
428 * 63 46 45 40 39 38 36 35 32 31 24 15 0
431 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
432 tx_ring
= adapter
->tx_ring
[n
];
433 pr_info("------------------------------------\n");
434 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
435 pr_info("------------------------------------\n");
436 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
438 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
439 const char *next_desc
;
440 struct igb_tx_buffer
*buffer_info
;
441 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
442 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
443 u0
= (struct my_u0
*)tx_desc
;
444 if (i
== tx_ring
->next_to_use
&&
445 i
== tx_ring
->next_to_clean
)
446 next_desc
= " NTC/U";
447 else if (i
== tx_ring
->next_to_use
)
449 else if (i
== tx_ring
->next_to_clean
)
454 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
455 i
, le64_to_cpu(u0
->a
),
457 (u64
)dma_unmap_addr(buffer_info
, dma
),
458 dma_unmap_len(buffer_info
, len
),
459 buffer_info
->next_to_watch
,
460 (u64
)buffer_info
->time_stamp
,
461 buffer_info
->skb
, next_desc
);
463 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
464 print_hex_dump(KERN_INFO
, "",
466 16, 1, buffer_info
->skb
->data
,
467 dma_unmap_len(buffer_info
, len
),
472 /* Print RX Rings Summary */
474 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
475 pr_info("Queue [NTU] [NTC]\n");
476 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
477 rx_ring
= adapter
->rx_ring
[n
];
478 pr_info(" %5d %5X %5X\n",
479 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
483 if (!netif_msg_rx_status(adapter
))
486 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
488 /* Advanced Receive Descriptor (Read) Format
490 * +-----------------------------------------------------+
491 * 0 | Packet Buffer Address [63:1] |A0/NSE|
492 * +----------------------------------------------+------+
493 * 8 | Header Buffer Address [63:1] | DD |
494 * +-----------------------------------------------------+
497 * Advanced Receive Descriptor (Write-Back) Format
499 * 63 48 47 32 31 30 21 20 17 16 4 3 0
500 * +------------------------------------------------------+
501 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
502 * | Checksum Ident | | | | Type | Type |
503 * +------------------------------------------------------+
504 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
505 * +------------------------------------------------------+
506 * 63 48 47 32 31 20 19 0
509 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
510 rx_ring
= adapter
->rx_ring
[n
];
511 pr_info("------------------------------------\n");
512 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
513 pr_info("------------------------------------\n");
514 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
515 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
517 for (i
= 0; i
< rx_ring
->count
; i
++) {
518 const char *next_desc
;
519 struct igb_rx_buffer
*buffer_info
;
520 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
521 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
522 u0
= (struct my_u0
*)rx_desc
;
523 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
525 if (i
== rx_ring
->next_to_use
)
527 else if (i
== rx_ring
->next_to_clean
)
532 if (staterr
& E1000_RXD_STAT_DD
) {
533 /* Descriptor Done */
534 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
540 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
544 (u64
)buffer_info
->dma
,
547 if (netif_msg_pktdata(adapter
) &&
548 buffer_info
->dma
&& buffer_info
->page
) {
549 print_hex_dump(KERN_INFO
, "",
552 page_address(buffer_info
->page
) +
553 buffer_info
->page_offset
,
565 * igb_get_i2c_data - Reads the I2C SDA data bit
566 * @hw: pointer to hardware structure
567 * @i2cctl: Current value of I2CCTL register
569 * Returns the I2C data bit value
571 static int igb_get_i2c_data(void *data
)
573 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
574 struct e1000_hw
*hw
= &adapter
->hw
;
575 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
577 return !!(i2cctl
& E1000_I2C_DATA_IN
);
581 * igb_set_i2c_data - Sets the I2C data bit
582 * @data: pointer to hardware structure
583 * @state: I2C data value (0 or 1) to set
585 * Sets the I2C data bit
587 static void igb_set_i2c_data(void *data
, int state
)
589 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
590 struct e1000_hw
*hw
= &adapter
->hw
;
591 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
594 i2cctl
|= E1000_I2C_DATA_OUT
;
596 i2cctl
&= ~E1000_I2C_DATA_OUT
;
598 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
599 i2cctl
|= E1000_I2C_CLK_OE_N
;
600 wr32(E1000_I2CPARAMS
, i2cctl
);
606 * igb_set_i2c_clk - Sets the I2C SCL clock
607 * @data: pointer to hardware structure
608 * @state: state to set clock
610 * Sets the I2C clock line to state
612 static void igb_set_i2c_clk(void *data
, int state
)
614 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
615 struct e1000_hw
*hw
= &adapter
->hw
;
616 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
619 i2cctl
|= E1000_I2C_CLK_OUT
;
620 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
622 i2cctl
&= ~E1000_I2C_CLK_OUT
;
623 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
625 wr32(E1000_I2CPARAMS
, i2cctl
);
630 * igb_get_i2c_clk - Gets the I2C SCL clock state
631 * @data: pointer to hardware structure
633 * Gets the I2C clock state
635 static int igb_get_i2c_clk(void *data
)
637 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
638 struct e1000_hw
*hw
= &adapter
->hw
;
639 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
641 return !!(i2cctl
& E1000_I2C_CLK_IN
);
644 static const struct i2c_algo_bit_data igb_i2c_algo
= {
645 .setsda
= igb_set_i2c_data
,
646 .setscl
= igb_set_i2c_clk
,
647 .getsda
= igb_get_i2c_data
,
648 .getscl
= igb_get_i2c_clk
,
654 * igb_get_hw_dev - return device
655 * @hw: pointer to hardware structure
657 * used by hardware layer to print debugging information
659 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
661 struct igb_adapter
*adapter
= hw
->back
;
662 return adapter
->netdev
;
666 * igb_init_module - Driver Registration Routine
668 * igb_init_module is the first routine called when the driver is
669 * loaded. All it does is register with the PCI subsystem.
671 static int __init
igb_init_module(void)
675 pr_info("%s - version %s\n",
676 igb_driver_string
, igb_driver_version
);
677 pr_info("%s\n", igb_copyright
);
679 #ifdef CONFIG_IGB_DCA
680 dca_register_notify(&dca_notifier
);
682 ret
= pci_register_driver(&igb_driver
);
686 module_init(igb_init_module
);
689 * igb_exit_module - Driver Exit Cleanup Routine
691 * igb_exit_module is called just before the driver is removed
694 static void __exit
igb_exit_module(void)
696 #ifdef CONFIG_IGB_DCA
697 dca_unregister_notify(&dca_notifier
);
699 pci_unregister_driver(&igb_driver
);
702 module_exit(igb_exit_module
);
704 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
706 * igb_cache_ring_register - Descriptor ring to register mapping
707 * @adapter: board private structure to initialize
709 * Once we know the feature-set enabled for the device, we'll cache
710 * the register offset the descriptor ring is assigned to.
712 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
715 u32 rbase_offset
= adapter
->vfs_allocated_count
;
717 switch (adapter
->hw
.mac
.type
) {
719 /* The queues are allocated for virtualization such that VF 0
720 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
721 * In order to avoid collision we start at the first free queue
722 * and continue consuming queues in the same sequence
724 if (adapter
->vfs_allocated_count
) {
725 for (; i
< adapter
->rss_queues
; i
++)
726 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
738 for (; i
< adapter
->num_rx_queues
; i
++)
739 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
740 for (; j
< adapter
->num_tx_queues
; j
++)
741 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
746 u32
igb_rd32(struct e1000_hw
*hw
, u32 reg
)
748 struct igb_adapter
*igb
= container_of(hw
, struct igb_adapter
, hw
);
749 u8 __iomem
*hw_addr
= ACCESS_ONCE(hw
->hw_addr
);
752 if (E1000_REMOVED(hw_addr
))
755 value
= readl(&hw_addr
[reg
]);
757 /* reads should not return all F's */
758 if (!(~value
) && (!reg
|| !(~readl(hw_addr
)))) {
759 struct net_device
*netdev
= igb
->netdev
;
761 netif_device_detach(netdev
);
762 netdev_err(netdev
, "PCIe link lost, device now detached\n");
769 * igb_write_ivar - configure ivar for given MSI-X vector
770 * @hw: pointer to the HW structure
771 * @msix_vector: vector number we are allocating to a given ring
772 * @index: row index of IVAR register to write within IVAR table
773 * @offset: column offset of in IVAR, should be multiple of 8
775 * This function is intended to handle the writing of the IVAR register
776 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
777 * each containing an cause allocation for an Rx and Tx ring, and a
778 * variable number of rows depending on the number of queues supported.
780 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
781 int index
, int offset
)
783 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
785 /* clear any bits that are currently set */
786 ivar
&= ~((u32
)0xFF << offset
);
788 /* write vector and valid bit */
789 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
791 array_wr32(E1000_IVAR0
, index
, ivar
);
794 #define IGB_N0_QUEUE -1
795 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
797 struct igb_adapter
*adapter
= q_vector
->adapter
;
798 struct e1000_hw
*hw
= &adapter
->hw
;
799 int rx_queue
= IGB_N0_QUEUE
;
800 int tx_queue
= IGB_N0_QUEUE
;
803 if (q_vector
->rx
.ring
)
804 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
805 if (q_vector
->tx
.ring
)
806 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
808 switch (hw
->mac
.type
) {
810 /* The 82575 assigns vectors using a bitmask, which matches the
811 * bitmask for the EICR/EIMS/EIMC registers. To assign one
812 * or more queues to a vector, we write the appropriate bits
813 * into the MSIXBM register for that vector.
815 if (rx_queue
> IGB_N0_QUEUE
)
816 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
817 if (tx_queue
> IGB_N0_QUEUE
)
818 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
819 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) && msix_vector
== 0)
820 msixbm
|= E1000_EIMS_OTHER
;
821 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
822 q_vector
->eims_value
= msixbm
;
825 /* 82576 uses a table that essentially consists of 2 columns
826 * with 8 rows. The ordering is column-major so we use the
827 * lower 3 bits as the row index, and the 4th bit as the
830 if (rx_queue
> IGB_N0_QUEUE
)
831 igb_write_ivar(hw
, msix_vector
,
833 (rx_queue
& 0x8) << 1);
834 if (tx_queue
> IGB_N0_QUEUE
)
835 igb_write_ivar(hw
, msix_vector
,
837 ((tx_queue
& 0x8) << 1) + 8);
838 q_vector
->eims_value
= 1 << msix_vector
;
845 /* On 82580 and newer adapters the scheme is similar to 82576
846 * however instead of ordering column-major we have things
847 * ordered row-major. So we traverse the table by using
848 * bit 0 as the column offset, and the remaining bits as the
851 if (rx_queue
> IGB_N0_QUEUE
)
852 igb_write_ivar(hw
, msix_vector
,
854 (rx_queue
& 0x1) << 4);
855 if (tx_queue
> IGB_N0_QUEUE
)
856 igb_write_ivar(hw
, msix_vector
,
858 ((tx_queue
& 0x1) << 4) + 8);
859 q_vector
->eims_value
= 1 << msix_vector
;
866 /* add q_vector eims value to global eims_enable_mask */
867 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
869 /* configure q_vector to set itr on first interrupt */
870 q_vector
->set_itr
= 1;
874 * igb_configure_msix - Configure MSI-X hardware
875 * @adapter: board private structure to initialize
877 * igb_configure_msix sets up the hardware to properly
878 * generate MSI-X interrupts.
880 static void igb_configure_msix(struct igb_adapter
*adapter
)
884 struct e1000_hw
*hw
= &adapter
->hw
;
886 adapter
->eims_enable_mask
= 0;
888 /* set vector for other causes, i.e. link changes */
889 switch (hw
->mac
.type
) {
891 tmp
= rd32(E1000_CTRL_EXT
);
892 /* enable MSI-X PBA support*/
893 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
895 /* Auto-Mask interrupts upon ICR read. */
896 tmp
|= E1000_CTRL_EXT_EIAME
;
897 tmp
|= E1000_CTRL_EXT_IRCA
;
899 wr32(E1000_CTRL_EXT
, tmp
);
901 /* enable msix_other interrupt */
902 array_wr32(E1000_MSIXBM(0), vector
++, E1000_EIMS_OTHER
);
903 adapter
->eims_other
= E1000_EIMS_OTHER
;
913 /* Turn on MSI-X capability first, or our settings
914 * won't stick. And it will take days to debug.
916 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
917 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
920 /* enable msix_other interrupt */
921 adapter
->eims_other
= 1 << vector
;
922 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
924 wr32(E1000_IVAR_MISC
, tmp
);
927 /* do nothing, since nothing else supports MSI-X */
929 } /* switch (hw->mac.type) */
931 adapter
->eims_enable_mask
|= adapter
->eims_other
;
933 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
934 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
940 * igb_request_msix - Initialize MSI-X interrupts
941 * @adapter: board private structure to initialize
943 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
946 static int igb_request_msix(struct igb_adapter
*adapter
)
948 struct net_device
*netdev
= adapter
->netdev
;
949 struct e1000_hw
*hw
= &adapter
->hw
;
950 int i
, err
= 0, vector
= 0, free_vector
= 0;
952 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
953 igb_msix_other
, 0, netdev
->name
, adapter
);
957 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
958 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
962 q_vector
->itr_register
= hw
->hw_addr
+ E1000_EITR(vector
);
964 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
965 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
966 q_vector
->rx
.ring
->queue_index
);
967 else if (q_vector
->tx
.ring
)
968 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
969 q_vector
->tx
.ring
->queue_index
);
970 else if (q_vector
->rx
.ring
)
971 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
972 q_vector
->rx
.ring
->queue_index
);
974 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
976 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
977 igb_msix_ring
, 0, q_vector
->name
,
983 igb_configure_msix(adapter
);
987 /* free already assigned IRQs */
988 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
991 for (i
= 0; i
< vector
; i
++) {
992 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
993 adapter
->q_vector
[i
]);
1000 * igb_free_q_vector - Free memory allocated for specific interrupt vector
1001 * @adapter: board private structure to initialize
1002 * @v_idx: Index of vector to be freed
1004 * This function frees the memory allocated to the q_vector.
1006 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1008 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1010 adapter
->q_vector
[v_idx
] = NULL
;
1012 /* igb_get_stats64() might access the rings on this vector,
1013 * we must wait a grace period before freeing it.
1015 kfree_rcu(q_vector
, rcu
);
1019 * igb_reset_q_vector - Reset config for interrupt vector
1020 * @adapter: board private structure to initialize
1021 * @v_idx: Index of vector to be reset
1023 * If NAPI is enabled it will delete any references to the
1024 * NAPI struct. This is preparation for igb_free_q_vector.
1026 static void igb_reset_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1028 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1030 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1031 * allocated. So, q_vector is NULL so we should stop here.
1036 if (q_vector
->tx
.ring
)
1037 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1039 if (q_vector
->rx
.ring
)
1040 adapter
->tx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1042 netif_napi_del(&q_vector
->napi
);
1046 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
1048 int v_idx
= adapter
->num_q_vectors
;
1050 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1051 pci_disable_msix(adapter
->pdev
);
1052 else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
1053 pci_disable_msi(adapter
->pdev
);
1056 igb_reset_q_vector(adapter
, v_idx
);
1060 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1061 * @adapter: board private structure to initialize
1063 * This function frees the memory allocated to the q_vectors. In addition if
1064 * NAPI is enabled it will delete any references to the NAPI struct prior
1065 * to freeing the q_vector.
1067 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1069 int v_idx
= adapter
->num_q_vectors
;
1071 adapter
->num_tx_queues
= 0;
1072 adapter
->num_rx_queues
= 0;
1073 adapter
->num_q_vectors
= 0;
1076 igb_reset_q_vector(adapter
, v_idx
);
1077 igb_free_q_vector(adapter
, v_idx
);
1082 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1083 * @adapter: board private structure to initialize
1085 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1086 * MSI-X interrupts allocated.
1088 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1090 igb_free_q_vectors(adapter
);
1091 igb_reset_interrupt_capability(adapter
);
1095 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1096 * @adapter: board private structure to initialize
1097 * @msix: boolean value of MSIX capability
1099 * Attempt to configure interrupts using the best available
1100 * capabilities of the hardware and kernel.
1102 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1109 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
1111 /* Number of supported queues. */
1112 adapter
->num_rx_queues
= adapter
->rss_queues
;
1113 if (adapter
->vfs_allocated_count
)
1114 adapter
->num_tx_queues
= 1;
1116 adapter
->num_tx_queues
= adapter
->rss_queues
;
1118 /* start with one vector for every Rx queue */
1119 numvecs
= adapter
->num_rx_queues
;
1121 /* if Tx handler is separate add 1 for every Tx queue */
1122 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1123 numvecs
+= adapter
->num_tx_queues
;
1125 /* store the number of vectors reserved for queues */
1126 adapter
->num_q_vectors
= numvecs
;
1128 /* add 1 vector for link status interrupts */
1130 for (i
= 0; i
< numvecs
; i
++)
1131 adapter
->msix_entries
[i
].entry
= i
;
1133 err
= pci_enable_msix_range(adapter
->pdev
,
1134 adapter
->msix_entries
,
1140 igb_reset_interrupt_capability(adapter
);
1142 /* If we can't do MSI-X, try MSI */
1144 adapter
->flags
&= ~IGB_FLAG_HAS_MSIX
;
1145 #ifdef CONFIG_PCI_IOV
1146 /* disable SR-IOV for non MSI-X configurations */
1147 if (adapter
->vf_data
) {
1148 struct e1000_hw
*hw
= &adapter
->hw
;
1149 /* disable iov and allow time for transactions to clear */
1150 pci_disable_sriov(adapter
->pdev
);
1153 kfree(adapter
->vf_data
);
1154 adapter
->vf_data
= NULL
;
1155 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1158 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1161 adapter
->vfs_allocated_count
= 0;
1162 adapter
->rss_queues
= 1;
1163 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1164 adapter
->num_rx_queues
= 1;
1165 adapter
->num_tx_queues
= 1;
1166 adapter
->num_q_vectors
= 1;
1167 if (!pci_enable_msi(adapter
->pdev
))
1168 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1171 static void igb_add_ring(struct igb_ring
*ring
,
1172 struct igb_ring_container
*head
)
1179 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1180 * @adapter: board private structure to initialize
1181 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1182 * @v_idx: index of vector in adapter struct
1183 * @txr_count: total number of Tx rings to allocate
1184 * @txr_idx: index of first Tx ring to allocate
1185 * @rxr_count: total number of Rx rings to allocate
1186 * @rxr_idx: index of first Rx ring to allocate
1188 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1190 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1191 int v_count
, int v_idx
,
1192 int txr_count
, int txr_idx
,
1193 int rxr_count
, int rxr_idx
)
1195 struct igb_q_vector
*q_vector
;
1196 struct igb_ring
*ring
;
1197 int ring_count
, size
;
1199 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1200 if (txr_count
> 1 || rxr_count
> 1)
1203 ring_count
= txr_count
+ rxr_count
;
1204 size
= sizeof(struct igb_q_vector
) +
1205 (sizeof(struct igb_ring
) * ring_count
);
1207 /* allocate q_vector and rings */
1208 q_vector
= adapter
->q_vector
[v_idx
];
1210 q_vector
= kzalloc(size
, GFP_KERNEL
);
1214 /* initialize NAPI */
1215 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1218 /* tie q_vector and adapter together */
1219 adapter
->q_vector
[v_idx
] = q_vector
;
1220 q_vector
->adapter
= adapter
;
1222 /* initialize work limits */
1223 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1225 /* initialize ITR configuration */
1226 q_vector
->itr_register
= adapter
->hw
.hw_addr
+ E1000_EITR(0);
1227 q_vector
->itr_val
= IGB_START_ITR
;
1229 /* initialize pointer to rings */
1230 ring
= q_vector
->ring
;
1234 /* rx or rx/tx vector */
1235 if (!adapter
->rx_itr_setting
|| adapter
->rx_itr_setting
> 3)
1236 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1238 /* tx only vector */
1239 if (!adapter
->tx_itr_setting
|| adapter
->tx_itr_setting
> 3)
1240 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1244 /* assign generic ring traits */
1245 ring
->dev
= &adapter
->pdev
->dev
;
1246 ring
->netdev
= adapter
->netdev
;
1248 /* configure backlink on ring */
1249 ring
->q_vector
= q_vector
;
1251 /* update q_vector Tx values */
1252 igb_add_ring(ring
, &q_vector
->tx
);
1254 /* For 82575, context index must be unique per ring. */
1255 if (adapter
->hw
.mac
.type
== e1000_82575
)
1256 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1258 /* apply Tx specific ring traits */
1259 ring
->count
= adapter
->tx_ring_count
;
1260 ring
->queue_index
= txr_idx
;
1262 u64_stats_init(&ring
->tx_syncp
);
1263 u64_stats_init(&ring
->tx_syncp2
);
1265 /* assign ring to adapter */
1266 adapter
->tx_ring
[txr_idx
] = ring
;
1268 /* push pointer to next ring */
1273 /* assign generic ring traits */
1274 ring
->dev
= &adapter
->pdev
->dev
;
1275 ring
->netdev
= adapter
->netdev
;
1277 /* configure backlink on ring */
1278 ring
->q_vector
= q_vector
;
1280 /* update q_vector Rx values */
1281 igb_add_ring(ring
, &q_vector
->rx
);
1283 /* set flag indicating ring supports SCTP checksum offload */
1284 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1285 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1287 /* On i350, i354, i210, and i211, loopback VLAN packets
1288 * have the tag byte-swapped.
1290 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1291 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1293 /* apply Rx specific ring traits */
1294 ring
->count
= adapter
->rx_ring_count
;
1295 ring
->queue_index
= rxr_idx
;
1297 u64_stats_init(&ring
->rx_syncp
);
1299 /* assign ring to adapter */
1300 adapter
->rx_ring
[rxr_idx
] = ring
;
1308 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1309 * @adapter: board private structure to initialize
1311 * We allocate one q_vector per queue interrupt. If allocation fails we
1314 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1316 int q_vectors
= adapter
->num_q_vectors
;
1317 int rxr_remaining
= adapter
->num_rx_queues
;
1318 int txr_remaining
= adapter
->num_tx_queues
;
1319 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1322 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1323 for (; rxr_remaining
; v_idx
++) {
1324 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1330 /* update counts and index */
1336 for (; v_idx
< q_vectors
; v_idx
++) {
1337 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1338 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1340 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1341 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1346 /* update counts and index */
1347 rxr_remaining
-= rqpv
;
1348 txr_remaining
-= tqpv
;
1356 adapter
->num_tx_queues
= 0;
1357 adapter
->num_rx_queues
= 0;
1358 adapter
->num_q_vectors
= 0;
1361 igb_free_q_vector(adapter
, v_idx
);
1367 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1368 * @adapter: board private structure to initialize
1369 * @msix: boolean value of MSIX capability
1371 * This function initializes the interrupts and allocates all of the queues.
1373 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1375 struct pci_dev
*pdev
= adapter
->pdev
;
1378 igb_set_interrupt_capability(adapter
, msix
);
1380 err
= igb_alloc_q_vectors(adapter
);
1382 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1383 goto err_alloc_q_vectors
;
1386 igb_cache_ring_register(adapter
);
1390 err_alloc_q_vectors
:
1391 igb_reset_interrupt_capability(adapter
);
1396 * igb_request_irq - initialize interrupts
1397 * @adapter: board private structure to initialize
1399 * Attempts to configure interrupts using the best available
1400 * capabilities of the hardware and kernel.
1402 static int igb_request_irq(struct igb_adapter
*adapter
)
1404 struct net_device
*netdev
= adapter
->netdev
;
1405 struct pci_dev
*pdev
= adapter
->pdev
;
1408 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1409 err
= igb_request_msix(adapter
);
1412 /* fall back to MSI */
1413 igb_free_all_tx_resources(adapter
);
1414 igb_free_all_rx_resources(adapter
);
1416 igb_clear_interrupt_scheme(adapter
);
1417 err
= igb_init_interrupt_scheme(adapter
, false);
1421 igb_setup_all_tx_resources(adapter
);
1422 igb_setup_all_rx_resources(adapter
);
1423 igb_configure(adapter
);
1426 igb_assign_vector(adapter
->q_vector
[0], 0);
1428 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1429 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1430 netdev
->name
, adapter
);
1434 /* fall back to legacy interrupts */
1435 igb_reset_interrupt_capability(adapter
);
1436 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1439 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1440 netdev
->name
, adapter
);
1443 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1450 static void igb_free_irq(struct igb_adapter
*adapter
)
1452 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1455 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1457 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1458 free_irq(adapter
->msix_entries
[vector
++].vector
,
1459 adapter
->q_vector
[i
]);
1461 free_irq(adapter
->pdev
->irq
, adapter
);
1466 * igb_irq_disable - Mask off interrupt generation on the NIC
1467 * @adapter: board private structure
1469 static void igb_irq_disable(struct igb_adapter
*adapter
)
1471 struct e1000_hw
*hw
= &adapter
->hw
;
1473 /* we need to be careful when disabling interrupts. The VFs are also
1474 * mapped into these registers and so clearing the bits can cause
1475 * issues on the VF drivers so we only need to clear what we set
1477 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1478 u32 regval
= rd32(E1000_EIAM
);
1480 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1481 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1482 regval
= rd32(E1000_EIAC
);
1483 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1487 wr32(E1000_IMC
, ~0);
1489 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1492 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1493 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1495 synchronize_irq(adapter
->pdev
->irq
);
1500 * igb_irq_enable - Enable default interrupt generation settings
1501 * @adapter: board private structure
1503 static void igb_irq_enable(struct igb_adapter
*adapter
)
1505 struct e1000_hw
*hw
= &adapter
->hw
;
1507 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1508 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1509 u32 regval
= rd32(E1000_EIAC
);
1511 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1512 regval
= rd32(E1000_EIAM
);
1513 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1514 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1515 if (adapter
->vfs_allocated_count
) {
1516 wr32(E1000_MBVFIMR
, 0xFF);
1517 ims
|= E1000_IMS_VMMB
;
1519 wr32(E1000_IMS
, ims
);
1521 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1523 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1528 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1530 struct e1000_hw
*hw
= &adapter
->hw
;
1531 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1532 u16 old_vid
= adapter
->mng_vlan_id
;
1534 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1535 /* add VID to filter table */
1536 igb_vfta_set(hw
, vid
, true);
1537 adapter
->mng_vlan_id
= vid
;
1539 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1542 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1544 !test_bit(old_vid
, adapter
->active_vlans
)) {
1545 /* remove VID from filter table */
1546 igb_vfta_set(hw
, old_vid
, false);
1551 * igb_release_hw_control - release control of the h/w to f/w
1552 * @adapter: address of board private structure
1554 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1555 * For ASF and Pass Through versions of f/w this means that the
1556 * driver is no longer loaded.
1558 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1560 struct e1000_hw
*hw
= &adapter
->hw
;
1563 /* Let firmware take over control of h/w */
1564 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1565 wr32(E1000_CTRL_EXT
,
1566 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1570 * igb_get_hw_control - get control of the h/w from f/w
1571 * @adapter: address of board private structure
1573 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1574 * For ASF and Pass Through versions of f/w this means that
1575 * the driver is loaded.
1577 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1579 struct e1000_hw
*hw
= &adapter
->hw
;
1582 /* Let firmware know the driver has taken over */
1583 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1584 wr32(E1000_CTRL_EXT
,
1585 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1589 * igb_configure - configure the hardware for RX and TX
1590 * @adapter: private board structure
1592 static void igb_configure(struct igb_adapter
*adapter
)
1594 struct net_device
*netdev
= adapter
->netdev
;
1597 igb_get_hw_control(adapter
);
1598 igb_set_rx_mode(netdev
);
1600 igb_restore_vlan(adapter
);
1602 igb_setup_tctl(adapter
);
1603 igb_setup_mrqc(adapter
);
1604 igb_setup_rctl(adapter
);
1606 igb_configure_tx(adapter
);
1607 igb_configure_rx(adapter
);
1609 igb_rx_fifo_flush_82575(&adapter
->hw
);
1611 /* call igb_desc_unused which always leaves
1612 * at least 1 descriptor unused to make sure
1613 * next_to_use != next_to_clean
1615 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1616 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1617 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1622 * igb_power_up_link - Power up the phy/serdes link
1623 * @adapter: address of board private structure
1625 void igb_power_up_link(struct igb_adapter
*adapter
)
1627 igb_reset_phy(&adapter
->hw
);
1629 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1630 igb_power_up_phy_copper(&adapter
->hw
);
1632 igb_power_up_serdes_link_82575(&adapter
->hw
);
1636 * igb_power_down_link - Power down the phy/serdes link
1637 * @adapter: address of board private structure
1639 static void igb_power_down_link(struct igb_adapter
*adapter
)
1641 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1642 igb_power_down_phy_copper_82575(&adapter
->hw
);
1644 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1648 * Detect and switch function for Media Auto Sense
1649 * @adapter: address of the board private structure
1651 static void igb_check_swap_media(struct igb_adapter
*adapter
)
1653 struct e1000_hw
*hw
= &adapter
->hw
;
1654 u32 ctrl_ext
, connsw
;
1655 bool swap_now
= false;
1657 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1658 connsw
= rd32(E1000_CONNSW
);
1660 /* need to live swap if current media is copper and we have fiber/serdes
1664 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1665 (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))) {
1667 } else if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1668 /* copper signal takes time to appear */
1669 if (adapter
->copper_tries
< 4) {
1670 adapter
->copper_tries
++;
1671 connsw
|= E1000_CONNSW_AUTOSENSE_CONF
;
1672 wr32(E1000_CONNSW
, connsw
);
1675 adapter
->copper_tries
= 0;
1676 if ((connsw
& E1000_CONNSW_PHYSD
) &&
1677 (!(connsw
& E1000_CONNSW_PHY_PDN
))) {
1679 connsw
&= ~E1000_CONNSW_AUTOSENSE_CONF
;
1680 wr32(E1000_CONNSW
, connsw
);
1688 switch (hw
->phy
.media_type
) {
1689 case e1000_media_type_copper
:
1690 netdev_info(adapter
->netdev
,
1691 "MAS: changing media to fiber/serdes\n");
1693 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1694 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1695 adapter
->copper_tries
= 0;
1697 case e1000_media_type_internal_serdes
:
1698 case e1000_media_type_fiber
:
1699 netdev_info(adapter
->netdev
,
1700 "MAS: changing media to copper\n");
1702 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1703 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1706 /* shouldn't get here during regular operation */
1707 netdev_err(adapter
->netdev
,
1708 "AMS: Invalid media type found, returning\n");
1711 wr32(E1000_CTRL_EXT
, ctrl_ext
);
1715 * igb_up - Open the interface and prepare it to handle traffic
1716 * @adapter: board private structure
1718 int igb_up(struct igb_adapter
*adapter
)
1720 struct e1000_hw
*hw
= &adapter
->hw
;
1723 /* hardware has been reset, we need to reload some things */
1724 igb_configure(adapter
);
1726 clear_bit(__IGB_DOWN
, &adapter
->state
);
1728 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1729 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1731 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1732 igb_configure_msix(adapter
);
1734 igb_assign_vector(adapter
->q_vector
[0], 0);
1736 /* Clear any pending interrupts. */
1738 igb_irq_enable(adapter
);
1740 /* notify VFs that reset has been completed */
1741 if (adapter
->vfs_allocated_count
) {
1742 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1744 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1745 wr32(E1000_CTRL_EXT
, reg_data
);
1748 netif_tx_start_all_queues(adapter
->netdev
);
1750 /* start the watchdog. */
1751 hw
->mac
.get_link_status
= 1;
1752 schedule_work(&adapter
->watchdog_task
);
1754 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
1755 (!hw
->dev_spec
._82575
.eee_disable
))
1756 adapter
->eee_advert
= MDIO_EEE_100TX
| MDIO_EEE_1000T
;
1761 void igb_down(struct igb_adapter
*adapter
)
1763 struct net_device
*netdev
= adapter
->netdev
;
1764 struct e1000_hw
*hw
= &adapter
->hw
;
1768 /* signal that we're down so the interrupt handler does not
1769 * reschedule our watchdog timer
1771 set_bit(__IGB_DOWN
, &adapter
->state
);
1773 /* disable receives in the hardware */
1774 rctl
= rd32(E1000_RCTL
);
1775 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1776 /* flush and sleep below */
1778 netif_tx_stop_all_queues(netdev
);
1780 /* disable transmits in the hardware */
1781 tctl
= rd32(E1000_TCTL
);
1782 tctl
&= ~E1000_TCTL_EN
;
1783 wr32(E1000_TCTL
, tctl
);
1784 /* flush both disables and wait for them to finish */
1786 usleep_range(10000, 11000);
1788 igb_irq_disable(adapter
);
1790 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
1792 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1793 napi_synchronize(&(adapter
->q_vector
[i
]->napi
));
1794 napi_disable(&(adapter
->q_vector
[i
]->napi
));
1798 del_timer_sync(&adapter
->watchdog_timer
);
1799 del_timer_sync(&adapter
->phy_info_timer
);
1801 netif_carrier_off(netdev
);
1803 /* record the stats before reset*/
1804 spin_lock(&adapter
->stats64_lock
);
1805 igb_update_stats(adapter
, &adapter
->stats64
);
1806 spin_unlock(&adapter
->stats64_lock
);
1808 adapter
->link_speed
= 0;
1809 adapter
->link_duplex
= 0;
1811 if (!pci_channel_offline(adapter
->pdev
))
1813 igb_clean_all_tx_rings(adapter
);
1814 igb_clean_all_rx_rings(adapter
);
1815 #ifdef CONFIG_IGB_DCA
1817 /* since we reset the hardware DCA settings were cleared */
1818 igb_setup_dca(adapter
);
1822 void igb_reinit_locked(struct igb_adapter
*adapter
)
1824 WARN_ON(in_interrupt());
1825 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1826 usleep_range(1000, 2000);
1829 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1832 /** igb_enable_mas - Media Autosense re-enable after swap
1834 * @adapter: adapter struct
1836 static s32
igb_enable_mas(struct igb_adapter
*adapter
)
1838 struct e1000_hw
*hw
= &adapter
->hw
;
1842 connsw
= rd32(E1000_CONNSW
);
1843 if (!(hw
->phy
.media_type
== e1000_media_type_copper
))
1846 /* configure for SerDes media detect */
1847 if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1848 connsw
|= E1000_CONNSW_ENRGSRC
;
1849 connsw
|= E1000_CONNSW_AUTOSENSE_EN
;
1850 wr32(E1000_CONNSW
, connsw
);
1852 } else if (connsw
& E1000_CONNSW_SERDESD
) {
1853 /* already SerDes, no need to enable anything */
1856 netdev_info(adapter
->netdev
,
1857 "MAS: Unable to configure feature, disabling..\n");
1858 adapter
->flags
&= ~IGB_FLAG_MAS_ENABLE
;
1863 void igb_reset(struct igb_adapter
*adapter
)
1865 struct pci_dev
*pdev
= adapter
->pdev
;
1866 struct e1000_hw
*hw
= &adapter
->hw
;
1867 struct e1000_mac_info
*mac
= &hw
->mac
;
1868 struct e1000_fc_info
*fc
= &hw
->fc
;
1869 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
, hwm
;
1871 /* Repartition Pba for greater than 9k mtu
1872 * To take effect CTRL.RST is required.
1874 switch (mac
->type
) {
1878 pba
= rd32(E1000_RXPBS
);
1879 pba
= igb_rxpbs_adjust_82580(pba
);
1882 pba
= rd32(E1000_RXPBS
);
1883 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1889 pba
= E1000_PBA_34K
;
1893 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1894 (mac
->type
< e1000_82576
)) {
1895 /* adjust PBA for jumbo frames */
1896 wr32(E1000_PBA
, pba
);
1898 /* To maintain wire speed transmits, the Tx FIFO should be
1899 * large enough to accommodate two full transmit packets,
1900 * rounded up to the next 1KB and expressed in KB. Likewise,
1901 * the Rx FIFO should be large enough to accommodate at least
1902 * one full receive packet and is similarly rounded up and
1905 pba
= rd32(E1000_PBA
);
1906 /* upper 16 bits has Tx packet buffer allocation size in KB */
1907 tx_space
= pba
>> 16;
1908 /* lower 16 bits has Rx packet buffer allocation size in KB */
1910 /* the Tx fifo also stores 16 bytes of information about the Tx
1911 * but don't include ethernet FCS because hardware appends it
1913 min_tx_space
= (adapter
->max_frame_size
+
1914 sizeof(union e1000_adv_tx_desc
) -
1916 min_tx_space
= ALIGN(min_tx_space
, 1024);
1917 min_tx_space
>>= 10;
1918 /* software strips receive CRC, so leave room for it */
1919 min_rx_space
= adapter
->max_frame_size
;
1920 min_rx_space
= ALIGN(min_rx_space
, 1024);
1921 min_rx_space
>>= 10;
1923 /* If current Tx allocation is less than the min Tx FIFO size,
1924 * and the min Tx FIFO size is less than the current Rx FIFO
1925 * allocation, take space away from current Rx allocation
1927 if (tx_space
< min_tx_space
&&
1928 ((min_tx_space
- tx_space
) < pba
)) {
1929 pba
= pba
- (min_tx_space
- tx_space
);
1931 /* if short on Rx space, Rx wins and must trump Tx
1934 if (pba
< min_rx_space
)
1937 wr32(E1000_PBA
, pba
);
1940 /* flow control settings */
1941 /* The high water mark must be low enough to fit one full frame
1942 * (or the size used for early receive) above it in the Rx FIFO.
1943 * Set it to the lower of:
1944 * - 90% of the Rx FIFO size, or
1945 * - the full Rx FIFO size minus one full frame
1947 hwm
= min(((pba
<< 10) * 9 / 10),
1948 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1950 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1951 fc
->low_water
= fc
->high_water
- 16;
1952 fc
->pause_time
= 0xFFFF;
1954 fc
->current_mode
= fc
->requested_mode
;
1956 /* disable receive for all VFs and wait one second */
1957 if (adapter
->vfs_allocated_count
) {
1960 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1961 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1963 /* ping all the active vfs to let them know we are going down */
1964 igb_ping_all_vfs(adapter
);
1966 /* disable transmits and receives */
1967 wr32(E1000_VFRE
, 0);
1968 wr32(E1000_VFTE
, 0);
1971 /* Allow time for pending master requests to run */
1972 hw
->mac
.ops
.reset_hw(hw
);
1975 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
1976 /* need to resetup here after media swap */
1977 adapter
->ei
.get_invariants(hw
);
1978 adapter
->flags
&= ~IGB_FLAG_MEDIA_RESET
;
1980 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
1981 if (igb_enable_mas(adapter
))
1983 "Error enabling Media Auto Sense\n");
1985 if (hw
->mac
.ops
.init_hw(hw
))
1986 dev_err(&pdev
->dev
, "Hardware Error\n");
1988 /* Flow control settings reset on hardware reset, so guarantee flow
1989 * control is off when forcing speed.
1991 if (!hw
->mac
.autoneg
)
1992 igb_force_mac_fc(hw
);
1994 igb_init_dmac(adapter
, pba
);
1995 #ifdef CONFIG_IGB_HWMON
1996 /* Re-initialize the thermal sensor on i350 devices. */
1997 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
1998 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
1999 /* If present, re-initialize the external thermal sensor
2003 mac
->ops
.init_thermal_sensor_thresh(hw
);
2007 /* Re-establish EEE setting */
2008 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2009 switch (mac
->type
) {
2013 igb_set_eee_i350(hw
);
2016 igb_set_eee_i354(hw
);
2022 if (!netif_running(adapter
->netdev
))
2023 igb_power_down_link(adapter
);
2025 igb_update_mng_vlan(adapter
);
2027 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2028 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
2030 /* Re-enable PTP, where applicable. */
2031 igb_ptp_reset(adapter
);
2033 igb_get_phy_info(hw
);
2036 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
2037 netdev_features_t features
)
2039 /* Since there is no support for separate Rx/Tx vlan accel
2040 * enable/disable make sure Tx flag is always in same state as Rx.
2042 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2043 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
2045 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
2050 static int igb_set_features(struct net_device
*netdev
,
2051 netdev_features_t features
)
2053 netdev_features_t changed
= netdev
->features
^ features
;
2054 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2056 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
)
2057 igb_vlan_mode(netdev
, features
);
2059 if (!(changed
& NETIF_F_RXALL
))
2062 netdev
->features
= features
;
2064 if (netif_running(netdev
))
2065 igb_reinit_locked(adapter
);
2072 static const struct net_device_ops igb_netdev_ops
= {
2073 .ndo_open
= igb_open
,
2074 .ndo_stop
= igb_close
,
2075 .ndo_start_xmit
= igb_xmit_frame
,
2076 .ndo_get_stats64
= igb_get_stats64
,
2077 .ndo_set_rx_mode
= igb_set_rx_mode
,
2078 .ndo_set_mac_address
= igb_set_mac
,
2079 .ndo_change_mtu
= igb_change_mtu
,
2080 .ndo_do_ioctl
= igb_ioctl
,
2081 .ndo_tx_timeout
= igb_tx_timeout
,
2082 .ndo_validate_addr
= eth_validate_addr
,
2083 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
2084 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
2085 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
2086 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
2087 .ndo_set_vf_rate
= igb_ndo_set_vf_bw
,
2088 .ndo_set_vf_spoofchk
= igb_ndo_set_vf_spoofchk
,
2089 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
2090 #ifdef CONFIG_NET_POLL_CONTROLLER
2091 .ndo_poll_controller
= igb_netpoll
,
2093 .ndo_fix_features
= igb_fix_features
,
2094 .ndo_set_features
= igb_set_features
,
2098 * igb_set_fw_version - Configure version string for ethtool
2099 * @adapter: adapter struct
2101 void igb_set_fw_version(struct igb_adapter
*adapter
)
2103 struct e1000_hw
*hw
= &adapter
->hw
;
2104 struct e1000_fw_version fw
;
2106 igb_get_fw_version(hw
, &fw
);
2108 switch (hw
->mac
.type
) {
2111 if (!(igb_get_flash_presence_i210(hw
))) {
2112 snprintf(adapter
->fw_version
,
2113 sizeof(adapter
->fw_version
),
2115 fw
.invm_major
, fw
.invm_minor
,
2121 /* if option is rom valid, display its version too */
2123 snprintf(adapter
->fw_version
,
2124 sizeof(adapter
->fw_version
),
2125 "%d.%d, 0x%08x, %d.%d.%d",
2126 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
2127 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
2129 } else if (fw
.etrack_id
!= 0X0000) {
2130 snprintf(adapter
->fw_version
,
2131 sizeof(adapter
->fw_version
),
2133 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
2135 snprintf(adapter
->fw_version
,
2136 sizeof(adapter
->fw_version
),
2138 fw
.eep_major
, fw
.eep_minor
, fw
.eep_build
);
2145 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2147 * @adapter: adapter struct
2149 static void igb_init_mas(struct igb_adapter
*adapter
)
2151 struct e1000_hw
*hw
= &adapter
->hw
;
2154 hw
->nvm
.ops
.read(hw
, NVM_COMPAT
, 1, &eeprom_data
);
2155 switch (hw
->bus
.func
) {
2157 if (eeprom_data
& IGB_MAS_ENABLE_0
) {
2158 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2159 netdev_info(adapter
->netdev
,
2160 "MAS: Enabling Media Autosense for port %d\n",
2165 if (eeprom_data
& IGB_MAS_ENABLE_1
) {
2166 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2167 netdev_info(adapter
->netdev
,
2168 "MAS: Enabling Media Autosense for port %d\n",
2173 if (eeprom_data
& IGB_MAS_ENABLE_2
) {
2174 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2175 netdev_info(adapter
->netdev
,
2176 "MAS: Enabling Media Autosense for port %d\n",
2181 if (eeprom_data
& IGB_MAS_ENABLE_3
) {
2182 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2183 netdev_info(adapter
->netdev
,
2184 "MAS: Enabling Media Autosense for port %d\n",
2189 /* Shouldn't get here */
2190 netdev_err(adapter
->netdev
,
2191 "MAS: Invalid port configuration, returning\n");
2197 * igb_init_i2c - Init I2C interface
2198 * @adapter: pointer to adapter structure
2200 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
2204 /* I2C interface supported on i350 devices */
2205 if (adapter
->hw
.mac
.type
!= e1000_i350
)
2208 /* Initialize the i2c bus which is controlled by the registers.
2209 * This bus will use the i2c_algo_bit structue that implements
2210 * the protocol through toggling of the 4 bits in the register.
2212 adapter
->i2c_adap
.owner
= THIS_MODULE
;
2213 adapter
->i2c_algo
= igb_i2c_algo
;
2214 adapter
->i2c_algo
.data
= adapter
;
2215 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
2216 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
2217 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
2218 sizeof(adapter
->i2c_adap
.name
));
2219 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
2224 * igb_probe - Device Initialization Routine
2225 * @pdev: PCI device information struct
2226 * @ent: entry in igb_pci_tbl
2228 * Returns 0 on success, negative on failure
2230 * igb_probe initializes an adapter identified by a pci_dev structure.
2231 * The OS initialization, configuring of the adapter private structure,
2232 * and a hardware reset occur.
2234 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2236 struct net_device
*netdev
;
2237 struct igb_adapter
*adapter
;
2238 struct e1000_hw
*hw
;
2239 u16 eeprom_data
= 0;
2241 static int global_quad_port_a
; /* global quad port a indication */
2242 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
2243 int err
, pci_using_dac
;
2244 u8 part_str
[E1000_PBANUM_LENGTH
];
2246 /* Catch broken hardware that put the wrong VF device ID in
2247 * the PCIe SR-IOV capability.
2249 if (pdev
->is_virtfn
) {
2250 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
2251 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
2255 err
= pci_enable_device_mem(pdev
);
2260 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
2264 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
2267 "No usable DMA configuration, aborting\n");
2272 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
2278 pci_enable_pcie_error_reporting(pdev
);
2280 pci_set_master(pdev
);
2281 pci_save_state(pdev
);
2284 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2287 goto err_alloc_etherdev
;
2289 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2291 pci_set_drvdata(pdev
, netdev
);
2292 adapter
= netdev_priv(netdev
);
2293 adapter
->netdev
= netdev
;
2294 adapter
->pdev
= pdev
;
2297 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2300 hw
->hw_addr
= pci_iomap(pdev
, 0, 0);
2304 netdev
->netdev_ops
= &igb_netdev_ops
;
2305 igb_set_ethtool_ops(netdev
);
2306 netdev
->watchdog_timeo
= 5 * HZ
;
2308 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2310 netdev
->mem_start
= pci_resource_start(pdev
, 0);
2311 netdev
->mem_end
= pci_resource_end(pdev
, 0);
2313 /* PCI config space info */
2314 hw
->vendor_id
= pdev
->vendor
;
2315 hw
->device_id
= pdev
->device
;
2316 hw
->revision_id
= pdev
->revision
;
2317 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2318 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2320 /* Copy the default MAC, PHY and NVM function pointers */
2321 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2322 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2323 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2324 /* Initialize skew-specific constants */
2325 err
= ei
->get_invariants(hw
);
2329 /* setup the private structure */
2330 err
= igb_sw_init(adapter
);
2334 igb_get_bus_info_pcie(hw
);
2336 hw
->phy
.autoneg_wait_to_complete
= false;
2338 /* Copper options */
2339 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2340 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2341 hw
->phy
.disable_polarity_correction
= false;
2342 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2345 if (igb_check_reset_block(hw
))
2346 dev_info(&pdev
->dev
,
2347 "PHY reset is blocked due to SOL/IDER session.\n");
2349 /* features is initialized to 0 in allocation, it might have bits
2350 * set by igb_sw_init so we should use an or instead of an
2353 netdev
->features
|= NETIF_F_SG
|
2360 NETIF_F_HW_VLAN_CTAG_RX
|
2361 NETIF_F_HW_VLAN_CTAG_TX
;
2363 /* copy netdev features into list of user selectable features */
2364 netdev
->hw_features
|= netdev
->features
;
2365 netdev
->hw_features
|= NETIF_F_RXALL
;
2367 /* set this bit last since it cannot be part of hw_features */
2368 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
2370 netdev
->vlan_features
|= NETIF_F_TSO
|
2376 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2378 if (pci_using_dac
) {
2379 netdev
->features
|= NETIF_F_HIGHDMA
;
2380 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
2383 if (hw
->mac
.type
>= e1000_82576
) {
2384 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
;
2385 netdev
->features
|= NETIF_F_SCTP_CSUM
;
2388 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2390 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2392 /* before reading the NVM, reset the controller to put the device in a
2393 * known good starting state
2395 hw
->mac
.ops
.reset_hw(hw
);
2397 /* make sure the NVM is good , i211/i210 parts can have special NVM
2398 * that doesn't contain a checksum
2400 switch (hw
->mac
.type
) {
2403 if (igb_get_flash_presence_i210(hw
)) {
2404 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2406 "The NVM Checksum Is Not Valid\n");
2413 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2414 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2421 /* copy the MAC address out of the NVM */
2422 if (hw
->mac
.ops
.read_mac_addr(hw
))
2423 dev_err(&pdev
->dev
, "NVM Read Error\n");
2425 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2427 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2428 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2433 /* get firmware version for ethtool -i */
2434 igb_set_fw_version(adapter
);
2436 /* configure RXPBSIZE and TXPBSIZE */
2437 if (hw
->mac
.type
== e1000_i210
) {
2438 wr32(E1000_RXPBS
, I210_RXPBSIZE_DEFAULT
);
2439 wr32(E1000_TXPBS
, I210_TXPBSIZE_DEFAULT
);
2442 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2443 (unsigned long) adapter
);
2444 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2445 (unsigned long) adapter
);
2447 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2448 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2450 /* Initialize link properties that are user-changeable */
2451 adapter
->fc_autoneg
= true;
2452 hw
->mac
.autoneg
= true;
2453 hw
->phy
.autoneg_advertised
= 0x2f;
2455 hw
->fc
.requested_mode
= e1000_fc_default
;
2456 hw
->fc
.current_mode
= e1000_fc_default
;
2458 igb_validate_mdi_setting(hw
);
2460 /* By default, support wake on port A */
2461 if (hw
->bus
.func
== 0)
2462 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2464 /* Check the NVM for wake support on non-port A ports */
2465 if (hw
->mac
.type
>= e1000_82580
)
2466 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2467 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2469 else if (hw
->bus
.func
== 1)
2470 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2472 if (eeprom_data
& IGB_EEPROM_APME
)
2473 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2475 /* now that we have the eeprom settings, apply the special cases where
2476 * the eeprom may be wrong or the board simply won't support wake on
2477 * lan on a particular port
2479 switch (pdev
->device
) {
2480 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2481 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2483 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2484 case E1000_DEV_ID_82576_FIBER
:
2485 case E1000_DEV_ID_82576_SERDES
:
2486 /* Wake events only supported on port A for dual fiber
2487 * regardless of eeprom setting
2489 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2490 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2492 case E1000_DEV_ID_82576_QUAD_COPPER
:
2493 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2494 /* if quad port adapter, disable WoL on all but port A */
2495 if (global_quad_port_a
!= 0)
2496 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2498 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2499 /* Reset for multiple quad port adapters */
2500 if (++global_quad_port_a
== 4)
2501 global_quad_port_a
= 0;
2504 /* If the device can't wake, don't set software support */
2505 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2506 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2509 /* initialize the wol settings based on the eeprom settings */
2510 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2511 adapter
->wol
|= E1000_WUFC_MAG
;
2513 /* Some vendors want WoL disabled by default, but still supported */
2514 if ((hw
->mac
.type
== e1000_i350
) &&
2515 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2516 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2520 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2521 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2523 /* reset the hardware with the new settings */
2526 /* Init the I2C interface */
2527 err
= igb_init_i2c(adapter
);
2529 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2533 /* let the f/w know that the h/w is now under the control of the
2536 igb_get_hw_control(adapter
);
2538 strcpy(netdev
->name
, "eth%d");
2539 err
= register_netdev(netdev
);
2543 /* carrier off reporting is important to ethtool even BEFORE open */
2544 netif_carrier_off(netdev
);
2546 #ifdef CONFIG_IGB_DCA
2547 if (dca_add_requester(&pdev
->dev
) == 0) {
2548 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2549 dev_info(&pdev
->dev
, "DCA enabled\n");
2550 igb_setup_dca(adapter
);
2554 #ifdef CONFIG_IGB_HWMON
2555 /* Initialize the thermal sensor on i350 devices. */
2556 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2559 /* Read the NVM to determine if this i350 device supports an
2560 * external thermal sensor.
2562 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2563 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2564 adapter
->ets
= true;
2566 adapter
->ets
= false;
2567 if (igb_sysfs_init(adapter
))
2569 "failed to allocate sysfs resources\n");
2571 adapter
->ets
= false;
2574 /* Check if Media Autosense is enabled */
2576 if (hw
->dev_spec
._82575
.mas_capable
)
2577 igb_init_mas(adapter
);
2579 /* do hw tstamp init after resetting */
2580 igb_ptp_init(adapter
);
2582 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2583 /* print bus type/speed/width info, not applicable to i354 */
2584 if (hw
->mac
.type
!= e1000_i354
) {
2585 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2587 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2588 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2590 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ?
2592 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ?
2594 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ?
2595 "Width x1" : "unknown"), netdev
->dev_addr
);
2598 if ((hw
->mac
.type
>= e1000_i210
||
2599 igb_get_flash_presence_i210(hw
))) {
2600 ret_val
= igb_read_part_string(hw
, part_str
,
2601 E1000_PBANUM_LENGTH
);
2603 ret_val
= -E1000_ERR_INVM_VALUE_NOT_FOUND
;
2607 strcpy(part_str
, "Unknown");
2608 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2609 dev_info(&pdev
->dev
,
2610 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2611 (adapter
->flags
& IGB_FLAG_HAS_MSIX
) ? "MSI-X" :
2612 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2613 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2614 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2615 switch (hw
->mac
.type
) {
2619 /* Enable EEE for internal copper PHY devices */
2620 err
= igb_set_eee_i350(hw
);
2622 (!hw
->dev_spec
._82575
.eee_disable
)) {
2623 adapter
->eee_advert
=
2624 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2625 adapter
->flags
|= IGB_FLAG_EEE
;
2629 if ((rd32(E1000_CTRL_EXT
) &
2630 E1000_CTRL_EXT_LINK_MODE_SGMII
)) {
2631 err
= igb_set_eee_i354(hw
);
2633 (!hw
->dev_spec
._82575
.eee_disable
)) {
2634 adapter
->eee_advert
=
2635 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2636 adapter
->flags
|= IGB_FLAG_EEE
;
2644 pm_runtime_put_noidle(&pdev
->dev
);
2648 igb_release_hw_control(adapter
);
2649 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2651 if (!igb_check_reset_block(hw
))
2654 if (hw
->flash_address
)
2655 iounmap(hw
->flash_address
);
2657 igb_clear_interrupt_scheme(adapter
);
2658 pci_iounmap(pdev
, hw
->hw_addr
);
2660 free_netdev(netdev
);
2662 pci_release_selected_regions(pdev
,
2663 pci_select_bars(pdev
, IORESOURCE_MEM
));
2666 pci_disable_device(pdev
);
2670 #ifdef CONFIG_PCI_IOV
2671 static int igb_disable_sriov(struct pci_dev
*pdev
)
2673 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2674 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2675 struct e1000_hw
*hw
= &adapter
->hw
;
2677 /* reclaim resources allocated to VFs */
2678 if (adapter
->vf_data
) {
2679 /* disable iov and allow time for transactions to clear */
2680 if (pci_vfs_assigned(pdev
)) {
2681 dev_warn(&pdev
->dev
,
2682 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2685 pci_disable_sriov(pdev
);
2689 kfree(adapter
->vf_data
);
2690 adapter
->vf_data
= NULL
;
2691 adapter
->vfs_allocated_count
= 0;
2692 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2695 dev_info(&pdev
->dev
, "IOV Disabled\n");
2697 /* Re-enable DMA Coalescing flag since IOV is turned off */
2698 adapter
->flags
|= IGB_FLAG_DMAC
;
2704 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2706 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2707 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2708 int old_vfs
= pci_num_vf(pdev
);
2712 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) || num_vfs
> 7) {
2720 dev_info(&pdev
->dev
, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2722 adapter
->vfs_allocated_count
= old_vfs
;
2724 adapter
->vfs_allocated_count
= num_vfs
;
2726 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2727 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2729 /* if allocation failed then we do not support SR-IOV */
2730 if (!adapter
->vf_data
) {
2731 adapter
->vfs_allocated_count
= 0;
2733 "Unable to allocate memory for VF Data Storage\n");
2738 /* only call pci_enable_sriov() if no VFs are allocated already */
2740 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2744 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2745 adapter
->vfs_allocated_count
);
2746 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2747 igb_vf_configure(adapter
, i
);
2749 /* DMA Coalescing is not supported in IOV mode. */
2750 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2754 kfree(adapter
->vf_data
);
2755 adapter
->vf_data
= NULL
;
2756 adapter
->vfs_allocated_count
= 0;
2763 * igb_remove_i2c - Cleanup I2C interface
2764 * @adapter: pointer to adapter structure
2766 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2768 /* free the adapter bus structure */
2769 i2c_del_adapter(&adapter
->i2c_adap
);
2773 * igb_remove - Device Removal Routine
2774 * @pdev: PCI device information struct
2776 * igb_remove is called by the PCI subsystem to alert the driver
2777 * that it should release a PCI device. The could be caused by a
2778 * Hot-Plug event, or because the driver is going to be removed from
2781 static void igb_remove(struct pci_dev
*pdev
)
2783 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2784 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2785 struct e1000_hw
*hw
= &adapter
->hw
;
2787 pm_runtime_get_noresume(&pdev
->dev
);
2788 #ifdef CONFIG_IGB_HWMON
2789 igb_sysfs_exit(adapter
);
2791 igb_remove_i2c(adapter
);
2792 igb_ptp_stop(adapter
);
2793 /* The watchdog timer may be rescheduled, so explicitly
2794 * disable watchdog from being rescheduled.
2796 set_bit(__IGB_DOWN
, &adapter
->state
);
2797 del_timer_sync(&adapter
->watchdog_timer
);
2798 del_timer_sync(&adapter
->phy_info_timer
);
2800 cancel_work_sync(&adapter
->reset_task
);
2801 cancel_work_sync(&adapter
->watchdog_task
);
2803 #ifdef CONFIG_IGB_DCA
2804 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2805 dev_info(&pdev
->dev
, "DCA disabled\n");
2806 dca_remove_requester(&pdev
->dev
);
2807 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2808 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2812 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2813 * would have already happened in close and is redundant.
2815 igb_release_hw_control(adapter
);
2817 unregister_netdev(netdev
);
2819 igb_clear_interrupt_scheme(adapter
);
2821 #ifdef CONFIG_PCI_IOV
2822 igb_disable_sriov(pdev
);
2825 pci_iounmap(pdev
, hw
->hw_addr
);
2826 if (hw
->flash_address
)
2827 iounmap(hw
->flash_address
);
2828 pci_release_selected_regions(pdev
,
2829 pci_select_bars(pdev
, IORESOURCE_MEM
));
2831 kfree(adapter
->shadow_vfta
);
2832 free_netdev(netdev
);
2834 pci_disable_pcie_error_reporting(pdev
);
2836 pci_disable_device(pdev
);
2840 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2841 * @adapter: board private structure to initialize
2843 * This function initializes the vf specific data storage and then attempts to
2844 * allocate the VFs. The reason for ordering it this way is because it is much
2845 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2846 * the memory for the VFs.
2848 static void igb_probe_vfs(struct igb_adapter
*adapter
)
2850 #ifdef CONFIG_PCI_IOV
2851 struct pci_dev
*pdev
= adapter
->pdev
;
2852 struct e1000_hw
*hw
= &adapter
->hw
;
2854 /* Virtualization features not supported on i210 family. */
2855 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
2858 pci_sriov_set_totalvfs(pdev
, 7);
2859 igb_pci_enable_sriov(pdev
, max_vfs
);
2861 #endif /* CONFIG_PCI_IOV */
2864 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
2866 struct e1000_hw
*hw
= &adapter
->hw
;
2869 /* Determine the maximum number of RSS queues supported. */
2870 switch (hw
->mac
.type
) {
2872 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
2876 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
2879 /* I350 cannot do RSS and SR-IOV at the same time */
2880 if (!!adapter
->vfs_allocated_count
) {
2886 if (!!adapter
->vfs_allocated_count
) {
2894 max_rss_queues
= IGB_MAX_RX_QUEUES
;
2898 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
2900 /* Determine if we need to pair queues. */
2901 switch (hw
->mac
.type
) {
2904 /* Device supports enough interrupts without queue pairing. */
2907 /* If VFs are going to be allocated with RSS queues then we
2908 * should pair the queues in order to conserve interrupts due
2909 * to limited supply.
2911 if ((adapter
->rss_queues
> 1) &&
2912 (adapter
->vfs_allocated_count
> 6))
2913 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2920 /* If rss_queues > half of max_rss_queues, pair the queues in
2921 * order to conserve interrupts due to limited supply.
2923 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
2924 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2930 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2931 * @adapter: board private structure to initialize
2933 * igb_sw_init initializes the Adapter private data structure.
2934 * Fields are initialized based on PCI device information and
2935 * OS network device settings (MTU size).
2937 static int igb_sw_init(struct igb_adapter
*adapter
)
2939 struct e1000_hw
*hw
= &adapter
->hw
;
2940 struct net_device
*netdev
= adapter
->netdev
;
2941 struct pci_dev
*pdev
= adapter
->pdev
;
2943 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
2945 /* set default ring sizes */
2946 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
2947 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
2949 /* set default ITR values */
2950 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
2951 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
2953 /* set default work limits */
2954 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
2956 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
2958 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
2960 spin_lock_init(&adapter
->stats64_lock
);
2961 #ifdef CONFIG_PCI_IOV
2962 switch (hw
->mac
.type
) {
2966 dev_warn(&pdev
->dev
,
2967 "Maximum of 7 VFs per PF, using max\n");
2968 max_vfs
= adapter
->vfs_allocated_count
= 7;
2970 adapter
->vfs_allocated_count
= max_vfs
;
2971 if (adapter
->vfs_allocated_count
)
2972 dev_warn(&pdev
->dev
,
2973 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2978 #endif /* CONFIG_PCI_IOV */
2980 igb_init_queue_configuration(adapter
);
2982 /* Setup and initialize a copy of the hw vlan table array */
2983 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
2986 /* This call may decrease the number of queues */
2987 if (igb_init_interrupt_scheme(adapter
, true)) {
2988 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
2992 igb_probe_vfs(adapter
);
2994 /* Explicitly disable IRQ since the NIC can be in any state. */
2995 igb_irq_disable(adapter
);
2997 if (hw
->mac
.type
>= e1000_i350
)
2998 adapter
->flags
&= ~IGB_FLAG_DMAC
;
3000 set_bit(__IGB_DOWN
, &adapter
->state
);
3005 * igb_open - Called when a network interface is made active
3006 * @netdev: network interface device structure
3008 * Returns 0 on success, negative value on failure
3010 * The open entry point is called when a network interface is made
3011 * active by the system (IFF_UP). At this point all resources needed
3012 * for transmit and receive operations are allocated, the interrupt
3013 * handler is registered with the OS, the watchdog timer is started,
3014 * and the stack is notified that the interface is ready.
3016 static int __igb_open(struct net_device
*netdev
, bool resuming
)
3018 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3019 struct e1000_hw
*hw
= &adapter
->hw
;
3020 struct pci_dev
*pdev
= adapter
->pdev
;
3024 /* disallow open during test */
3025 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
3031 pm_runtime_get_sync(&pdev
->dev
);
3033 netif_carrier_off(netdev
);
3035 /* allocate transmit descriptors */
3036 err
= igb_setup_all_tx_resources(adapter
);
3040 /* allocate receive descriptors */
3041 err
= igb_setup_all_rx_resources(adapter
);
3045 igb_power_up_link(adapter
);
3047 /* before we allocate an interrupt, we must be ready to handle it.
3048 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3049 * as soon as we call pci_request_irq, so we have to setup our
3050 * clean_rx handler before we do so.
3052 igb_configure(adapter
);
3054 err
= igb_request_irq(adapter
);
3058 /* Notify the stack of the actual queue counts. */
3059 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
3060 adapter
->num_tx_queues
);
3062 goto err_set_queues
;
3064 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
3065 adapter
->num_rx_queues
);
3067 goto err_set_queues
;
3069 /* From here on the code is the same as igb_up() */
3070 clear_bit(__IGB_DOWN
, &adapter
->state
);
3072 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
3073 napi_enable(&(adapter
->q_vector
[i
]->napi
));
3075 /* Clear any pending interrupts. */
3078 igb_irq_enable(adapter
);
3080 /* notify VFs that reset has been completed */
3081 if (adapter
->vfs_allocated_count
) {
3082 u32 reg_data
= rd32(E1000_CTRL_EXT
);
3084 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
3085 wr32(E1000_CTRL_EXT
, reg_data
);
3088 netif_tx_start_all_queues(netdev
);
3091 pm_runtime_put(&pdev
->dev
);
3093 /* start the watchdog. */
3094 hw
->mac
.get_link_status
= 1;
3095 schedule_work(&adapter
->watchdog_task
);
3100 igb_free_irq(adapter
);
3102 igb_release_hw_control(adapter
);
3103 igb_power_down_link(adapter
);
3104 igb_free_all_rx_resources(adapter
);
3106 igb_free_all_tx_resources(adapter
);
3110 pm_runtime_put(&pdev
->dev
);
3115 static int igb_open(struct net_device
*netdev
)
3117 return __igb_open(netdev
, false);
3121 * igb_close - Disables a network interface
3122 * @netdev: network interface device structure
3124 * Returns 0, this is not allowed to fail
3126 * The close entry point is called when an interface is de-activated
3127 * by the OS. The hardware is still under the driver's control, but
3128 * needs to be disabled. A global MAC reset is issued to stop the
3129 * hardware, and all transmit and receive resources are freed.
3131 static int __igb_close(struct net_device
*netdev
, bool suspending
)
3133 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3134 struct pci_dev
*pdev
= adapter
->pdev
;
3136 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
3139 pm_runtime_get_sync(&pdev
->dev
);
3142 igb_free_irq(adapter
);
3144 igb_free_all_tx_resources(adapter
);
3145 igb_free_all_rx_resources(adapter
);
3148 pm_runtime_put_sync(&pdev
->dev
);
3152 static int igb_close(struct net_device
*netdev
)
3154 return __igb_close(netdev
, false);
3158 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3159 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3161 * Return 0 on success, negative on failure
3163 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
3165 struct device
*dev
= tx_ring
->dev
;
3168 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3170 tx_ring
->tx_buffer_info
= vzalloc(size
);
3171 if (!tx_ring
->tx_buffer_info
)
3174 /* round up to nearest 4K */
3175 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
3176 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3178 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
3179 &tx_ring
->dma
, GFP_KERNEL
);
3183 tx_ring
->next_to_use
= 0;
3184 tx_ring
->next_to_clean
= 0;
3189 vfree(tx_ring
->tx_buffer_info
);
3190 tx_ring
->tx_buffer_info
= NULL
;
3191 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
3196 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3197 * (Descriptors) for all queues
3198 * @adapter: board private structure
3200 * Return 0 on success, negative on failure
3202 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
3204 struct pci_dev
*pdev
= adapter
->pdev
;
3207 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3208 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
3211 "Allocation for Tx Queue %u failed\n", i
);
3212 for (i
--; i
>= 0; i
--)
3213 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3222 * igb_setup_tctl - configure the transmit control registers
3223 * @adapter: Board private structure
3225 void igb_setup_tctl(struct igb_adapter
*adapter
)
3227 struct e1000_hw
*hw
= &adapter
->hw
;
3230 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3231 wr32(E1000_TXDCTL(0), 0);
3233 /* Program the Transmit Control Register */
3234 tctl
= rd32(E1000_TCTL
);
3235 tctl
&= ~E1000_TCTL_CT
;
3236 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
3237 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
3239 igb_config_collision_dist(hw
);
3241 /* Enable transmits */
3242 tctl
|= E1000_TCTL_EN
;
3244 wr32(E1000_TCTL
, tctl
);
3248 * igb_configure_tx_ring - Configure transmit ring after Reset
3249 * @adapter: board private structure
3250 * @ring: tx ring to configure
3252 * Configure a transmit ring after a reset.
3254 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
3255 struct igb_ring
*ring
)
3257 struct e1000_hw
*hw
= &adapter
->hw
;
3259 u64 tdba
= ring
->dma
;
3260 int reg_idx
= ring
->reg_idx
;
3262 /* disable the queue */
3263 wr32(E1000_TXDCTL(reg_idx
), 0);
3267 wr32(E1000_TDLEN(reg_idx
),
3268 ring
->count
* sizeof(union e1000_adv_tx_desc
));
3269 wr32(E1000_TDBAL(reg_idx
),
3270 tdba
& 0x00000000ffffffffULL
);
3271 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
3273 ring
->tail
= hw
->hw_addr
+ E1000_TDT(reg_idx
);
3274 wr32(E1000_TDH(reg_idx
), 0);
3275 writel(0, ring
->tail
);
3277 txdctl
|= IGB_TX_PTHRESH
;
3278 txdctl
|= IGB_TX_HTHRESH
<< 8;
3279 txdctl
|= IGB_TX_WTHRESH
<< 16;
3281 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
3282 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
3286 * igb_configure_tx - Configure transmit Unit after Reset
3287 * @adapter: board private structure
3289 * Configure the Tx unit of the MAC after a reset.
3291 static void igb_configure_tx(struct igb_adapter
*adapter
)
3295 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3296 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3300 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3301 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3303 * Returns 0 on success, negative on failure
3305 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
3307 struct device
*dev
= rx_ring
->dev
;
3310 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3312 rx_ring
->rx_buffer_info
= vzalloc(size
);
3313 if (!rx_ring
->rx_buffer_info
)
3316 /* Round up to nearest 4K */
3317 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3318 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3320 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3321 &rx_ring
->dma
, GFP_KERNEL
);
3325 rx_ring
->next_to_alloc
= 0;
3326 rx_ring
->next_to_clean
= 0;
3327 rx_ring
->next_to_use
= 0;
3332 vfree(rx_ring
->rx_buffer_info
);
3333 rx_ring
->rx_buffer_info
= NULL
;
3334 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3339 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3340 * (Descriptors) for all queues
3341 * @adapter: board private structure
3343 * Return 0 on success, negative on failure
3345 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3347 struct pci_dev
*pdev
= adapter
->pdev
;
3350 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3351 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3354 "Allocation for Rx Queue %u failed\n", i
);
3355 for (i
--; i
>= 0; i
--)
3356 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3365 * igb_setup_mrqc - configure the multiple receive queue control registers
3366 * @adapter: Board private structure
3368 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3370 struct e1000_hw
*hw
= &adapter
->hw
;
3372 u32 j
, num_rx_queues
;
3373 static const u32 rsskey
[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3374 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3375 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3378 /* Fill out hash function seeds */
3379 for (j
= 0; j
< 10; j
++)
3380 wr32(E1000_RSSRK(j
), rsskey
[j
]);
3382 num_rx_queues
= adapter
->rss_queues
;
3384 switch (hw
->mac
.type
) {
3386 /* 82576 supports 2 RSS queues for SR-IOV */
3387 if (adapter
->vfs_allocated_count
)
3394 if (adapter
->rss_indir_tbl_init
!= num_rx_queues
) {
3395 for (j
= 0; j
< IGB_RETA_SIZE
; j
++)
3396 adapter
->rss_indir_tbl
[j
] =
3397 (j
* num_rx_queues
) / IGB_RETA_SIZE
;
3398 adapter
->rss_indir_tbl_init
= num_rx_queues
;
3400 igb_write_rss_indir_tbl(adapter
);
3402 /* Disable raw packet checksumming so that RSS hash is placed in
3403 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3404 * offloads as they are enabled by default
3406 rxcsum
= rd32(E1000_RXCSUM
);
3407 rxcsum
|= E1000_RXCSUM_PCSD
;
3409 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3410 /* Enable Receive Checksum Offload for SCTP */
3411 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3413 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3414 wr32(E1000_RXCSUM
, rxcsum
);
3416 /* Generate RSS hash based on packet types, TCP/UDP
3417 * port numbers and/or IPv4/v6 src and dst addresses
3419 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3420 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3421 E1000_MRQC_RSS_FIELD_IPV6
|
3422 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3423 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3425 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3426 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3427 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3428 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3430 /* If VMDq is enabled then we set the appropriate mode for that, else
3431 * we default to RSS so that an RSS hash is calculated per packet even
3432 * if we are only using one queue
3434 if (adapter
->vfs_allocated_count
) {
3435 if (hw
->mac
.type
> e1000_82575
) {
3436 /* Set the default pool for the PF's first queue */
3437 u32 vtctl
= rd32(E1000_VT_CTL
);
3439 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3440 E1000_VT_CTL_DISABLE_DEF_POOL
);
3441 vtctl
|= adapter
->vfs_allocated_count
<<
3442 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3443 wr32(E1000_VT_CTL
, vtctl
);
3445 if (adapter
->rss_queues
> 1)
3446 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
3448 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3450 if (hw
->mac
.type
!= e1000_i211
)
3451 mrqc
|= E1000_MRQC_ENABLE_RSS_4Q
;
3453 igb_vmm_control(adapter
);
3455 wr32(E1000_MRQC
, mrqc
);
3459 * igb_setup_rctl - configure the receive control registers
3460 * @adapter: Board private structure
3462 void igb_setup_rctl(struct igb_adapter
*adapter
)
3464 struct e1000_hw
*hw
= &adapter
->hw
;
3467 rctl
= rd32(E1000_RCTL
);
3469 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3470 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3472 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3473 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3475 /* enable stripping of CRC. It's unlikely this will break BMC
3476 * redirection as it did with e1000. Newer features require
3477 * that the HW strips the CRC.
3479 rctl
|= E1000_RCTL_SECRC
;
3481 /* disable store bad packets and clear size bits. */
3482 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3484 /* enable LPE to prevent packets larger than max_frame_size */
3485 rctl
|= E1000_RCTL_LPE
;
3487 /* disable queue 0 to prevent tail write w/o re-config */
3488 wr32(E1000_RXDCTL(0), 0);
3490 /* Attention!!! For SR-IOV PF driver operations you must enable
3491 * queue drop for all VF and PF queues to prevent head of line blocking
3492 * if an un-trusted VF does not provide descriptors to hardware.
3494 if (adapter
->vfs_allocated_count
) {
3495 /* set all queue drop enable bits */
3496 wr32(E1000_QDE
, ALL_QUEUES
);
3499 /* This is useful for sniffing bad packets. */
3500 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3501 /* UPE and MPE will be handled by normal PROMISC logic
3502 * in e1000e_set_rx_mode
3504 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3505 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3506 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3508 rctl
&= ~(E1000_RCTL_VFE
| /* Disable VLAN filter */
3509 E1000_RCTL_DPF
| /* Allow filtered pause */
3510 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3511 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3512 * and that breaks VLANs.
3516 wr32(E1000_RCTL
, rctl
);
3519 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3522 struct e1000_hw
*hw
= &adapter
->hw
;
3525 /* if it isn't the PF check to see if VFs are enabled and
3526 * increase the size to support vlan tags
3528 if (vfn
< adapter
->vfs_allocated_count
&&
3529 adapter
->vf_data
[vfn
].vlans_enabled
)
3530 size
+= VLAN_TAG_SIZE
;
3532 vmolr
= rd32(E1000_VMOLR(vfn
));
3533 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3534 vmolr
|= size
| E1000_VMOLR_LPE
;
3535 wr32(E1000_VMOLR(vfn
), vmolr
);
3541 * igb_rlpml_set - set maximum receive packet size
3542 * @adapter: board private structure
3544 * Configure maximum receivable packet size.
3546 static void igb_rlpml_set(struct igb_adapter
*adapter
)
3548 u32 max_frame_size
= adapter
->max_frame_size
;
3549 struct e1000_hw
*hw
= &adapter
->hw
;
3550 u16 pf_id
= adapter
->vfs_allocated_count
;
3553 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
3554 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3555 * to our max jumbo frame size, in case we need to enable
3556 * jumbo frames on one of the rings later.
3557 * This will not pass over-length frames into the default
3558 * queue because it's gated by the VMOLR.RLPML.
3560 max_frame_size
= MAX_JUMBO_FRAME_SIZE
;
3563 wr32(E1000_RLPML
, max_frame_size
);
3566 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3569 struct e1000_hw
*hw
= &adapter
->hw
;
3572 /* This register exists only on 82576 and newer so if we are older then
3573 * we should exit and do nothing
3575 if (hw
->mac
.type
< e1000_82576
)
3578 vmolr
= rd32(E1000_VMOLR(vfn
));
3579 vmolr
|= E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
3580 if (hw
->mac
.type
== e1000_i350
) {
3583 dvmolr
= rd32(E1000_DVMOLR(vfn
));
3584 dvmolr
|= E1000_DVMOLR_STRVLAN
;
3585 wr32(E1000_DVMOLR(vfn
), dvmolr
);
3588 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3590 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3592 /* clear all bits that might not be set */
3593 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3595 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3596 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3597 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3600 if (vfn
<= adapter
->vfs_allocated_count
)
3601 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3603 wr32(E1000_VMOLR(vfn
), vmolr
);
3607 * igb_configure_rx_ring - Configure a receive ring after Reset
3608 * @adapter: board private structure
3609 * @ring: receive ring to be configured
3611 * Configure the Rx unit of the MAC after a reset.
3613 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3614 struct igb_ring
*ring
)
3616 struct e1000_hw
*hw
= &adapter
->hw
;
3617 u64 rdba
= ring
->dma
;
3618 int reg_idx
= ring
->reg_idx
;
3619 u32 srrctl
= 0, rxdctl
= 0;
3621 /* disable the queue */
3622 wr32(E1000_RXDCTL(reg_idx
), 0);
3624 /* Set DMA base address registers */
3625 wr32(E1000_RDBAL(reg_idx
),
3626 rdba
& 0x00000000ffffffffULL
);
3627 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3628 wr32(E1000_RDLEN(reg_idx
),
3629 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3631 /* initialize head and tail */
3632 ring
->tail
= hw
->hw_addr
+ E1000_RDT(reg_idx
);
3633 wr32(E1000_RDH(reg_idx
), 0);
3634 writel(0, ring
->tail
);
3636 /* set descriptor configuration */
3637 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3638 srrctl
|= IGB_RX_BUFSZ
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3639 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3640 if (hw
->mac
.type
>= e1000_82580
)
3641 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3642 /* Only set Drop Enable if we are supporting multiple queues */
3643 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3644 srrctl
|= E1000_SRRCTL_DROP_EN
;
3646 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3648 /* set filtering for VMDQ pools */
3649 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3651 rxdctl
|= IGB_RX_PTHRESH
;
3652 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3653 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3655 /* enable receive descriptor fetching */
3656 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3657 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3661 * igb_configure_rx - Configure receive Unit after Reset
3662 * @adapter: board private structure
3664 * Configure the Rx unit of the MAC after a reset.
3666 static void igb_configure_rx(struct igb_adapter
*adapter
)
3670 /* set UTA to appropriate mode */
3671 igb_set_uta(adapter
);
3673 /* set the correct pool for the PF default MAC address in entry 0 */
3674 igb_rar_set_qsel(adapter
, adapter
->hw
.mac
.addr
, 0,
3675 adapter
->vfs_allocated_count
);
3677 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3678 * the Base and Length of the Rx Descriptor Ring
3680 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3681 igb_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3685 * igb_free_tx_resources - Free Tx Resources per Queue
3686 * @tx_ring: Tx descriptor ring for a specific queue
3688 * Free all transmit software resources
3690 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3692 igb_clean_tx_ring(tx_ring
);
3694 vfree(tx_ring
->tx_buffer_info
);
3695 tx_ring
->tx_buffer_info
= NULL
;
3697 /* if not set, then don't free */
3701 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3702 tx_ring
->desc
, tx_ring
->dma
);
3704 tx_ring
->desc
= NULL
;
3708 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3709 * @adapter: board private structure
3711 * Free all transmit software resources
3713 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3717 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3718 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3721 void igb_unmap_and_free_tx_resource(struct igb_ring
*ring
,
3722 struct igb_tx_buffer
*tx_buffer
)
3724 if (tx_buffer
->skb
) {
3725 dev_kfree_skb_any(tx_buffer
->skb
);
3726 if (dma_unmap_len(tx_buffer
, len
))
3727 dma_unmap_single(ring
->dev
,
3728 dma_unmap_addr(tx_buffer
, dma
),
3729 dma_unmap_len(tx_buffer
, len
),
3731 } else if (dma_unmap_len(tx_buffer
, len
)) {
3732 dma_unmap_page(ring
->dev
,
3733 dma_unmap_addr(tx_buffer
, dma
),
3734 dma_unmap_len(tx_buffer
, len
),
3737 tx_buffer
->next_to_watch
= NULL
;
3738 tx_buffer
->skb
= NULL
;
3739 dma_unmap_len_set(tx_buffer
, len
, 0);
3740 /* buffer_info must be completely set up in the transmit path */
3744 * igb_clean_tx_ring - Free Tx Buffers
3745 * @tx_ring: ring to be cleaned
3747 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3749 struct igb_tx_buffer
*buffer_info
;
3753 if (!tx_ring
->tx_buffer_info
)
3755 /* Free all the Tx ring sk_buffs */
3757 for (i
= 0; i
< tx_ring
->count
; i
++) {
3758 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3759 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
3762 netdev_tx_reset_queue(txring_txq(tx_ring
));
3764 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3765 memset(tx_ring
->tx_buffer_info
, 0, size
);
3767 /* Zero out the descriptor ring */
3768 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3770 tx_ring
->next_to_use
= 0;
3771 tx_ring
->next_to_clean
= 0;
3775 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3776 * @adapter: board private structure
3778 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3782 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3783 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3787 * igb_free_rx_resources - Free Rx Resources
3788 * @rx_ring: ring to clean the resources from
3790 * Free all receive software resources
3792 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
3794 igb_clean_rx_ring(rx_ring
);
3796 vfree(rx_ring
->rx_buffer_info
);
3797 rx_ring
->rx_buffer_info
= NULL
;
3799 /* if not set, then don't free */
3803 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
3804 rx_ring
->desc
, rx_ring
->dma
);
3806 rx_ring
->desc
= NULL
;
3810 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3811 * @adapter: board private structure
3813 * Free all receive software resources
3815 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
3819 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3820 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3824 * igb_clean_rx_ring - Free Rx Buffers per Queue
3825 * @rx_ring: ring to free buffers from
3827 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
3833 dev_kfree_skb(rx_ring
->skb
);
3834 rx_ring
->skb
= NULL
;
3836 if (!rx_ring
->rx_buffer_info
)
3839 /* Free all the Rx ring sk_buffs */
3840 for (i
= 0; i
< rx_ring
->count
; i
++) {
3841 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3843 if (!buffer_info
->page
)
3846 dma_unmap_page(rx_ring
->dev
,
3850 __free_page(buffer_info
->page
);
3852 buffer_info
->page
= NULL
;
3855 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3856 memset(rx_ring
->rx_buffer_info
, 0, size
);
3858 /* Zero out the descriptor ring */
3859 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3861 rx_ring
->next_to_alloc
= 0;
3862 rx_ring
->next_to_clean
= 0;
3863 rx_ring
->next_to_use
= 0;
3867 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3868 * @adapter: board private structure
3870 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
3874 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3875 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
3879 * igb_set_mac - Change the Ethernet Address of the NIC
3880 * @netdev: network interface device structure
3881 * @p: pointer to an address structure
3883 * Returns 0 on success, negative on failure
3885 static int igb_set_mac(struct net_device
*netdev
, void *p
)
3887 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3888 struct e1000_hw
*hw
= &adapter
->hw
;
3889 struct sockaddr
*addr
= p
;
3891 if (!is_valid_ether_addr(addr
->sa_data
))
3892 return -EADDRNOTAVAIL
;
3894 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3895 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3897 /* set the correct pool for the new PF MAC address in entry 0 */
3898 igb_rar_set_qsel(adapter
, hw
->mac
.addr
, 0,
3899 adapter
->vfs_allocated_count
);
3905 * igb_write_mc_addr_list - write multicast addresses to MTA
3906 * @netdev: network interface device structure
3908 * Writes multicast address list to the MTA hash table.
3909 * Returns: -ENOMEM on failure
3910 * 0 on no addresses written
3911 * X on writing X addresses to MTA
3913 static int igb_write_mc_addr_list(struct net_device
*netdev
)
3915 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3916 struct e1000_hw
*hw
= &adapter
->hw
;
3917 struct netdev_hw_addr
*ha
;
3921 if (netdev_mc_empty(netdev
)) {
3922 /* nothing to program, so clear mc list */
3923 igb_update_mc_addr_list(hw
, NULL
, 0);
3924 igb_restore_vf_multicasts(adapter
);
3928 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
3932 /* The shared function expects a packed array of only addresses. */
3934 netdev_for_each_mc_addr(ha
, netdev
)
3935 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
3937 igb_update_mc_addr_list(hw
, mta_list
, i
);
3940 return netdev_mc_count(netdev
);
3944 * igb_write_uc_addr_list - write unicast addresses to RAR table
3945 * @netdev: network interface device structure
3947 * Writes unicast address list to the RAR table.
3948 * Returns: -ENOMEM on failure/insufficient address space
3949 * 0 on no addresses written
3950 * X on writing X addresses to the RAR table
3952 static int igb_write_uc_addr_list(struct net_device
*netdev
)
3954 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3955 struct e1000_hw
*hw
= &adapter
->hw
;
3956 unsigned int vfn
= adapter
->vfs_allocated_count
;
3957 unsigned int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
3960 /* return ENOMEM indicating insufficient memory for addresses */
3961 if (netdev_uc_count(netdev
) > rar_entries
)
3964 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3965 struct netdev_hw_addr
*ha
;
3967 netdev_for_each_uc_addr(ha
, netdev
) {
3970 igb_rar_set_qsel(adapter
, ha
->addr
,
3976 /* write the addresses in reverse order to avoid write combining */
3977 for (; rar_entries
> 0 ; rar_entries
--) {
3978 wr32(E1000_RAH(rar_entries
), 0);
3979 wr32(E1000_RAL(rar_entries
), 0);
3987 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3988 * @netdev: network interface device structure
3990 * The set_rx_mode entry point is called whenever the unicast or multicast
3991 * address lists or the network interface flags are updated. This routine is
3992 * responsible for configuring the hardware for proper unicast, multicast,
3993 * promiscuous mode, and all-multi behavior.
3995 static void igb_set_rx_mode(struct net_device
*netdev
)
3997 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3998 struct e1000_hw
*hw
= &adapter
->hw
;
3999 unsigned int vfn
= adapter
->vfs_allocated_count
;
4000 u32 rctl
, vmolr
= 0;
4003 /* Check for Promiscuous and All Multicast modes */
4004 rctl
= rd32(E1000_RCTL
);
4006 /* clear the effected bits */
4007 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
| E1000_RCTL_VFE
);
4009 if (netdev
->flags
& IFF_PROMISC
) {
4010 /* retain VLAN HW filtering if in VT mode */
4011 if (adapter
->vfs_allocated_count
)
4012 rctl
|= E1000_RCTL_VFE
;
4013 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
4014 vmolr
|= (E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
);
4016 if (netdev
->flags
& IFF_ALLMULTI
) {
4017 rctl
|= E1000_RCTL_MPE
;
4018 vmolr
|= E1000_VMOLR_MPME
;
4020 /* Write addresses to the MTA, if the attempt fails
4021 * then we should just turn on promiscuous mode so
4022 * that we can at least receive multicast traffic
4024 count
= igb_write_mc_addr_list(netdev
);
4026 rctl
|= E1000_RCTL_MPE
;
4027 vmolr
|= E1000_VMOLR_MPME
;
4029 vmolr
|= E1000_VMOLR_ROMPE
;
4032 /* Write addresses to available RAR registers, if there is not
4033 * sufficient space to store all the addresses then enable
4034 * unicast promiscuous mode
4036 count
= igb_write_uc_addr_list(netdev
);
4038 rctl
|= E1000_RCTL_UPE
;
4039 vmolr
|= E1000_VMOLR_ROPE
;
4041 rctl
|= E1000_RCTL_VFE
;
4043 wr32(E1000_RCTL
, rctl
);
4045 /* In order to support SR-IOV and eventually VMDq it is necessary to set
4046 * the VMOLR to enable the appropriate modes. Without this workaround
4047 * we will have issues with VLAN tag stripping not being done for frames
4048 * that are only arriving because we are the default pool
4050 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
4053 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
4054 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
4055 wr32(E1000_VMOLR(vfn
), vmolr
);
4056 igb_restore_vf_multicasts(adapter
);
4059 static void igb_check_wvbr(struct igb_adapter
*adapter
)
4061 struct e1000_hw
*hw
= &adapter
->hw
;
4064 switch (hw
->mac
.type
) {
4067 wvbr
= rd32(E1000_WVBR
);
4075 adapter
->wvbr
|= wvbr
;
4078 #define IGB_STAGGERED_QUEUE_OFFSET 8
4080 static void igb_spoof_check(struct igb_adapter
*adapter
)
4087 for (j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
4088 if (adapter
->wvbr
& (1 << j
) ||
4089 adapter
->wvbr
& (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
))) {
4090 dev_warn(&adapter
->pdev
->dev
,
4091 "Spoof event(s) detected on VF %d\n", j
);
4094 (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
)));
4099 /* Need to wait a few seconds after link up to get diagnostic information from
4102 static void igb_update_phy_info(unsigned long data
)
4104 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
4105 igb_get_phy_info(&adapter
->hw
);
4109 * igb_has_link - check shared code for link and determine up/down
4110 * @adapter: pointer to driver private info
4112 bool igb_has_link(struct igb_adapter
*adapter
)
4114 struct e1000_hw
*hw
= &adapter
->hw
;
4115 bool link_active
= false;
4117 /* get_link_status is set on LSC (link status) interrupt or
4118 * rx sequence error interrupt. get_link_status will stay
4119 * false until the e1000_check_for_link establishes link
4120 * for copper adapters ONLY
4122 switch (hw
->phy
.media_type
) {
4123 case e1000_media_type_copper
:
4124 if (!hw
->mac
.get_link_status
)
4126 case e1000_media_type_internal_serdes
:
4127 hw
->mac
.ops
.check_for_link(hw
);
4128 link_active
= !hw
->mac
.get_link_status
;
4131 case e1000_media_type_unknown
:
4135 if (((hw
->mac
.type
== e1000_i210
) ||
4136 (hw
->mac
.type
== e1000_i211
)) &&
4137 (hw
->phy
.id
== I210_I_PHY_ID
)) {
4138 if (!netif_carrier_ok(adapter
->netdev
)) {
4139 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4140 } else if (!(adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)) {
4141 adapter
->flags
|= IGB_FLAG_NEED_LINK_UPDATE
;
4142 adapter
->link_check_timeout
= jiffies
;
4149 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
4152 u32 ctrl_ext
, thstat
;
4154 /* check for thermal sensor event on i350 copper only */
4155 if (hw
->mac
.type
== e1000_i350
) {
4156 thstat
= rd32(E1000_THSTAT
);
4157 ctrl_ext
= rd32(E1000_CTRL_EXT
);
4159 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
4160 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
))
4161 ret
= !!(thstat
& event
);
4168 * igb_watchdog - Timer Call-back
4169 * @data: pointer to adapter cast into an unsigned long
4171 static void igb_watchdog(unsigned long data
)
4173 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
4174 /* Do the rest outside of interrupt context */
4175 schedule_work(&adapter
->watchdog_task
);
4178 static void igb_watchdog_task(struct work_struct
*work
)
4180 struct igb_adapter
*adapter
= container_of(work
,
4183 struct e1000_hw
*hw
= &adapter
->hw
;
4184 struct e1000_phy_info
*phy
= &hw
->phy
;
4185 struct net_device
*netdev
= adapter
->netdev
;
4190 link
= igb_has_link(adapter
);
4192 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
) {
4193 if (time_after(jiffies
, (adapter
->link_check_timeout
+ HZ
)))
4194 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4199 /* Force link down if we have fiber to swap to */
4200 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4201 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
4202 connsw
= rd32(E1000_CONNSW
);
4203 if (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))
4208 /* Perform a reset if the media type changed. */
4209 if (hw
->dev_spec
._82575
.media_changed
) {
4210 hw
->dev_spec
._82575
.media_changed
= false;
4211 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
4214 /* Cancel scheduled suspend requests. */
4215 pm_runtime_resume(netdev
->dev
.parent
);
4217 if (!netif_carrier_ok(netdev
)) {
4220 hw
->mac
.ops
.get_speed_and_duplex(hw
,
4221 &adapter
->link_speed
,
4222 &adapter
->link_duplex
);
4224 ctrl
= rd32(E1000_CTRL
);
4225 /* Links status message must follow this format */
4227 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4229 adapter
->link_speed
,
4230 adapter
->link_duplex
== FULL_DUPLEX
?
4232 (ctrl
& E1000_CTRL_TFCE
) &&
4233 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
4234 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
4235 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
4237 /* disable EEE if enabled */
4238 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
4239 (adapter
->link_duplex
== HALF_DUPLEX
)) {
4240 dev_info(&adapter
->pdev
->dev
,
4241 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4242 adapter
->hw
.dev_spec
._82575
.eee_disable
= true;
4243 adapter
->flags
&= ~IGB_FLAG_EEE
;
4246 /* check if SmartSpeed worked */
4247 igb_check_downshift(hw
);
4248 if (phy
->speed_downgraded
)
4249 netdev_warn(netdev
, "Link Speed was downgraded by SmartSpeed\n");
4251 /* check for thermal sensor event */
4252 if (igb_thermal_sensor_event(hw
,
4253 E1000_THSTAT_LINK_THROTTLE
))
4254 netdev_info(netdev
, "The network adapter link speed was downshifted because it overheated\n");
4256 /* adjust timeout factor according to speed/duplex */
4257 adapter
->tx_timeout_factor
= 1;
4258 switch (adapter
->link_speed
) {
4260 adapter
->tx_timeout_factor
= 14;
4263 /* maybe add some timeout factor ? */
4267 netif_carrier_on(netdev
);
4269 igb_ping_all_vfs(adapter
);
4270 igb_check_vf_rate_limit(adapter
);
4272 /* link state has changed, schedule phy info update */
4273 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4274 mod_timer(&adapter
->phy_info_timer
,
4275 round_jiffies(jiffies
+ 2 * HZ
));
4278 if (netif_carrier_ok(netdev
)) {
4279 adapter
->link_speed
= 0;
4280 adapter
->link_duplex
= 0;
4282 /* check for thermal sensor event */
4283 if (igb_thermal_sensor_event(hw
,
4284 E1000_THSTAT_PWR_DOWN
)) {
4285 netdev_err(netdev
, "The network adapter was stopped because it overheated\n");
4288 /* Links status message must follow this format */
4289 netdev_info(netdev
, "igb: %s NIC Link is Down\n",
4291 netif_carrier_off(netdev
);
4293 igb_ping_all_vfs(adapter
);
4295 /* link state has changed, schedule phy info update */
4296 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4297 mod_timer(&adapter
->phy_info_timer
,
4298 round_jiffies(jiffies
+ 2 * HZ
));
4300 /* link is down, time to check for alternate media */
4301 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4302 igb_check_swap_media(adapter
);
4303 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4304 schedule_work(&adapter
->reset_task
);
4305 /* return immediately */
4309 pm_schedule_suspend(netdev
->dev
.parent
,
4312 /* also check for alternate media here */
4313 } else if (!netif_carrier_ok(netdev
) &&
4314 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
4315 igb_check_swap_media(adapter
);
4316 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4317 schedule_work(&adapter
->reset_task
);
4318 /* return immediately */
4324 spin_lock(&adapter
->stats64_lock
);
4325 igb_update_stats(adapter
, &adapter
->stats64
);
4326 spin_unlock(&adapter
->stats64_lock
);
4328 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4329 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
4330 if (!netif_carrier_ok(netdev
)) {
4331 /* We've lost link, so the controller stops DMA,
4332 * but we've got queued Tx work that's never going
4333 * to get done, so reset controller to flush Tx.
4334 * (Do the reset outside of interrupt context).
4336 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
4337 adapter
->tx_timeout_count
++;
4338 schedule_work(&adapter
->reset_task
);
4339 /* return immediately since reset is imminent */
4344 /* Force detection of hung controller every watchdog period */
4345 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
4348 /* Cause software interrupt to ensure Rx ring is cleaned */
4349 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
4352 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4353 eics
|= adapter
->q_vector
[i
]->eims_value
;
4354 wr32(E1000_EICS
, eics
);
4356 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4359 igb_spoof_check(adapter
);
4360 igb_ptp_rx_hang(adapter
);
4362 /* Reset the timer */
4363 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4364 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)
4365 mod_timer(&adapter
->watchdog_timer
,
4366 round_jiffies(jiffies
+ HZ
));
4368 mod_timer(&adapter
->watchdog_timer
,
4369 round_jiffies(jiffies
+ 2 * HZ
));
4373 enum latency_range
{
4377 latency_invalid
= 255
4381 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4382 * @q_vector: pointer to q_vector
4384 * Stores a new ITR value based on strictly on packet size. This
4385 * algorithm is less sophisticated than that used in igb_update_itr,
4386 * due to the difficulty of synchronizing statistics across multiple
4387 * receive rings. The divisors and thresholds used by this function
4388 * were determined based on theoretical maximum wire speed and testing
4389 * data, in order to minimize response time while increasing bulk
4391 * This functionality is controlled by ethtool's coalescing settings.
4392 * NOTE: This function is called only when operating in a multiqueue
4393 * receive environment.
4395 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4397 int new_val
= q_vector
->itr_val
;
4398 int avg_wire_size
= 0;
4399 struct igb_adapter
*adapter
= q_vector
->adapter
;
4400 unsigned int packets
;
4402 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4403 * ints/sec - ITR timer value of 120 ticks.
4405 if (adapter
->link_speed
!= SPEED_1000
) {
4406 new_val
= IGB_4K_ITR
;
4410 packets
= q_vector
->rx
.total_packets
;
4412 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4414 packets
= q_vector
->tx
.total_packets
;
4416 avg_wire_size
= max_t(u32
, avg_wire_size
,
4417 q_vector
->tx
.total_bytes
/ packets
);
4419 /* if avg_wire_size isn't set no work was done */
4423 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4424 avg_wire_size
+= 24;
4426 /* Don't starve jumbo frames */
4427 avg_wire_size
= min(avg_wire_size
, 3000);
4429 /* Give a little boost to mid-size frames */
4430 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4431 new_val
= avg_wire_size
/ 3;
4433 new_val
= avg_wire_size
/ 2;
4435 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4436 if (new_val
< IGB_20K_ITR
&&
4437 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4438 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4439 new_val
= IGB_20K_ITR
;
4442 if (new_val
!= q_vector
->itr_val
) {
4443 q_vector
->itr_val
= new_val
;
4444 q_vector
->set_itr
= 1;
4447 q_vector
->rx
.total_bytes
= 0;
4448 q_vector
->rx
.total_packets
= 0;
4449 q_vector
->tx
.total_bytes
= 0;
4450 q_vector
->tx
.total_packets
= 0;
4454 * igb_update_itr - update the dynamic ITR value based on statistics
4455 * @q_vector: pointer to q_vector
4456 * @ring_container: ring info to update the itr for
4458 * Stores a new ITR value based on packets and byte
4459 * counts during the last interrupt. The advantage of per interrupt
4460 * computation is faster updates and more accurate ITR for the current
4461 * traffic pattern. Constants in this function were computed
4462 * based on theoretical maximum wire speed and thresholds were set based
4463 * on testing data as well as attempting to minimize response time
4464 * while increasing bulk throughput.
4465 * This functionality is controlled by ethtool's coalescing settings.
4466 * NOTE: These calculations are only valid when operating in a single-
4467 * queue environment.
4469 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4470 struct igb_ring_container
*ring_container
)
4472 unsigned int packets
= ring_container
->total_packets
;
4473 unsigned int bytes
= ring_container
->total_bytes
;
4474 u8 itrval
= ring_container
->itr
;
4476 /* no packets, exit with status unchanged */
4481 case lowest_latency
:
4482 /* handle TSO and jumbo frames */
4483 if (bytes
/packets
> 8000)
4484 itrval
= bulk_latency
;
4485 else if ((packets
< 5) && (bytes
> 512))
4486 itrval
= low_latency
;
4488 case low_latency
: /* 50 usec aka 20000 ints/s */
4489 if (bytes
> 10000) {
4490 /* this if handles the TSO accounting */
4491 if (bytes
/packets
> 8000)
4492 itrval
= bulk_latency
;
4493 else if ((packets
< 10) || ((bytes
/packets
) > 1200))
4494 itrval
= bulk_latency
;
4495 else if ((packets
> 35))
4496 itrval
= lowest_latency
;
4497 } else if (bytes
/packets
> 2000) {
4498 itrval
= bulk_latency
;
4499 } else if (packets
<= 2 && bytes
< 512) {
4500 itrval
= lowest_latency
;
4503 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4504 if (bytes
> 25000) {
4506 itrval
= low_latency
;
4507 } else if (bytes
< 1500) {
4508 itrval
= low_latency
;
4513 /* clear work counters since we have the values we need */
4514 ring_container
->total_bytes
= 0;
4515 ring_container
->total_packets
= 0;
4517 /* write updated itr to ring container */
4518 ring_container
->itr
= itrval
;
4521 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4523 struct igb_adapter
*adapter
= q_vector
->adapter
;
4524 u32 new_itr
= q_vector
->itr_val
;
4527 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4528 if (adapter
->link_speed
!= SPEED_1000
) {
4530 new_itr
= IGB_4K_ITR
;
4534 igb_update_itr(q_vector
, &q_vector
->tx
);
4535 igb_update_itr(q_vector
, &q_vector
->rx
);
4537 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4539 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4540 if (current_itr
== lowest_latency
&&
4541 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4542 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4543 current_itr
= low_latency
;
4545 switch (current_itr
) {
4546 /* counts and packets in update_itr are dependent on these numbers */
4547 case lowest_latency
:
4548 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4551 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4554 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4561 if (new_itr
!= q_vector
->itr_val
) {
4562 /* this attempts to bias the interrupt rate towards Bulk
4563 * by adding intermediate steps when interrupt rate is
4566 new_itr
= new_itr
> q_vector
->itr_val
?
4567 max((new_itr
* q_vector
->itr_val
) /
4568 (new_itr
+ (q_vector
->itr_val
>> 2)),
4570 /* Don't write the value here; it resets the adapter's
4571 * internal timer, and causes us to delay far longer than
4572 * we should between interrupts. Instead, we write the ITR
4573 * value at the beginning of the next interrupt so the timing
4574 * ends up being correct.
4576 q_vector
->itr_val
= new_itr
;
4577 q_vector
->set_itr
= 1;
4581 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4582 u32 type_tucmd
, u32 mss_l4len_idx
)
4584 struct e1000_adv_tx_context_desc
*context_desc
;
4585 u16 i
= tx_ring
->next_to_use
;
4587 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4590 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4592 /* set bits to identify this as an advanced context descriptor */
4593 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4595 /* For 82575, context index must be unique per ring. */
4596 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4597 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4599 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4600 context_desc
->seqnum_seed
= 0;
4601 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4602 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4605 static int igb_tso(struct igb_ring
*tx_ring
,
4606 struct igb_tx_buffer
*first
,
4609 struct sk_buff
*skb
= first
->skb
;
4610 u32 vlan_macip_lens
, type_tucmd
;
4611 u32 mss_l4len_idx
, l4len
;
4614 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4617 if (!skb_is_gso(skb
))
4620 err
= skb_cow_head(skb
, 0);
4624 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4625 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
4627 if (first
->protocol
== htons(ETH_P_IP
)) {
4628 struct iphdr
*iph
= ip_hdr(skb
);
4631 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4635 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4636 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4639 } else if (skb_is_gso_v6(skb
)) {
4640 ipv6_hdr(skb
)->payload_len
= 0;
4641 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4642 &ipv6_hdr(skb
)->daddr
,
4644 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4648 /* compute header lengths */
4649 l4len
= tcp_hdrlen(skb
);
4650 *hdr_len
= skb_transport_offset(skb
) + l4len
;
4652 /* update gso size and bytecount with header size */
4653 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
4654 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
4657 mss_l4len_idx
= l4len
<< E1000_ADVTXD_L4LEN_SHIFT
;
4658 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
4660 /* VLAN MACLEN IPLEN */
4661 vlan_macip_lens
= skb_network_header_len(skb
);
4662 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4663 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4665 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4670 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
4672 struct sk_buff
*skb
= first
->skb
;
4673 u32 vlan_macip_lens
= 0;
4674 u32 mss_l4len_idx
= 0;
4677 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
4678 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
4683 switch (first
->protocol
) {
4684 case htons(ETH_P_IP
):
4685 vlan_macip_lens
|= skb_network_header_len(skb
);
4686 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4687 l4_hdr
= ip_hdr(skb
)->protocol
;
4689 case htons(ETH_P_IPV6
):
4690 vlan_macip_lens
|= skb_network_header_len(skb
);
4691 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
4694 if (unlikely(net_ratelimit())) {
4695 dev_warn(tx_ring
->dev
,
4696 "partial checksum but proto=%x!\n",
4704 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
4705 mss_l4len_idx
= tcp_hdrlen(skb
) <<
4706 E1000_ADVTXD_L4LEN_SHIFT
;
4709 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
4710 mss_l4len_idx
= sizeof(struct sctphdr
) <<
4711 E1000_ADVTXD_L4LEN_SHIFT
;
4714 mss_l4len_idx
= sizeof(struct udphdr
) <<
4715 E1000_ADVTXD_L4LEN_SHIFT
;
4718 if (unlikely(net_ratelimit())) {
4719 dev_warn(tx_ring
->dev
,
4720 "partial checksum but l4 proto=%x!\n",
4726 /* update TX checksum flag */
4727 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
4730 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4731 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4733 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4736 #define IGB_SET_FLAG(_input, _flag, _result) \
4737 ((_flag <= _result) ? \
4738 ((u32)(_input & _flag) * (_result / _flag)) : \
4739 ((u32)(_input & _flag) / (_flag / _result)))
4741 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
4743 /* set type for advanced descriptor with frame checksum insertion */
4744 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
4745 E1000_ADVTXD_DCMD_DEXT
|
4746 E1000_ADVTXD_DCMD_IFCS
;
4748 /* set HW vlan bit if vlan is present */
4749 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
4750 (E1000_ADVTXD_DCMD_VLE
));
4752 /* set segmentation bits for TSO */
4753 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
4754 (E1000_ADVTXD_DCMD_TSE
));
4756 /* set timestamp bit if present */
4757 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
4758 (E1000_ADVTXD_MAC_TSTAMP
));
4760 /* insert frame checksum */
4761 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
4766 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
4767 union e1000_adv_tx_desc
*tx_desc
,
4768 u32 tx_flags
, unsigned int paylen
)
4770 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
4772 /* 82575 requires a unique index per ring */
4773 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4774 olinfo_status
|= tx_ring
->reg_idx
<< 4;
4776 /* insert L4 checksum */
4777 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4779 (E1000_TXD_POPTS_TXSM
<< 8));
4781 /* insert IPv4 checksum */
4782 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4784 (E1000_TXD_POPTS_IXSM
<< 8));
4786 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4789 static void igb_tx_map(struct igb_ring
*tx_ring
,
4790 struct igb_tx_buffer
*first
,
4793 struct sk_buff
*skb
= first
->skb
;
4794 struct igb_tx_buffer
*tx_buffer
;
4795 union e1000_adv_tx_desc
*tx_desc
;
4796 struct skb_frag_struct
*frag
;
4798 unsigned int data_len
, size
;
4799 u32 tx_flags
= first
->tx_flags
;
4800 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
4801 u16 i
= tx_ring
->next_to_use
;
4803 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
4805 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
4807 size
= skb_headlen(skb
);
4808 data_len
= skb
->data_len
;
4810 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
4814 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
4815 if (dma_mapping_error(tx_ring
->dev
, dma
))
4818 /* record length, and DMA address */
4819 dma_unmap_len_set(tx_buffer
, len
, size
);
4820 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
4822 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4824 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
4825 tx_desc
->read
.cmd_type_len
=
4826 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
4830 if (i
== tx_ring
->count
) {
4831 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4834 tx_desc
->read
.olinfo_status
= 0;
4836 dma
+= IGB_MAX_DATA_PER_TXD
;
4837 size
-= IGB_MAX_DATA_PER_TXD
;
4839 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4842 if (likely(!data_len
))
4845 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
4849 if (i
== tx_ring
->count
) {
4850 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4853 tx_desc
->read
.olinfo_status
= 0;
4855 size
= skb_frag_size(frag
);
4858 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
4859 size
, DMA_TO_DEVICE
);
4861 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4864 /* write last descriptor with RS and EOP bits */
4865 cmd_type
|= size
| IGB_TXD_DCMD
;
4866 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
4868 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
4870 /* set the timestamp */
4871 first
->time_stamp
= jiffies
;
4873 /* Force memory writes to complete before letting h/w know there
4874 * are new descriptors to fetch. (Only applicable for weak-ordered
4875 * memory model archs, such as IA-64).
4877 * We also need this memory barrier to make certain all of the
4878 * status bits have been updated before next_to_watch is written.
4882 /* set next_to_watch value indicating a packet is present */
4883 first
->next_to_watch
= tx_desc
;
4886 if (i
== tx_ring
->count
)
4889 tx_ring
->next_to_use
= i
;
4891 writel(i
, tx_ring
->tail
);
4893 /* we need this if more than one processor can write to our tail
4894 * at a time, it synchronizes IO on IA64/Altix systems
4901 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
4903 /* clear dma mappings for failed tx_buffer_info map */
4905 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4906 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
4907 if (tx_buffer
== first
)
4914 tx_ring
->next_to_use
= i
;
4917 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4919 struct net_device
*netdev
= tx_ring
->netdev
;
4921 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4923 /* Herbert's original patch had:
4924 * smp_mb__after_netif_stop_queue();
4925 * but since that doesn't exist yet, just open code it.
4929 /* We need to check again in a case another CPU has just
4930 * made room available.
4932 if (igb_desc_unused(tx_ring
) < size
)
4936 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4938 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
4939 tx_ring
->tx_stats
.restart_queue2
++;
4940 u64_stats_update_end(&tx_ring
->tx_syncp2
);
4945 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4947 if (igb_desc_unused(tx_ring
) >= size
)
4949 return __igb_maybe_stop_tx(tx_ring
, size
);
4952 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
4953 struct igb_ring
*tx_ring
)
4955 struct igb_tx_buffer
*first
;
4958 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
4959 __be16 protocol
= vlan_get_protocol(skb
);
4962 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4963 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4964 * + 2 desc gap to keep tail from touching head,
4965 * + 1 desc for context descriptor,
4966 * otherwise try next time
4968 if (NETDEV_FRAG_PAGE_MAX_SIZE
> IGB_MAX_DATA_PER_TXD
) {
4971 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
4972 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
4974 count
+= skb_shinfo(skb
)->nr_frags
;
4977 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
4978 /* this is a hard error */
4979 return NETDEV_TX_BUSY
;
4982 /* record the location of the first descriptor for this packet */
4983 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
4985 first
->bytecount
= skb
->len
;
4986 first
->gso_segs
= 1;
4988 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
4989 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
4991 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS
,
4993 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
4994 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
4996 adapter
->ptp_tx_skb
= skb_get(skb
);
4997 adapter
->ptp_tx_start
= jiffies
;
4998 if (adapter
->hw
.mac
.type
== e1000_82576
)
4999 schedule_work(&adapter
->ptp_tx_work
);
5003 skb_tx_timestamp(skb
);
5005 if (vlan_tx_tag_present(skb
)) {
5006 tx_flags
|= IGB_TX_FLAGS_VLAN
;
5007 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
5010 /* record initial flags and protocol */
5011 first
->tx_flags
= tx_flags
;
5012 first
->protocol
= protocol
;
5014 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
5018 igb_tx_csum(tx_ring
, first
);
5020 igb_tx_map(tx_ring
, first
, hdr_len
);
5022 /* Make sure there is space in the ring for the next send. */
5023 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
5025 return NETDEV_TX_OK
;
5028 igb_unmap_and_free_tx_resource(tx_ring
, first
);
5030 return NETDEV_TX_OK
;
5033 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
5034 struct sk_buff
*skb
)
5036 unsigned int r_idx
= skb
->queue_mapping
;
5038 if (r_idx
>= adapter
->num_tx_queues
)
5039 r_idx
= r_idx
% adapter
->num_tx_queues
;
5041 return adapter
->tx_ring
[r_idx
];
5044 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
5045 struct net_device
*netdev
)
5047 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5049 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5050 dev_kfree_skb_any(skb
);
5051 return NETDEV_TX_OK
;
5054 if (skb
->len
<= 0) {
5055 dev_kfree_skb_any(skb
);
5056 return NETDEV_TX_OK
;
5059 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5060 * in order to meet this minimum size requirement.
5062 if (unlikely(skb
->len
< 17)) {
5063 if (skb_pad(skb
, 17 - skb
->len
))
5064 return NETDEV_TX_OK
;
5066 skb_set_tail_pointer(skb
, 17);
5069 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
5073 * igb_tx_timeout - Respond to a Tx Hang
5074 * @netdev: network interface device structure
5076 static void igb_tx_timeout(struct net_device
*netdev
)
5078 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5079 struct e1000_hw
*hw
= &adapter
->hw
;
5081 /* Do the reset outside of interrupt context */
5082 adapter
->tx_timeout_count
++;
5084 if (hw
->mac
.type
>= e1000_82580
)
5085 hw
->dev_spec
._82575
.global_device_reset
= true;
5087 schedule_work(&adapter
->reset_task
);
5089 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
5092 static void igb_reset_task(struct work_struct
*work
)
5094 struct igb_adapter
*adapter
;
5095 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
5098 netdev_err(adapter
->netdev
, "Reset adapter\n");
5099 igb_reinit_locked(adapter
);
5103 * igb_get_stats64 - Get System Network Statistics
5104 * @netdev: network interface device structure
5105 * @stats: rtnl_link_stats64 pointer
5107 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*netdev
,
5108 struct rtnl_link_stats64
*stats
)
5110 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5112 spin_lock(&adapter
->stats64_lock
);
5113 igb_update_stats(adapter
, &adapter
->stats64
);
5114 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
5115 spin_unlock(&adapter
->stats64_lock
);
5121 * igb_change_mtu - Change the Maximum Transfer Unit
5122 * @netdev: network interface device structure
5123 * @new_mtu: new value for maximum frame size
5125 * Returns 0 on success, negative on failure
5127 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
5129 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5130 struct pci_dev
*pdev
= adapter
->pdev
;
5131 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
5133 if ((new_mtu
< 68) || (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
5134 dev_err(&pdev
->dev
, "Invalid MTU setting\n");
5138 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5139 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
5140 dev_err(&pdev
->dev
, "MTU > 9216 not supported.\n");
5144 /* adjust max frame to be at least the size of a standard frame */
5145 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
5146 max_frame
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
5148 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
5149 usleep_range(1000, 2000);
5151 /* igb_down has a dependency on max_frame_size */
5152 adapter
->max_frame_size
= max_frame
;
5154 if (netif_running(netdev
))
5157 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
5158 netdev
->mtu
, new_mtu
);
5159 netdev
->mtu
= new_mtu
;
5161 if (netif_running(netdev
))
5166 clear_bit(__IGB_RESETTING
, &adapter
->state
);
5172 * igb_update_stats - Update the board statistics counters
5173 * @adapter: board private structure
5175 void igb_update_stats(struct igb_adapter
*adapter
,
5176 struct rtnl_link_stats64
*net_stats
)
5178 struct e1000_hw
*hw
= &adapter
->hw
;
5179 struct pci_dev
*pdev
= adapter
->pdev
;
5185 u64 _bytes
, _packets
;
5187 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5189 /* Prevent stats update while adapter is being reset, or if the pci
5190 * connection is down.
5192 if (adapter
->link_speed
== 0)
5194 if (pci_channel_offline(pdev
))
5201 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5202 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
5203 u32 rqdpc
= rd32(E1000_RQDPC(i
));
5204 if (hw
->mac
.type
>= e1000_i210
)
5205 wr32(E1000_RQDPC(i
), 0);
5208 ring
->rx_stats
.drops
+= rqdpc
;
5209 net_stats
->rx_fifo_errors
+= rqdpc
;
5213 start
= u64_stats_fetch_begin_irq(&ring
->rx_syncp
);
5214 _bytes
= ring
->rx_stats
.bytes
;
5215 _packets
= ring
->rx_stats
.packets
;
5216 } while (u64_stats_fetch_retry_irq(&ring
->rx_syncp
, start
));
5218 packets
+= _packets
;
5221 net_stats
->rx_bytes
= bytes
;
5222 net_stats
->rx_packets
= packets
;
5226 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5227 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
5229 start
= u64_stats_fetch_begin_irq(&ring
->tx_syncp
);
5230 _bytes
= ring
->tx_stats
.bytes
;
5231 _packets
= ring
->tx_stats
.packets
;
5232 } while (u64_stats_fetch_retry_irq(&ring
->tx_syncp
, start
));
5234 packets
+= _packets
;
5236 net_stats
->tx_bytes
= bytes
;
5237 net_stats
->tx_packets
= packets
;
5240 /* read stats registers */
5241 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
5242 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
5243 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
5244 rd32(E1000_GORCH
); /* clear GORCL */
5245 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
5246 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
5247 adapter
->stats
.roc
+= rd32(E1000_ROC
);
5249 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
5250 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
5251 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
5252 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
5253 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
5254 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
5255 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
5256 adapter
->stats
.sec
+= rd32(E1000_SEC
);
5258 mpc
= rd32(E1000_MPC
);
5259 adapter
->stats
.mpc
+= mpc
;
5260 net_stats
->rx_fifo_errors
+= mpc
;
5261 adapter
->stats
.scc
+= rd32(E1000_SCC
);
5262 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
5263 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
5264 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
5265 adapter
->stats
.dc
+= rd32(E1000_DC
);
5266 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
5267 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
5268 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
5269 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
5270 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
5271 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
5272 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
5273 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
5274 rd32(E1000_GOTCH
); /* clear GOTCL */
5275 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
5276 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
5277 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
5278 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
5279 adapter
->stats
.tor
+= rd32(E1000_TORH
);
5280 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
5281 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
5283 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
5284 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
5285 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
5286 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
5287 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
5288 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
5290 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
5291 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
5293 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
5294 adapter
->stats
.colc
+= rd32(E1000_COLC
);
5296 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
5297 /* read internal phy specific stats */
5298 reg
= rd32(E1000_CTRL_EXT
);
5299 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
5300 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
5302 /* this stat has invalid values on i210/i211 */
5303 if ((hw
->mac
.type
!= e1000_i210
) &&
5304 (hw
->mac
.type
!= e1000_i211
))
5305 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
5308 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
5309 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
5311 adapter
->stats
.iac
+= rd32(E1000_IAC
);
5312 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
5313 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
5314 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
5315 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
5316 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
5317 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
5318 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
5319 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
5321 /* Fill out the OS statistics structure */
5322 net_stats
->multicast
= adapter
->stats
.mprc
;
5323 net_stats
->collisions
= adapter
->stats
.colc
;
5327 /* RLEC on some newer hardware can be incorrect so build
5328 * our own version based on RUC and ROC
5330 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
5331 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
5332 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
5333 adapter
->stats
.cexterr
;
5334 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
5336 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
5337 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5338 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5341 net_stats
->tx_errors
= adapter
->stats
.ecol
+
5342 adapter
->stats
.latecol
;
5343 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5344 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
5345 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5347 /* Tx Dropped needs to be maintained elsewhere */
5350 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
5351 if ((adapter
->link_speed
== SPEED_1000
) &&
5352 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
5353 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
5354 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
5358 /* Management Stats */
5359 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
5360 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
5361 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
5364 reg
= rd32(E1000_MANC
);
5365 if (reg
& E1000_MANC_EN_BMC2OS
) {
5366 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
5367 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5368 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5369 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5373 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5375 struct igb_adapter
*adapter
= data
;
5376 struct e1000_hw
*hw
= &adapter
->hw
;
5377 u32 icr
= rd32(E1000_ICR
);
5378 /* reading ICR causes bit 31 of EICR to be cleared */
5380 if (icr
& E1000_ICR_DRSTA
)
5381 schedule_work(&adapter
->reset_task
);
5383 if (icr
& E1000_ICR_DOUTSYNC
) {
5384 /* HW is reporting DMA is out of sync */
5385 adapter
->stats
.doosync
++;
5386 /* The DMA Out of Sync is also indication of a spoof event
5387 * in IOV mode. Check the Wrong VM Behavior register to
5388 * see if it is really a spoof event.
5390 igb_check_wvbr(adapter
);
5393 /* Check for a mailbox event */
5394 if (icr
& E1000_ICR_VMMB
)
5395 igb_msg_task(adapter
);
5397 if (icr
& E1000_ICR_LSC
) {
5398 hw
->mac
.get_link_status
= 1;
5399 /* guard against interrupt when we're going down */
5400 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5401 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5404 if (icr
& E1000_ICR_TS
) {
5405 u32 tsicr
= rd32(E1000_TSICR
);
5407 if (tsicr
& E1000_TSICR_TXTS
) {
5408 /* acknowledge the interrupt */
5409 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5410 /* retrieve hardware timestamp */
5411 schedule_work(&adapter
->ptp_tx_work
);
5415 wr32(E1000_EIMS
, adapter
->eims_other
);
5420 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5422 struct igb_adapter
*adapter
= q_vector
->adapter
;
5423 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5425 if (!q_vector
->set_itr
)
5431 if (adapter
->hw
.mac
.type
== e1000_82575
)
5432 itr_val
|= itr_val
<< 16;
5434 itr_val
|= E1000_EITR_CNT_IGNR
;
5436 writel(itr_val
, q_vector
->itr_register
);
5437 q_vector
->set_itr
= 0;
5440 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5442 struct igb_q_vector
*q_vector
= data
;
5444 /* Write the ITR value calculated from the previous interrupt. */
5445 igb_write_itr(q_vector
);
5447 napi_schedule(&q_vector
->napi
);
5452 #ifdef CONFIG_IGB_DCA
5453 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5454 struct igb_ring
*tx_ring
,
5457 struct e1000_hw
*hw
= &adapter
->hw
;
5458 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5460 if (hw
->mac
.type
!= e1000_82575
)
5461 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5463 /* We can enable relaxed ordering for reads, but not writes when
5464 * DCA is enabled. This is due to a known issue in some chipsets
5465 * which will cause the DCA tag to be cleared.
5467 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5468 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5469 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5471 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5474 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5475 struct igb_ring
*rx_ring
,
5478 struct e1000_hw
*hw
= &adapter
->hw
;
5479 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5481 if (hw
->mac
.type
!= e1000_82575
)
5482 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5484 /* We can enable relaxed ordering for reads, but not writes when
5485 * DCA is enabled. This is due to a known issue in some chipsets
5486 * which will cause the DCA tag to be cleared.
5488 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5489 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5491 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5494 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5496 struct igb_adapter
*adapter
= q_vector
->adapter
;
5497 int cpu
= get_cpu();
5499 if (q_vector
->cpu
== cpu
)
5502 if (q_vector
->tx
.ring
)
5503 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5505 if (q_vector
->rx
.ring
)
5506 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5508 q_vector
->cpu
= cpu
;
5513 static void igb_setup_dca(struct igb_adapter
*adapter
)
5515 struct e1000_hw
*hw
= &adapter
->hw
;
5518 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5521 /* Always use CB2 mode, difference is masked in the CB driver. */
5522 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5524 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5525 adapter
->q_vector
[i
]->cpu
= -1;
5526 igb_update_dca(adapter
->q_vector
[i
]);
5530 static int __igb_notify_dca(struct device
*dev
, void *data
)
5532 struct net_device
*netdev
= dev_get_drvdata(dev
);
5533 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5534 struct pci_dev
*pdev
= adapter
->pdev
;
5535 struct e1000_hw
*hw
= &adapter
->hw
;
5536 unsigned long event
= *(unsigned long *)data
;
5539 case DCA_PROVIDER_ADD
:
5540 /* if already enabled, don't do it again */
5541 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5543 if (dca_add_requester(dev
) == 0) {
5544 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5545 dev_info(&pdev
->dev
, "DCA enabled\n");
5546 igb_setup_dca(adapter
);
5549 /* Fall Through since DCA is disabled. */
5550 case DCA_PROVIDER_REMOVE
:
5551 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5552 /* without this a class_device is left
5553 * hanging around in the sysfs model
5555 dca_remove_requester(dev
);
5556 dev_info(&pdev
->dev
, "DCA disabled\n");
5557 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5558 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5566 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5571 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
5574 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5576 #endif /* CONFIG_IGB_DCA */
5578 #ifdef CONFIG_PCI_IOV
5579 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
5581 unsigned char mac_addr
[ETH_ALEN
];
5583 eth_zero_addr(mac_addr
);
5584 igb_set_vf_mac(adapter
, vf
, mac_addr
);
5586 /* By default spoof check is enabled for all VFs */
5587 adapter
->vf_data
[vf
].spoofchk_enabled
= true;
5593 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
5595 struct e1000_hw
*hw
= &adapter
->hw
;
5599 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
5600 ping
= E1000_PF_CONTROL_MSG
;
5601 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
5602 ping
|= E1000_VT_MSGTYPE_CTS
;
5603 igb_write_mbx(hw
, &ping
, 1, i
);
5607 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5609 struct e1000_hw
*hw
= &adapter
->hw
;
5610 u32 vmolr
= rd32(E1000_VMOLR(vf
));
5611 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5613 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
5614 IGB_VF_FLAG_MULTI_PROMISC
);
5615 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5617 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
5618 vmolr
|= E1000_VMOLR_MPME
;
5619 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
5620 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
5622 /* if we have hashes and we are clearing a multicast promisc
5623 * flag we need to write the hashes to the MTA as this step
5624 * was previously skipped
5626 if (vf_data
->num_vf_mc_hashes
> 30) {
5627 vmolr
|= E1000_VMOLR_MPME
;
5628 } else if (vf_data
->num_vf_mc_hashes
) {
5631 vmolr
|= E1000_VMOLR_ROMPE
;
5632 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5633 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5637 wr32(E1000_VMOLR(vf
), vmolr
);
5639 /* there are flags left unprocessed, likely not supported */
5640 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
5646 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
5647 u32
*msgbuf
, u32 vf
)
5649 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5650 u16
*hash_list
= (u16
*)&msgbuf
[1];
5651 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5654 /* salt away the number of multicast addresses assigned
5655 * to this VF for later use to restore when the PF multi cast
5658 vf_data
->num_vf_mc_hashes
= n
;
5660 /* only up to 30 hash values supported */
5664 /* store the hashes for later use */
5665 for (i
= 0; i
< n
; i
++)
5666 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
5668 /* Flush and reset the mta with the new values */
5669 igb_set_rx_mode(adapter
->netdev
);
5674 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
5676 struct e1000_hw
*hw
= &adapter
->hw
;
5677 struct vf_data_storage
*vf_data
;
5680 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5681 u32 vmolr
= rd32(E1000_VMOLR(i
));
5683 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5685 vf_data
= &adapter
->vf_data
[i
];
5687 if ((vf_data
->num_vf_mc_hashes
> 30) ||
5688 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
5689 vmolr
|= E1000_VMOLR_MPME
;
5690 } else if (vf_data
->num_vf_mc_hashes
) {
5691 vmolr
|= E1000_VMOLR_ROMPE
;
5692 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5693 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5695 wr32(E1000_VMOLR(i
), vmolr
);
5699 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
5701 struct e1000_hw
*hw
= &adapter
->hw
;
5702 u32 pool_mask
, reg
, vid
;
5705 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5707 /* Find the vlan filter for this id */
5708 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5709 reg
= rd32(E1000_VLVF(i
));
5711 /* remove the vf from the pool */
5714 /* if pool is empty then remove entry from vfta */
5715 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
5716 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
5718 vid
= reg
& E1000_VLVF_VLANID_MASK
;
5719 igb_vfta_set(hw
, vid
, false);
5722 wr32(E1000_VLVF(i
), reg
);
5725 adapter
->vf_data
[vf
].vlans_enabled
= 0;
5728 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
5730 struct e1000_hw
*hw
= &adapter
->hw
;
5733 /* The vlvf table only exists on 82576 hardware and newer */
5734 if (hw
->mac
.type
< e1000_82576
)
5737 /* we only need to do this if VMDq is enabled */
5738 if (!adapter
->vfs_allocated_count
)
5741 /* Find the vlan filter for this id */
5742 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5743 reg
= rd32(E1000_VLVF(i
));
5744 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5745 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5750 if (i
== E1000_VLVF_ARRAY_SIZE
) {
5751 /* Did not find a matching VLAN ID entry that was
5752 * enabled. Search for a free filter entry, i.e.
5753 * one without the enable bit set
5755 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5756 reg
= rd32(E1000_VLVF(i
));
5757 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
5761 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5762 /* Found an enabled/available entry */
5763 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5765 /* if !enabled we need to set this up in vfta */
5766 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
5767 /* add VID to filter table */
5768 igb_vfta_set(hw
, vid
, true);
5769 reg
|= E1000_VLVF_VLANID_ENABLE
;
5771 reg
&= ~E1000_VLVF_VLANID_MASK
;
5773 wr32(E1000_VLVF(i
), reg
);
5775 /* do not modify RLPML for PF devices */
5776 if (vf
>= adapter
->vfs_allocated_count
)
5779 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5782 reg
= rd32(E1000_VMOLR(vf
));
5783 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5785 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5787 wr32(E1000_VMOLR(vf
), reg
);
5790 adapter
->vf_data
[vf
].vlans_enabled
++;
5793 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5794 /* remove vf from the pool */
5795 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
5796 /* if pool is empty then remove entry from vfta */
5797 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
5799 igb_vfta_set(hw
, vid
, false);
5801 wr32(E1000_VLVF(i
), reg
);
5803 /* do not modify RLPML for PF devices */
5804 if (vf
>= adapter
->vfs_allocated_count
)
5807 adapter
->vf_data
[vf
].vlans_enabled
--;
5808 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5811 reg
= rd32(E1000_VMOLR(vf
));
5812 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5814 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5816 wr32(E1000_VMOLR(vf
), reg
);
5823 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
5825 struct e1000_hw
*hw
= &adapter
->hw
;
5828 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
5830 wr32(E1000_VMVIR(vf
), 0);
5833 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
5834 int vf
, u16 vlan
, u8 qos
)
5837 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5839 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
5842 err
= igb_vlvf_set(adapter
, vlan
, !!vlan
, vf
);
5845 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
5846 igb_set_vmolr(adapter
, vf
, !vlan
);
5847 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
5848 adapter
->vf_data
[vf
].pf_qos
= qos
;
5849 dev_info(&adapter
->pdev
->dev
,
5850 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
5851 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5852 dev_warn(&adapter
->pdev
->dev
,
5853 "The VF VLAN has been set, but the PF device is not up.\n");
5854 dev_warn(&adapter
->pdev
->dev
,
5855 "Bring the PF device up before attempting to use the VF device.\n");
5858 igb_vlvf_set(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
5860 igb_set_vmvir(adapter
, vlan
, vf
);
5861 igb_set_vmolr(adapter
, vf
, true);
5862 adapter
->vf_data
[vf
].pf_vlan
= 0;
5863 adapter
->vf_data
[vf
].pf_qos
= 0;
5869 static int igb_find_vlvf_entry(struct igb_adapter
*adapter
, int vid
)
5871 struct e1000_hw
*hw
= &adapter
->hw
;
5875 /* Find the vlan filter for this id */
5876 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5877 reg
= rd32(E1000_VLVF(i
));
5878 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5879 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5883 if (i
>= E1000_VLVF_ARRAY_SIZE
)
5889 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5891 struct e1000_hw
*hw
= &adapter
->hw
;
5892 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5893 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
5896 /* If in promiscuous mode we need to make sure the PF also has
5897 * the VLAN filter set.
5899 if (add
&& (adapter
->netdev
->flags
& IFF_PROMISC
))
5900 err
= igb_vlvf_set(adapter
, vid
, add
,
5901 adapter
->vfs_allocated_count
);
5905 err
= igb_vlvf_set(adapter
, vid
, add
, vf
);
5910 /* Go through all the checks to see if the VLAN filter should
5911 * be wiped completely.
5913 if (!add
&& (adapter
->netdev
->flags
& IFF_PROMISC
)) {
5915 int regndx
= igb_find_vlvf_entry(adapter
, vid
);
5919 /* See if any other pools are set for this VLAN filter
5920 * entry other than the PF.
5922 vlvf
= bits
= rd32(E1000_VLVF(regndx
));
5923 bits
&= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
5924 adapter
->vfs_allocated_count
);
5925 /* If the filter was removed then ensure PF pool bit
5926 * is cleared if the PF only added itself to the pool
5927 * because the PF is in promiscuous mode.
5929 if ((vlvf
& VLAN_VID_MASK
) == vid
&&
5930 !test_bit(vid
, adapter
->active_vlans
) &&
5932 igb_vlvf_set(adapter
, vid
, add
,
5933 adapter
->vfs_allocated_count
);
5940 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
5942 /* clear flags - except flag that indicates PF has set the MAC */
5943 adapter
->vf_data
[vf
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
5944 adapter
->vf_data
[vf
].last_nack
= jiffies
;
5946 /* reset offloads to defaults */
5947 igb_set_vmolr(adapter
, vf
, true);
5949 /* reset vlans for device */
5950 igb_clear_vf_vfta(adapter
, vf
);
5951 if (adapter
->vf_data
[vf
].pf_vlan
)
5952 igb_ndo_set_vf_vlan(adapter
->netdev
, vf
,
5953 adapter
->vf_data
[vf
].pf_vlan
,
5954 adapter
->vf_data
[vf
].pf_qos
);
5956 igb_clear_vf_vfta(adapter
, vf
);
5958 /* reset multicast table array for vf */
5959 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
5961 /* Flush and reset the mta with the new values */
5962 igb_set_rx_mode(adapter
->netdev
);
5965 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
5967 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5969 /* clear mac address as we were hotplug removed/added */
5970 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
5971 eth_zero_addr(vf_mac
);
5973 /* process remaining reset events */
5974 igb_vf_reset(adapter
, vf
);
5977 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
5979 struct e1000_hw
*hw
= &adapter
->hw
;
5980 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5981 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
5983 u8
*addr
= (u8
*)(&msgbuf
[1]);
5985 /* process all the same items cleared in a function level reset */
5986 igb_vf_reset(adapter
, vf
);
5988 /* set vf mac address */
5989 igb_rar_set_qsel(adapter
, vf_mac
, rar_entry
, vf
);
5991 /* enable transmit and receive for vf */
5992 reg
= rd32(E1000_VFTE
);
5993 wr32(E1000_VFTE
, reg
| (1 << vf
));
5994 reg
= rd32(E1000_VFRE
);
5995 wr32(E1000_VFRE
, reg
| (1 << vf
));
5997 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
5999 /* reply to reset with ack and vf mac address */
6000 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
6001 memcpy(addr
, vf_mac
, ETH_ALEN
);
6002 igb_write_mbx(hw
, msgbuf
, 3, vf
);
6005 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
6007 /* The VF MAC Address is stored in a packed array of bytes
6008 * starting at the second 32 bit word of the msg array
6010 unsigned char *addr
= (char *)&msg
[1];
6013 if (is_valid_ether_addr(addr
))
6014 err
= igb_set_vf_mac(adapter
, vf
, addr
);
6019 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6021 struct e1000_hw
*hw
= &adapter
->hw
;
6022 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6023 u32 msg
= E1000_VT_MSGTYPE_NACK
;
6025 /* if device isn't clear to send it shouldn't be reading either */
6026 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
6027 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
6028 igb_write_mbx(hw
, &msg
, 1, vf
);
6029 vf_data
->last_nack
= jiffies
;
6033 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6035 struct pci_dev
*pdev
= adapter
->pdev
;
6036 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
6037 struct e1000_hw
*hw
= &adapter
->hw
;
6038 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6041 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
);
6044 /* if receive failed revoke VF CTS stats and restart init */
6045 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
6046 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
6047 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6052 /* this is a message we already processed, do nothing */
6053 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
6056 /* until the vf completes a reset it should not be
6057 * allowed to start any configuration.
6059 if (msgbuf
[0] == E1000_VF_RESET
) {
6060 igb_vf_reset_msg(adapter
, vf
);
6064 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
6065 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6071 switch ((msgbuf
[0] & 0xFFFF)) {
6072 case E1000_VF_SET_MAC_ADDR
:
6074 if (!(vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
))
6075 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
6077 dev_warn(&pdev
->dev
,
6078 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6081 case E1000_VF_SET_PROMISC
:
6082 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
6084 case E1000_VF_SET_MULTICAST
:
6085 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
6087 case E1000_VF_SET_LPE
:
6088 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
6090 case E1000_VF_SET_VLAN
:
6092 if (vf_data
->pf_vlan
)
6093 dev_warn(&pdev
->dev
,
6094 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6097 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
6100 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
6105 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
6107 /* notify the VF of the results of what it sent us */
6109 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
6111 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
6113 igb_write_mbx(hw
, msgbuf
, 1, vf
);
6116 static void igb_msg_task(struct igb_adapter
*adapter
)
6118 struct e1000_hw
*hw
= &adapter
->hw
;
6121 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
6122 /* process any reset requests */
6123 if (!igb_check_for_rst(hw
, vf
))
6124 igb_vf_reset_event(adapter
, vf
);
6126 /* process any messages pending */
6127 if (!igb_check_for_msg(hw
, vf
))
6128 igb_rcv_msg_from_vf(adapter
, vf
);
6130 /* process any acks */
6131 if (!igb_check_for_ack(hw
, vf
))
6132 igb_rcv_ack_from_vf(adapter
, vf
);
6137 * igb_set_uta - Set unicast filter table address
6138 * @adapter: board private structure
6140 * The unicast table address is a register array of 32-bit registers.
6141 * The table is meant to be used in a way similar to how the MTA is used
6142 * however due to certain limitations in the hardware it is necessary to
6143 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6144 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6146 static void igb_set_uta(struct igb_adapter
*adapter
)
6148 struct e1000_hw
*hw
= &adapter
->hw
;
6151 /* The UTA table only exists on 82576 hardware and newer */
6152 if (hw
->mac
.type
< e1000_82576
)
6155 /* we only need to do this if VMDq is enabled */
6156 if (!adapter
->vfs_allocated_count
)
6159 for (i
= 0; i
< hw
->mac
.uta_reg_count
; i
++)
6160 array_wr32(E1000_UTA
, i
, ~0);
6164 * igb_intr_msi - Interrupt Handler
6165 * @irq: interrupt number
6166 * @data: pointer to a network interface device structure
6168 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
6170 struct igb_adapter
*adapter
= data
;
6171 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6172 struct e1000_hw
*hw
= &adapter
->hw
;
6173 /* read ICR disables interrupts using IAM */
6174 u32 icr
= rd32(E1000_ICR
);
6176 igb_write_itr(q_vector
);
6178 if (icr
& E1000_ICR_DRSTA
)
6179 schedule_work(&adapter
->reset_task
);
6181 if (icr
& E1000_ICR_DOUTSYNC
) {
6182 /* HW is reporting DMA is out of sync */
6183 adapter
->stats
.doosync
++;
6186 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6187 hw
->mac
.get_link_status
= 1;
6188 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6189 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6192 if (icr
& E1000_ICR_TS
) {
6193 u32 tsicr
= rd32(E1000_TSICR
);
6195 if (tsicr
& E1000_TSICR_TXTS
) {
6196 /* acknowledge the interrupt */
6197 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
6198 /* retrieve hardware timestamp */
6199 schedule_work(&adapter
->ptp_tx_work
);
6203 napi_schedule(&q_vector
->napi
);
6209 * igb_intr - Legacy Interrupt Handler
6210 * @irq: interrupt number
6211 * @data: pointer to a network interface device structure
6213 static irqreturn_t
igb_intr(int irq
, void *data
)
6215 struct igb_adapter
*adapter
= data
;
6216 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6217 struct e1000_hw
*hw
= &adapter
->hw
;
6218 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6219 * need for the IMC write
6221 u32 icr
= rd32(E1000_ICR
);
6223 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6224 * not set, then the adapter didn't send an interrupt
6226 if (!(icr
& E1000_ICR_INT_ASSERTED
))
6229 igb_write_itr(q_vector
);
6231 if (icr
& E1000_ICR_DRSTA
)
6232 schedule_work(&adapter
->reset_task
);
6234 if (icr
& E1000_ICR_DOUTSYNC
) {
6235 /* HW is reporting DMA is out of sync */
6236 adapter
->stats
.doosync
++;
6239 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6240 hw
->mac
.get_link_status
= 1;
6241 /* guard against interrupt when we're going down */
6242 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6243 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6246 if (icr
& E1000_ICR_TS
) {
6247 u32 tsicr
= rd32(E1000_TSICR
);
6249 if (tsicr
& E1000_TSICR_TXTS
) {
6250 /* acknowledge the interrupt */
6251 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
6252 /* retrieve hardware timestamp */
6253 schedule_work(&adapter
->ptp_tx_work
);
6257 napi_schedule(&q_vector
->napi
);
6262 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
6264 struct igb_adapter
*adapter
= q_vector
->adapter
;
6265 struct e1000_hw
*hw
= &adapter
->hw
;
6267 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
6268 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
6269 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
6270 igb_set_itr(q_vector
);
6272 igb_update_ring_itr(q_vector
);
6275 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
6276 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
6277 wr32(E1000_EIMS
, q_vector
->eims_value
);
6279 igb_irq_enable(adapter
);
6284 * igb_poll - NAPI Rx polling callback
6285 * @napi: napi polling structure
6286 * @budget: count of how many packets we should handle
6288 static int igb_poll(struct napi_struct
*napi
, int budget
)
6290 struct igb_q_vector
*q_vector
= container_of(napi
,
6291 struct igb_q_vector
,
6293 bool clean_complete
= true;
6295 #ifdef CONFIG_IGB_DCA
6296 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
6297 igb_update_dca(q_vector
);
6299 if (q_vector
->tx
.ring
)
6300 clean_complete
= igb_clean_tx_irq(q_vector
);
6302 if (q_vector
->rx
.ring
)
6303 clean_complete
&= igb_clean_rx_irq(q_vector
, budget
);
6305 /* If all work not completed, return budget and keep polling */
6306 if (!clean_complete
)
6309 /* If not enough Rx work done, exit the polling mode */
6310 napi_complete(napi
);
6311 igb_ring_irq_enable(q_vector
);
6317 * igb_clean_tx_irq - Reclaim resources after transmit completes
6318 * @q_vector: pointer to q_vector containing needed info
6320 * returns true if ring is completely cleaned
6322 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
)
6324 struct igb_adapter
*adapter
= q_vector
->adapter
;
6325 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
6326 struct igb_tx_buffer
*tx_buffer
;
6327 union e1000_adv_tx_desc
*tx_desc
;
6328 unsigned int total_bytes
= 0, total_packets
= 0;
6329 unsigned int budget
= q_vector
->tx
.work_limit
;
6330 unsigned int i
= tx_ring
->next_to_clean
;
6332 if (test_bit(__IGB_DOWN
, &adapter
->state
))
6335 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6336 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
6337 i
-= tx_ring
->count
;
6340 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
6342 /* if next_to_watch is not set then there is no work pending */
6346 /* prevent any other reads prior to eop_desc */
6347 read_barrier_depends();
6349 /* if DD is not set pending work has not been completed */
6350 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
6353 /* clear next_to_watch to prevent false hangs */
6354 tx_buffer
->next_to_watch
= NULL
;
6356 /* update the statistics for this packet */
6357 total_bytes
+= tx_buffer
->bytecount
;
6358 total_packets
+= tx_buffer
->gso_segs
;
6361 dev_kfree_skb_any(tx_buffer
->skb
);
6363 /* unmap skb header data */
6364 dma_unmap_single(tx_ring
->dev
,
6365 dma_unmap_addr(tx_buffer
, dma
),
6366 dma_unmap_len(tx_buffer
, len
),
6369 /* clear tx_buffer data */
6370 tx_buffer
->skb
= NULL
;
6371 dma_unmap_len_set(tx_buffer
, len
, 0);
6373 /* clear last DMA location and unmap remaining buffers */
6374 while (tx_desc
!= eop_desc
) {
6379 i
-= tx_ring
->count
;
6380 tx_buffer
= tx_ring
->tx_buffer_info
;
6381 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6384 /* unmap any remaining paged data */
6385 if (dma_unmap_len(tx_buffer
, len
)) {
6386 dma_unmap_page(tx_ring
->dev
,
6387 dma_unmap_addr(tx_buffer
, dma
),
6388 dma_unmap_len(tx_buffer
, len
),
6390 dma_unmap_len_set(tx_buffer
, len
, 0);
6394 /* move us one more past the eop_desc for start of next pkt */
6399 i
-= tx_ring
->count
;
6400 tx_buffer
= tx_ring
->tx_buffer_info
;
6401 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6404 /* issue prefetch for next Tx descriptor */
6407 /* update budget accounting */
6409 } while (likely(budget
));
6411 netdev_tx_completed_queue(txring_txq(tx_ring
),
6412 total_packets
, total_bytes
);
6413 i
+= tx_ring
->count
;
6414 tx_ring
->next_to_clean
= i
;
6415 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6416 tx_ring
->tx_stats
.bytes
+= total_bytes
;
6417 tx_ring
->tx_stats
.packets
+= total_packets
;
6418 u64_stats_update_end(&tx_ring
->tx_syncp
);
6419 q_vector
->tx
.total_bytes
+= total_bytes
;
6420 q_vector
->tx
.total_packets
+= total_packets
;
6422 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
6423 struct e1000_hw
*hw
= &adapter
->hw
;
6425 /* Detect a transmit hang in hardware, this serializes the
6426 * check with the clearing of time_stamp and movement of i
6428 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
6429 if (tx_buffer
->next_to_watch
&&
6430 time_after(jiffies
, tx_buffer
->time_stamp
+
6431 (adapter
->tx_timeout_factor
* HZ
)) &&
6432 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
6434 /* detected Tx unit hang */
6435 dev_err(tx_ring
->dev
,
6436 "Detected Tx Unit Hang\n"
6440 " next_to_use <%x>\n"
6441 " next_to_clean <%x>\n"
6442 "buffer_info[next_to_clean]\n"
6443 " time_stamp <%lx>\n"
6444 " next_to_watch <%p>\n"
6446 " desc.status <%x>\n",
6447 tx_ring
->queue_index
,
6448 rd32(E1000_TDH(tx_ring
->reg_idx
)),
6449 readl(tx_ring
->tail
),
6450 tx_ring
->next_to_use
,
6451 tx_ring
->next_to_clean
,
6452 tx_buffer
->time_stamp
,
6453 tx_buffer
->next_to_watch
,
6455 tx_buffer
->next_to_watch
->wb
.status
);
6456 netif_stop_subqueue(tx_ring
->netdev
,
6457 tx_ring
->queue_index
);
6459 /* we are about to reset, no point in enabling stuff */
6464 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6465 if (unlikely(total_packets
&&
6466 netif_carrier_ok(tx_ring
->netdev
) &&
6467 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
6468 /* Make sure that anybody stopping the queue after this
6469 * sees the new next_to_clean.
6472 if (__netif_subqueue_stopped(tx_ring
->netdev
,
6473 tx_ring
->queue_index
) &&
6474 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
6475 netif_wake_subqueue(tx_ring
->netdev
,
6476 tx_ring
->queue_index
);
6478 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6479 tx_ring
->tx_stats
.restart_queue
++;
6480 u64_stats_update_end(&tx_ring
->tx_syncp
);
6488 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6489 * @rx_ring: rx descriptor ring to store buffers on
6490 * @old_buff: donor buffer to have page reused
6492 * Synchronizes page for reuse by the adapter
6494 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
6495 struct igb_rx_buffer
*old_buff
)
6497 struct igb_rx_buffer
*new_buff
;
6498 u16 nta
= rx_ring
->next_to_alloc
;
6500 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
6502 /* update, and store next to alloc */
6504 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
6506 /* transfer page from old buffer to new buffer */
6507 *new_buff
= *old_buff
;
6509 /* sync the buffer for use by the device */
6510 dma_sync_single_range_for_device(rx_ring
->dev
, old_buff
->dma
,
6511 old_buff
->page_offset
,
6516 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
,
6518 unsigned int truesize
)
6520 /* avoid re-using remote pages */
6521 if (unlikely(page_to_nid(page
) != numa_node_id()))
6524 #if (PAGE_SIZE < 8192)
6525 /* if we are only owner of page we can reuse it */
6526 if (unlikely(page_count(page
) != 1))
6529 /* flip page offset to other buffer */
6530 rx_buffer
->page_offset
^= IGB_RX_BUFSZ
;
6532 /* since we are the only owner of the page and we need to
6533 * increment it, just set the value to 2 in order to avoid
6534 * an unnecessary locked operation
6536 atomic_set(&page
->_count
, 2);
6538 /* move offset up to the next cache line */
6539 rx_buffer
->page_offset
+= truesize
;
6541 if (rx_buffer
->page_offset
> (PAGE_SIZE
- IGB_RX_BUFSZ
))
6544 /* bump ref count on page before it is given to the stack */
6552 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6553 * @rx_ring: rx descriptor ring to transact packets on
6554 * @rx_buffer: buffer containing page to add
6555 * @rx_desc: descriptor containing length of buffer written by hardware
6556 * @skb: sk_buff to place the data into
6558 * This function will add the data contained in rx_buffer->page to the skb.
6559 * This is done either through a direct copy if the data in the buffer is
6560 * less than the skb header size, otherwise it will just attach the page as
6561 * a frag to the skb.
6563 * The function will then update the page offset if necessary and return
6564 * true if the buffer can be reused by the adapter.
6566 static bool igb_add_rx_frag(struct igb_ring
*rx_ring
,
6567 struct igb_rx_buffer
*rx_buffer
,
6568 union e1000_adv_rx_desc
*rx_desc
,
6569 struct sk_buff
*skb
)
6571 struct page
*page
= rx_buffer
->page
;
6572 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6573 #if (PAGE_SIZE < 8192)
6574 unsigned int truesize
= IGB_RX_BUFSZ
;
6576 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
6579 if ((size
<= IGB_RX_HDR_LEN
) && !skb_is_nonlinear(skb
)) {
6580 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
6582 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6583 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6584 va
+= IGB_TS_HDR_LEN
;
6585 size
-= IGB_TS_HDR_LEN
;
6588 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
6590 /* we can reuse buffer as-is, just make sure it is local */
6591 if (likely(page_to_nid(page
) == numa_node_id()))
6594 /* this page cannot be reused so discard it */
6599 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
6600 rx_buffer
->page_offset
, size
, truesize
);
6602 return igb_can_reuse_rx_page(rx_buffer
, page
, truesize
);
6605 static struct sk_buff
*igb_fetch_rx_buffer(struct igb_ring
*rx_ring
,
6606 union e1000_adv_rx_desc
*rx_desc
,
6607 struct sk_buff
*skb
)
6609 struct igb_rx_buffer
*rx_buffer
;
6612 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6614 page
= rx_buffer
->page
;
6618 void *page_addr
= page_address(page
) +
6619 rx_buffer
->page_offset
;
6621 /* prefetch first cache line of first page */
6622 prefetch(page_addr
);
6623 #if L1_CACHE_BYTES < 128
6624 prefetch(page_addr
+ L1_CACHE_BYTES
);
6627 /* allocate a skb to store the frags */
6628 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
6630 if (unlikely(!skb
)) {
6631 rx_ring
->rx_stats
.alloc_failed
++;
6635 /* we will be copying header into skb->data in
6636 * pskb_may_pull so it is in our interest to prefetch
6637 * it now to avoid a possible cache miss
6639 prefetchw(skb
->data
);
6642 /* we are reusing so sync this buffer for CPU use */
6643 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6645 rx_buffer
->page_offset
,
6649 /* pull page into skb */
6650 if (igb_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
6651 /* hand second half of page back to the ring */
6652 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6654 /* we are not reusing the buffer so unmap it */
6655 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
6656 PAGE_SIZE
, DMA_FROM_DEVICE
);
6659 /* clear contents of rx_buffer */
6660 rx_buffer
->page
= NULL
;
6665 static inline void igb_rx_checksum(struct igb_ring
*ring
,
6666 union e1000_adv_rx_desc
*rx_desc
,
6667 struct sk_buff
*skb
)
6669 skb_checksum_none_assert(skb
);
6671 /* Ignore Checksum bit is set */
6672 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
6675 /* Rx checksum disabled via ethtool */
6676 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
6679 /* TCP/UDP checksum error bit is set */
6680 if (igb_test_staterr(rx_desc
,
6681 E1000_RXDEXT_STATERR_TCPE
|
6682 E1000_RXDEXT_STATERR_IPE
)) {
6683 /* work around errata with sctp packets where the TCPE aka
6684 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6685 * packets, (aka let the stack check the crc32c)
6687 if (!((skb
->len
== 60) &&
6688 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
6689 u64_stats_update_begin(&ring
->rx_syncp
);
6690 ring
->rx_stats
.csum_err
++;
6691 u64_stats_update_end(&ring
->rx_syncp
);
6693 /* let the stack verify checksum errors */
6696 /* It must be a TCP or UDP packet with a valid checksum */
6697 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
6698 E1000_RXD_STAT_UDPCS
))
6699 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
6701 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
6702 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
6705 static inline void igb_rx_hash(struct igb_ring
*ring
,
6706 union e1000_adv_rx_desc
*rx_desc
,
6707 struct sk_buff
*skb
)
6709 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
6711 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
6716 * igb_is_non_eop - process handling of non-EOP buffers
6717 * @rx_ring: Rx ring being processed
6718 * @rx_desc: Rx descriptor for current buffer
6719 * @skb: current socket buffer containing buffer in progress
6721 * This function updates next to clean. If the buffer is an EOP buffer
6722 * this function exits returning false, otherwise it will place the
6723 * sk_buff in the next buffer to be chained and return true indicating
6724 * that this is in fact a non-EOP buffer.
6726 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
6727 union e1000_adv_rx_desc
*rx_desc
)
6729 u32 ntc
= rx_ring
->next_to_clean
+ 1;
6731 /* fetch, update, and store next to clean */
6732 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
6733 rx_ring
->next_to_clean
= ntc
;
6735 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
6737 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
6744 * igb_get_headlen - determine size of header for LRO/GRO
6745 * @data: pointer to the start of the headers
6746 * @max_len: total length of section to find headers in
6748 * This function is meant to determine the length of headers that will
6749 * be recognized by hardware for LRO, and GRO offloads. The main
6750 * motivation of doing this is to only perform one pull for IPv4 TCP
6751 * packets so that we can do basic things like calculating the gso_size
6752 * based on the average data per packet.
6754 static unsigned int igb_get_headlen(unsigned char *data
,
6755 unsigned int max_len
)
6758 unsigned char *network
;
6761 struct vlan_hdr
*vlan
;
6764 struct ipv6hdr
*ipv6
;
6767 u8 nexthdr
= 0; /* default to not TCP */
6770 /* this should never happen, but better safe than sorry */
6771 if (max_len
< ETH_HLEN
)
6774 /* initialize network frame pointer */
6777 /* set first protocol and move network header forward */
6778 protocol
= hdr
.eth
->h_proto
;
6779 hdr
.network
+= ETH_HLEN
;
6781 /* handle any vlan tag if present */
6782 if (protocol
== htons(ETH_P_8021Q
)) {
6783 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
6786 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
6787 hdr
.network
+= VLAN_HLEN
;
6790 /* handle L3 protocols */
6791 if (protocol
== htons(ETH_P_IP
)) {
6792 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
6795 /* access ihl as a u8 to avoid unaligned access on ia64 */
6796 hlen
= (hdr
.network
[0] & 0x0F) << 2;
6798 /* verify hlen meets minimum size requirements */
6799 if (hlen
< sizeof(struct iphdr
))
6800 return hdr
.network
- data
;
6802 /* record next protocol if header is present */
6803 if (!(hdr
.ipv4
->frag_off
& htons(IP_OFFSET
)))
6804 nexthdr
= hdr
.ipv4
->protocol
;
6805 } else if (protocol
== htons(ETH_P_IPV6
)) {
6806 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
6809 /* record next protocol */
6810 nexthdr
= hdr
.ipv6
->nexthdr
;
6811 hlen
= sizeof(struct ipv6hdr
);
6813 return hdr
.network
- data
;
6816 /* relocate pointer to start of L4 header */
6817 hdr
.network
+= hlen
;
6819 /* finally sort out TCP */
6820 if (nexthdr
== IPPROTO_TCP
) {
6821 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
6824 /* access doff as a u8 to avoid unaligned access on ia64 */
6825 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
6827 /* verify hlen meets minimum size requirements */
6828 if (hlen
< sizeof(struct tcphdr
))
6829 return hdr
.network
- data
;
6831 hdr
.network
+= hlen
;
6832 } else if (nexthdr
== IPPROTO_UDP
) {
6833 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
6836 hdr
.network
+= sizeof(struct udphdr
);
6839 /* If everything has gone correctly hdr.network should be the
6840 * data section of the packet and will be the end of the header.
6841 * If not then it probably represents the end of the last recognized
6844 if ((hdr
.network
- data
) < max_len
)
6845 return hdr
.network
- data
;
6851 * igb_pull_tail - igb specific version of skb_pull_tail
6852 * @rx_ring: rx descriptor ring packet is being transacted on
6853 * @rx_desc: pointer to the EOP Rx descriptor
6854 * @skb: pointer to current skb being adjusted
6856 * This function is an igb specific version of __pskb_pull_tail. The
6857 * main difference between this version and the original function is that
6858 * this function can make several assumptions about the state of things
6859 * that allow for significant optimizations versus the standard function.
6860 * As a result we can do things like drop a frag and maintain an accurate
6861 * truesize for the skb.
6863 static void igb_pull_tail(struct igb_ring
*rx_ring
,
6864 union e1000_adv_rx_desc
*rx_desc
,
6865 struct sk_buff
*skb
)
6867 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
6869 unsigned int pull_len
;
6871 /* it is valid to use page_address instead of kmap since we are
6872 * working with pages allocated out of the lomem pool per
6873 * alloc_page(GFP_ATOMIC)
6875 va
= skb_frag_address(frag
);
6877 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6878 /* retrieve timestamp from buffer */
6879 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6881 /* update pointers to remove timestamp header */
6882 skb_frag_size_sub(frag
, IGB_TS_HDR_LEN
);
6883 frag
->page_offset
+= IGB_TS_HDR_LEN
;
6884 skb
->data_len
-= IGB_TS_HDR_LEN
;
6885 skb
->len
-= IGB_TS_HDR_LEN
;
6887 /* move va to start of packet data */
6888 va
+= IGB_TS_HDR_LEN
;
6891 /* we need the header to contain the greater of either ETH_HLEN or
6892 * 60 bytes if the skb->len is less than 60 for skb_pad.
6894 pull_len
= igb_get_headlen(va
, IGB_RX_HDR_LEN
);
6896 /* align pull length to size of long to optimize memcpy performance */
6897 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
6899 /* update all of the pointers */
6900 skb_frag_size_sub(frag
, pull_len
);
6901 frag
->page_offset
+= pull_len
;
6902 skb
->data_len
-= pull_len
;
6903 skb
->tail
+= pull_len
;
6907 * igb_cleanup_headers - Correct corrupted or empty headers
6908 * @rx_ring: rx descriptor ring packet is being transacted on
6909 * @rx_desc: pointer to the EOP Rx descriptor
6910 * @skb: pointer to current skb being fixed
6912 * Address the case where we are pulling data in on pages only
6913 * and as such no data is present in the skb header.
6915 * In addition if skb is not at least 60 bytes we need to pad it so that
6916 * it is large enough to qualify as a valid Ethernet frame.
6918 * Returns true if an error was encountered and skb was freed.
6920 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
6921 union e1000_adv_rx_desc
*rx_desc
,
6922 struct sk_buff
*skb
)
6924 if (unlikely((igb_test_staterr(rx_desc
,
6925 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
6926 struct net_device
*netdev
= rx_ring
->netdev
;
6927 if (!(netdev
->features
& NETIF_F_RXALL
)) {
6928 dev_kfree_skb_any(skb
);
6933 /* place header in linear portion of buffer */
6934 if (skb_is_nonlinear(skb
))
6935 igb_pull_tail(rx_ring
, rx_desc
, skb
);
6937 /* if skb_pad returns an error the skb was freed */
6938 if (unlikely(skb
->len
< 60)) {
6939 int pad_len
= 60 - skb
->len
;
6941 if (skb_pad(skb
, pad_len
))
6943 __skb_put(skb
, pad_len
);
6950 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6951 * @rx_ring: rx descriptor ring packet is being transacted on
6952 * @rx_desc: pointer to the EOP Rx descriptor
6953 * @skb: pointer to current skb being populated
6955 * This function checks the ring, descriptor, and packet information in
6956 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6957 * other fields within the skb.
6959 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
6960 union e1000_adv_rx_desc
*rx_desc
,
6961 struct sk_buff
*skb
)
6963 struct net_device
*dev
= rx_ring
->netdev
;
6965 igb_rx_hash(rx_ring
, rx_desc
, skb
);
6967 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
6969 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TS
) &&
6970 !igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))
6971 igb_ptp_rx_rgtstamp(rx_ring
->q_vector
, skb
);
6973 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
6974 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
6977 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
6978 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
6979 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6981 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6983 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
6986 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
6988 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
6991 static bool igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
6993 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
6994 struct sk_buff
*skb
= rx_ring
->skb
;
6995 unsigned int total_bytes
= 0, total_packets
= 0;
6996 u16 cleaned_count
= igb_desc_unused(rx_ring
);
6998 while (likely(total_packets
< budget
)) {
6999 union e1000_adv_rx_desc
*rx_desc
;
7001 /* return some buffers to hardware, one at a time is too slow */
7002 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
7003 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7007 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
7009 if (!igb_test_staterr(rx_desc
, E1000_RXD_STAT_DD
))
7012 /* This memory barrier is needed to keep us from reading
7013 * any other fields out of the rx_desc until we know the
7014 * RXD_STAT_DD bit is set
7018 /* retrieve a buffer from the ring */
7019 skb
= igb_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
7021 /* exit if we failed to retrieve a buffer */
7027 /* fetch next buffer in frame if non-eop */
7028 if (igb_is_non_eop(rx_ring
, rx_desc
))
7031 /* verify the packet layout is correct */
7032 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
7037 /* probably a little skewed due to removing CRC */
7038 total_bytes
+= skb
->len
;
7040 /* populate checksum, timestamp, VLAN, and protocol */
7041 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
7043 napi_gro_receive(&q_vector
->napi
, skb
);
7045 /* reset skb pointer */
7048 /* update budget accounting */
7052 /* place incomplete frames back on ring for completion */
7055 u64_stats_update_begin(&rx_ring
->rx_syncp
);
7056 rx_ring
->rx_stats
.packets
+= total_packets
;
7057 rx_ring
->rx_stats
.bytes
+= total_bytes
;
7058 u64_stats_update_end(&rx_ring
->rx_syncp
);
7059 q_vector
->rx
.total_packets
+= total_packets
;
7060 q_vector
->rx
.total_bytes
+= total_bytes
;
7063 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7065 return total_packets
< budget
;
7068 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
7069 struct igb_rx_buffer
*bi
)
7071 struct page
*page
= bi
->page
;
7074 /* since we are recycling buffers we should seldom need to alloc */
7078 /* alloc new page for storage */
7079 page
= __skb_alloc_page(GFP_ATOMIC
| __GFP_COLD
, NULL
);
7080 if (unlikely(!page
)) {
7081 rx_ring
->rx_stats
.alloc_failed
++;
7085 /* map page for use */
7086 dma
= dma_map_page(rx_ring
->dev
, page
, 0, PAGE_SIZE
, DMA_FROM_DEVICE
);
7088 /* if mapping failed free memory back to system since
7089 * there isn't much point in holding memory we can't use
7091 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
7094 rx_ring
->rx_stats
.alloc_failed
++;
7100 bi
->page_offset
= 0;
7106 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
7107 * @adapter: address of board private structure
7109 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
7111 union e1000_adv_rx_desc
*rx_desc
;
7112 struct igb_rx_buffer
*bi
;
7113 u16 i
= rx_ring
->next_to_use
;
7119 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
7120 bi
= &rx_ring
->rx_buffer_info
[i
];
7121 i
-= rx_ring
->count
;
7124 if (!igb_alloc_mapped_page(rx_ring
, bi
))
7127 /* Refresh the desc even if buffer_addrs didn't change
7128 * because each write-back erases this info.
7130 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
7136 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
7137 bi
= rx_ring
->rx_buffer_info
;
7138 i
-= rx_ring
->count
;
7141 /* clear the hdr_addr for the next_to_use descriptor */
7142 rx_desc
->read
.hdr_addr
= 0;
7145 } while (cleaned_count
);
7147 i
+= rx_ring
->count
;
7149 if (rx_ring
->next_to_use
!= i
) {
7150 /* record the next descriptor to use */
7151 rx_ring
->next_to_use
= i
;
7153 /* update next to alloc since we have filled the ring */
7154 rx_ring
->next_to_alloc
= i
;
7156 /* Force memory writes to complete before letting h/w
7157 * know there are new descriptors to fetch. (Only
7158 * applicable for weak-ordered memory model archs,
7162 writel(i
, rx_ring
->tail
);
7172 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7174 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7175 struct mii_ioctl_data
*data
= if_mii(ifr
);
7177 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
7182 data
->phy_id
= adapter
->hw
.phy
.addr
;
7185 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
7202 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7208 return igb_mii_ioctl(netdev
, ifr
, cmd
);
7210 return igb_ptp_get_ts_config(netdev
, ifr
);
7212 return igb_ptp_set_ts_config(netdev
, ifr
);
7218 void igb_read_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7220 struct igb_adapter
*adapter
= hw
->back
;
7222 pci_read_config_word(adapter
->pdev
, reg
, value
);
7225 void igb_write_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7227 struct igb_adapter
*adapter
= hw
->back
;
7229 pci_write_config_word(adapter
->pdev
, reg
, *value
);
7232 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7234 struct igb_adapter
*adapter
= hw
->back
;
7236 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
7237 return -E1000_ERR_CONFIG
;
7242 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7244 struct igb_adapter
*adapter
= hw
->back
;
7246 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
7247 return -E1000_ERR_CONFIG
;
7252 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
7254 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7255 struct e1000_hw
*hw
= &adapter
->hw
;
7257 bool enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
7260 /* enable VLAN tag insert/strip */
7261 ctrl
= rd32(E1000_CTRL
);
7262 ctrl
|= E1000_CTRL_VME
;
7263 wr32(E1000_CTRL
, ctrl
);
7265 /* Disable CFI check */
7266 rctl
= rd32(E1000_RCTL
);
7267 rctl
&= ~E1000_RCTL_CFIEN
;
7268 wr32(E1000_RCTL
, rctl
);
7270 /* disable VLAN tag insert/strip */
7271 ctrl
= rd32(E1000_CTRL
);
7272 ctrl
&= ~E1000_CTRL_VME
;
7273 wr32(E1000_CTRL
, ctrl
);
7276 igb_rlpml_set(adapter
);
7279 static int igb_vlan_rx_add_vid(struct net_device
*netdev
,
7280 __be16 proto
, u16 vid
)
7282 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7283 struct e1000_hw
*hw
= &adapter
->hw
;
7284 int pf_id
= adapter
->vfs_allocated_count
;
7286 /* attempt to add filter to vlvf array */
7287 igb_vlvf_set(adapter
, vid
, true, pf_id
);
7289 /* add the filter since PF can receive vlans w/o entry in vlvf */
7290 igb_vfta_set(hw
, vid
, true);
7292 set_bit(vid
, adapter
->active_vlans
);
7297 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
,
7298 __be16 proto
, u16 vid
)
7300 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7301 struct e1000_hw
*hw
= &adapter
->hw
;
7302 int pf_id
= adapter
->vfs_allocated_count
;
7305 /* remove vlan from VLVF table array */
7306 err
= igb_vlvf_set(adapter
, vid
, false, pf_id
);
7308 /* if vid was not present in VLVF just remove it from table */
7310 igb_vfta_set(hw
, vid
, false);
7312 clear_bit(vid
, adapter
->active_vlans
);
7317 static void igb_restore_vlan(struct igb_adapter
*adapter
)
7321 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
7323 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
7324 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
7327 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
7329 struct pci_dev
*pdev
= adapter
->pdev
;
7330 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
7334 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7335 * for the switch() below to work
7337 if ((spd
& 1) || (dplx
& ~1))
7340 /* Fiber NIC's only allow 1000 gbps Full duplex
7341 * and 100Mbps Full duplex for 100baseFx sfp
7343 if (adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) {
7344 switch (spd
+ dplx
) {
7345 case SPEED_10
+ DUPLEX_HALF
:
7346 case SPEED_10
+ DUPLEX_FULL
:
7347 case SPEED_100
+ DUPLEX_HALF
:
7354 switch (spd
+ dplx
) {
7355 case SPEED_10
+ DUPLEX_HALF
:
7356 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
7358 case SPEED_10
+ DUPLEX_FULL
:
7359 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
7361 case SPEED_100
+ DUPLEX_HALF
:
7362 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7364 case SPEED_100
+ DUPLEX_FULL
:
7365 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7367 case SPEED_1000
+ DUPLEX_FULL
:
7369 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7371 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7376 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7377 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7382 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7386 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7389 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7390 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7391 struct e1000_hw
*hw
= &adapter
->hw
;
7392 u32 ctrl
, rctl
, status
;
7393 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7398 netif_device_detach(netdev
);
7400 if (netif_running(netdev
))
7401 __igb_close(netdev
, true);
7403 igb_clear_interrupt_scheme(adapter
);
7406 retval
= pci_save_state(pdev
);
7411 status
= rd32(E1000_STATUS
);
7412 if (status
& E1000_STATUS_LU
)
7413 wufc
&= ~E1000_WUFC_LNKC
;
7416 igb_setup_rctl(adapter
);
7417 igb_set_rx_mode(netdev
);
7419 /* turn on all-multi mode if wake on multicast is enabled */
7420 if (wufc
& E1000_WUFC_MC
) {
7421 rctl
= rd32(E1000_RCTL
);
7422 rctl
|= E1000_RCTL_MPE
;
7423 wr32(E1000_RCTL
, rctl
);
7426 ctrl
= rd32(E1000_CTRL
);
7427 /* advertise wake from D3Cold */
7428 #define E1000_CTRL_ADVD3WUC 0x00100000
7429 /* phy power management enable */
7430 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7431 ctrl
|= E1000_CTRL_ADVD3WUC
;
7432 wr32(E1000_CTRL
, ctrl
);
7434 /* Allow time for pending master requests to run */
7435 igb_disable_pcie_master(hw
);
7437 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7438 wr32(E1000_WUFC
, wufc
);
7441 wr32(E1000_WUFC
, 0);
7444 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7446 igb_power_down_link(adapter
);
7448 igb_power_up_link(adapter
);
7450 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7451 * would have already happened in close and is redundant.
7453 igb_release_hw_control(adapter
);
7455 pci_disable_device(pdev
);
7461 #ifdef CONFIG_PM_SLEEP
7462 static int igb_suspend(struct device
*dev
)
7466 struct pci_dev
*pdev
= to_pci_dev(dev
);
7468 retval
= __igb_shutdown(pdev
, &wake
, 0);
7473 pci_prepare_to_sleep(pdev
);
7475 pci_wake_from_d3(pdev
, false);
7476 pci_set_power_state(pdev
, PCI_D3hot
);
7481 #endif /* CONFIG_PM_SLEEP */
7483 static int igb_resume(struct device
*dev
)
7485 struct pci_dev
*pdev
= to_pci_dev(dev
);
7486 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7487 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7488 struct e1000_hw
*hw
= &adapter
->hw
;
7491 pci_set_power_state(pdev
, PCI_D0
);
7492 pci_restore_state(pdev
);
7493 pci_save_state(pdev
);
7495 err
= pci_enable_device_mem(pdev
);
7498 "igb: Cannot enable PCI device from suspend\n");
7501 pci_set_master(pdev
);
7503 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7504 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7506 if (igb_init_interrupt_scheme(adapter
, true)) {
7507 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7513 /* let the f/w know that the h/w is now under the control of the
7516 igb_get_hw_control(adapter
);
7518 wr32(E1000_WUS
, ~0);
7520 if (netdev
->flags
& IFF_UP
) {
7522 err
= __igb_open(netdev
, true);
7528 netif_device_attach(netdev
);
7532 #ifdef CONFIG_PM_RUNTIME
7533 static int igb_runtime_idle(struct device
*dev
)
7535 struct pci_dev
*pdev
= to_pci_dev(dev
);
7536 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7537 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7539 if (!igb_has_link(adapter
))
7540 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
7545 static int igb_runtime_suspend(struct device
*dev
)
7547 struct pci_dev
*pdev
= to_pci_dev(dev
);
7551 retval
= __igb_shutdown(pdev
, &wake
, 1);
7556 pci_prepare_to_sleep(pdev
);
7558 pci_wake_from_d3(pdev
, false);
7559 pci_set_power_state(pdev
, PCI_D3hot
);
7565 static int igb_runtime_resume(struct device
*dev
)
7567 return igb_resume(dev
);
7569 #endif /* CONFIG_PM_RUNTIME */
7572 static void igb_shutdown(struct pci_dev
*pdev
)
7576 __igb_shutdown(pdev
, &wake
, 0);
7578 if (system_state
== SYSTEM_POWER_OFF
) {
7579 pci_wake_from_d3(pdev
, wake
);
7580 pci_set_power_state(pdev
, PCI_D3hot
);
7584 #ifdef CONFIG_PCI_IOV
7585 static int igb_sriov_reinit(struct pci_dev
*dev
)
7587 struct net_device
*netdev
= pci_get_drvdata(dev
);
7588 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7589 struct pci_dev
*pdev
= adapter
->pdev
;
7593 if (netif_running(netdev
))
7596 igb_clear_interrupt_scheme(adapter
);
7598 igb_init_queue_configuration(adapter
);
7600 if (igb_init_interrupt_scheme(adapter
, true)) {
7601 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7605 if (netif_running(netdev
))
7613 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
7615 int err
= igb_disable_sriov(dev
);
7618 err
= igb_sriov_reinit(dev
);
7623 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
7625 int err
= igb_enable_sriov(dev
, num_vfs
);
7630 err
= igb_sriov_reinit(dev
);
7639 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
7641 #ifdef CONFIG_PCI_IOV
7643 return igb_pci_disable_sriov(dev
);
7645 return igb_pci_enable_sriov(dev
, num_vfs
);
7650 #ifdef CONFIG_NET_POLL_CONTROLLER
7651 /* Polling 'interrupt' - used by things like netconsole to send skbs
7652 * without having to re-enable interrupts. It's not called while
7653 * the interrupt routine is executing.
7655 static void igb_netpoll(struct net_device
*netdev
)
7657 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7658 struct e1000_hw
*hw
= &adapter
->hw
;
7659 struct igb_q_vector
*q_vector
;
7662 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7663 q_vector
= adapter
->q_vector
[i
];
7664 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
7665 wr32(E1000_EIMC
, q_vector
->eims_value
);
7667 igb_irq_disable(adapter
);
7668 napi_schedule(&q_vector
->napi
);
7671 #endif /* CONFIG_NET_POLL_CONTROLLER */
7674 * igb_io_error_detected - called when PCI error is detected
7675 * @pdev: Pointer to PCI device
7676 * @state: The current pci connection state
7678 * This function is called after a PCI bus error affecting
7679 * this device has been detected.
7681 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
7682 pci_channel_state_t state
)
7684 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7685 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7687 netif_device_detach(netdev
);
7689 if (state
== pci_channel_io_perm_failure
)
7690 return PCI_ERS_RESULT_DISCONNECT
;
7692 if (netif_running(netdev
))
7694 pci_disable_device(pdev
);
7696 /* Request a slot slot reset. */
7697 return PCI_ERS_RESULT_NEED_RESET
;
7701 * igb_io_slot_reset - called after the pci bus has been reset.
7702 * @pdev: Pointer to PCI device
7704 * Restart the card from scratch, as if from a cold-boot. Implementation
7705 * resembles the first-half of the igb_resume routine.
7707 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
7709 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7710 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7711 struct e1000_hw
*hw
= &adapter
->hw
;
7712 pci_ers_result_t result
;
7715 if (pci_enable_device_mem(pdev
)) {
7717 "Cannot re-enable PCI device after reset.\n");
7718 result
= PCI_ERS_RESULT_DISCONNECT
;
7720 pci_set_master(pdev
);
7721 pci_restore_state(pdev
);
7722 pci_save_state(pdev
);
7724 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7725 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7728 wr32(E1000_WUS
, ~0);
7729 result
= PCI_ERS_RESULT_RECOVERED
;
7732 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7735 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7737 /* non-fatal, continue */
7744 * igb_io_resume - called when traffic can start flowing again.
7745 * @pdev: Pointer to PCI device
7747 * This callback is called when the error recovery driver tells us that
7748 * its OK to resume normal operation. Implementation resembles the
7749 * second-half of the igb_resume routine.
7751 static void igb_io_resume(struct pci_dev
*pdev
)
7753 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7754 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7756 if (netif_running(netdev
)) {
7757 if (igb_up(adapter
)) {
7758 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
7763 netif_device_attach(netdev
);
7765 /* let the f/w know that the h/w is now under the control of the
7768 igb_get_hw_control(adapter
);
7771 static void igb_rar_set_qsel(struct igb_adapter
*adapter
, u8
*addr
, u32 index
,
7774 u32 rar_low
, rar_high
;
7775 struct e1000_hw
*hw
= &adapter
->hw
;
7777 /* HW expects these in little endian so we reverse the byte order
7778 * from network order (big endian) to little endian
7780 rar_low
= ((u32
) addr
[0] | ((u32
) addr
[1] << 8) |
7781 ((u32
) addr
[2] << 16) | ((u32
) addr
[3] << 24));
7782 rar_high
= ((u32
) addr
[4] | ((u32
) addr
[5] << 8));
7784 /* Indicate to hardware the Address is Valid. */
7785 rar_high
|= E1000_RAH_AV
;
7787 if (hw
->mac
.type
== e1000_82575
)
7788 rar_high
|= E1000_RAH_POOL_1
* qsel
;
7790 rar_high
|= E1000_RAH_POOL_1
<< qsel
;
7792 wr32(E1000_RAL(index
), rar_low
);
7794 wr32(E1000_RAH(index
), rar_high
);
7798 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
7799 int vf
, unsigned char *mac_addr
)
7801 struct e1000_hw
*hw
= &adapter
->hw
;
7802 /* VF MAC addresses start at end of receive addresses and moves
7803 * towards the first, as a result a collision should not be possible
7805 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
7807 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
7809 igb_rar_set_qsel(adapter
, mac_addr
, rar_entry
, vf
);
7814 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
7816 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7817 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
7819 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
7820 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
7821 dev_info(&adapter
->pdev
->dev
,
7822 "Reload the VF driver to make this change effective.");
7823 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
7824 dev_warn(&adapter
->pdev
->dev
,
7825 "The VF MAC address has been set, but the PF device is not up.\n");
7826 dev_warn(&adapter
->pdev
->dev
,
7827 "Bring the PF device up before attempting to use the VF device.\n");
7829 return igb_set_vf_mac(adapter
, vf
, mac
);
7832 static int igb_link_mbps(int internal_link_speed
)
7834 switch (internal_link_speed
) {
7844 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
7851 /* Calculate the rate factor values to set */
7852 rf_int
= link_speed
/ tx_rate
;
7853 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
7854 rf_dec
= (rf_dec
* (1 << E1000_RTTBCNRC_RF_INT_SHIFT
)) /
7857 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
7858 bcnrc_val
|= ((rf_int
<< E1000_RTTBCNRC_RF_INT_SHIFT
) &
7859 E1000_RTTBCNRC_RF_INT_MASK
);
7860 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
7865 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
7866 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7867 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7869 wr32(E1000_RTTBCNRM
, 0x14);
7870 wr32(E1000_RTTBCNRC
, bcnrc_val
);
7873 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
7875 int actual_link_speed
, i
;
7876 bool reset_rate
= false;
7878 /* VF TX rate limit was not set or not supported */
7879 if ((adapter
->vf_rate_link_speed
== 0) ||
7880 (adapter
->hw
.mac
.type
!= e1000_82576
))
7883 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7884 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
7886 adapter
->vf_rate_link_speed
= 0;
7887 dev_info(&adapter
->pdev
->dev
,
7888 "Link speed has been changed. VF Transmit rate is disabled\n");
7891 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
7893 adapter
->vf_data
[i
].tx_rate
= 0;
7895 igb_set_vf_rate_limit(&adapter
->hw
, i
,
7896 adapter
->vf_data
[i
].tx_rate
,
7901 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
,
7902 int min_tx_rate
, int max_tx_rate
)
7904 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7905 struct e1000_hw
*hw
= &adapter
->hw
;
7906 int actual_link_speed
;
7908 if (hw
->mac
.type
!= e1000_82576
)
7914 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7915 if ((vf
>= adapter
->vfs_allocated_count
) ||
7916 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
7917 (max_tx_rate
< 0) ||
7918 (max_tx_rate
> actual_link_speed
))
7921 adapter
->vf_rate_link_speed
= actual_link_speed
;
7922 adapter
->vf_data
[vf
].tx_rate
= (u16
)max_tx_rate
;
7923 igb_set_vf_rate_limit(hw
, vf
, max_tx_rate
, actual_link_speed
);
7928 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
7931 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7932 struct e1000_hw
*hw
= &adapter
->hw
;
7933 u32 reg_val
, reg_offset
;
7935 if (!adapter
->vfs_allocated_count
)
7938 if (vf
>= adapter
->vfs_allocated_count
)
7941 reg_offset
= (hw
->mac
.type
== e1000_82576
) ? E1000_DTXSWC
: E1000_TXSWC
;
7942 reg_val
= rd32(reg_offset
);
7944 reg_val
|= ((1 << vf
) |
7945 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7947 reg_val
&= ~((1 << vf
) |
7948 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7949 wr32(reg_offset
, reg_val
);
7951 adapter
->vf_data
[vf
].spoofchk_enabled
= setting
;
7955 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
7956 int vf
, struct ifla_vf_info
*ivi
)
7958 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7959 if (vf
>= adapter
->vfs_allocated_count
)
7962 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
7963 ivi
->max_tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
7964 ivi
->min_tx_rate
= 0;
7965 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
7966 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
7967 ivi
->spoofchk
= adapter
->vf_data
[vf
].spoofchk_enabled
;
7971 static void igb_vmm_control(struct igb_adapter
*adapter
)
7973 struct e1000_hw
*hw
= &adapter
->hw
;
7976 switch (hw
->mac
.type
) {
7982 /* replication is not supported for 82575 */
7985 /* notify HW that the MAC is adding vlan tags */
7986 reg
= rd32(E1000_DTXCTL
);
7987 reg
|= E1000_DTXCTL_VLAN_ADDED
;
7988 wr32(E1000_DTXCTL
, reg
);
7991 /* enable replication vlan tag stripping */
7992 reg
= rd32(E1000_RPLOLR
);
7993 reg
|= E1000_RPLOLR_STRVLAN
;
7994 wr32(E1000_RPLOLR
, reg
);
7997 /* none of the above registers are supported by i350 */
8001 if (adapter
->vfs_allocated_count
) {
8002 igb_vmdq_set_loopback_pf(hw
, true);
8003 igb_vmdq_set_replication_pf(hw
, true);
8004 igb_vmdq_set_anti_spoofing_pf(hw
, true,
8005 adapter
->vfs_allocated_count
);
8007 igb_vmdq_set_loopback_pf(hw
, false);
8008 igb_vmdq_set_replication_pf(hw
, false);
8012 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
8014 struct e1000_hw
*hw
= &adapter
->hw
;
8018 if (hw
->mac
.type
> e1000_82580
) {
8019 if (adapter
->flags
& IGB_FLAG_DMAC
) {
8022 /* force threshold to 0. */
8023 wr32(E1000_DMCTXTH
, 0);
8025 /* DMA Coalescing high water mark needs to be greater
8026 * than the Rx threshold. Set hwm to PBA - max frame
8027 * size in 16B units, capping it at PBA - 6KB.
8029 hwm
= 64 * pba
- adapter
->max_frame_size
/ 16;
8030 if (hwm
< 64 * (pba
- 6))
8031 hwm
= 64 * (pba
- 6);
8032 reg
= rd32(E1000_FCRTC
);
8033 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
8034 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
8035 & E1000_FCRTC_RTH_COAL_MASK
);
8036 wr32(E1000_FCRTC
, reg
);
8038 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8039 * frame size, capping it at PBA - 10KB.
8041 dmac_thr
= pba
- adapter
->max_frame_size
/ 512;
8042 if (dmac_thr
< pba
- 10)
8043 dmac_thr
= pba
- 10;
8044 reg
= rd32(E1000_DMACR
);
8045 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
8046 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
8047 & E1000_DMACR_DMACTHR_MASK
);
8049 /* transition to L0x or L1 if available..*/
8050 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
8052 /* watchdog timer= +-1000 usec in 32usec intervals */
8055 /* Disable BMC-to-OS Watchdog Enable */
8056 if (hw
->mac
.type
!= e1000_i354
)
8057 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
8059 wr32(E1000_DMACR
, reg
);
8061 /* no lower threshold to disable
8062 * coalescing(smart fifb)-UTRESH=0
8064 wr32(E1000_DMCRTRH
, 0);
8066 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
8068 wr32(E1000_DMCTLX
, reg
);
8070 /* free space in tx packet buffer to wake from
8073 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
8074 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
8076 /* make low power state decision controlled
8079 reg
= rd32(E1000_PCIEMISC
);
8080 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
8081 wr32(E1000_PCIEMISC
, reg
);
8082 } /* endif adapter->dmac is not disabled */
8083 } else if (hw
->mac
.type
== e1000_82580
) {
8084 u32 reg
= rd32(E1000_PCIEMISC
);
8086 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
8087 wr32(E1000_DMACR
, 0);
8092 * igb_read_i2c_byte - Reads 8 bit word over I2C
8093 * @hw: pointer to hardware structure
8094 * @byte_offset: byte offset to read
8095 * @dev_addr: device address
8098 * Performs byte read operation over I2C interface at
8099 * a specified device address.
8101 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8102 u8 dev_addr
, u8
*data
)
8104 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8105 struct i2c_client
*this_client
= adapter
->i2c_client
;
8110 return E1000_ERR_I2C
;
8112 swfw_mask
= E1000_SWFW_PHY0_SM
;
8114 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8115 return E1000_ERR_SWFW_SYNC
;
8117 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
8118 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8121 return E1000_ERR_I2C
;
8129 * igb_write_i2c_byte - Writes 8 bit word over I2C
8130 * @hw: pointer to hardware structure
8131 * @byte_offset: byte offset to write
8132 * @dev_addr: device address
8133 * @data: value to write
8135 * Performs byte write operation over I2C interface at
8136 * a specified device address.
8138 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8139 u8 dev_addr
, u8 data
)
8141 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8142 struct i2c_client
*this_client
= adapter
->i2c_client
;
8144 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
8147 return E1000_ERR_I2C
;
8149 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8150 return E1000_ERR_SWFW_SYNC
;
8151 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
8152 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8155 return E1000_ERR_I2C
;
8161 int igb_reinit_queues(struct igb_adapter
*adapter
)
8163 struct net_device
*netdev
= adapter
->netdev
;
8164 struct pci_dev
*pdev
= adapter
->pdev
;
8167 if (netif_running(netdev
))
8170 igb_reset_interrupt_capability(adapter
);
8172 if (igb_init_interrupt_scheme(adapter
, true)) {
8173 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8177 if (netif_running(netdev
))
8178 err
= igb_open(netdev
);