2 * Copyright (c) 2017, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include "en_accel/ipsec.h"
36 static const struct counter_desc sw_stats_desc
[] = {
37 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_packets
) },
38 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_bytes
) },
39 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_packets
) },
40 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_bytes
) },
41 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_tso_packets
) },
42 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_tso_bytes
) },
43 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_tso_inner_packets
) },
44 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_tso_inner_bytes
) },
45 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_added_vlan_packets
) },
46 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_lro_packets
) },
47 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_lro_bytes
) },
48 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_ecn_mark
) },
49 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_removed_vlan_packets
) },
50 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_csum_unnecessary
) },
51 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_csum_none
) },
52 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_csum_complete
) },
53 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_csum_complete_tail
) },
54 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_csum_complete_tail_slow
) },
55 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_csum_unnecessary_inner
) },
56 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_xdp_drop
) },
57 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_xdp_tx
) },
58 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_xdp_tx_full
) },
59 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_csum_none
) },
60 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_csum_partial
) },
61 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_csum_partial_inner
) },
62 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_queue_stopped
) },
63 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_queue_wake
) },
64 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_queue_dropped
) },
65 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, tx_xmit_more
) },
66 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_wqe_err
) },
67 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_mpwqe_filler
) },
68 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_buff_alloc_err
) },
69 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_cqe_compress_blks
) },
70 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_cqe_compress_pkts
) },
71 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_page_reuse
) },
72 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_cache_reuse
) },
73 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_cache_full
) },
74 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_cache_empty
) },
75 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_cache_busy
) },
76 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, rx_cache_waive
) },
77 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats
, link_down_events_phy
) },
80 #define NUM_SW_COUNTERS ARRAY_SIZE(sw_stats_desc)
82 static int mlx5e_grp_sw_get_num_stats(struct mlx5e_priv
*priv
)
84 return NUM_SW_COUNTERS
;
87 static int mlx5e_grp_sw_fill_strings(struct mlx5e_priv
*priv
, u8
*data
, int idx
)
91 for (i
= 0; i
< NUM_SW_COUNTERS
; i
++)
92 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, sw_stats_desc
[i
].format
);
96 static int mlx5e_grp_sw_fill_stats(struct mlx5e_priv
*priv
, u64
*data
, int idx
)
100 for (i
= 0; i
< NUM_SW_COUNTERS
; i
++)
101 data
[idx
++] = MLX5E_READ_CTR64_CPU(&priv
->stats
.sw
, sw_stats_desc
, i
);
105 static const struct counter_desc q_stats_desc
[] = {
106 { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats
, rx_out_of_buffer
) },
109 #define NUM_Q_COUNTERS ARRAY_SIZE(q_stats_desc)
111 static int mlx5e_grp_q_get_num_stats(struct mlx5e_priv
*priv
)
113 return priv
->q_counter
? NUM_Q_COUNTERS
: 0;
116 static int mlx5e_grp_q_fill_strings(struct mlx5e_priv
*priv
, u8
*data
, int idx
)
120 for (i
= 0; i
< NUM_Q_COUNTERS
&& priv
->q_counter
; i
++)
121 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, q_stats_desc
[i
].format
);
125 static int mlx5e_grp_q_fill_stats(struct mlx5e_priv
*priv
, u64
*data
, int idx
)
129 for (i
= 0; i
< NUM_Q_COUNTERS
&& priv
->q_counter
; i
++)
130 data
[idx
++] = MLX5E_READ_CTR32_CPU(&priv
->stats
.qcnt
, q_stats_desc
, i
);
134 #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c)
135 static const struct counter_desc vport_stats_desc
[] = {
136 { "rx_vport_unicast_packets",
137 VPORT_COUNTER_OFF(received_eth_unicast
.packets
) },
138 { "rx_vport_unicast_bytes",
139 VPORT_COUNTER_OFF(received_eth_unicast
.octets
) },
140 { "tx_vport_unicast_packets",
141 VPORT_COUNTER_OFF(transmitted_eth_unicast
.packets
) },
142 { "tx_vport_unicast_bytes",
143 VPORT_COUNTER_OFF(transmitted_eth_unicast
.octets
) },
144 { "rx_vport_multicast_packets",
145 VPORT_COUNTER_OFF(received_eth_multicast
.packets
) },
146 { "rx_vport_multicast_bytes",
147 VPORT_COUNTER_OFF(received_eth_multicast
.octets
) },
148 { "tx_vport_multicast_packets",
149 VPORT_COUNTER_OFF(transmitted_eth_multicast
.packets
) },
150 { "tx_vport_multicast_bytes",
151 VPORT_COUNTER_OFF(transmitted_eth_multicast
.octets
) },
152 { "rx_vport_broadcast_packets",
153 VPORT_COUNTER_OFF(received_eth_broadcast
.packets
) },
154 { "rx_vport_broadcast_bytes",
155 VPORT_COUNTER_OFF(received_eth_broadcast
.octets
) },
156 { "tx_vport_broadcast_packets",
157 VPORT_COUNTER_OFF(transmitted_eth_broadcast
.packets
) },
158 { "tx_vport_broadcast_bytes",
159 VPORT_COUNTER_OFF(transmitted_eth_broadcast
.octets
) },
160 { "rx_vport_rdma_unicast_packets",
161 VPORT_COUNTER_OFF(received_ib_unicast
.packets
) },
162 { "rx_vport_rdma_unicast_bytes",
163 VPORT_COUNTER_OFF(received_ib_unicast
.octets
) },
164 { "tx_vport_rdma_unicast_packets",
165 VPORT_COUNTER_OFF(transmitted_ib_unicast
.packets
) },
166 { "tx_vport_rdma_unicast_bytes",
167 VPORT_COUNTER_OFF(transmitted_ib_unicast
.octets
) },
168 { "rx_vport_rdma_multicast_packets",
169 VPORT_COUNTER_OFF(received_ib_multicast
.packets
) },
170 { "rx_vport_rdma_multicast_bytes",
171 VPORT_COUNTER_OFF(received_ib_multicast
.octets
) },
172 { "tx_vport_rdma_multicast_packets",
173 VPORT_COUNTER_OFF(transmitted_ib_multicast
.packets
) },
174 { "tx_vport_rdma_multicast_bytes",
175 VPORT_COUNTER_OFF(transmitted_ib_multicast
.octets
) },
178 #define NUM_VPORT_COUNTERS ARRAY_SIZE(vport_stats_desc)
180 static int mlx5e_grp_vport_get_num_stats(struct mlx5e_priv
*priv
)
182 return NUM_VPORT_COUNTERS
;
185 static int mlx5e_grp_vport_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
190 for (i
= 0; i
< NUM_VPORT_COUNTERS
; i
++)
191 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, vport_stats_desc
[i
].format
);
195 static int mlx5e_grp_vport_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
200 for (i
= 0; i
< NUM_VPORT_COUNTERS
; i
++)
201 data
[idx
++] = MLX5E_READ_CTR64_BE(priv
->stats
.vport
.query_vport_out
,
202 vport_stats_desc
, i
);
206 #define PPORT_802_3_OFF(c) \
207 MLX5_BYTE_OFF(ppcnt_reg, \
208 counter_set.eth_802_3_cntrs_grp_data_layout.c##_high)
209 static const struct counter_desc pport_802_3_stats_desc
[] = {
210 { "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok
) },
211 { "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok
) },
212 { "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors
) },
213 { "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok
) },
214 { "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok
) },
215 { "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok
) },
216 { "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok
) },
217 { "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok
) },
218 { "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok
) },
219 { "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors
) },
220 { "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field
) },
221 { "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors
) },
222 { "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier
) },
223 { "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted
) },
224 { "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received
) },
225 { "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received
) },
226 { "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received
) },
227 { "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted
) },
230 #define NUM_PPORT_802_3_COUNTERS ARRAY_SIZE(pport_802_3_stats_desc)
232 static int mlx5e_grp_802_3_get_num_stats(struct mlx5e_priv
*priv
)
234 return NUM_PPORT_802_3_COUNTERS
;
237 static int mlx5e_grp_802_3_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
242 for (i
= 0; i
< NUM_PPORT_802_3_COUNTERS
; i
++)
243 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, pport_802_3_stats_desc
[i
].format
);
247 static int mlx5e_grp_802_3_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
252 for (i
= 0; i
< NUM_PPORT_802_3_COUNTERS
; i
++)
253 data
[idx
++] = MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.IEEE_802_3_counters
,
254 pport_802_3_stats_desc
, i
);
258 #define PPORT_2863_OFF(c) \
259 MLX5_BYTE_OFF(ppcnt_reg, \
260 counter_set.eth_2863_cntrs_grp_data_layout.c##_high)
261 static const struct counter_desc pport_2863_stats_desc
[] = {
262 { "rx_discards_phy", PPORT_2863_OFF(if_in_discards
) },
263 { "tx_discards_phy", PPORT_2863_OFF(if_out_discards
) },
264 { "tx_errors_phy", PPORT_2863_OFF(if_out_errors
) },
267 #define NUM_PPORT_2863_COUNTERS ARRAY_SIZE(pport_2863_stats_desc)
269 static int mlx5e_grp_2863_get_num_stats(struct mlx5e_priv
*priv
)
271 return NUM_PPORT_2863_COUNTERS
;
274 static int mlx5e_grp_2863_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
279 for (i
= 0; i
< NUM_PPORT_2863_COUNTERS
; i
++)
280 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, pport_2863_stats_desc
[i
].format
);
284 static int mlx5e_grp_2863_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
289 for (i
= 0; i
< NUM_PPORT_2863_COUNTERS
; i
++)
290 data
[idx
++] = MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.RFC_2863_counters
,
291 pport_2863_stats_desc
, i
);
295 #define PPORT_2819_OFF(c) \
296 MLX5_BYTE_OFF(ppcnt_reg, \
297 counter_set.eth_2819_cntrs_grp_data_layout.c##_high)
298 static const struct counter_desc pport_2819_stats_desc
[] = {
299 { "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts
) },
300 { "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments
) },
301 { "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers
) },
302 { "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets
) },
303 { "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets
) },
304 { "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets
) },
305 { "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets
) },
306 { "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets
) },
307 { "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets
) },
308 { "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets
) },
309 { "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets
) },
310 { "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets
) },
311 { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets
) },
314 #define NUM_PPORT_2819_COUNTERS ARRAY_SIZE(pport_2819_stats_desc)
316 static int mlx5e_grp_2819_get_num_stats(struct mlx5e_priv
*priv
)
318 return NUM_PPORT_2819_COUNTERS
;
321 static int mlx5e_grp_2819_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
326 for (i
= 0; i
< NUM_PPORT_2819_COUNTERS
; i
++)
327 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, pport_2819_stats_desc
[i
].format
);
331 static int mlx5e_grp_2819_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
336 for (i
= 0; i
< NUM_PPORT_2819_COUNTERS
; i
++)
337 data
[idx
++] = MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.RFC_2819_counters
,
338 pport_2819_stats_desc
, i
);
342 #define PPORT_PHY_STATISTICAL_OFF(c) \
343 MLX5_BYTE_OFF(ppcnt_reg, \
344 counter_set.phys_layer_statistical_cntrs.c##_high)
345 static const struct counter_desc pport_phy_statistical_stats_desc
[] = {
346 { "rx_pcs_symbol_err_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors
) },
347 { "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits
) },
350 #define NUM_PPORT_PHY_COUNTERS ARRAY_SIZE(pport_phy_statistical_stats_desc)
352 static int mlx5e_grp_phy_get_num_stats(struct mlx5e_priv
*priv
)
354 return MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, ppcnt_statistical_group
) ?
355 NUM_PPORT_PHY_COUNTERS
: 0;
358 static int mlx5e_grp_phy_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
363 if (MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, ppcnt_statistical_group
))
364 for (i
= 0; i
< NUM_PPORT_PHY_COUNTERS
; i
++)
365 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
366 pport_phy_statistical_stats_desc
[i
].format
);
370 static int mlx5e_grp_phy_fill_stats(struct mlx5e_priv
*priv
, u64
*data
, int idx
)
374 if (MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, ppcnt_statistical_group
))
375 for (i
= 0; i
< NUM_PPORT_PHY_COUNTERS
; i
++)
377 MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.phy_statistical_counters
,
378 pport_phy_statistical_stats_desc
, i
);
382 #define PPORT_ETH_EXT_OFF(c) \
383 MLX5_BYTE_OFF(ppcnt_reg, \
384 counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
385 static const struct counter_desc pport_eth_ext_stats_desc
[] = {
386 { "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full
) },
389 #define NUM_PPORT_ETH_EXT_COUNTERS ARRAY_SIZE(pport_eth_ext_stats_desc)
391 static int mlx5e_grp_eth_ext_get_num_stats(struct mlx5e_priv
*priv
)
393 if (MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, rx_buffer_fullness_counters
))
394 return NUM_PPORT_ETH_EXT_COUNTERS
;
399 static int mlx5e_grp_eth_ext_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
404 if (MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, rx_buffer_fullness_counters
))
405 for (i
= 0; i
< NUM_PPORT_ETH_EXT_COUNTERS
; i
++)
406 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
407 pport_eth_ext_stats_desc
[i
].format
);
411 static int mlx5e_grp_eth_ext_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
416 if (MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, rx_buffer_fullness_counters
))
417 for (i
= 0; i
< NUM_PPORT_ETH_EXT_COUNTERS
; i
++)
419 MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.eth_ext_counters
,
420 pport_eth_ext_stats_desc
, i
);
424 #define PCIE_PERF_OFF(c) \
425 MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c)
426 static const struct counter_desc pcie_perf_stats_desc
[] = {
427 { "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors
) },
428 { "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors
) },
431 #define PCIE_PERF_OFF64(c) \
432 MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high)
433 static const struct counter_desc pcie_perf_stats_desc64
[] = {
434 { "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt
) },
437 static const struct counter_desc pcie_perf_stall_stats_desc
[] = {
438 { "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads
) },
439 { "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes
) },
440 { "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events
) },
441 { "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events
) },
444 #define NUM_PCIE_PERF_COUNTERS ARRAY_SIZE(pcie_perf_stats_desc)
445 #define NUM_PCIE_PERF_COUNTERS64 ARRAY_SIZE(pcie_perf_stats_desc64)
446 #define NUM_PCIE_PERF_STALL_COUNTERS ARRAY_SIZE(pcie_perf_stall_stats_desc)
448 static int mlx5e_grp_pcie_get_num_stats(struct mlx5e_priv
*priv
)
452 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, pcie_performance_group
))
453 num_stats
+= NUM_PCIE_PERF_COUNTERS
;
455 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, tx_overflow_buffer_pkt
))
456 num_stats
+= NUM_PCIE_PERF_COUNTERS64
;
458 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, pcie_outbound_stalled
))
459 num_stats
+= NUM_PCIE_PERF_STALL_COUNTERS
;
464 static int mlx5e_grp_pcie_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
469 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, pcie_performance_group
))
470 for (i
= 0; i
< NUM_PCIE_PERF_COUNTERS
; i
++)
471 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
472 pcie_perf_stats_desc
[i
].format
);
474 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, tx_overflow_buffer_pkt
))
475 for (i
= 0; i
< NUM_PCIE_PERF_COUNTERS64
; i
++)
476 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
477 pcie_perf_stats_desc64
[i
].format
);
479 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, pcie_outbound_stalled
))
480 for (i
= 0; i
< NUM_PCIE_PERF_STALL_COUNTERS
; i
++)
481 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
482 pcie_perf_stall_stats_desc
[i
].format
);
486 static int mlx5e_grp_pcie_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
491 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, pcie_performance_group
))
492 for (i
= 0; i
< NUM_PCIE_PERF_COUNTERS
; i
++)
494 MLX5E_READ_CTR32_BE(&priv
->stats
.pcie
.pcie_perf_counters
,
495 pcie_perf_stats_desc
, i
);
497 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, tx_overflow_buffer_pkt
))
498 for (i
= 0; i
< NUM_PCIE_PERF_COUNTERS64
; i
++)
500 MLX5E_READ_CTR64_BE(&priv
->stats
.pcie
.pcie_perf_counters
,
501 pcie_perf_stats_desc64
, i
);
503 if (MLX5_CAP_MCAM_FEATURE((priv
)->mdev
, pcie_outbound_stalled
))
504 for (i
= 0; i
< NUM_PCIE_PERF_STALL_COUNTERS
; i
++)
506 MLX5E_READ_CTR32_BE(&priv
->stats
.pcie
.pcie_perf_counters
,
507 pcie_perf_stall_stats_desc
, i
);
511 #define PPORT_PER_PRIO_OFF(c) \
512 MLX5_BYTE_OFF(ppcnt_reg, \
513 counter_set.eth_per_prio_grp_data_layout.c##_high)
514 static const struct counter_desc pport_per_prio_traffic_stats_desc
[] = {
515 { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets
) },
516 { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames
) },
517 { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets
) },
518 { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames
) },
521 #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS ARRAY_SIZE(pport_per_prio_traffic_stats_desc)
523 static int mlx5e_grp_per_prio_traffic_get_num_stats(struct mlx5e_priv
*priv
)
525 return NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS
* NUM_PPORT_PRIO
;
528 static int mlx5e_grp_per_prio_traffic_fill_strings(struct mlx5e_priv
*priv
,
534 for (prio
= 0; prio
< NUM_PPORT_PRIO
; prio
++) {
535 for (i
= 0; i
< NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS
; i
++)
536 sprintf(data
+ (idx
++) * ETH_GSTRING_LEN
,
537 pport_per_prio_traffic_stats_desc
[i
].format
, prio
);
543 static int mlx5e_grp_per_prio_traffic_fill_stats(struct mlx5e_priv
*priv
,
549 for (prio
= 0; prio
< NUM_PPORT_PRIO
; prio
++) {
550 for (i
= 0; i
< NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS
; i
++)
552 MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.per_prio_counters
[prio
],
553 pport_per_prio_traffic_stats_desc
, i
);
559 static const struct counter_desc pport_per_prio_pfc_stats_desc
[] = {
560 /* %s is "global" or "prio{i}" */
561 { "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause
) },
562 { "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration
) },
563 { "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause
) },
564 { "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration
) },
565 { "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition
) },
568 #define NUM_PPORT_PER_PRIO_PFC_COUNTERS ARRAY_SIZE(pport_per_prio_pfc_stats_desc)
570 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv
*priv
)
572 struct mlx5_core_dev
*mdev
= priv
->mdev
;
577 if (MLX5_CAP_GEN(mdev
, port_type
) != MLX5_CAP_PORT_TYPE_ETH
)
580 err
= mlx5_query_port_pfc(mdev
, &pfc_en_tx
, &pfc_en_rx
);
582 return err
? 0 : pfc_en_tx
| pfc_en_rx
;
585 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv
*priv
)
587 struct mlx5_core_dev
*mdev
= priv
->mdev
;
592 if (MLX5_CAP_GEN(mdev
, port_type
) != MLX5_CAP_PORT_TYPE_ETH
)
595 err
= mlx5_query_port_pause(mdev
, &rx_pause
, &tx_pause
);
597 return err
? false : rx_pause
| tx_pause
;
600 static int mlx5e_grp_per_prio_pfc_get_num_stats(struct mlx5e_priv
*priv
)
602 return (mlx5e_query_global_pause_combined(priv
) +
603 hweight8(mlx5e_query_pfc_combined(priv
))) *
604 NUM_PPORT_PER_PRIO_PFC_COUNTERS
;
607 static int mlx5e_grp_per_prio_pfc_fill_strings(struct mlx5e_priv
*priv
,
611 unsigned long pfc_combined
;
614 pfc_combined
= mlx5e_query_pfc_combined(priv
);
615 for_each_set_bit(prio
, &pfc_combined
, NUM_PPORT_PRIO
) {
616 for (i
= 0; i
< NUM_PPORT_PER_PRIO_PFC_COUNTERS
; i
++) {
617 char pfc_string
[ETH_GSTRING_LEN
];
619 snprintf(pfc_string
, sizeof(pfc_string
), "prio%d", prio
);
620 sprintf(data
+ (idx
++) * ETH_GSTRING_LEN
,
621 pport_per_prio_pfc_stats_desc
[i
].format
, pfc_string
);
625 if (mlx5e_query_global_pause_combined(priv
)) {
626 for (i
= 0; i
< NUM_PPORT_PER_PRIO_PFC_COUNTERS
; i
++) {
627 sprintf(data
+ (idx
++) * ETH_GSTRING_LEN
,
628 pport_per_prio_pfc_stats_desc
[i
].format
, "global");
635 static int mlx5e_grp_per_prio_pfc_fill_stats(struct mlx5e_priv
*priv
,
639 unsigned long pfc_combined
;
642 pfc_combined
= mlx5e_query_pfc_combined(priv
);
643 for_each_set_bit(prio
, &pfc_combined
, NUM_PPORT_PRIO
) {
644 for (i
= 0; i
< NUM_PPORT_PER_PRIO_PFC_COUNTERS
; i
++) {
646 MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.per_prio_counters
[prio
],
647 pport_per_prio_pfc_stats_desc
, i
);
651 if (mlx5e_query_global_pause_combined(priv
)) {
652 for (i
= 0; i
< NUM_PPORT_PER_PRIO_PFC_COUNTERS
; i
++) {
654 MLX5E_READ_CTR64_BE(&priv
->stats
.pport
.per_prio_counters
[0],
655 pport_per_prio_pfc_stats_desc
, i
);
662 static const struct counter_desc mlx5e_pme_status_desc
[] = {
663 { "module_unplug", 8 },
666 static const struct counter_desc mlx5e_pme_error_desc
[] = {
667 { "module_bus_stuck", 16 }, /* bus stuck (I2C or data shorted) */
668 { "module_high_temp", 48 }, /* high temperature */
669 { "module_bad_shorted", 56 }, /* bad or shorted cable/module */
672 #define NUM_PME_STATUS_STATS ARRAY_SIZE(mlx5e_pme_status_desc)
673 #define NUM_PME_ERR_STATS ARRAY_SIZE(mlx5e_pme_error_desc)
675 static int mlx5e_grp_pme_get_num_stats(struct mlx5e_priv
*priv
)
677 return NUM_PME_STATUS_STATS
+ NUM_PME_ERR_STATS
;
680 static int mlx5e_grp_pme_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
685 for (i
= 0; i
< NUM_PME_STATUS_STATS
; i
++)
686 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, mlx5e_pme_status_desc
[i
].format
);
688 for (i
= 0; i
< NUM_PME_ERR_STATS
; i
++)
689 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
, mlx5e_pme_error_desc
[i
].format
);
694 static int mlx5e_grp_pme_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
697 struct mlx5_priv
*mlx5_priv
= &priv
->mdev
->priv
;
700 for (i
= 0; i
< NUM_PME_STATUS_STATS
; i
++)
701 data
[idx
++] = MLX5E_READ_CTR64_CPU(mlx5_priv
->pme_stats
.status_counters
,
702 mlx5e_pme_status_desc
, i
);
704 for (i
= 0; i
< NUM_PME_ERR_STATS
; i
++)
705 data
[idx
++] = MLX5E_READ_CTR64_CPU(mlx5_priv
->pme_stats
.error_counters
,
706 mlx5e_pme_error_desc
, i
);
711 static int mlx5e_grp_ipsec_get_num_stats(struct mlx5e_priv
*priv
)
713 return mlx5e_ipsec_get_count(priv
);
716 static int mlx5e_grp_ipsec_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
719 return idx
+ mlx5e_ipsec_get_strings(priv
,
720 data
+ idx
* ETH_GSTRING_LEN
);
723 static int mlx5e_grp_ipsec_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
726 return idx
+ mlx5e_ipsec_get_stats(priv
, data
+ idx
);
729 static const struct counter_desc rq_stats_desc
[] = {
730 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, packets
) },
731 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, bytes
) },
732 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, csum_complete
) },
733 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, csum_complete_tail
) },
734 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, csum_complete_tail_slow
) },
735 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, csum_unnecessary
) },
736 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, csum_unnecessary_inner
) },
737 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, csum_none
) },
738 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, xdp_drop
) },
739 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, xdp_tx
) },
740 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, xdp_tx_full
) },
741 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, lro_packets
) },
742 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, lro_bytes
) },
743 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, ecn_mark
) },
744 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, removed_vlan_packets
) },
745 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, wqe_err
) },
746 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, mpwqe_filler
) },
747 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, buff_alloc_err
) },
748 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, cqe_compress_blks
) },
749 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, cqe_compress_pkts
) },
750 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, page_reuse
) },
751 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, cache_reuse
) },
752 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, cache_full
) },
753 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, cache_empty
) },
754 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, cache_busy
) },
755 { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats
, cache_waive
) },
758 static const struct counter_desc sq_stats_desc
[] = {
759 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, packets
) },
760 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, bytes
) },
761 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, tso_packets
) },
762 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, tso_bytes
) },
763 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, tso_inner_packets
) },
764 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, tso_inner_bytes
) },
765 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, csum_partial
) },
766 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, csum_partial_inner
) },
767 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, added_vlan_packets
) },
768 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, nop
) },
769 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, csum_none
) },
770 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, stopped
) },
771 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, wake
) },
772 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, dropped
) },
773 { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats
, xmit_more
) },
776 #define NUM_RQ_STATS ARRAY_SIZE(rq_stats_desc)
777 #define NUM_SQ_STATS ARRAY_SIZE(sq_stats_desc)
779 static int mlx5e_grp_channels_get_num_stats(struct mlx5e_priv
*priv
)
781 return (NUM_RQ_STATS
* priv
->channels
.num
) +
782 (NUM_SQ_STATS
* priv
->channels
.num
* priv
->channels
.params
.num_tc
);
785 static int mlx5e_grp_channels_fill_strings(struct mlx5e_priv
*priv
, u8
*data
,
790 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
))
793 for (i
= 0; i
< priv
->channels
.num
; i
++)
794 for (j
= 0; j
< NUM_RQ_STATS
; j
++)
795 sprintf(data
+ (idx
++) * ETH_GSTRING_LEN
, rq_stats_desc
[j
].format
, i
);
797 for (tc
= 0; tc
< priv
->channels
.params
.num_tc
; tc
++)
798 for (i
= 0; i
< priv
->channels
.num
; i
++)
799 for (j
= 0; j
< NUM_SQ_STATS
; j
++)
800 sprintf(data
+ (idx
++) * ETH_GSTRING_LEN
,
801 sq_stats_desc
[j
].format
,
802 priv
->channel_tc2txq
[i
][tc
]);
807 static int mlx5e_grp_channels_fill_stats(struct mlx5e_priv
*priv
, u64
*data
,
810 struct mlx5e_channels
*channels
= &priv
->channels
;
813 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
))
816 for (i
= 0; i
< channels
->num
; i
++)
817 for (j
= 0; j
< NUM_RQ_STATS
; j
++)
819 MLX5E_READ_CTR64_CPU(&channels
->c
[i
]->rq
.stats
,
822 for (tc
= 0; tc
< priv
->channels
.params
.num_tc
; tc
++)
823 for (i
= 0; i
< channels
->num
; i
++)
824 for (j
= 0; j
< NUM_SQ_STATS
; j
++)
826 MLX5E_READ_CTR64_CPU(&channels
->c
[i
]->sq
[tc
].stats
,
832 const struct mlx5e_stats_grp mlx5e_stats_grps
[] = {
834 .get_num_stats
= mlx5e_grp_sw_get_num_stats
,
835 .fill_strings
= mlx5e_grp_sw_fill_strings
,
836 .fill_stats
= mlx5e_grp_sw_fill_stats
,
839 .get_num_stats
= mlx5e_grp_q_get_num_stats
,
840 .fill_strings
= mlx5e_grp_q_fill_strings
,
841 .fill_stats
= mlx5e_grp_q_fill_stats
,
844 .get_num_stats
= mlx5e_grp_vport_get_num_stats
,
845 .fill_strings
= mlx5e_grp_vport_fill_strings
,
846 .fill_stats
= mlx5e_grp_vport_fill_stats
,
849 .get_num_stats
= mlx5e_grp_802_3_get_num_stats
,
850 .fill_strings
= mlx5e_grp_802_3_fill_strings
,
851 .fill_stats
= mlx5e_grp_802_3_fill_stats
,
854 .get_num_stats
= mlx5e_grp_2863_get_num_stats
,
855 .fill_strings
= mlx5e_grp_2863_fill_strings
,
856 .fill_stats
= mlx5e_grp_2863_fill_stats
,
859 .get_num_stats
= mlx5e_grp_2819_get_num_stats
,
860 .fill_strings
= mlx5e_grp_2819_fill_strings
,
861 .fill_stats
= mlx5e_grp_2819_fill_stats
,
864 .get_num_stats
= mlx5e_grp_phy_get_num_stats
,
865 .fill_strings
= mlx5e_grp_phy_fill_strings
,
866 .fill_stats
= mlx5e_grp_phy_fill_stats
,
869 .get_num_stats
= mlx5e_grp_eth_ext_get_num_stats
,
870 .fill_strings
= mlx5e_grp_eth_ext_fill_strings
,
871 .fill_stats
= mlx5e_grp_eth_ext_fill_stats
,
874 .get_num_stats
= mlx5e_grp_pcie_get_num_stats
,
875 .fill_strings
= mlx5e_grp_pcie_fill_strings
,
876 .fill_stats
= mlx5e_grp_pcie_fill_stats
,
879 .get_num_stats
= mlx5e_grp_per_prio_traffic_get_num_stats
,
880 .fill_strings
= mlx5e_grp_per_prio_traffic_fill_strings
,
881 .fill_stats
= mlx5e_grp_per_prio_traffic_fill_stats
,
884 .get_num_stats
= mlx5e_grp_per_prio_pfc_get_num_stats
,
885 .fill_strings
= mlx5e_grp_per_prio_pfc_fill_strings
,
886 .fill_stats
= mlx5e_grp_per_prio_pfc_fill_stats
,
889 .get_num_stats
= mlx5e_grp_pme_get_num_stats
,
890 .fill_strings
= mlx5e_grp_pme_fill_strings
,
891 .fill_stats
= mlx5e_grp_pme_fill_stats
,
894 .get_num_stats
= mlx5e_grp_ipsec_get_num_stats
,
895 .fill_strings
= mlx5e_grp_ipsec_fill_strings
,
896 .fill_stats
= mlx5e_grp_ipsec_fill_stats
,
899 .get_num_stats
= mlx5e_grp_channels_get_num_stats
,
900 .fill_strings
= mlx5e_grp_channels_fill_strings
,
901 .fill_stats
= mlx5e_grp_channels_fill_stats
,
905 const int mlx5e_num_stats_grps
= ARRAY_SIZE(mlx5e_stats_grps
);