2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/types.h>
40 #include <linux/netdevice.h>
41 #include <linux/etherdevice.h>
42 #include <linux/ethtool.h>
43 #include <linux/slab.h>
44 #include <linux/device.h>
45 #include <linux/skbuff.h>
46 #include <linux/if_vlan.h>
47 #include <linux/if_bridge.h>
48 #include <linux/workqueue.h>
49 #include <linux/jiffies.h>
50 #include <linux/bitops.h>
51 #include <linux/list.h>
52 #include <linux/notifier.h>
53 #include <linux/dcbnl.h>
54 #include <net/switchdev.h>
55 #include <generated/utsrelease.h>
64 static const char mlxsw_sp_driver_name
[] = "mlxsw_spectrum";
65 static const char mlxsw_sp_driver_version
[] = "1.0";
71 MLXSW_ITEM32(tx
, hdr
, version
, 0x00, 28, 4);
74 * Packet control type.
75 * 0 - Ethernet control (e.g. EMADs, LACP)
78 MLXSW_ITEM32(tx
, hdr
, ctl
, 0x00, 26, 2);
81 * Packet protocol type. Must be set to 1 (Ethernet).
83 MLXSW_ITEM32(tx
, hdr
, proto
, 0x00, 21, 3);
85 /* tx_hdr_rx_is_router
86 * Packet is sent from the router. Valid for data packets only.
88 MLXSW_ITEM32(tx
, hdr
, rx_is_router
, 0x00, 19, 1);
91 * Indicates if the 'fid' field is valid and should be used for
92 * forwarding lookup. Valid for data packets only.
94 MLXSW_ITEM32(tx
, hdr
, fid_valid
, 0x00, 16, 1);
97 * Switch partition ID. Must be set to 0.
99 MLXSW_ITEM32(tx
, hdr
, swid
, 0x00, 12, 3);
101 /* tx_hdr_control_tclass
102 * Indicates if the packet should use the control TClass and not one
103 * of the data TClasses.
105 MLXSW_ITEM32(tx
, hdr
, control_tclass
, 0x00, 6, 1);
108 * Egress TClass to be used on the egress device on the egress port.
110 MLXSW_ITEM32(tx
, hdr
, etclass
, 0x00, 0, 4);
113 * Destination local port for unicast packets.
114 * Destination multicast ID for multicast packets.
116 * Control packets are directed to a specific egress port, while data
117 * packets are transmitted through the CPU port (0) into the switch partition,
118 * where forwarding rules are applied.
120 MLXSW_ITEM32(tx
, hdr
, port_mid
, 0x04, 16, 16);
123 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
124 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
125 * Valid for data packets only.
127 MLXSW_ITEM32(tx
, hdr
, fid
, 0x08, 0, 16);
131 * 6 - Control packets
133 MLXSW_ITEM32(tx
, hdr
, type
, 0x0C, 0, 4);
135 static void mlxsw_sp_txhdr_construct(struct sk_buff
*skb
,
136 const struct mlxsw_tx_info
*tx_info
)
138 char *txhdr
= skb_push(skb
, MLXSW_TXHDR_LEN
);
140 memset(txhdr
, 0, MLXSW_TXHDR_LEN
);
142 mlxsw_tx_hdr_version_set(txhdr
, MLXSW_TXHDR_VERSION_1
);
143 mlxsw_tx_hdr_ctl_set(txhdr
, MLXSW_TXHDR_ETH_CTL
);
144 mlxsw_tx_hdr_proto_set(txhdr
, MLXSW_TXHDR_PROTO_ETH
);
145 mlxsw_tx_hdr_swid_set(txhdr
, 0);
146 mlxsw_tx_hdr_control_tclass_set(txhdr
, 1);
147 mlxsw_tx_hdr_port_mid_set(txhdr
, tx_info
->local_port
);
148 mlxsw_tx_hdr_type_set(txhdr
, MLXSW_TXHDR_TYPE_CONTROL
);
151 static int mlxsw_sp_base_mac_get(struct mlxsw_sp
*mlxsw_sp
)
153 char spad_pl
[MLXSW_REG_SPAD_LEN
];
156 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(spad
), spad_pl
);
159 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl
, mlxsw_sp
->base_mac
);
163 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
166 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
167 char paos_pl
[MLXSW_REG_PAOS_LEN
];
169 mlxsw_reg_paos_pack(paos_pl
, mlxsw_sp_port
->local_port
,
170 is_up
? MLXSW_PORT_ADMIN_STATUS_UP
:
171 MLXSW_PORT_ADMIN_STATUS_DOWN
);
172 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(paos
), paos_pl
);
175 static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port
*mlxsw_sp_port
,
178 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
179 char paos_pl
[MLXSW_REG_PAOS_LEN
];
183 mlxsw_reg_paos_pack(paos_pl
, mlxsw_sp_port
->local_port
, 0);
184 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(paos
), paos_pl
);
187 oper_status
= mlxsw_reg_paos_oper_status_get(paos_pl
);
188 *p_is_up
= oper_status
== MLXSW_PORT_ADMIN_STATUS_UP
? true : false;
192 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
195 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
196 char ppad_pl
[MLXSW_REG_PPAD_LEN
];
198 mlxsw_reg_ppad_pack(ppad_pl
, true, mlxsw_sp_port
->local_port
);
199 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl
, addr
);
200 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(ppad
), ppad_pl
);
203 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port
*mlxsw_sp_port
)
205 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
206 unsigned char *addr
= mlxsw_sp_port
->dev
->dev_addr
;
208 ether_addr_copy(addr
, mlxsw_sp
->base_mac
);
209 addr
[ETH_ALEN
- 1] += mlxsw_sp_port
->local_port
;
210 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port
, addr
);
213 static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
214 u16 vid
, enum mlxsw_reg_spms_state state
)
216 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
220 spms_pl
= kmalloc(MLXSW_REG_SPMS_LEN
, GFP_KERNEL
);
223 mlxsw_reg_spms_pack(spms_pl
, mlxsw_sp_port
->local_port
);
224 mlxsw_reg_spms_vid_pack(spms_pl
, vid
, state
);
225 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(spms
), spms_pl
);
230 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port
*mlxsw_sp_port
, u16 mtu
)
232 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
233 char pmtu_pl
[MLXSW_REG_PMTU_LEN
];
237 mtu
+= MLXSW_TXHDR_LEN
+ ETH_HLEN
;
238 mlxsw_reg_pmtu_pack(pmtu_pl
, mlxsw_sp_port
->local_port
, 0);
239 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(pmtu
), pmtu_pl
);
242 max_mtu
= mlxsw_reg_pmtu_max_mtu_get(pmtu_pl
);
247 mlxsw_reg_pmtu_pack(pmtu_pl
, mlxsw_sp_port
->local_port
, mtu
);
248 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(pmtu
), pmtu_pl
);
251 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp
*mlxsw_sp
, u8 local_port
,
254 char pspa_pl
[MLXSW_REG_PSPA_LEN
];
256 mlxsw_reg_pspa_pack(pspa_pl
, swid
, local_port
);
257 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(pspa
), pspa_pl
);
260 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port
*mlxsw_sp_port
, u8 swid
)
262 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
264 return __mlxsw_sp_port_swid_set(mlxsw_sp
, mlxsw_sp_port
->local_port
,
268 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
271 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
272 char svpe_pl
[MLXSW_REG_SVPE_LEN
];
274 mlxsw_reg_svpe_pack(svpe_pl
, mlxsw_sp_port
->local_port
, enable
);
275 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(svpe
), svpe_pl
);
278 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
279 enum mlxsw_reg_svfa_mt mt
, bool valid
, u16 fid
,
282 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
283 char svfa_pl
[MLXSW_REG_SVFA_LEN
];
285 mlxsw_reg_svfa_pack(svfa_pl
, mlxsw_sp_port
->local_port
, mt
, valid
,
287 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(svfa
), svfa_pl
);
290 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
291 u16 vid
, bool learn_enable
)
293 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
297 spvmlr_pl
= kmalloc(MLXSW_REG_SPVMLR_LEN
, GFP_KERNEL
);
300 mlxsw_reg_spvmlr_pack(spvmlr_pl
, mlxsw_sp_port
->local_port
, vid
, vid
,
302 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(spvmlr
), spvmlr_pl
);
308 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port
*mlxsw_sp_port
)
310 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
311 char sspr_pl
[MLXSW_REG_SSPR_LEN
];
313 mlxsw_reg_sspr_pack(sspr_pl
, mlxsw_sp_port
->local_port
);
314 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sspr
), sspr_pl
);
317 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp
*mlxsw_sp
,
318 u8 local_port
, u8
*p_module
,
319 u8
*p_width
, u8
*p_lane
)
321 char pmlp_pl
[MLXSW_REG_PMLP_LEN
];
324 mlxsw_reg_pmlp_pack(pmlp_pl
, local_port
);
325 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(pmlp
), pmlp_pl
);
328 *p_module
= mlxsw_reg_pmlp_module_get(pmlp_pl
, 0);
329 *p_width
= mlxsw_reg_pmlp_width_get(pmlp_pl
);
330 *p_lane
= mlxsw_reg_pmlp_tx_lane_get(pmlp_pl
, 0);
334 static int mlxsw_sp_port_module_map(struct mlxsw_sp
*mlxsw_sp
, u8 local_port
,
335 u8 module
, u8 width
, u8 lane
)
337 char pmlp_pl
[MLXSW_REG_PMLP_LEN
];
340 mlxsw_reg_pmlp_pack(pmlp_pl
, local_port
);
341 mlxsw_reg_pmlp_width_set(pmlp_pl
, width
);
342 for (i
= 0; i
< width
; i
++) {
343 mlxsw_reg_pmlp_module_set(pmlp_pl
, i
, module
);
344 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl
, i
, lane
+ i
); /* Rx & Tx */
347 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(pmlp
), pmlp_pl
);
350 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp
*mlxsw_sp
, u8 local_port
)
352 char pmlp_pl
[MLXSW_REG_PMLP_LEN
];
354 mlxsw_reg_pmlp_pack(pmlp_pl
, local_port
);
355 mlxsw_reg_pmlp_width_set(pmlp_pl
, 0);
356 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(pmlp
), pmlp_pl
);
359 static int mlxsw_sp_port_open(struct net_device
*dev
)
361 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
364 err
= mlxsw_sp_port_admin_status_set(mlxsw_sp_port
, true);
367 netif_start_queue(dev
);
371 static int mlxsw_sp_port_stop(struct net_device
*dev
)
373 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
375 netif_stop_queue(dev
);
376 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port
, false);
379 static netdev_tx_t
mlxsw_sp_port_xmit(struct sk_buff
*skb
,
380 struct net_device
*dev
)
382 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
383 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
384 struct mlxsw_sp_port_pcpu_stats
*pcpu_stats
;
385 const struct mlxsw_tx_info tx_info
= {
386 .local_port
= mlxsw_sp_port
->local_port
,
392 if (mlxsw_core_skb_transmit_busy(mlxsw_sp
->core
, &tx_info
))
393 return NETDEV_TX_BUSY
;
395 if (unlikely(skb_headroom(skb
) < MLXSW_TXHDR_LEN
)) {
396 struct sk_buff
*skb_orig
= skb
;
398 skb
= skb_realloc_headroom(skb
, MLXSW_TXHDR_LEN
);
400 this_cpu_inc(mlxsw_sp_port
->pcpu_stats
->tx_dropped
);
401 dev_kfree_skb_any(skb_orig
);
406 if (eth_skb_pad(skb
)) {
407 this_cpu_inc(mlxsw_sp_port
->pcpu_stats
->tx_dropped
);
411 mlxsw_sp_txhdr_construct(skb
, &tx_info
);
412 /* TX header is consumed by HW on the way so we shouldn't count its
413 * bytes as being sent.
415 len
= skb
->len
- MLXSW_TXHDR_LEN
;
417 /* Due to a race we might fail here because of a full queue. In that
418 * unlikely case we simply drop the packet.
420 err
= mlxsw_core_skb_transmit(mlxsw_sp
->core
, skb
, &tx_info
);
423 pcpu_stats
= this_cpu_ptr(mlxsw_sp_port
->pcpu_stats
);
424 u64_stats_update_begin(&pcpu_stats
->syncp
);
425 pcpu_stats
->tx_packets
++;
426 pcpu_stats
->tx_bytes
+= len
;
427 u64_stats_update_end(&pcpu_stats
->syncp
);
429 this_cpu_inc(mlxsw_sp_port
->pcpu_stats
->tx_dropped
);
430 dev_kfree_skb_any(skb
);
435 static void mlxsw_sp_set_rx_mode(struct net_device
*dev
)
439 static int mlxsw_sp_port_set_mac_address(struct net_device
*dev
, void *p
)
441 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
442 struct sockaddr
*addr
= p
;
445 if (!is_valid_ether_addr(addr
->sa_data
))
446 return -EADDRNOTAVAIL
;
448 err
= mlxsw_sp_port_dev_addr_set(mlxsw_sp_port
, addr
->sa_data
);
451 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
455 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl
, int pg_index
, int mtu
,
456 bool pause_en
, bool pfc_en
, u16 delay
)
458 u16 pg_size
= 2 * MLXSW_SP_BYTES_TO_CELLS(mtu
);
460 delay
= pfc_en
? mlxsw_sp_pfc_delay_get(mtu
, delay
) :
461 MLXSW_SP_PAUSE_DELAY
;
463 if (pause_en
|| pfc_en
)
464 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl
, pg_index
,
465 pg_size
+ delay
, pg_size
);
467 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl
, pg_index
, pg_size
);
470 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port
*mlxsw_sp_port
, int mtu
,
471 u8
*prio_tc
, bool pause_en
,
472 struct ieee_pfc
*my_pfc
)
474 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
475 u8 pfc_en
= !!my_pfc
? my_pfc
->pfc_en
: 0;
476 u16 delay
= !!my_pfc
? my_pfc
->delay
: 0;
477 char pbmc_pl
[MLXSW_REG_PBMC_LEN
];
480 mlxsw_reg_pbmc_pack(pbmc_pl
, mlxsw_sp_port
->local_port
, 0, 0);
481 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(pbmc
), pbmc_pl
);
485 for (i
= 0; i
< IEEE_8021QAZ_MAX_TCS
; i
++) {
486 bool configure
= false;
489 for (j
= 0; j
< IEEE_8021QAZ_MAX_TCS
; j
++) {
490 if (prio_tc
[j
] == i
) {
491 pfc
= pfc_en
& BIT(j
);
499 mlxsw_sp_pg_buf_pack(pbmc_pl
, i
, mtu
, pause_en
, pfc
, delay
);
502 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(pbmc
), pbmc_pl
);
505 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
506 int mtu
, bool pause_en
)
508 u8 def_prio_tc
[IEEE_8021QAZ_MAX_TCS
] = {0};
509 bool dcb_en
= !!mlxsw_sp_port
->dcb
.ets
;
510 struct ieee_pfc
*my_pfc
;
513 prio_tc
= dcb_en
? mlxsw_sp_port
->dcb
.ets
->prio_tc
: def_prio_tc
;
514 my_pfc
= dcb_en
? mlxsw_sp_port
->dcb
.pfc
: NULL
;
516 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port
, mtu
, prio_tc
,
520 static int mlxsw_sp_port_change_mtu(struct net_device
*dev
, int mtu
)
522 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
523 bool pause_en
= mlxsw_sp_port_is_pause_en(mlxsw_sp_port
);
526 err
= mlxsw_sp_port_headroom_set(mlxsw_sp_port
, mtu
, pause_en
);
529 err
= mlxsw_sp_port_mtu_set(mlxsw_sp_port
, mtu
);
531 goto err_port_mtu_set
;
536 mlxsw_sp_port_headroom_set(mlxsw_sp_port
, dev
->mtu
, pause_en
);
540 static struct rtnl_link_stats64
*
541 mlxsw_sp_port_get_stats64(struct net_device
*dev
,
542 struct rtnl_link_stats64
*stats
)
544 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
545 struct mlxsw_sp_port_pcpu_stats
*p
;
546 u64 rx_packets
, rx_bytes
, tx_packets
, tx_bytes
;
551 for_each_possible_cpu(i
) {
552 p
= per_cpu_ptr(mlxsw_sp_port
->pcpu_stats
, i
);
554 start
= u64_stats_fetch_begin_irq(&p
->syncp
);
555 rx_packets
= p
->rx_packets
;
556 rx_bytes
= p
->rx_bytes
;
557 tx_packets
= p
->tx_packets
;
558 tx_bytes
= p
->tx_bytes
;
559 } while (u64_stats_fetch_retry_irq(&p
->syncp
, start
));
561 stats
->rx_packets
+= rx_packets
;
562 stats
->rx_bytes
+= rx_bytes
;
563 stats
->tx_packets
+= tx_packets
;
564 stats
->tx_bytes
+= tx_bytes
;
565 /* tx_dropped is u32, updated without syncp protection. */
566 tx_dropped
+= p
->tx_dropped
;
568 stats
->tx_dropped
= tx_dropped
;
572 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port
*mlxsw_sp_port
, u16 vid_begin
,
573 u16 vid_end
, bool is_member
, bool untagged
)
575 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
579 spvm_pl
= kmalloc(MLXSW_REG_SPVM_LEN
, GFP_KERNEL
);
583 mlxsw_reg_spvm_pack(spvm_pl
, mlxsw_sp_port
->local_port
, vid_begin
,
584 vid_end
, is_member
, untagged
);
585 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(spvm
), spvm_pl
);
590 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port
*mlxsw_sp_port
)
592 enum mlxsw_reg_svfa_mt mt
= MLXSW_REG_SVFA_MT_PORT_VID_TO_FID
;
593 u16 vid
, last_visited_vid
;
596 for_each_set_bit(vid
, mlxsw_sp_port
->active_vlans
, VLAN_N_VID
) {
597 err
= mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port
, mt
, true, vid
,
600 last_visited_vid
= vid
;
601 goto err_port_vid_to_fid_set
;
605 err
= mlxsw_sp_port_vp_mode_set(mlxsw_sp_port
, true);
607 last_visited_vid
= VLAN_N_VID
;
608 goto err_port_vid_to_fid_set
;
613 err_port_vid_to_fid_set
:
614 for_each_set_bit(vid
, mlxsw_sp_port
->active_vlans
, last_visited_vid
)
615 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port
, mt
, false, vid
,
620 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port
*mlxsw_sp_port
)
622 enum mlxsw_reg_svfa_mt mt
= MLXSW_REG_SVFA_MT_PORT_VID_TO_FID
;
626 err
= mlxsw_sp_port_vp_mode_set(mlxsw_sp_port
, false);
630 for_each_set_bit(vid
, mlxsw_sp_port
->active_vlans
, VLAN_N_VID
) {
631 err
= mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port
, mt
, false,
640 static struct mlxsw_sp_fid
*
641 mlxsw_sp_vfid_find(const struct mlxsw_sp
*mlxsw_sp
, u16 vid
)
643 struct mlxsw_sp_fid
*f
;
645 list_for_each_entry(f
, &mlxsw_sp
->port_vfids
.list
, list
) {
653 static u16
mlxsw_sp_avail_vfid_get(const struct mlxsw_sp
*mlxsw_sp
)
655 return find_first_zero_bit(mlxsw_sp
->port_vfids
.mapped
,
656 MLXSW_SP_VFID_PORT_MAX
);
659 static int mlxsw_sp_vfid_op(struct mlxsw_sp
*mlxsw_sp
, u16 fid
, bool create
)
661 char sfmr_pl
[MLXSW_REG_SFMR_LEN
];
663 mlxsw_reg_sfmr_pack(sfmr_pl
, !create
, fid
, 0);
664 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sfmr
), sfmr_pl
);
667 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port
*mlxsw_sp_vport
);
669 static struct mlxsw_sp_fid
*mlxsw_sp_vfid_create(struct mlxsw_sp
*mlxsw_sp
,
672 struct device
*dev
= mlxsw_sp
->bus_info
->dev
;
673 struct mlxsw_sp_fid
*f
;
677 vfid
= mlxsw_sp_avail_vfid_get(mlxsw_sp
);
678 if (vfid
== MLXSW_SP_VFID_PORT_MAX
) {
679 dev_err(dev
, "No available vFIDs\n");
680 return ERR_PTR(-ERANGE
);
683 fid
= mlxsw_sp_vfid_to_fid(vfid
);
684 err
= mlxsw_sp_vfid_op(mlxsw_sp
, fid
, true);
686 dev_err(dev
, "Failed to create FID=%d\n", fid
);
690 f
= kzalloc(sizeof(*f
), GFP_KERNEL
);
692 goto err_allocate_vfid
;
694 f
->leave
= mlxsw_sp_vport_vfid_leave
;
698 list_add(&f
->list
, &mlxsw_sp
->port_vfids
.list
);
699 set_bit(vfid
, mlxsw_sp
->port_vfids
.mapped
);
704 mlxsw_sp_vfid_op(mlxsw_sp
, fid
, false);
705 return ERR_PTR(-ENOMEM
);
708 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp
*mlxsw_sp
,
709 struct mlxsw_sp_fid
*f
)
711 u16 vfid
= mlxsw_sp_fid_to_vfid(f
->fid
);
713 clear_bit(vfid
, mlxsw_sp
->port_vfids
.mapped
);
716 mlxsw_sp_vfid_op(mlxsw_sp
, f
->fid
, false);
721 static struct mlxsw_sp_port
*
722 mlxsw_sp_port_vport_create(struct mlxsw_sp_port
*mlxsw_sp_port
, u16 vid
)
724 struct mlxsw_sp_port
*mlxsw_sp_vport
;
726 mlxsw_sp_vport
= kzalloc(sizeof(*mlxsw_sp_vport
), GFP_KERNEL
);
730 /* dev will be set correctly after the VLAN device is linked
731 * with the real device. In case of bridge SELF invocation, dev
734 mlxsw_sp_vport
->dev
= mlxsw_sp_port
->dev
;
735 mlxsw_sp_vport
->mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
736 mlxsw_sp_vport
->local_port
= mlxsw_sp_port
->local_port
;
737 mlxsw_sp_vport
->stp_state
= BR_STATE_FORWARDING
;
738 mlxsw_sp_vport
->lagged
= mlxsw_sp_port
->lagged
;
739 mlxsw_sp_vport
->lag_id
= mlxsw_sp_port
->lag_id
;
740 mlxsw_sp_vport
->vport
.vid
= vid
;
742 list_add(&mlxsw_sp_vport
->vport
.list
, &mlxsw_sp_port
->vports_list
);
744 return mlxsw_sp_vport
;
747 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port
*mlxsw_sp_vport
)
749 list_del(&mlxsw_sp_vport
->vport
.list
);
750 kfree(mlxsw_sp_vport
);
753 static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port
*mlxsw_sp_vport
, u16 fid
,
756 enum mlxsw_reg_svfa_mt mt
= MLXSW_REG_SVFA_MT_PORT_VID_TO_FID
;
757 u16 vid
= mlxsw_sp_vport_vid_get(mlxsw_sp_vport
);
759 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport
, mt
, valid
, fid
,
763 static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port
*mlxsw_sp_vport
)
765 u16 vid
= mlxsw_sp_vport_vid_get(mlxsw_sp_vport
);
766 struct mlxsw_sp_fid
*f
;
769 f
= mlxsw_sp_vfid_find(mlxsw_sp_vport
->mlxsw_sp
, vid
);
771 f
= mlxsw_sp_vfid_create(mlxsw_sp_vport
->mlxsw_sp
, vid
);
777 err
= mlxsw_sp_vport_flood_set(mlxsw_sp_vport
, f
->fid
, true);
779 goto err_vport_flood_set
;
782 err
= mlxsw_sp_vport_fid_map(mlxsw_sp_vport
, f
->fid
, true);
784 goto err_vport_fid_map
;
786 mlxsw_sp_vport_fid_set(mlxsw_sp_vport
, f
);
793 mlxsw_sp_vport_flood_set(mlxsw_sp_vport
, f
->fid
, false);
796 mlxsw_sp_vfid_destroy(mlxsw_sp_vport
->mlxsw_sp
, f
);
800 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port
*mlxsw_sp_vport
)
802 struct mlxsw_sp_fid
*f
= mlxsw_sp_vport_fid_get(mlxsw_sp_vport
);
804 mlxsw_sp_vport_fid_set(mlxsw_sp_vport
, NULL
);
806 mlxsw_sp_vport_fid_map(mlxsw_sp_vport
, f
->fid
, false);
808 if (--f
->ref_count
== 0) {
809 mlxsw_sp_vport_flood_set(mlxsw_sp_vport
, f
->fid
, false);
810 mlxsw_sp_vfid_destroy(mlxsw_sp_vport
->mlxsw_sp
, f
);
814 int mlxsw_sp_port_add_vid(struct net_device
*dev
, __be16 __always_unused proto
,
817 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
818 struct mlxsw_sp_port
*mlxsw_sp_vport
;
819 bool untagged
= vid
== 1;
822 /* VLAN 0 is added to HW filter when device goes up, but it is
823 * reserved in our case, so simply return.
828 if (mlxsw_sp_port_vport_find(mlxsw_sp_port
, vid
)) {
829 netdev_warn(dev
, "VID=%d already configured\n", vid
);
833 mlxsw_sp_vport
= mlxsw_sp_port_vport_create(mlxsw_sp_port
, vid
);
834 if (!mlxsw_sp_vport
) {
835 netdev_err(dev
, "Failed to create vPort for VID=%d\n", vid
);
839 /* When adding the first VLAN interface on a bridged port we need to
840 * transition all the active 802.1Q bridge VLANs to use explicit
841 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
843 if (list_is_singular(&mlxsw_sp_port
->vports_list
)) {
844 err
= mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port
);
846 netdev_err(dev
, "Failed to set to Virtual mode\n");
847 goto err_port_vp_mode_trans
;
851 err
= mlxsw_sp_vport_vfid_join(mlxsw_sp_vport
);
853 netdev_err(dev
, "Failed to join vFID\n");
854 goto err_vport_vfid_join
;
857 err
= mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport
, vid
, false);
859 netdev_err(dev
, "Failed to disable learning for VID=%d\n", vid
);
860 goto err_port_vid_learning_set
;
863 err
= mlxsw_sp_port_vlan_set(mlxsw_sp_vport
, vid
, vid
, true, untagged
);
865 netdev_err(dev
, "Failed to set VLAN membership for VID=%d\n",
867 goto err_port_add_vid
;
870 err
= mlxsw_sp_port_stp_state_set(mlxsw_sp_vport
, vid
,
871 MLXSW_REG_SPMS_STATE_FORWARDING
);
873 netdev_err(dev
, "Failed to set STP state for VID=%d\n", vid
);
874 goto err_port_stp_state_set
;
879 err_port_stp_state_set
:
880 mlxsw_sp_port_vlan_set(mlxsw_sp_vport
, vid
, vid
, false, false);
882 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport
, vid
, true);
883 err_port_vid_learning_set
:
884 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport
);
886 if (list_is_singular(&mlxsw_sp_port
->vports_list
))
887 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port
);
888 err_port_vp_mode_trans
:
889 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport
);
893 static int mlxsw_sp_port_kill_vid(struct net_device
*dev
,
894 __be16 __always_unused proto
, u16 vid
)
896 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
897 struct mlxsw_sp_port
*mlxsw_sp_vport
;
898 struct mlxsw_sp_fid
*f
;
901 /* VLAN 0 is removed from HW filter when device goes down, but
902 * it is reserved in our case, so simply return.
907 mlxsw_sp_vport
= mlxsw_sp_port_vport_find(mlxsw_sp_port
, vid
);
908 if (!mlxsw_sp_vport
) {
909 netdev_warn(dev
, "VID=%d does not exist\n", vid
);
913 err
= mlxsw_sp_port_stp_state_set(mlxsw_sp_vport
, vid
,
914 MLXSW_REG_SPMS_STATE_DISCARDING
);
916 netdev_err(dev
, "Failed to set STP state for VID=%d\n", vid
);
920 err
= mlxsw_sp_port_vlan_set(mlxsw_sp_vport
, vid
, vid
, false, false);
922 netdev_err(dev
, "Failed to set VLAN membership for VID=%d\n",
927 err
= mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport
, vid
, true);
929 netdev_err(dev
, "Failed to enable learning for VID=%d\n", vid
);
933 /* Drop FID reference. If this was the last reference the
934 * resources will be freed.
936 f
= mlxsw_sp_vport_fid_get(mlxsw_sp_vport
);
937 if (f
&& !WARN_ON(!f
->leave
))
938 f
->leave(mlxsw_sp_vport
);
940 /* When removing the last VLAN interface on a bridged port we need to
941 * transition all active 802.1Q bridge VLANs to use VID to FID
942 * mappings and set port's mode to VLAN mode.
944 if (list_is_singular(&mlxsw_sp_port
->vports_list
)) {
945 err
= mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port
);
947 netdev_err(dev
, "Failed to set to VLAN mode\n");
952 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport
);
957 static int mlxsw_sp_port_get_phys_port_name(struct net_device
*dev
, char *name
,
960 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
961 u8 module
= mlxsw_sp_port
->mapping
.module
;
962 u8 width
= mlxsw_sp_port
->mapping
.width
;
963 u8 lane
= mlxsw_sp_port
->mapping
.lane
;
966 if (!mlxsw_sp_port
->split
)
967 err
= snprintf(name
, len
, "p%d", module
+ 1);
969 err
= snprintf(name
, len
, "p%ds%d", module
+ 1,
978 static const struct net_device_ops mlxsw_sp_port_netdev_ops
= {
979 .ndo_open
= mlxsw_sp_port_open
,
980 .ndo_stop
= mlxsw_sp_port_stop
,
981 .ndo_start_xmit
= mlxsw_sp_port_xmit
,
982 .ndo_set_rx_mode
= mlxsw_sp_set_rx_mode
,
983 .ndo_set_mac_address
= mlxsw_sp_port_set_mac_address
,
984 .ndo_change_mtu
= mlxsw_sp_port_change_mtu
,
985 .ndo_get_stats64
= mlxsw_sp_port_get_stats64
,
986 .ndo_vlan_rx_add_vid
= mlxsw_sp_port_add_vid
,
987 .ndo_vlan_rx_kill_vid
= mlxsw_sp_port_kill_vid
,
988 .ndo_fdb_add
= switchdev_port_fdb_add
,
989 .ndo_fdb_del
= switchdev_port_fdb_del
,
990 .ndo_fdb_dump
= switchdev_port_fdb_dump
,
991 .ndo_bridge_setlink
= switchdev_port_bridge_setlink
,
992 .ndo_bridge_getlink
= switchdev_port_bridge_getlink
,
993 .ndo_bridge_dellink
= switchdev_port_bridge_dellink
,
994 .ndo_get_phys_port_name
= mlxsw_sp_port_get_phys_port_name
,
997 static void mlxsw_sp_port_get_drvinfo(struct net_device
*dev
,
998 struct ethtool_drvinfo
*drvinfo
)
1000 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
1001 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1003 strlcpy(drvinfo
->driver
, mlxsw_sp_driver_name
, sizeof(drvinfo
->driver
));
1004 strlcpy(drvinfo
->version
, mlxsw_sp_driver_version
,
1005 sizeof(drvinfo
->version
));
1006 snprintf(drvinfo
->fw_version
, sizeof(drvinfo
->fw_version
),
1008 mlxsw_sp
->bus_info
->fw_rev
.major
,
1009 mlxsw_sp
->bus_info
->fw_rev
.minor
,
1010 mlxsw_sp
->bus_info
->fw_rev
.subminor
);
1011 strlcpy(drvinfo
->bus_info
, mlxsw_sp
->bus_info
->device_name
,
1012 sizeof(drvinfo
->bus_info
));
1015 static void mlxsw_sp_port_get_pauseparam(struct net_device
*dev
,
1016 struct ethtool_pauseparam
*pause
)
1018 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
1020 pause
->rx_pause
= mlxsw_sp_port
->link
.rx_pause
;
1021 pause
->tx_pause
= mlxsw_sp_port
->link
.tx_pause
;
1024 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
1025 struct ethtool_pauseparam
*pause
)
1027 char pfcc_pl
[MLXSW_REG_PFCC_LEN
];
1029 mlxsw_reg_pfcc_pack(pfcc_pl
, mlxsw_sp_port
->local_port
);
1030 mlxsw_reg_pfcc_pprx_set(pfcc_pl
, pause
->rx_pause
);
1031 mlxsw_reg_pfcc_pptx_set(pfcc_pl
, pause
->tx_pause
);
1033 return mlxsw_reg_write(mlxsw_sp_port
->mlxsw_sp
->core
, MLXSW_REG(pfcc
),
1037 static int mlxsw_sp_port_set_pauseparam(struct net_device
*dev
,
1038 struct ethtool_pauseparam
*pause
)
1040 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
1041 bool pause_en
= pause
->tx_pause
|| pause
->rx_pause
;
1044 if (mlxsw_sp_port
->dcb
.pfc
&& mlxsw_sp_port
->dcb
.pfc
->pfc_en
) {
1045 netdev_err(dev
, "PFC already enabled on port\n");
1049 if (pause
->autoneg
) {
1050 netdev_err(dev
, "PAUSE frames autonegotiation isn't supported\n");
1054 err
= mlxsw_sp_port_headroom_set(mlxsw_sp_port
, dev
->mtu
, pause_en
);
1056 netdev_err(dev
, "Failed to configure port's headroom\n");
1060 err
= mlxsw_sp_port_pause_set(mlxsw_sp_port
, pause
);
1062 netdev_err(dev
, "Failed to set PAUSE parameters\n");
1063 goto err_port_pause_configure
;
1066 mlxsw_sp_port
->link
.rx_pause
= pause
->rx_pause
;
1067 mlxsw_sp_port
->link
.tx_pause
= pause
->tx_pause
;
1071 err_port_pause_configure
:
1072 pause_en
= mlxsw_sp_port_is_pause_en(mlxsw_sp_port
);
1073 mlxsw_sp_port_headroom_set(mlxsw_sp_port
, dev
->mtu
, pause_en
);
1077 struct mlxsw_sp_port_hw_stats
{
1078 char str
[ETH_GSTRING_LEN
];
1079 u64 (*getter
)(char *payload
);
1082 static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats
[] = {
1084 .str
= "a_frames_transmitted_ok",
1085 .getter
= mlxsw_reg_ppcnt_a_frames_transmitted_ok_get
,
1088 .str
= "a_frames_received_ok",
1089 .getter
= mlxsw_reg_ppcnt_a_frames_received_ok_get
,
1092 .str
= "a_frame_check_sequence_errors",
1093 .getter
= mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get
,
1096 .str
= "a_alignment_errors",
1097 .getter
= mlxsw_reg_ppcnt_a_alignment_errors_get
,
1100 .str
= "a_octets_transmitted_ok",
1101 .getter
= mlxsw_reg_ppcnt_a_octets_transmitted_ok_get
,
1104 .str
= "a_octets_received_ok",
1105 .getter
= mlxsw_reg_ppcnt_a_octets_received_ok_get
,
1108 .str
= "a_multicast_frames_xmitted_ok",
1109 .getter
= mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get
,
1112 .str
= "a_broadcast_frames_xmitted_ok",
1113 .getter
= mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get
,
1116 .str
= "a_multicast_frames_received_ok",
1117 .getter
= mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get
,
1120 .str
= "a_broadcast_frames_received_ok",
1121 .getter
= mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get
,
1124 .str
= "a_in_range_length_errors",
1125 .getter
= mlxsw_reg_ppcnt_a_in_range_length_errors_get
,
1128 .str
= "a_out_of_range_length_field",
1129 .getter
= mlxsw_reg_ppcnt_a_out_of_range_length_field_get
,
1132 .str
= "a_frame_too_long_errors",
1133 .getter
= mlxsw_reg_ppcnt_a_frame_too_long_errors_get
,
1136 .str
= "a_symbol_error_during_carrier",
1137 .getter
= mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get
,
1140 .str
= "a_mac_control_frames_transmitted",
1141 .getter
= mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get
,
1144 .str
= "a_mac_control_frames_received",
1145 .getter
= mlxsw_reg_ppcnt_a_mac_control_frames_received_get
,
1148 .str
= "a_unsupported_opcodes_received",
1149 .getter
= mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get
,
1152 .str
= "a_pause_mac_ctrl_frames_received",
1153 .getter
= mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get
,
1156 .str
= "a_pause_mac_ctrl_frames_xmitted",
1157 .getter
= mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get
,
1161 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1163 static void mlxsw_sp_port_get_strings(struct net_device
*dev
,
1164 u32 stringset
, u8
*data
)
1169 switch (stringset
) {
1171 for (i
= 0; i
< MLXSW_SP_PORT_HW_STATS_LEN
; i
++) {
1172 memcpy(p
, mlxsw_sp_port_hw_stats
[i
].str
,
1174 p
+= ETH_GSTRING_LEN
;
1180 static int mlxsw_sp_port_set_phys_id(struct net_device
*dev
,
1181 enum ethtool_phys_id_state state
)
1183 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
1184 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1185 char mlcr_pl
[MLXSW_REG_MLCR_LEN
];
1189 case ETHTOOL_ID_ACTIVE
:
1192 case ETHTOOL_ID_INACTIVE
:
1199 mlxsw_reg_mlcr_pack(mlcr_pl
, mlxsw_sp_port
->local_port
, active
);
1200 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(mlcr
), mlcr_pl
);
1203 static void mlxsw_sp_port_get_stats(struct net_device
*dev
,
1204 struct ethtool_stats
*stats
, u64
*data
)
1206 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
1207 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1208 char ppcnt_pl
[MLXSW_REG_PPCNT_LEN
];
1212 mlxsw_reg_ppcnt_pack(ppcnt_pl
, mlxsw_sp_port
->local_port
,
1213 MLXSW_REG_PPCNT_IEEE_8023_CNT
, 0);
1214 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(ppcnt
), ppcnt_pl
);
1215 for (i
= 0; i
< MLXSW_SP_PORT_HW_STATS_LEN
; i
++)
1216 data
[i
] = !err
? mlxsw_sp_port_hw_stats
[i
].getter(ppcnt_pl
) : 0;
1219 static int mlxsw_sp_port_get_sset_count(struct net_device
*dev
, int sset
)
1223 return MLXSW_SP_PORT_HW_STATS_LEN
;
1229 struct mlxsw_sp_port_link_mode
{
1236 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode
[] = {
1238 .mask
= MLXSW_REG_PTYS_ETH_SPEED_100BASE_T
,
1239 .supported
= SUPPORTED_100baseT_Full
,
1240 .advertised
= ADVERTISED_100baseT_Full
,
1244 .mask
= MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX
,
1248 .mask
= MLXSW_REG_PTYS_ETH_SPEED_SGMII
|
1249 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX
,
1250 .supported
= SUPPORTED_1000baseKX_Full
,
1251 .advertised
= ADVERTISED_1000baseKX_Full
,
1255 .mask
= MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T
,
1256 .supported
= SUPPORTED_10000baseT_Full
,
1257 .advertised
= ADVERTISED_10000baseT_Full
,
1261 .mask
= MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4
|
1262 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4
,
1263 .supported
= SUPPORTED_10000baseKX4_Full
,
1264 .advertised
= ADVERTISED_10000baseKX4_Full
,
1268 .mask
= MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR
|
1269 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR
|
1270 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR
|
1271 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR
,
1272 .supported
= SUPPORTED_10000baseKR_Full
,
1273 .advertised
= ADVERTISED_10000baseKR_Full
,
1277 .mask
= MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2
,
1278 .supported
= SUPPORTED_20000baseKR2_Full
,
1279 .advertised
= ADVERTISED_20000baseKR2_Full
,
1283 .mask
= MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4
,
1284 .supported
= SUPPORTED_40000baseCR4_Full
,
1285 .advertised
= ADVERTISED_40000baseCR4_Full
,
1289 .mask
= MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4
,
1290 .supported
= SUPPORTED_40000baseKR4_Full
,
1291 .advertised
= ADVERTISED_40000baseKR4_Full
,
1295 .mask
= MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4
,
1296 .supported
= SUPPORTED_40000baseSR4_Full
,
1297 .advertised
= ADVERTISED_40000baseSR4_Full
,
1301 .mask
= MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4
,
1302 .supported
= SUPPORTED_40000baseLR4_Full
,
1303 .advertised
= ADVERTISED_40000baseLR4_Full
,
1307 .mask
= MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR
|
1308 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR
|
1309 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR
,
1313 .mask
= MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4
|
1314 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2
|
1315 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2
,
1319 .mask
= MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4
,
1320 .supported
= SUPPORTED_56000baseKR4_Full
,
1321 .advertised
= ADVERTISED_56000baseKR4_Full
,
1325 .mask
= MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4
|
1326 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4
|
1327 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4
|
1328 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4
,
1333 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1335 static u32
mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto
)
1337 if (ptys_eth_proto
& (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR
|
1338 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR
|
1339 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4
|
1340 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4
|
1341 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4
|
1342 MLXSW_REG_PTYS_ETH_SPEED_SGMII
))
1343 return SUPPORTED_FIBRE
;
1345 if (ptys_eth_proto
& (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR
|
1346 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4
|
1347 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4
|
1348 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4
|
1349 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX
))
1350 return SUPPORTED_Backplane
;
1354 static u32
mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto
)
1359 for (i
= 0; i
< MLXSW_SP_PORT_LINK_MODE_LEN
; i
++) {
1360 if (ptys_eth_proto
& mlxsw_sp_port_link_mode
[i
].mask
)
1361 modes
|= mlxsw_sp_port_link_mode
[i
].supported
;
1366 static u32
mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto
)
1371 for (i
= 0; i
< MLXSW_SP_PORT_LINK_MODE_LEN
; i
++) {
1372 if (ptys_eth_proto
& mlxsw_sp_port_link_mode
[i
].mask
)
1373 modes
|= mlxsw_sp_port_link_mode
[i
].advertised
;
1378 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok
, u32 ptys_eth_proto
,
1379 struct ethtool_cmd
*cmd
)
1381 u32 speed
= SPEED_UNKNOWN
;
1382 u8 duplex
= DUPLEX_UNKNOWN
;
1388 for (i
= 0; i
< MLXSW_SP_PORT_LINK_MODE_LEN
; i
++) {
1389 if (ptys_eth_proto
& mlxsw_sp_port_link_mode
[i
].mask
) {
1390 speed
= mlxsw_sp_port_link_mode
[i
].speed
;
1391 duplex
= DUPLEX_FULL
;
1396 ethtool_cmd_speed_set(cmd
, speed
);
1397 cmd
->duplex
= duplex
;
1400 static u8
mlxsw_sp_port_connector_port(u32 ptys_eth_proto
)
1402 if (ptys_eth_proto
& (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR
|
1403 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4
|
1404 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4
|
1405 MLXSW_REG_PTYS_ETH_SPEED_SGMII
))
1408 if (ptys_eth_proto
& (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR
|
1409 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4
|
1410 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4
))
1413 if (ptys_eth_proto
& (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR
|
1414 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4
|
1415 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4
|
1416 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4
))
1422 static int mlxsw_sp_port_get_settings(struct net_device
*dev
,
1423 struct ethtool_cmd
*cmd
)
1425 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
1426 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1427 char ptys_pl
[MLXSW_REG_PTYS_LEN
];
1429 u32 eth_proto_admin
;
1433 mlxsw_reg_ptys_pack(ptys_pl
, mlxsw_sp_port
->local_port
, 0);
1434 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(ptys
), ptys_pl
);
1436 netdev_err(dev
, "Failed to get proto");
1439 mlxsw_reg_ptys_unpack(ptys_pl
, ð_proto_cap
,
1440 ð_proto_admin
, ð_proto_oper
);
1442 cmd
->supported
= mlxsw_sp_from_ptys_supported_port(eth_proto_cap
) |
1443 mlxsw_sp_from_ptys_supported_link(eth_proto_cap
) |
1444 SUPPORTED_Pause
| SUPPORTED_Asym_Pause
;
1445 cmd
->advertising
= mlxsw_sp_from_ptys_advert_link(eth_proto_admin
);
1446 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev
),
1447 eth_proto_oper
, cmd
);
1449 eth_proto_oper
= eth_proto_oper
? eth_proto_oper
: eth_proto_cap
;
1450 cmd
->port
= mlxsw_sp_port_connector_port(eth_proto_oper
);
1451 cmd
->lp_advertising
= mlxsw_sp_from_ptys_advert_link(eth_proto_oper
);
1453 cmd
->transceiver
= XCVR_INTERNAL
;
1457 static u32
mlxsw_sp_to_ptys_advert_link(u32 advertising
)
1462 for (i
= 0; i
< MLXSW_SP_PORT_LINK_MODE_LEN
; i
++) {
1463 if (advertising
& mlxsw_sp_port_link_mode
[i
].advertised
)
1464 ptys_proto
|= mlxsw_sp_port_link_mode
[i
].mask
;
1469 static u32
mlxsw_sp_to_ptys_speed(u32 speed
)
1474 for (i
= 0; i
< MLXSW_SP_PORT_LINK_MODE_LEN
; i
++) {
1475 if (speed
== mlxsw_sp_port_link_mode
[i
].speed
)
1476 ptys_proto
|= mlxsw_sp_port_link_mode
[i
].mask
;
1481 static u32
mlxsw_sp_to_ptys_upper_speed(u32 upper_speed
)
1486 for (i
= 0; i
< MLXSW_SP_PORT_LINK_MODE_LEN
; i
++) {
1487 if (mlxsw_sp_port_link_mode
[i
].speed
<= upper_speed
)
1488 ptys_proto
|= mlxsw_sp_port_link_mode
[i
].mask
;
1493 static int mlxsw_sp_port_set_settings(struct net_device
*dev
,
1494 struct ethtool_cmd
*cmd
)
1496 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
1497 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1498 char ptys_pl
[MLXSW_REG_PTYS_LEN
];
1502 u32 eth_proto_admin
;
1506 speed
= ethtool_cmd_speed(cmd
);
1508 eth_proto_new
= cmd
->autoneg
== AUTONEG_ENABLE
?
1509 mlxsw_sp_to_ptys_advert_link(cmd
->advertising
) :
1510 mlxsw_sp_to_ptys_speed(speed
);
1512 mlxsw_reg_ptys_pack(ptys_pl
, mlxsw_sp_port
->local_port
, 0);
1513 err
= mlxsw_reg_query(mlxsw_sp
->core
, MLXSW_REG(ptys
), ptys_pl
);
1515 netdev_err(dev
, "Failed to get proto");
1518 mlxsw_reg_ptys_unpack(ptys_pl
, ð_proto_cap
, ð_proto_admin
, NULL
);
1520 eth_proto_new
= eth_proto_new
& eth_proto_cap
;
1521 if (!eth_proto_new
) {
1522 netdev_err(dev
, "Not supported proto admin requested");
1525 if (eth_proto_new
== eth_proto_admin
)
1528 mlxsw_reg_ptys_pack(ptys_pl
, mlxsw_sp_port
->local_port
, eth_proto_new
);
1529 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(ptys
), ptys_pl
);
1531 netdev_err(dev
, "Failed to set proto admin");
1535 err
= mlxsw_sp_port_oper_status_get(mlxsw_sp_port
, &is_up
);
1537 netdev_err(dev
, "Failed to get oper status");
1543 err
= mlxsw_sp_port_admin_status_set(mlxsw_sp_port
, false);
1545 netdev_err(dev
, "Failed to set admin status");
1549 err
= mlxsw_sp_port_admin_status_set(mlxsw_sp_port
, true);
1551 netdev_err(dev
, "Failed to set admin status");
1558 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops
= {
1559 .get_drvinfo
= mlxsw_sp_port_get_drvinfo
,
1560 .get_link
= ethtool_op_get_link
,
1561 .get_pauseparam
= mlxsw_sp_port_get_pauseparam
,
1562 .set_pauseparam
= mlxsw_sp_port_set_pauseparam
,
1563 .get_strings
= mlxsw_sp_port_get_strings
,
1564 .set_phys_id
= mlxsw_sp_port_set_phys_id
,
1565 .get_ethtool_stats
= mlxsw_sp_port_get_stats
,
1566 .get_sset_count
= mlxsw_sp_port_get_sset_count
,
1567 .get_settings
= mlxsw_sp_port_get_settings
,
1568 .set_settings
= mlxsw_sp_port_set_settings
,
1572 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port
*mlxsw_sp_port
, u8 width
)
1574 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1575 u32 upper_speed
= MLXSW_SP_PORT_BASE_SPEED
* width
;
1576 char ptys_pl
[MLXSW_REG_PTYS_LEN
];
1577 u32 eth_proto_admin
;
1579 eth_proto_admin
= mlxsw_sp_to_ptys_upper_speed(upper_speed
);
1580 mlxsw_reg_ptys_pack(ptys_pl
, mlxsw_sp_port
->local_port
,
1582 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(ptys
), ptys_pl
);
1585 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
1586 enum mlxsw_reg_qeec_hr hr
, u8 index
, u8 next_index
,
1587 bool dwrr
, u8 dwrr_weight
)
1589 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1590 char qeec_pl
[MLXSW_REG_QEEC_LEN
];
1592 mlxsw_reg_qeec_pack(qeec_pl
, mlxsw_sp_port
->local_port
, hr
, index
,
1594 mlxsw_reg_qeec_de_set(qeec_pl
, true);
1595 mlxsw_reg_qeec_dwrr_set(qeec_pl
, dwrr
);
1596 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl
, dwrr_weight
);
1597 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(qeec
), qeec_pl
);
1600 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
1601 enum mlxsw_reg_qeec_hr hr
, u8 index
,
1602 u8 next_index
, u32 maxrate
)
1604 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1605 char qeec_pl
[MLXSW_REG_QEEC_LEN
];
1607 mlxsw_reg_qeec_pack(qeec_pl
, mlxsw_sp_port
->local_port
, hr
, index
,
1609 mlxsw_reg_qeec_mase_set(qeec_pl
, true);
1610 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl
, maxrate
);
1611 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(qeec
), qeec_pl
);
1614 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
1615 u8 switch_prio
, u8 tclass
)
1617 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
1618 char qtct_pl
[MLXSW_REG_QTCT_LEN
];
1620 mlxsw_reg_qtct_pack(qtct_pl
, mlxsw_sp_port
->local_port
, switch_prio
,
1622 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(qtct
), qtct_pl
);
1625 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port
*mlxsw_sp_port
)
1629 /* Setup the elements hierarcy, so that each TC is linked to
1630 * one subgroup, which are all member in the same group.
1632 err
= mlxsw_sp_port_ets_set(mlxsw_sp_port
,
1633 MLXSW_REG_QEEC_HIERARCY_GROUP
, 0, 0, false,
1637 for (i
= 0; i
< IEEE_8021QAZ_MAX_TCS
; i
++) {
1638 err
= mlxsw_sp_port_ets_set(mlxsw_sp_port
,
1639 MLXSW_REG_QEEC_HIERARCY_SUBGROUP
, i
,
1644 for (i
= 0; i
< IEEE_8021QAZ_MAX_TCS
; i
++) {
1645 err
= mlxsw_sp_port_ets_set(mlxsw_sp_port
,
1646 MLXSW_REG_QEEC_HIERARCY_TC
, i
, i
,
1652 /* Make sure the max shaper is disabled in all hierarcies that
1655 err
= mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port
,
1656 MLXSW_REG_QEEC_HIERARCY_PORT
, 0, 0,
1657 MLXSW_REG_QEEC_MAS_DIS
);
1660 for (i
= 0; i
< IEEE_8021QAZ_MAX_TCS
; i
++) {
1661 err
= mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port
,
1662 MLXSW_REG_QEEC_HIERARCY_SUBGROUP
,
1664 MLXSW_REG_QEEC_MAS_DIS
);
1668 for (i
= 0; i
< IEEE_8021QAZ_MAX_TCS
; i
++) {
1669 err
= mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port
,
1670 MLXSW_REG_QEEC_HIERARCY_TC
,
1672 MLXSW_REG_QEEC_MAS_DIS
);
1677 /* Map all priorities to traffic class 0. */
1678 for (i
= 0; i
< IEEE_8021QAZ_MAX_TCS
; i
++) {
1679 err
= mlxsw_sp_port_prio_tc_set(mlxsw_sp_port
, i
, 0);
1687 static int mlxsw_sp_port_create(struct mlxsw_sp
*mlxsw_sp
, u8 local_port
,
1688 bool split
, u8 module
, u8 width
, u8 lane
)
1690 struct mlxsw_sp_port
*mlxsw_sp_port
;
1691 struct net_device
*dev
;
1695 dev
= alloc_etherdev(sizeof(struct mlxsw_sp_port
));
1698 mlxsw_sp_port
= netdev_priv(dev
);
1699 mlxsw_sp_port
->dev
= dev
;
1700 mlxsw_sp_port
->mlxsw_sp
= mlxsw_sp
;
1701 mlxsw_sp_port
->local_port
= local_port
;
1702 mlxsw_sp_port
->split
= split
;
1703 mlxsw_sp_port
->mapping
.module
= module
;
1704 mlxsw_sp_port
->mapping
.width
= width
;
1705 mlxsw_sp_port
->mapping
.lane
= lane
;
1706 bytes
= DIV_ROUND_UP(VLAN_N_VID
, BITS_PER_BYTE
);
1707 mlxsw_sp_port
->active_vlans
= kzalloc(bytes
, GFP_KERNEL
);
1708 if (!mlxsw_sp_port
->active_vlans
) {
1710 goto err_port_active_vlans_alloc
;
1712 mlxsw_sp_port
->untagged_vlans
= kzalloc(bytes
, GFP_KERNEL
);
1713 if (!mlxsw_sp_port
->untagged_vlans
) {
1715 goto err_port_untagged_vlans_alloc
;
1717 INIT_LIST_HEAD(&mlxsw_sp_port
->vports_list
);
1719 mlxsw_sp_port
->pcpu_stats
=
1720 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats
);
1721 if (!mlxsw_sp_port
->pcpu_stats
) {
1723 goto err_alloc_stats
;
1726 dev
->netdev_ops
= &mlxsw_sp_port_netdev_ops
;
1727 dev
->ethtool_ops
= &mlxsw_sp_port_ethtool_ops
;
1729 err
= mlxsw_sp_port_dev_addr_init(mlxsw_sp_port
);
1731 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Unable to init port mac address\n",
1732 mlxsw_sp_port
->local_port
);
1733 goto err_dev_addr_init
;
1736 netif_carrier_off(dev
);
1738 dev
->features
|= NETIF_F_NETNS_LOCAL
| NETIF_F_LLTX
| NETIF_F_SG
|
1739 NETIF_F_HW_VLAN_CTAG_FILTER
;
1741 /* Each packet needs to have a Tx header (metadata) on top all other
1744 dev
->hard_header_len
+= MLXSW_TXHDR_LEN
;
1746 err
= mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port
);
1748 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to set system port mapping\n",
1749 mlxsw_sp_port
->local_port
);
1750 goto err_port_system_port_mapping_set
;
1753 err
= mlxsw_sp_port_swid_set(mlxsw_sp_port
, 0);
1755 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to set SWID\n",
1756 mlxsw_sp_port
->local_port
);
1757 goto err_port_swid_set
;
1760 err
= mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port
, width
);
1762 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to enable speeds\n",
1763 mlxsw_sp_port
->local_port
);
1764 goto err_port_speed_by_width_set
;
1767 err
= mlxsw_sp_port_mtu_set(mlxsw_sp_port
, ETH_DATA_LEN
);
1769 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to set MTU\n",
1770 mlxsw_sp_port
->local_port
);
1771 goto err_port_mtu_set
;
1774 err
= mlxsw_sp_port_admin_status_set(mlxsw_sp_port
, false);
1776 goto err_port_admin_status_set
;
1778 err
= mlxsw_sp_port_buffers_init(mlxsw_sp_port
);
1780 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to initialize buffers\n",
1781 mlxsw_sp_port
->local_port
);
1782 goto err_port_buffers_init
;
1785 err
= mlxsw_sp_port_ets_init(mlxsw_sp_port
);
1787 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to initialize ETS\n",
1788 mlxsw_sp_port
->local_port
);
1789 goto err_port_ets_init
;
1792 /* ETS and buffers must be initialized before DCB. */
1793 err
= mlxsw_sp_port_dcb_init(mlxsw_sp_port
);
1795 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to initialize DCB\n",
1796 mlxsw_sp_port
->local_port
);
1797 goto err_port_dcb_init
;
1800 mlxsw_sp_port_switchdev_init(mlxsw_sp_port
);
1801 err
= register_netdev(dev
);
1803 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to register netdev\n",
1804 mlxsw_sp_port
->local_port
);
1805 goto err_register_netdev
;
1808 err
= mlxsw_core_port_init(mlxsw_sp
->core
, &mlxsw_sp_port
->core_port
,
1809 mlxsw_sp_port
->local_port
, dev
,
1810 mlxsw_sp_port
->split
, module
);
1812 dev_err(mlxsw_sp
->bus_info
->dev
, "Port %d: Failed to init core port\n",
1813 mlxsw_sp_port
->local_port
);
1814 goto err_core_port_init
;
1817 err
= mlxsw_sp_port_vlan_init(mlxsw_sp_port
);
1819 goto err_port_vlan_init
;
1821 mlxsw_sp
->ports
[local_port
] = mlxsw_sp_port
;
1825 mlxsw_core_port_fini(&mlxsw_sp_port
->core_port
);
1827 unregister_netdev(dev
);
1828 err_register_netdev
:
1831 err_port_buffers_init
:
1832 err_port_admin_status_set
:
1834 err_port_speed_by_width_set
:
1836 err_port_system_port_mapping_set
:
1838 free_percpu(mlxsw_sp_port
->pcpu_stats
);
1840 kfree(mlxsw_sp_port
->untagged_vlans
);
1841 err_port_untagged_vlans_alloc
:
1842 kfree(mlxsw_sp_port
->active_vlans
);
1843 err_port_active_vlans_alloc
:
1848 static void mlxsw_sp_port_remove(struct mlxsw_sp
*mlxsw_sp
, u8 local_port
)
1850 struct mlxsw_sp_port
*mlxsw_sp_port
= mlxsw_sp
->ports
[local_port
];
1854 mlxsw_sp
->ports
[local_port
] = NULL
;
1855 mlxsw_core_port_fini(&mlxsw_sp_port
->core_port
);
1856 unregister_netdev(mlxsw_sp_port
->dev
); /* This calls ndo_stop */
1857 mlxsw_sp_port_dcb_fini(mlxsw_sp_port
);
1858 mlxsw_sp_port_kill_vid(mlxsw_sp_port
->dev
, 0, 1);
1859 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port
);
1860 mlxsw_sp_port_swid_set(mlxsw_sp_port
, MLXSW_PORT_SWID_DISABLED_PORT
);
1861 mlxsw_sp_port_module_unmap(mlxsw_sp
, mlxsw_sp_port
->local_port
);
1862 free_percpu(mlxsw_sp_port
->pcpu_stats
);
1863 kfree(mlxsw_sp_port
->untagged_vlans
);
1864 kfree(mlxsw_sp_port
->active_vlans
);
1865 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port
->vports_list
));
1866 free_netdev(mlxsw_sp_port
->dev
);
1869 static void mlxsw_sp_ports_remove(struct mlxsw_sp
*mlxsw_sp
)
1873 for (i
= 1; i
< MLXSW_PORT_MAX_PORTS
; i
++)
1874 mlxsw_sp_port_remove(mlxsw_sp
, i
);
1875 kfree(mlxsw_sp
->ports
);
1878 static int mlxsw_sp_ports_create(struct mlxsw_sp
*mlxsw_sp
)
1880 u8 module
, width
, lane
;
1885 alloc_size
= sizeof(struct mlxsw_sp_port
*) * MLXSW_PORT_MAX_PORTS
;
1886 mlxsw_sp
->ports
= kzalloc(alloc_size
, GFP_KERNEL
);
1887 if (!mlxsw_sp
->ports
)
1890 for (i
= 1; i
< MLXSW_PORT_MAX_PORTS
; i
++) {
1891 err
= mlxsw_sp_port_module_info_get(mlxsw_sp
, i
, &module
,
1894 goto err_port_module_info_get
;
1897 mlxsw_sp
->port_to_module
[i
] = module
;
1898 err
= mlxsw_sp_port_create(mlxsw_sp
, i
, false, module
, width
,
1901 goto err_port_create
;
1906 err_port_module_info_get
:
1907 for (i
--; i
>= 1; i
--)
1908 mlxsw_sp_port_remove(mlxsw_sp
, i
);
1909 kfree(mlxsw_sp
->ports
);
1913 static u8
mlxsw_sp_cluster_base_port_get(u8 local_port
)
1915 u8 offset
= (local_port
- 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX
;
1917 return local_port
- offset
;
1920 static int mlxsw_sp_port_split_create(struct mlxsw_sp
*mlxsw_sp
, u8 base_port
,
1921 u8 module
, unsigned int count
)
1923 u8 width
= MLXSW_PORT_MODULE_MAX_WIDTH
/ count
;
1926 for (i
= 0; i
< count
; i
++) {
1927 err
= mlxsw_sp_port_module_map(mlxsw_sp
, base_port
+ i
, module
,
1930 goto err_port_module_map
;
1933 for (i
= 0; i
< count
; i
++) {
1934 err
= __mlxsw_sp_port_swid_set(mlxsw_sp
, base_port
+ i
, 0);
1936 goto err_port_swid_set
;
1939 for (i
= 0; i
< count
; i
++) {
1940 err
= mlxsw_sp_port_create(mlxsw_sp
, base_port
+ i
, true,
1941 module
, width
, i
* width
);
1943 goto err_port_create
;
1949 for (i
--; i
>= 0; i
--)
1950 mlxsw_sp_port_remove(mlxsw_sp
, base_port
+ i
);
1953 for (i
--; i
>= 0; i
--)
1954 __mlxsw_sp_port_swid_set(mlxsw_sp
, base_port
+ i
,
1955 MLXSW_PORT_SWID_DISABLED_PORT
);
1957 err_port_module_map
:
1958 for (i
--; i
>= 0; i
--)
1959 mlxsw_sp_port_module_unmap(mlxsw_sp
, base_port
+ i
);
1963 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp
*mlxsw_sp
,
1964 u8 base_port
, unsigned int count
)
1966 u8 local_port
, module
, width
= MLXSW_PORT_MODULE_MAX_WIDTH
;
1969 /* Split by four means we need to re-create two ports, otherwise
1974 for (i
= 0; i
< count
; i
++) {
1975 local_port
= base_port
+ i
* 2;
1976 module
= mlxsw_sp
->port_to_module
[local_port
];
1978 mlxsw_sp_port_module_map(mlxsw_sp
, local_port
, module
, width
,
1982 for (i
= 0; i
< count
; i
++)
1983 __mlxsw_sp_port_swid_set(mlxsw_sp
, base_port
+ i
* 2, 0);
1985 for (i
= 0; i
< count
; i
++) {
1986 local_port
= base_port
+ i
* 2;
1987 module
= mlxsw_sp
->port_to_module
[local_port
];
1989 mlxsw_sp_port_create(mlxsw_sp
, local_port
, false, module
,
1994 static int mlxsw_sp_port_split(struct mlxsw_core
*mlxsw_core
, u8 local_port
,
1997 struct mlxsw_sp
*mlxsw_sp
= mlxsw_core_driver_priv(mlxsw_core
);
1998 struct mlxsw_sp_port
*mlxsw_sp_port
;
1999 u8 module
, cur_width
, base_port
;
2003 mlxsw_sp_port
= mlxsw_sp
->ports
[local_port
];
2004 if (!mlxsw_sp_port
) {
2005 dev_err(mlxsw_sp
->bus_info
->dev
, "Port number \"%d\" does not exist\n",
2010 module
= mlxsw_sp_port
->mapping
.module
;
2011 cur_width
= mlxsw_sp_port
->mapping
.width
;
2013 if (count
!= 2 && count
!= 4) {
2014 netdev_err(mlxsw_sp_port
->dev
, "Port can only be split into 2 or 4 ports\n");
2018 if (cur_width
!= MLXSW_PORT_MODULE_MAX_WIDTH
) {
2019 netdev_err(mlxsw_sp_port
->dev
, "Port cannot be split further\n");
2023 /* Make sure we have enough slave (even) ports for the split. */
2025 base_port
= local_port
;
2026 if (mlxsw_sp
->ports
[base_port
+ 1]) {
2027 netdev_err(mlxsw_sp_port
->dev
, "Invalid split configuration\n");
2031 base_port
= mlxsw_sp_cluster_base_port_get(local_port
);
2032 if (mlxsw_sp
->ports
[base_port
+ 1] ||
2033 mlxsw_sp
->ports
[base_port
+ 3]) {
2034 netdev_err(mlxsw_sp_port
->dev
, "Invalid split configuration\n");
2039 for (i
= 0; i
< count
; i
++)
2040 mlxsw_sp_port_remove(mlxsw_sp
, base_port
+ i
);
2042 err
= mlxsw_sp_port_split_create(mlxsw_sp
, base_port
, module
, count
);
2044 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to create split ports\n");
2045 goto err_port_split_create
;
2050 err_port_split_create
:
2051 mlxsw_sp_port_unsplit_create(mlxsw_sp
, base_port
, count
);
2055 static int mlxsw_sp_port_unsplit(struct mlxsw_core
*mlxsw_core
, u8 local_port
)
2057 struct mlxsw_sp
*mlxsw_sp
= mlxsw_core_driver_priv(mlxsw_core
);
2058 struct mlxsw_sp_port
*mlxsw_sp_port
;
2059 u8 cur_width
, base_port
;
2063 mlxsw_sp_port
= mlxsw_sp
->ports
[local_port
];
2064 if (!mlxsw_sp_port
) {
2065 dev_err(mlxsw_sp
->bus_info
->dev
, "Port number \"%d\" does not exist\n",
2070 if (!mlxsw_sp_port
->split
) {
2071 netdev_err(mlxsw_sp_port
->dev
, "Port wasn't split\n");
2075 cur_width
= mlxsw_sp_port
->mapping
.width
;
2076 count
= cur_width
== 1 ? 4 : 2;
2078 base_port
= mlxsw_sp_cluster_base_port_get(local_port
);
2080 /* Determine which ports to remove. */
2081 if (count
== 2 && local_port
>= base_port
+ 2)
2082 base_port
= base_port
+ 2;
2084 for (i
= 0; i
< count
; i
++)
2085 mlxsw_sp_port_remove(mlxsw_sp
, base_port
+ i
);
2087 mlxsw_sp_port_unsplit_create(mlxsw_sp
, base_port
, count
);
2092 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info
*reg
,
2093 char *pude_pl
, void *priv
)
2095 struct mlxsw_sp
*mlxsw_sp
= priv
;
2096 struct mlxsw_sp_port
*mlxsw_sp_port
;
2097 enum mlxsw_reg_pude_oper_status status
;
2100 local_port
= mlxsw_reg_pude_local_port_get(pude_pl
);
2101 mlxsw_sp_port
= mlxsw_sp
->ports
[local_port
];
2102 if (!mlxsw_sp_port
) {
2103 dev_warn(mlxsw_sp
->bus_info
->dev
, "Port %d: Link event received for non-existent port\n",
2108 status
= mlxsw_reg_pude_oper_status_get(pude_pl
);
2109 if (status
== MLXSW_PORT_OPER_STATUS_UP
) {
2110 netdev_info(mlxsw_sp_port
->dev
, "link up\n");
2111 netif_carrier_on(mlxsw_sp_port
->dev
);
2113 netdev_info(mlxsw_sp_port
->dev
, "link down\n");
2114 netif_carrier_off(mlxsw_sp_port
->dev
);
2118 static struct mlxsw_event_listener mlxsw_sp_pude_event
= {
2119 .func
= mlxsw_sp_pude_event_func
,
2120 .trap_id
= MLXSW_TRAP_ID_PUDE
,
2123 static int mlxsw_sp_event_register(struct mlxsw_sp
*mlxsw_sp
,
2124 enum mlxsw_event_trap_id trap_id
)
2126 struct mlxsw_event_listener
*el
;
2127 char hpkt_pl
[MLXSW_REG_HPKT_LEN
];
2131 case MLXSW_TRAP_ID_PUDE
:
2132 el
= &mlxsw_sp_pude_event
;
2135 err
= mlxsw_core_event_listener_register(mlxsw_sp
->core
, el
, mlxsw_sp
);
2139 mlxsw_reg_hpkt_pack(hpkt_pl
, MLXSW_REG_HPKT_ACTION_FORWARD
, trap_id
);
2140 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(hpkt
), hpkt_pl
);
2142 goto err_event_trap_set
;
2147 mlxsw_core_event_listener_unregister(mlxsw_sp
->core
, el
, mlxsw_sp
);
2151 static void mlxsw_sp_event_unregister(struct mlxsw_sp
*mlxsw_sp
,
2152 enum mlxsw_event_trap_id trap_id
)
2154 struct mlxsw_event_listener
*el
;
2157 case MLXSW_TRAP_ID_PUDE
:
2158 el
= &mlxsw_sp_pude_event
;
2161 mlxsw_core_event_listener_unregister(mlxsw_sp
->core
, el
, mlxsw_sp
);
2164 static void mlxsw_sp_rx_listener_func(struct sk_buff
*skb
, u8 local_port
,
2167 struct mlxsw_sp
*mlxsw_sp
= priv
;
2168 struct mlxsw_sp_port
*mlxsw_sp_port
= mlxsw_sp
->ports
[local_port
];
2169 struct mlxsw_sp_port_pcpu_stats
*pcpu_stats
;
2171 if (unlikely(!mlxsw_sp_port
)) {
2172 dev_warn_ratelimited(mlxsw_sp
->bus_info
->dev
, "Port %d: skb received for non-existent port\n",
2177 skb
->dev
= mlxsw_sp_port
->dev
;
2179 pcpu_stats
= this_cpu_ptr(mlxsw_sp_port
->pcpu_stats
);
2180 u64_stats_update_begin(&pcpu_stats
->syncp
);
2181 pcpu_stats
->rx_packets
++;
2182 pcpu_stats
->rx_bytes
+= skb
->len
;
2183 u64_stats_update_end(&pcpu_stats
->syncp
);
2185 skb
->protocol
= eth_type_trans(skb
, skb
->dev
);
2186 netif_receive_skb(skb
);
2189 static const struct mlxsw_rx_listener mlxsw_sp_rx_listener
[] = {
2191 .func
= mlxsw_sp_rx_listener_func
,
2192 .local_port
= MLXSW_PORT_DONT_CARE
,
2193 .trap_id
= MLXSW_TRAP_ID_FDB_MC
,
2195 /* Traps for specific L2 packet types, not trapped as FDB MC */
2197 .func
= mlxsw_sp_rx_listener_func
,
2198 .local_port
= MLXSW_PORT_DONT_CARE
,
2199 .trap_id
= MLXSW_TRAP_ID_STP
,
2202 .func
= mlxsw_sp_rx_listener_func
,
2203 .local_port
= MLXSW_PORT_DONT_CARE
,
2204 .trap_id
= MLXSW_TRAP_ID_LACP
,
2207 .func
= mlxsw_sp_rx_listener_func
,
2208 .local_port
= MLXSW_PORT_DONT_CARE
,
2209 .trap_id
= MLXSW_TRAP_ID_EAPOL
,
2212 .func
= mlxsw_sp_rx_listener_func
,
2213 .local_port
= MLXSW_PORT_DONT_CARE
,
2214 .trap_id
= MLXSW_TRAP_ID_LLDP
,
2217 .func
= mlxsw_sp_rx_listener_func
,
2218 .local_port
= MLXSW_PORT_DONT_CARE
,
2219 .trap_id
= MLXSW_TRAP_ID_MMRP
,
2222 .func
= mlxsw_sp_rx_listener_func
,
2223 .local_port
= MLXSW_PORT_DONT_CARE
,
2224 .trap_id
= MLXSW_TRAP_ID_MVRP
,
2227 .func
= mlxsw_sp_rx_listener_func
,
2228 .local_port
= MLXSW_PORT_DONT_CARE
,
2229 .trap_id
= MLXSW_TRAP_ID_RPVST
,
2232 .func
= mlxsw_sp_rx_listener_func
,
2233 .local_port
= MLXSW_PORT_DONT_CARE
,
2234 .trap_id
= MLXSW_TRAP_ID_DHCP
,
2237 .func
= mlxsw_sp_rx_listener_func
,
2238 .local_port
= MLXSW_PORT_DONT_CARE
,
2239 .trap_id
= MLXSW_TRAP_ID_IGMP_QUERY
,
2242 .func
= mlxsw_sp_rx_listener_func
,
2243 .local_port
= MLXSW_PORT_DONT_CARE
,
2244 .trap_id
= MLXSW_TRAP_ID_IGMP_V1_REPORT
,
2247 .func
= mlxsw_sp_rx_listener_func
,
2248 .local_port
= MLXSW_PORT_DONT_CARE
,
2249 .trap_id
= MLXSW_TRAP_ID_IGMP_V2_REPORT
,
2252 .func
= mlxsw_sp_rx_listener_func
,
2253 .local_port
= MLXSW_PORT_DONT_CARE
,
2254 .trap_id
= MLXSW_TRAP_ID_IGMP_V2_LEAVE
,
2257 .func
= mlxsw_sp_rx_listener_func
,
2258 .local_port
= MLXSW_PORT_DONT_CARE
,
2259 .trap_id
= MLXSW_TRAP_ID_IGMP_V3_REPORT
,
2263 static int mlxsw_sp_traps_init(struct mlxsw_sp
*mlxsw_sp
)
2265 char htgt_pl
[MLXSW_REG_HTGT_LEN
];
2266 char hpkt_pl
[MLXSW_REG_HPKT_LEN
];
2270 mlxsw_reg_htgt_pack(htgt_pl
, MLXSW_REG_HTGT_TRAP_GROUP_RX
);
2271 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(htgt
), htgt_pl
);
2275 mlxsw_reg_htgt_pack(htgt_pl
, MLXSW_REG_HTGT_TRAP_GROUP_CTRL
);
2276 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(htgt
), htgt_pl
);
2280 for (i
= 0; i
< ARRAY_SIZE(mlxsw_sp_rx_listener
); i
++) {
2281 err
= mlxsw_core_rx_listener_register(mlxsw_sp
->core
,
2282 &mlxsw_sp_rx_listener
[i
],
2285 goto err_rx_listener_register
;
2287 mlxsw_reg_hpkt_pack(hpkt_pl
, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU
,
2288 mlxsw_sp_rx_listener
[i
].trap_id
);
2289 err
= mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(hpkt
), hpkt_pl
);
2291 goto err_rx_trap_set
;
2296 mlxsw_core_rx_listener_unregister(mlxsw_sp
->core
,
2297 &mlxsw_sp_rx_listener
[i
],
2299 err_rx_listener_register
:
2300 for (i
--; i
>= 0; i
--) {
2301 mlxsw_reg_hpkt_pack(hpkt_pl
, MLXSW_REG_HPKT_ACTION_FORWARD
,
2302 mlxsw_sp_rx_listener
[i
].trap_id
);
2303 mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(hpkt
), hpkt_pl
);
2305 mlxsw_core_rx_listener_unregister(mlxsw_sp
->core
,
2306 &mlxsw_sp_rx_listener
[i
],
2312 static void mlxsw_sp_traps_fini(struct mlxsw_sp
*mlxsw_sp
)
2314 char hpkt_pl
[MLXSW_REG_HPKT_LEN
];
2317 for (i
= 0; i
< ARRAY_SIZE(mlxsw_sp_rx_listener
); i
++) {
2318 mlxsw_reg_hpkt_pack(hpkt_pl
, MLXSW_REG_HPKT_ACTION_FORWARD
,
2319 mlxsw_sp_rx_listener
[i
].trap_id
);
2320 mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(hpkt
), hpkt_pl
);
2322 mlxsw_core_rx_listener_unregister(mlxsw_sp
->core
,
2323 &mlxsw_sp_rx_listener
[i
],
2328 static int __mlxsw_sp_flood_init(struct mlxsw_core
*mlxsw_core
,
2329 enum mlxsw_reg_sfgc_type type
,
2330 enum mlxsw_reg_sfgc_bridge_type bridge_type
)
2332 enum mlxsw_flood_table_type table_type
;
2333 enum mlxsw_sp_flood_table flood_table
;
2334 char sfgc_pl
[MLXSW_REG_SFGC_LEN
];
2336 if (bridge_type
== MLXSW_REG_SFGC_BRIDGE_TYPE_VFID
)
2337 table_type
= MLXSW_REG_SFGC_TABLE_TYPE_FID
;
2339 table_type
= MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST
;
2341 if (type
== MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST
)
2342 flood_table
= MLXSW_SP_FLOOD_TABLE_UC
;
2344 flood_table
= MLXSW_SP_FLOOD_TABLE_BM
;
2346 mlxsw_reg_sfgc_pack(sfgc_pl
, type
, bridge_type
, table_type
,
2348 return mlxsw_reg_write(mlxsw_core
, MLXSW_REG(sfgc
), sfgc_pl
);
2351 static int mlxsw_sp_flood_init(struct mlxsw_sp
*mlxsw_sp
)
2355 for (type
= 0; type
< MLXSW_REG_SFGC_TYPE_MAX
; type
++) {
2356 if (type
== MLXSW_REG_SFGC_TYPE_RESERVED
)
2359 err
= __mlxsw_sp_flood_init(mlxsw_sp
->core
, type
,
2360 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID
);
2364 err
= __mlxsw_sp_flood_init(mlxsw_sp
->core
, type
,
2365 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID
);
2373 static int mlxsw_sp_lag_init(struct mlxsw_sp
*mlxsw_sp
)
2375 char slcr_pl
[MLXSW_REG_SLCR_LEN
];
2377 mlxsw_reg_slcr_pack(slcr_pl
, MLXSW_REG_SLCR_LAG_HASH_SMAC
|
2378 MLXSW_REG_SLCR_LAG_HASH_DMAC
|
2379 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE
|
2380 MLXSW_REG_SLCR_LAG_HASH_VLANID
|
2381 MLXSW_REG_SLCR_LAG_HASH_SIP
|
2382 MLXSW_REG_SLCR_LAG_HASH_DIP
|
2383 MLXSW_REG_SLCR_LAG_HASH_SPORT
|
2384 MLXSW_REG_SLCR_LAG_HASH_DPORT
|
2385 MLXSW_REG_SLCR_LAG_HASH_IPPROTO
);
2386 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(slcr
), slcr_pl
);
2389 static int mlxsw_sp_init(struct mlxsw_core
*mlxsw_core
,
2390 const struct mlxsw_bus_info
*mlxsw_bus_info
)
2392 struct mlxsw_sp
*mlxsw_sp
= mlxsw_core_driver_priv(mlxsw_core
);
2395 mlxsw_sp
->core
= mlxsw_core
;
2396 mlxsw_sp
->bus_info
= mlxsw_bus_info
;
2397 INIT_LIST_HEAD(&mlxsw_sp
->fids
);
2398 INIT_LIST_HEAD(&mlxsw_sp
->port_vfids
.list
);
2399 INIT_LIST_HEAD(&mlxsw_sp
->br_vfids
.list
);
2400 INIT_LIST_HEAD(&mlxsw_sp
->br_mids
.list
);
2402 err
= mlxsw_sp_base_mac_get(mlxsw_sp
);
2404 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to get base mac\n");
2408 err
= mlxsw_sp_ports_create(mlxsw_sp
);
2410 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to create ports\n");
2414 err
= mlxsw_sp_event_register(mlxsw_sp
, MLXSW_TRAP_ID_PUDE
);
2416 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to register for PUDE events\n");
2417 goto err_event_register
;
2420 err
= mlxsw_sp_traps_init(mlxsw_sp
);
2422 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to set traps for RX\n");
2423 goto err_rx_listener_register
;
2426 err
= mlxsw_sp_flood_init(mlxsw_sp
);
2428 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to initialize flood tables\n");
2429 goto err_flood_init
;
2432 err
= mlxsw_sp_buffers_init(mlxsw_sp
);
2434 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to initialize buffers\n");
2435 goto err_buffers_init
;
2438 err
= mlxsw_sp_lag_init(mlxsw_sp
);
2440 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to initialize LAG\n");
2444 err
= mlxsw_sp_switchdev_init(mlxsw_sp
);
2446 dev_err(mlxsw_sp
->bus_info
->dev
, "Failed to initialize switchdev\n");
2447 goto err_switchdev_init
;
2454 mlxsw_sp_buffers_fini(mlxsw_sp
);
2457 mlxsw_sp_traps_fini(mlxsw_sp
);
2458 err_rx_listener_register
:
2459 mlxsw_sp_event_unregister(mlxsw_sp
, MLXSW_TRAP_ID_PUDE
);
2461 mlxsw_sp_ports_remove(mlxsw_sp
);
2465 static void mlxsw_sp_fini(struct mlxsw_core
*mlxsw_core
)
2467 struct mlxsw_sp
*mlxsw_sp
= mlxsw_core_driver_priv(mlxsw_core
);
2469 mlxsw_sp_switchdev_fini(mlxsw_sp
);
2470 mlxsw_sp_buffers_fini(mlxsw_sp
);
2471 mlxsw_sp_traps_fini(mlxsw_sp
);
2472 mlxsw_sp_event_unregister(mlxsw_sp
, MLXSW_TRAP_ID_PUDE
);
2473 mlxsw_sp_ports_remove(mlxsw_sp
);
2474 WARN_ON(!list_empty(&mlxsw_sp
->fids
));
2477 static struct mlxsw_config_profile mlxsw_sp_config_profile
= {
2478 .used_max_vepa_channels
= 1,
2479 .max_vepa_channels
= 0,
2481 .max_lag
= MLXSW_SP_LAG_MAX
,
2482 .used_max_port_per_lag
= 1,
2483 .max_port_per_lag
= MLXSW_SP_PORT_PER_LAG_MAX
,
2485 .max_mid
= MLXSW_SP_MID_MAX
,
2488 .used_max_system_port
= 1,
2489 .max_system_port
= 64,
2490 .used_max_vlan_groups
= 1,
2491 .max_vlan_groups
= 127,
2492 .used_max_regions
= 1,
2494 .used_flood_tables
= 1,
2495 .used_flood_mode
= 1,
2497 .max_fid_offset_flood_tables
= 2,
2498 .fid_offset_flood_table_size
= VLAN_N_VID
- 1,
2499 .max_fid_flood_tables
= 2,
2500 .fid_flood_table_size
= MLXSW_SP_VFID_MAX
,
2501 .used_max_ib_mc
= 1,
2508 .type
= MLXSW_PORT_SWID_TYPE_ETH
,
2513 static struct mlxsw_driver mlxsw_sp_driver
= {
2514 .kind
= MLXSW_DEVICE_KIND_SPECTRUM
,
2515 .owner
= THIS_MODULE
,
2516 .priv_size
= sizeof(struct mlxsw_sp
),
2517 .init
= mlxsw_sp_init
,
2518 .fini
= mlxsw_sp_fini
,
2519 .port_split
= mlxsw_sp_port_split
,
2520 .port_unsplit
= mlxsw_sp_port_unsplit
,
2521 .sb_pool_get
= mlxsw_sp_sb_pool_get
,
2522 .sb_pool_set
= mlxsw_sp_sb_pool_set
,
2523 .sb_port_pool_get
= mlxsw_sp_sb_port_pool_get
,
2524 .sb_port_pool_set
= mlxsw_sp_sb_port_pool_set
,
2525 .sb_tc_pool_bind_get
= mlxsw_sp_sb_tc_pool_bind_get
,
2526 .sb_tc_pool_bind_set
= mlxsw_sp_sb_tc_pool_bind_set
,
2527 .sb_occ_snapshot
= mlxsw_sp_sb_occ_snapshot
,
2528 .sb_occ_max_clear
= mlxsw_sp_sb_occ_max_clear
,
2529 .sb_occ_port_pool_get
= mlxsw_sp_sb_occ_port_pool_get
,
2530 .sb_occ_tc_port_bind_get
= mlxsw_sp_sb_occ_tc_port_bind_get
,
2531 .txhdr_construct
= mlxsw_sp_txhdr_construct
,
2532 .txhdr_len
= MLXSW_TXHDR_LEN
,
2533 .profile
= &mlxsw_sp_config_profile
,
2536 static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port
*lag_port
,
2539 if (mlxsw_sp_fid_is_vfid(fid
))
2540 return mlxsw_sp_port_vport_find_by_fid(lag_port
, fid
);
2542 return test_bit(fid
, lag_port
->active_vlans
);
2545 static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port
*mlxsw_sp_port
,
2548 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2549 u8 local_port
= mlxsw_sp_port
->local_port
;
2550 u16 lag_id
= mlxsw_sp_port
->lag_id
;
2553 if (!mlxsw_sp_port
->lagged
)
2556 for (i
= 0; i
< MLXSW_SP_PORT_PER_LAG_MAX
; i
++) {
2557 struct mlxsw_sp_port
*lag_port
;
2559 lag_port
= mlxsw_sp_port_lagged_get(mlxsw_sp
, lag_id
, i
);
2560 if (!lag_port
|| lag_port
->local_port
== local_port
)
2562 if (mlxsw_sp_lag_port_fid_member(lag_port
, fid
))
2570 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port
*mlxsw_sp_port
,
2573 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2574 char sfdf_pl
[MLXSW_REG_SFDF_LEN
];
2576 mlxsw_reg_sfdf_pack(sfdf_pl
, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID
);
2577 mlxsw_reg_sfdf_fid_set(sfdf_pl
, fid
);
2578 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl
,
2579 mlxsw_sp_port
->local_port
);
2581 netdev_dbg(mlxsw_sp_port
->dev
, "FDB flushed using Port=%d, FID=%d\n",
2582 mlxsw_sp_port
->local_port
, fid
);
2584 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sfdf
), sfdf_pl
);
2588 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port
*mlxsw_sp_port
,
2591 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2592 char sfdf_pl
[MLXSW_REG_SFDF_LEN
];
2594 mlxsw_reg_sfdf_pack(sfdf_pl
, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID
);
2595 mlxsw_reg_sfdf_fid_set(sfdf_pl
, fid
);
2596 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl
, mlxsw_sp_port
->lag_id
);
2598 netdev_dbg(mlxsw_sp_port
->dev
, "FDB flushed using LAG ID=%d, FID=%d\n",
2599 mlxsw_sp_port
->lag_id
, fid
);
2601 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sfdf
), sfdf_pl
);
2604 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port
*mlxsw_sp_port
, u16 fid
)
2606 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port
, fid
))
2609 if (mlxsw_sp_port
->lagged
)
2610 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port
,
2613 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port
, fid
);
2616 static bool mlxsw_sp_port_dev_check(const struct net_device
*dev
)
2618 return dev
->netdev_ops
== &mlxsw_sp_port_netdev_ops
;
2621 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp
*mlxsw_sp
,
2622 struct net_device
*br_dev
)
2624 return !mlxsw_sp
->master_bridge
.dev
||
2625 mlxsw_sp
->master_bridge
.dev
== br_dev
;
2628 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp
*mlxsw_sp
,
2629 struct net_device
*br_dev
)
2631 mlxsw_sp
->master_bridge
.dev
= br_dev
;
2632 mlxsw_sp
->master_bridge
.ref_count
++;
2635 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp
*mlxsw_sp
)
2637 if (--mlxsw_sp
->master_bridge
.ref_count
== 0)
2638 mlxsw_sp
->master_bridge
.dev
= NULL
;
2641 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port
*mlxsw_sp_port
,
2642 struct net_device
*br_dev
)
2644 struct net_device
*dev
= mlxsw_sp_port
->dev
;
2647 /* When port is not bridged untagged packets are tagged with
2648 * PVID=VID=1, thereby creating an implicit VLAN interface in
2649 * the device. Remove it and let bridge code take care of its
2652 err
= mlxsw_sp_port_kill_vid(dev
, 0, 1);
2656 mlxsw_sp_master_bridge_inc(mlxsw_sp_port
->mlxsw_sp
, br_dev
);
2658 mlxsw_sp_port
->learning
= 1;
2659 mlxsw_sp_port
->learning_sync
= 1;
2660 mlxsw_sp_port
->uc_flood
= 1;
2661 mlxsw_sp_port
->bridged
= 1;
2666 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port
*mlxsw_sp_port
)
2668 struct net_device
*dev
= mlxsw_sp_port
->dev
;
2670 mlxsw_sp_port_pvid_set(mlxsw_sp_port
, 1);
2672 mlxsw_sp_master_bridge_dec(mlxsw_sp_port
->mlxsw_sp
);
2674 mlxsw_sp_port
->learning
= 0;
2675 mlxsw_sp_port
->learning_sync
= 0;
2676 mlxsw_sp_port
->uc_flood
= 0;
2677 mlxsw_sp_port
->bridged
= 0;
2679 /* Add implicit VLAN interface in the device, so that untagged
2680 * packets will be classified to the default vFID.
2682 mlxsw_sp_port_add_vid(dev
, 0, 1);
2685 static int mlxsw_sp_lag_create(struct mlxsw_sp
*mlxsw_sp
, u16 lag_id
)
2687 char sldr_pl
[MLXSW_REG_SLDR_LEN
];
2689 mlxsw_reg_sldr_lag_create_pack(sldr_pl
, lag_id
);
2690 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sldr
), sldr_pl
);
2693 static int mlxsw_sp_lag_destroy(struct mlxsw_sp
*mlxsw_sp
, u16 lag_id
)
2695 char sldr_pl
[MLXSW_REG_SLDR_LEN
];
2697 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl
, lag_id
);
2698 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sldr
), sldr_pl
);
2701 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port
*mlxsw_sp_port
,
2702 u16 lag_id
, u8 port_index
)
2704 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2705 char slcor_pl
[MLXSW_REG_SLCOR_LEN
];
2707 mlxsw_reg_slcor_port_add_pack(slcor_pl
, mlxsw_sp_port
->local_port
,
2708 lag_id
, port_index
);
2709 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(slcor
), slcor_pl
);
2712 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port
*mlxsw_sp_port
,
2715 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2716 char slcor_pl
[MLXSW_REG_SLCOR_LEN
];
2718 mlxsw_reg_slcor_port_remove_pack(slcor_pl
, mlxsw_sp_port
->local_port
,
2720 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(slcor
), slcor_pl
);
2723 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port
*mlxsw_sp_port
,
2726 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2727 char slcor_pl
[MLXSW_REG_SLCOR_LEN
];
2729 mlxsw_reg_slcor_col_enable_pack(slcor_pl
, mlxsw_sp_port
->local_port
,
2731 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(slcor
), slcor_pl
);
2734 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port
*mlxsw_sp_port
,
2737 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2738 char slcor_pl
[MLXSW_REG_SLCOR_LEN
];
2740 mlxsw_reg_slcor_col_disable_pack(slcor_pl
, mlxsw_sp_port
->local_port
,
2742 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(slcor
), slcor_pl
);
2745 static int mlxsw_sp_lag_index_get(struct mlxsw_sp
*mlxsw_sp
,
2746 struct net_device
*lag_dev
,
2749 struct mlxsw_sp_upper
*lag
;
2750 int free_lag_id
= -1;
2753 for (i
= 0; i
< MLXSW_SP_LAG_MAX
; i
++) {
2754 lag
= mlxsw_sp_lag_get(mlxsw_sp
, i
);
2755 if (lag
->ref_count
) {
2756 if (lag
->dev
== lag_dev
) {
2760 } else if (free_lag_id
< 0) {
2764 if (free_lag_id
< 0)
2766 *p_lag_id
= free_lag_id
;
2771 mlxsw_sp_master_lag_check(struct mlxsw_sp
*mlxsw_sp
,
2772 struct net_device
*lag_dev
,
2773 struct netdev_lag_upper_info
*lag_upper_info
)
2777 if (mlxsw_sp_lag_index_get(mlxsw_sp
, lag_dev
, &lag_id
) != 0)
2779 if (lag_upper_info
->tx_type
!= NETDEV_LAG_TX_TYPE_HASH
)
2784 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp
*mlxsw_sp
,
2785 u16 lag_id
, u8
*p_port_index
)
2789 for (i
= 0; i
< MLXSW_SP_PORT_PER_LAG_MAX
; i
++) {
2790 if (!mlxsw_sp_port_lagged_get(mlxsw_sp
, lag_id
, i
)) {
2799 mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port
*mlxsw_sp_port
,
2802 struct mlxsw_sp_port
*mlxsw_sp_vport
;
2804 mlxsw_sp_vport
= mlxsw_sp_port_vport_find(mlxsw_sp_port
, 1);
2805 if (WARN_ON(!mlxsw_sp_vport
))
2808 mlxsw_sp_vport
->lag_id
= lag_id
;
2809 mlxsw_sp_vport
->lagged
= 1;
2813 mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port
*mlxsw_sp_port
)
2815 struct mlxsw_sp_port
*mlxsw_sp_vport
;
2817 mlxsw_sp_vport
= mlxsw_sp_port_vport_find(mlxsw_sp_port
, 1);
2818 if (WARN_ON(!mlxsw_sp_vport
))
2821 mlxsw_sp_vport
->lagged
= 0;
2824 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port
*mlxsw_sp_port
,
2825 struct net_device
*lag_dev
)
2827 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2828 struct mlxsw_sp_upper
*lag
;
2833 err
= mlxsw_sp_lag_index_get(mlxsw_sp
, lag_dev
, &lag_id
);
2836 lag
= mlxsw_sp_lag_get(mlxsw_sp
, lag_id
);
2837 if (!lag
->ref_count
) {
2838 err
= mlxsw_sp_lag_create(mlxsw_sp
, lag_id
);
2844 err
= mlxsw_sp_port_lag_index_get(mlxsw_sp
, lag_id
, &port_index
);
2847 err
= mlxsw_sp_lag_col_port_add(mlxsw_sp_port
, lag_id
, port_index
);
2849 goto err_col_port_add
;
2850 err
= mlxsw_sp_lag_col_port_enable(mlxsw_sp_port
, lag_id
);
2852 goto err_col_port_enable
;
2854 mlxsw_core_lag_mapping_set(mlxsw_sp
->core
, lag_id
, port_index
,
2855 mlxsw_sp_port
->local_port
);
2856 mlxsw_sp_port
->lag_id
= lag_id
;
2857 mlxsw_sp_port
->lagged
= 1;
2860 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port
, lag_id
);
2864 err_col_port_enable
:
2865 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port
, lag_id
);
2867 if (!lag
->ref_count
)
2868 mlxsw_sp_lag_destroy(mlxsw_sp
, lag_id
);
2872 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port
*mlxsw_sp_port
,
2873 struct net_device
*lag_dev
)
2875 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2876 u16 lag_id
= mlxsw_sp_port
->lag_id
;
2877 struct mlxsw_sp_upper
*lag
;
2879 if (!mlxsw_sp_port
->lagged
)
2881 lag
= mlxsw_sp_lag_get(mlxsw_sp
, lag_id
);
2882 WARN_ON(lag
->ref_count
== 0);
2884 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port
, lag_id
);
2885 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port
, lag_id
);
2887 if (mlxsw_sp_port
->bridged
) {
2888 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port
);
2889 mlxsw_sp_port_bridge_leave(mlxsw_sp_port
);
2892 if (lag
->ref_count
== 1)
2893 mlxsw_sp_lag_destroy(mlxsw_sp
, lag_id
);
2895 mlxsw_core_lag_mapping_clear(mlxsw_sp
->core
, lag_id
,
2896 mlxsw_sp_port
->local_port
);
2897 mlxsw_sp_port
->lagged
= 0;
2900 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port
);
2903 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port
*mlxsw_sp_port
,
2906 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2907 char sldr_pl
[MLXSW_REG_SLDR_LEN
];
2909 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl
, lag_id
,
2910 mlxsw_sp_port
->local_port
);
2911 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sldr
), sldr_pl
);
2914 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port
*mlxsw_sp_port
,
2917 struct mlxsw_sp
*mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2918 char sldr_pl
[MLXSW_REG_SLDR_LEN
];
2920 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl
, lag_id
,
2921 mlxsw_sp_port
->local_port
);
2922 return mlxsw_reg_write(mlxsw_sp
->core
, MLXSW_REG(sldr
), sldr_pl
);
2925 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port
*mlxsw_sp_port
,
2926 bool lag_tx_enabled
)
2929 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port
,
2930 mlxsw_sp_port
->lag_id
);
2932 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port
,
2933 mlxsw_sp_port
->lag_id
);
2936 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port
*mlxsw_sp_port
,
2937 struct netdev_lag_lower_state_info
*info
)
2939 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port
, info
->tx_enabled
);
2942 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port
*mlxsw_sp_port
,
2943 struct net_device
*vlan_dev
)
2945 struct mlxsw_sp_port
*mlxsw_sp_vport
;
2946 u16 vid
= vlan_dev_vlan_id(vlan_dev
);
2948 mlxsw_sp_vport
= mlxsw_sp_port_vport_find(mlxsw_sp_port
, vid
);
2949 if (WARN_ON(!mlxsw_sp_vport
))
2952 mlxsw_sp_vport
->dev
= vlan_dev
;
2957 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port
*mlxsw_sp_port
,
2958 struct net_device
*vlan_dev
)
2960 struct mlxsw_sp_port
*mlxsw_sp_vport
;
2961 u16 vid
= vlan_dev_vlan_id(vlan_dev
);
2963 mlxsw_sp_vport
= mlxsw_sp_port_vport_find(mlxsw_sp_port
, vid
);
2964 if (WARN_ON(!mlxsw_sp_vport
))
2967 mlxsw_sp_vport
->dev
= mlxsw_sp_port
->dev
;
2970 static int mlxsw_sp_netdevice_port_upper_event(struct net_device
*dev
,
2971 unsigned long event
, void *ptr
)
2973 struct netdev_notifier_changeupper_info
*info
;
2974 struct mlxsw_sp_port
*mlxsw_sp_port
;
2975 struct net_device
*upper_dev
;
2976 struct mlxsw_sp
*mlxsw_sp
;
2979 mlxsw_sp_port
= netdev_priv(dev
);
2980 mlxsw_sp
= mlxsw_sp_port
->mlxsw_sp
;
2984 case NETDEV_PRECHANGEUPPER
:
2985 upper_dev
= info
->upper_dev
;
2986 if (!is_vlan_dev(upper_dev
) &&
2987 !netif_is_lag_master(upper_dev
) &&
2988 !netif_is_bridge_master(upper_dev
))
2992 /* HW limitation forbids to put ports to multiple bridges. */
2993 if (netif_is_bridge_master(upper_dev
) &&
2994 !mlxsw_sp_master_bridge_check(mlxsw_sp
, upper_dev
))
2996 if (netif_is_lag_master(upper_dev
) &&
2997 !mlxsw_sp_master_lag_check(mlxsw_sp
, upper_dev
,
3000 if (netif_is_lag_master(upper_dev
) && vlan_uses_dev(dev
))
3002 if (netif_is_lag_port(dev
) && is_vlan_dev(upper_dev
) &&
3003 !netif_is_lag_master(vlan_dev_real_dev(upper_dev
)))
3006 case NETDEV_CHANGEUPPER
:
3007 upper_dev
= info
->upper_dev
;
3008 if (is_vlan_dev(upper_dev
)) {
3010 err
= mlxsw_sp_port_vlan_link(mlxsw_sp_port
,
3013 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port
,
3015 } else if (netif_is_bridge_master(upper_dev
)) {
3017 err
= mlxsw_sp_port_bridge_join(mlxsw_sp_port
,
3020 mlxsw_sp_port_bridge_leave(mlxsw_sp_port
);
3021 } else if (netif_is_lag_master(upper_dev
)) {
3023 err
= mlxsw_sp_port_lag_join(mlxsw_sp_port
,
3026 mlxsw_sp_port_lag_leave(mlxsw_sp_port
,
3038 static int mlxsw_sp_netdevice_port_lower_event(struct net_device
*dev
,
3039 unsigned long event
, void *ptr
)
3041 struct netdev_notifier_changelowerstate_info
*info
;
3042 struct mlxsw_sp_port
*mlxsw_sp_port
;
3045 mlxsw_sp_port
= netdev_priv(dev
);
3049 case NETDEV_CHANGELOWERSTATE
:
3050 if (netif_is_lag_port(dev
) && mlxsw_sp_port
->lagged
) {
3051 err
= mlxsw_sp_port_lag_changed(mlxsw_sp_port
,
3052 info
->lower_state_info
);
3054 netdev_err(dev
, "Failed to reflect link aggregation lower state change\n");
3062 static int mlxsw_sp_netdevice_port_event(struct net_device
*dev
,
3063 unsigned long event
, void *ptr
)
3066 case NETDEV_PRECHANGEUPPER
:
3067 case NETDEV_CHANGEUPPER
:
3068 return mlxsw_sp_netdevice_port_upper_event(dev
, event
, ptr
);
3069 case NETDEV_CHANGELOWERSTATE
:
3070 return mlxsw_sp_netdevice_port_lower_event(dev
, event
, ptr
);
3076 static int mlxsw_sp_netdevice_lag_event(struct net_device
*lag_dev
,
3077 unsigned long event
, void *ptr
)
3079 struct net_device
*dev
;
3080 struct list_head
*iter
;
3083 netdev_for_each_lower_dev(lag_dev
, dev
, iter
) {
3084 if (mlxsw_sp_port_dev_check(dev
)) {
3085 ret
= mlxsw_sp_netdevice_port_event(dev
, event
, ptr
);
3094 static struct mlxsw_sp_fid
*
3095 mlxsw_sp_br_vfid_find(const struct mlxsw_sp
*mlxsw_sp
,
3096 const struct net_device
*br_dev
)
3098 struct mlxsw_sp_fid
*f
;
3100 list_for_each_entry(f
, &mlxsw_sp
->br_vfids
.list
, list
) {
3101 if (f
->dev
== br_dev
)
3108 static u16
mlxsw_sp_vfid_to_br_vfid(u16 vfid
)
3110 return vfid
- MLXSW_SP_VFID_PORT_MAX
;
3113 static u16
mlxsw_sp_br_vfid_to_vfid(u16 br_vfid
)
3115 return MLXSW_SP_VFID_PORT_MAX
+ br_vfid
;
3118 static u16
mlxsw_sp_avail_br_vfid_get(const struct mlxsw_sp
*mlxsw_sp
)
3120 return find_first_zero_bit(mlxsw_sp
->br_vfids
.mapped
,
3121 MLXSW_SP_VFID_BR_MAX
);
3124 static void mlxsw_sp_vport_br_vfid_leave(struct mlxsw_sp_port
*mlxsw_sp_vport
);
3126 static struct mlxsw_sp_fid
*mlxsw_sp_br_vfid_create(struct mlxsw_sp
*mlxsw_sp
,
3127 struct net_device
*br_dev
)
3129 struct device
*dev
= mlxsw_sp
->bus_info
->dev
;
3130 struct mlxsw_sp_fid
*f
;
3134 vfid
= mlxsw_sp_br_vfid_to_vfid(mlxsw_sp_avail_br_vfid_get(mlxsw_sp
));
3135 if (vfid
== MLXSW_SP_VFID_MAX
) {
3136 dev_err(dev
, "No available vFIDs\n");
3137 return ERR_PTR(-ERANGE
);
3140 fid
= mlxsw_sp_vfid_to_fid(vfid
);
3141 err
= mlxsw_sp_vfid_op(mlxsw_sp
, fid
, true);
3143 dev_err(dev
, "Failed to create FID=%d\n", fid
);
3144 return ERR_PTR(err
);
3147 f
= kzalloc(sizeof(*f
), GFP_KERNEL
);
3149 goto err_allocate_vfid
;
3151 f
->leave
= mlxsw_sp_vport_br_vfid_leave
;
3155 list_add(&f
->list
, &mlxsw_sp
->br_vfids
.list
);
3156 set_bit(mlxsw_sp_vfid_to_br_vfid(vfid
), mlxsw_sp
->br_vfids
.mapped
);
3161 mlxsw_sp_vfid_op(mlxsw_sp
, fid
, false);
3162 return ERR_PTR(-ENOMEM
);
3165 static void mlxsw_sp_br_vfid_destroy(struct mlxsw_sp
*mlxsw_sp
,
3166 struct mlxsw_sp_fid
*f
)
3168 u16 vfid
= mlxsw_sp_fid_to_vfid(f
->fid
);
3169 u16 br_vfid
= mlxsw_sp_vfid_to_br_vfid(vfid
);
3171 clear_bit(br_vfid
, mlxsw_sp
->br_vfids
.mapped
);
3174 mlxsw_sp_vfid_op(mlxsw_sp
, f
->fid
, false);
3179 static int mlxsw_sp_vport_br_vfid_join(struct mlxsw_sp_port
*mlxsw_sp_vport
,
3180 struct net_device
*br_dev
)
3182 struct mlxsw_sp_fid
*f
;
3185 f
= mlxsw_sp_br_vfid_find(mlxsw_sp_vport
->mlxsw_sp
, br_dev
);
3187 f
= mlxsw_sp_br_vfid_create(mlxsw_sp_vport
->mlxsw_sp
, br_dev
);
3192 err
= mlxsw_sp_vport_flood_set(mlxsw_sp_vport
, f
->fid
, true);
3194 goto err_vport_flood_set
;
3196 err
= mlxsw_sp_vport_fid_map(mlxsw_sp_vport
, f
->fid
, true);
3198 goto err_vport_fid_map
;
3200 mlxsw_sp_vport_fid_set(mlxsw_sp_vport
, f
);
3203 netdev_dbg(mlxsw_sp_vport
->dev
, "Joined FID=%d\n", f
->fid
);
3208 mlxsw_sp_vport_flood_set(mlxsw_sp_vport
, f
->fid
, false);
3209 err_vport_flood_set
:
3211 mlxsw_sp_br_vfid_destroy(mlxsw_sp_vport
->mlxsw_sp
, f
);
3215 static void mlxsw_sp_vport_br_vfid_leave(struct mlxsw_sp_port
*mlxsw_sp_vport
)
3217 struct mlxsw_sp_fid
*f
= mlxsw_sp_vport_fid_get(mlxsw_sp_vport
);
3219 netdev_dbg(mlxsw_sp_vport
->dev
, "Left FID=%d\n", f
->fid
);
3221 mlxsw_sp_vport_fid_map(mlxsw_sp_vport
, f
->fid
, false);
3223 mlxsw_sp_vport_flood_set(mlxsw_sp_vport
, f
->fid
, false);
3225 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport
, f
->fid
);
3227 mlxsw_sp_vport_fid_set(mlxsw_sp_vport
, NULL
);
3228 if (--f
->ref_count
== 0)
3229 mlxsw_sp_br_vfid_destroy(mlxsw_sp_vport
->mlxsw_sp
, f
);
3232 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port
*mlxsw_sp_vport
,
3233 struct net_device
*br_dev
)
3235 u16 vid
= mlxsw_sp_vport_vid_get(mlxsw_sp_vport
);
3236 struct net_device
*dev
= mlxsw_sp_vport
->dev
;
3239 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport
);
3241 err
= mlxsw_sp_vport_br_vfid_join(mlxsw_sp_vport
, br_dev
);
3243 netdev_err(dev
, "Failed to join vFID\n");
3244 goto err_vport_br_vfid_join
;
3247 err
= mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport
, vid
, true);
3249 netdev_err(dev
, "Failed to enable learning\n");
3250 goto err_port_vid_learning_set
;
3253 mlxsw_sp_vport
->learning
= 1;
3254 mlxsw_sp_vport
->learning_sync
= 1;
3255 mlxsw_sp_vport
->uc_flood
= 1;
3256 mlxsw_sp_vport
->bridged
= 1;
3260 err_port_vid_learning_set
:
3261 mlxsw_sp_vport_br_vfid_leave(mlxsw_sp_vport
);
3262 err_vport_br_vfid_join
:
3263 mlxsw_sp_vport_vfid_join(mlxsw_sp_vport
);
3267 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port
*mlxsw_sp_vport
)
3269 u16 vid
= mlxsw_sp_vport_vid_get(mlxsw_sp_vport
);
3271 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport
, vid
, false);
3273 mlxsw_sp_vport_br_vfid_leave(mlxsw_sp_vport
);
3275 mlxsw_sp_vport_vfid_join(mlxsw_sp_vport
);
3277 mlxsw_sp_port_stp_state_set(mlxsw_sp_vport
, vid
,
3278 MLXSW_REG_SPMS_STATE_FORWARDING
);
3280 mlxsw_sp_vport
->learning
= 0;
3281 mlxsw_sp_vport
->learning_sync
= 0;
3282 mlxsw_sp_vport
->uc_flood
= 0;
3283 mlxsw_sp_vport
->bridged
= 0;
3287 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port
*mlxsw_sp_port
,
3288 const struct net_device
*br_dev
)
3290 struct mlxsw_sp_port
*mlxsw_sp_vport
;
3292 list_for_each_entry(mlxsw_sp_vport
, &mlxsw_sp_port
->vports_list
,
3294 struct net_device
*dev
= mlxsw_sp_vport_br_get(mlxsw_sp_vport
);
3296 if (dev
&& dev
== br_dev
)
3303 static int mlxsw_sp_netdevice_vport_event(struct net_device
*dev
,
3304 unsigned long event
, void *ptr
,
3307 struct mlxsw_sp_port
*mlxsw_sp_port
= netdev_priv(dev
);
3308 struct netdev_notifier_changeupper_info
*info
= ptr
;
3309 struct mlxsw_sp_port
*mlxsw_sp_vport
;
3310 struct net_device
*upper_dev
;
3313 mlxsw_sp_vport
= mlxsw_sp_port_vport_find(mlxsw_sp_port
, vid
);
3316 case NETDEV_PRECHANGEUPPER
:
3317 upper_dev
= info
->upper_dev
;
3318 if (!netif_is_bridge_master(upper_dev
))
3322 /* We can't have multiple VLAN interfaces configured on
3323 * the same port and being members in the same bridge.
3325 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port
,
3329 case NETDEV_CHANGEUPPER
:
3330 upper_dev
= info
->upper_dev
;
3331 if (info
->linking
) {
3332 if (WARN_ON(!mlxsw_sp_vport
))
3334 err
= mlxsw_sp_vport_bridge_join(mlxsw_sp_vport
,
3337 if (!mlxsw_sp_vport
)
3339 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport
);
3346 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device
*lag_dev
,
3347 unsigned long event
, void *ptr
,
3350 struct net_device
*dev
;
3351 struct list_head
*iter
;
3354 netdev_for_each_lower_dev(lag_dev
, dev
, iter
) {
3355 if (mlxsw_sp_port_dev_check(dev
)) {
3356 ret
= mlxsw_sp_netdevice_vport_event(dev
, event
, ptr
,
3366 static int mlxsw_sp_netdevice_vlan_event(struct net_device
*vlan_dev
,
3367 unsigned long event
, void *ptr
)
3369 struct net_device
*real_dev
= vlan_dev_real_dev(vlan_dev
);
3370 u16 vid
= vlan_dev_vlan_id(vlan_dev
);
3372 if (mlxsw_sp_port_dev_check(real_dev
))
3373 return mlxsw_sp_netdevice_vport_event(real_dev
, event
, ptr
,
3375 else if (netif_is_lag_master(real_dev
))
3376 return mlxsw_sp_netdevice_lag_vport_event(real_dev
, event
, ptr
,
3382 static int mlxsw_sp_netdevice_event(struct notifier_block
*unused
,
3383 unsigned long event
, void *ptr
)
3385 struct net_device
*dev
= netdev_notifier_info_to_dev(ptr
);
3388 if (mlxsw_sp_port_dev_check(dev
))
3389 err
= mlxsw_sp_netdevice_port_event(dev
, event
, ptr
);
3390 else if (netif_is_lag_master(dev
))
3391 err
= mlxsw_sp_netdevice_lag_event(dev
, event
, ptr
);
3392 else if (is_vlan_dev(dev
))
3393 err
= mlxsw_sp_netdevice_vlan_event(dev
, event
, ptr
);
3395 return notifier_from_errno(err
);
3398 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly
= {
3399 .notifier_call
= mlxsw_sp_netdevice_event
,
3402 static int __init
mlxsw_sp_module_init(void)
3406 register_netdevice_notifier(&mlxsw_sp_netdevice_nb
);
3407 err
= mlxsw_core_driver_register(&mlxsw_sp_driver
);
3409 goto err_core_driver_register
;
3412 err_core_driver_register
:
3413 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb
);
3417 static void __exit
mlxsw_sp_module_exit(void)
3419 mlxsw_core_driver_unregister(&mlxsw_sp_driver
);
3420 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb
);
3423 module_init(mlxsw_sp_module_init
);
3424 module_exit(mlxsw_sp_module_exit
);
3426 MODULE_LICENSE("Dual BSD/GPL");
3427 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3428 MODULE_DESCRIPTION("Mellanox Spectrum driver");
3429 MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM
);