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Merge tag 'drm-fixes-for-v4.15-rc5' of git://people.freedesktop.org/~airlied/linux
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / phy / marvell.c
1 /*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
31 #include <linux/mm.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
37 #include <linux/of.h>
38
39 #include <linux/io.h>
40 #include <asm/irq.h>
41 #include <linux/uaccess.h>
42
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
50
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
53
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
57
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
73
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
82
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
87
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
99 #define MII_88E1318S_PHY_MSCR1_REG 16
100 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
101
102 /* Copper Specific Interrupt Enable Register */
103 #define MII_88E1318S_PHY_CSIER 0x12
104 /* WOL Event Interrupt Enable */
105 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
106
107 /* LED Timer Control Register */
108 #define MII_88E1318S_PHY_LED_TCR 0x12
109 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
110 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
111 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
112
113 /* Magic Packet MAC address registers */
114 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
115 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
116 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
117
118 #define MII_88E1318S_PHY_WOL_CTRL 0x10
119 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
120 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
121
122 #define MII_88E1121_PHY_LED_CTRL 16
123 #define MII_88E1121_PHY_LED_DEF 0x0030
124
125 #define MII_M1011_PHY_STATUS 0x11
126 #define MII_M1011_PHY_STATUS_1000 0x8000
127 #define MII_M1011_PHY_STATUS_100 0x4000
128 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
129 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
130 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
131 #define MII_M1011_PHY_STATUS_LINK 0x0400
132
133 #define MII_88E3016_PHY_SPEC_CTRL 0x10
134 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
135 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
136
137 #define MII_88E1510_GEN_CTRL_REG_1 0x14
138 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
139 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
140 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
141
142 #define LPA_FIBER_1000HALF 0x40
143 #define LPA_FIBER_1000FULL 0x20
144
145 #define LPA_PAUSE_FIBER 0x180
146 #define LPA_PAUSE_ASYM_FIBER 0x100
147
148 #define ADVERTISE_FIBER_1000HALF 0x40
149 #define ADVERTISE_FIBER_1000FULL 0x20
150
151 #define ADVERTISE_PAUSE_FIBER 0x180
152 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
153
154 #define REGISTER_LINK_STATUS 0x400
155 #define NB_FIBER_STATS 1
156
157 MODULE_DESCRIPTION("Marvell PHY driver");
158 MODULE_AUTHOR("Andy Fleming");
159 MODULE_LICENSE("GPL");
160
161 struct marvell_hw_stat {
162 const char *string;
163 u8 page;
164 u8 reg;
165 u8 bits;
166 };
167
168 static struct marvell_hw_stat marvell_hw_stats[] = {
169 { "phy_receive_errors_copper", 0, 21, 16},
170 { "phy_idle_errors", 0, 10, 8 },
171 { "phy_receive_errors_fiber", 1, 21, 16},
172 };
173
174 struct marvell_priv {
175 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
176 char *hwmon_name;
177 struct device *hwmon_dev;
178 };
179
180 static int marvell_get_page(struct phy_device *phydev)
181 {
182 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
183 }
184
185 static int marvell_set_page(struct phy_device *phydev, int page)
186 {
187 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
188 }
189
190 static int marvell_get_set_page(struct phy_device *phydev, int page)
191 {
192 int oldpage = marvell_get_page(phydev);
193
194 if (oldpage < 0)
195 return oldpage;
196
197 if (page != oldpage)
198 return marvell_set_page(phydev, page);
199
200 return 0;
201 }
202
203 static int marvell_ack_interrupt(struct phy_device *phydev)
204 {
205 int err;
206
207 /* Clear the interrupts by reading the reg */
208 err = phy_read(phydev, MII_M1011_IEVENT);
209
210 if (err < 0)
211 return err;
212
213 return 0;
214 }
215
216 static int marvell_config_intr(struct phy_device *phydev)
217 {
218 int err;
219
220 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
221 err = phy_write(phydev, MII_M1011_IMASK,
222 MII_M1011_IMASK_INIT);
223 else
224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_CLEAR);
226
227 return err;
228 }
229
230 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
231 {
232 int reg;
233 int err;
234 int val;
235
236 /* get the current settings */
237 reg = phy_read(phydev, MII_M1011_PHY_SCR);
238 if (reg < 0)
239 return reg;
240
241 val = reg;
242 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
243 switch (polarity) {
244 case ETH_TP_MDI:
245 val |= MII_M1011_PHY_SCR_MDI;
246 break;
247 case ETH_TP_MDI_X:
248 val |= MII_M1011_PHY_SCR_MDI_X;
249 break;
250 case ETH_TP_MDI_AUTO:
251 case ETH_TP_MDI_INVALID:
252 default:
253 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
254 break;
255 }
256
257 if (val != reg) {
258 /* Set the new polarity value in the register */
259 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
260 if (err)
261 return err;
262 }
263
264 return 0;
265 }
266
267 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
268 u8 retries)
269 {
270 int reg;
271
272 reg = phy_read(phydev, MII_M1011_PHY_SCR);
273 if (reg < 0)
274 return reg;
275
276 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
277 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
278 if (enable)
279 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
280
281 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
282 }
283
284 static int marvell_config_aneg(struct phy_device *phydev)
285 {
286 int err;
287
288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
289 if (err < 0)
290 return err;
291
292 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
293 MII_M1111_PHY_LED_DIRECT);
294 if (err < 0)
295 return err;
296
297 err = genphy_config_aneg(phydev);
298 if (err < 0)
299 return err;
300
301 if (phydev->autoneg != AUTONEG_ENABLE) {
302 /* A write to speed/duplex bits (that is performed by
303 * genphy_config_aneg() call above) must be followed by
304 * a software reset. Otherwise, the write has no effect.
305 */
306 err = genphy_soft_reset(phydev);
307 if (err < 0)
308 return err;
309 }
310
311 return 0;
312 }
313
314 static int m88e1101_config_aneg(struct phy_device *phydev)
315 {
316 int err;
317
318 /* This Marvell PHY has an errata which requires
319 * that certain registers get written in order
320 * to restart autonegotiation
321 */
322 err = genphy_soft_reset(phydev);
323 if (err < 0)
324 return err;
325
326 err = phy_write(phydev, 0x1d, 0x1f);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1e, 0x200c);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1d, 0x5);
335 if (err < 0)
336 return err;
337
338 err = phy_write(phydev, 0x1e, 0);
339 if (err < 0)
340 return err;
341
342 err = phy_write(phydev, 0x1e, 0x100);
343 if (err < 0)
344 return err;
345
346 return marvell_config_aneg(phydev);
347 }
348
349 static int m88e1111_config_aneg(struct phy_device *phydev)
350 {
351 int err;
352
353 /* The Marvell PHY has an errata which requires
354 * that certain registers get written in order
355 * to restart autonegotiation
356 */
357 err = genphy_soft_reset(phydev);
358
359 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
360 if (err < 0)
361 return err;
362
363 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
364 MII_M1111_PHY_LED_DIRECT);
365 if (err < 0)
366 return err;
367
368 err = genphy_config_aneg(phydev);
369 if (err < 0)
370 return err;
371
372 if (phydev->autoneg != AUTONEG_ENABLE) {
373 /* A write to speed/duplex bits (that is performed by
374 * genphy_config_aneg() call above) must be followed by
375 * a software reset. Otherwise, the write has no effect.
376 */
377 err = genphy_soft_reset(phydev);
378 if (err < 0)
379 return err;
380 }
381
382 return 0;
383 }
384
385 #ifdef CONFIG_OF_MDIO
386 /* Set and/or override some configuration registers based on the
387 * marvell,reg-init property stored in the of_node for the phydev.
388 *
389 * marvell,reg-init = <reg-page reg mask value>,...;
390 *
391 * There may be one or more sets of <reg-page reg mask value>:
392 *
393 * reg-page: which register bank to use.
394 * reg: the register.
395 * mask: if non-zero, ANDed with existing register value.
396 * value: ORed with the masked value and written to the regiser.
397 *
398 */
399 static int marvell_of_reg_init(struct phy_device *phydev)
400 {
401 const __be32 *paddr;
402 int len, i, saved_page, current_page, ret;
403
404 if (!phydev->mdio.dev.of_node)
405 return 0;
406
407 paddr = of_get_property(phydev->mdio.dev.of_node,
408 "marvell,reg-init", &len);
409 if (!paddr || len < (4 * sizeof(*paddr)))
410 return 0;
411
412 saved_page = marvell_get_page(phydev);
413 if (saved_page < 0)
414 return saved_page;
415 current_page = saved_page;
416
417 ret = 0;
418 len /= sizeof(*paddr);
419 for (i = 0; i < len - 3; i += 4) {
420 u16 page = be32_to_cpup(paddr + i);
421 u16 reg = be32_to_cpup(paddr + i + 1);
422 u16 mask = be32_to_cpup(paddr + i + 2);
423 u16 val_bits = be32_to_cpup(paddr + i + 3);
424 int val;
425
426 if (page != current_page) {
427 current_page = page;
428 ret = marvell_set_page(phydev, page);
429 if (ret < 0)
430 goto err;
431 }
432
433 val = 0;
434 if (mask) {
435 val = phy_read(phydev, reg);
436 if (val < 0) {
437 ret = val;
438 goto err;
439 }
440 val &= mask;
441 }
442 val |= val_bits;
443
444 ret = phy_write(phydev, reg, val);
445 if (ret < 0)
446 goto err;
447 }
448 err:
449 if (current_page != saved_page) {
450 i = marvell_set_page(phydev, saved_page);
451 if (ret == 0)
452 ret = i;
453 }
454 return ret;
455 }
456 #else
457 static int marvell_of_reg_init(struct phy_device *phydev)
458 {
459 return 0;
460 }
461 #endif /* CONFIG_OF_MDIO */
462
463 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
464 {
465 int err, oldpage, mscr;
466
467 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
468 if (oldpage < 0)
469 return oldpage;
470
471 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG);
472 if (mscr < 0) {
473 err = mscr;
474 goto out;
475 }
476
477 mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK;
478
479 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
480 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
481 MII_88E1121_PHY_MSCR_TX_DELAY);
482 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
483 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
484 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
485 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
486
487 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
488
489 out:
490 marvell_set_page(phydev, oldpage);
491
492 return err;
493 }
494
495 static int m88e1121_config_aneg(struct phy_device *phydev)
496 {
497 int err = 0;
498
499 if (phy_interface_is_rgmii(phydev)) {
500 err = m88e1121_config_aneg_rgmii_delays(phydev);
501 if (err)
502 return err;
503 }
504
505 err = genphy_soft_reset(phydev);
506 if (err < 0)
507 return err;
508
509 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
510 if (err < 0)
511 return err;
512
513 return genphy_config_aneg(phydev);
514 }
515
516 static int m88e1318_config_aneg(struct phy_device *phydev)
517 {
518 int err, oldpage, mscr;
519
520 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
521 if (oldpage < 0)
522 return oldpage;
523
524 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
525 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
526
527 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
528 if (err < 0)
529 return err;
530
531 err = marvell_set_page(phydev, oldpage);
532 if (err < 0)
533 return err;
534
535 return m88e1121_config_aneg(phydev);
536 }
537
538 /**
539 * ethtool_adv_to_fiber_adv_t
540 * @ethadv: the ethtool advertisement settings
541 *
542 * A small helper function that translates ethtool advertisement
543 * settings to phy autonegotiation advertisements for the
544 * MII_ADV register for fiber link.
545 */
546 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
547 {
548 u32 result = 0;
549
550 if (ethadv & ADVERTISED_1000baseT_Half)
551 result |= ADVERTISE_FIBER_1000HALF;
552 if (ethadv & ADVERTISED_1000baseT_Full)
553 result |= ADVERTISE_FIBER_1000FULL;
554
555 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
556 result |= LPA_PAUSE_ASYM_FIBER;
557 else if (ethadv & ADVERTISE_PAUSE_CAP)
558 result |= (ADVERTISE_PAUSE_FIBER
559 & (~ADVERTISE_PAUSE_ASYM_FIBER));
560
561 return result;
562 }
563
564 /**
565 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
566 * @phydev: target phy_device struct
567 *
568 * Description: If auto-negotiation is enabled, we configure the
569 * advertising, and then restart auto-negotiation. If it is not
570 * enabled, then we write the BMCR. Adapted for fiber link in
571 * some Marvell's devices.
572 */
573 static int marvell_config_aneg_fiber(struct phy_device *phydev)
574 {
575 int changed = 0;
576 int err;
577 int adv, oldadv;
578 u32 advertise;
579
580 if (phydev->autoneg != AUTONEG_ENABLE)
581 return genphy_setup_forced(phydev);
582
583 /* Only allow advertising what this PHY supports */
584 phydev->advertising &= phydev->supported;
585 advertise = phydev->advertising;
586
587 /* Setup fiber advertisement */
588 adv = phy_read(phydev, MII_ADVERTISE);
589 if (adv < 0)
590 return adv;
591
592 oldadv = adv;
593 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
594 | LPA_PAUSE_FIBER);
595 adv |= ethtool_adv_to_fiber_adv_t(advertise);
596
597 if (adv != oldadv) {
598 err = phy_write(phydev, MII_ADVERTISE, adv);
599 if (err < 0)
600 return err;
601
602 changed = 1;
603 }
604
605 if (changed == 0) {
606 /* Advertisement hasn't changed, but maybe aneg was never on to
607 * begin with? Or maybe phy was isolated?
608 */
609 int ctl = phy_read(phydev, MII_BMCR);
610
611 if (ctl < 0)
612 return ctl;
613
614 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
615 changed = 1; /* do restart aneg */
616 }
617
618 /* Only restart aneg if we are advertising something different
619 * than we were before.
620 */
621 if (changed > 0)
622 changed = genphy_restart_aneg(phydev);
623
624 return changed;
625 }
626
627 static int m88e1510_config_aneg(struct phy_device *phydev)
628 {
629 int err;
630
631 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
632 if (err < 0)
633 goto error;
634
635 /* Configure the copper link first */
636 err = m88e1318_config_aneg(phydev);
637 if (err < 0)
638 goto error;
639
640 /* Do not touch the fiber page if we're in copper->sgmii mode */
641 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
642 return 0;
643
644 /* Then the fiber link */
645 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
646 if (err < 0)
647 goto error;
648
649 err = marvell_config_aneg_fiber(phydev);
650 if (err < 0)
651 goto error;
652
653 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
654
655 error:
656 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
657 return err;
658 }
659
660 static int marvell_config_init(struct phy_device *phydev)
661 {
662 /* Set registers from marvell,reg-init DT property */
663 return marvell_of_reg_init(phydev);
664 }
665
666 static int m88e1116r_config_init(struct phy_device *phydev)
667 {
668 int err;
669
670 err = genphy_soft_reset(phydev);
671 if (err < 0)
672 return err;
673
674 mdelay(500);
675
676 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
677 if (err < 0)
678 return err;
679
680 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
681 if (err < 0)
682 return err;
683
684 err = marvell_set_downshift(phydev, true, 8);
685 if (err < 0)
686 return err;
687
688 if (phy_interface_is_rgmii(phydev)) {
689 err = m88e1121_config_aneg_rgmii_delays(phydev);
690 if (err < 0)
691 return err;
692 }
693
694 err = genphy_soft_reset(phydev);
695 if (err < 0)
696 return err;
697
698 return marvell_config_init(phydev);
699 }
700
701 static int m88e3016_config_init(struct phy_device *phydev)
702 {
703 int reg;
704
705 /* Enable Scrambler and Auto-Crossover */
706 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
707 if (reg < 0)
708 return reg;
709
710 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
711 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
712
713 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
714 if (reg < 0)
715 return reg;
716
717 return marvell_config_init(phydev);
718 }
719
720 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
721 u16 mode,
722 int fibre_copper_auto)
723 {
724 int temp;
725
726 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
727 if (temp < 0)
728 return temp;
729
730 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
731 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
732 MII_M1111_HWCFG_FIBER_COPPER_RES);
733 temp |= mode;
734
735 if (fibre_copper_auto)
736 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
737
738 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
739 }
740
741 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
742 {
743 int temp;
744
745 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
746 if (temp < 0)
747 return temp;
748
749 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
750 temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY);
751 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
752 temp &= ~MII_M1111_RGMII_TX_DELAY;
753 temp |= MII_M1111_RGMII_RX_DELAY;
754 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
755 temp &= ~MII_M1111_RGMII_RX_DELAY;
756 temp |= MII_M1111_RGMII_TX_DELAY;
757 }
758
759 return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
760 }
761
762 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
763 {
764 int temp;
765 int err;
766
767 err = m88e1111_config_init_rgmii_delays(phydev);
768 if (err < 0)
769 return err;
770
771 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
772 if (temp < 0)
773 return temp;
774
775 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
776
777 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
778 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
779 else
780 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
781
782 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
783 }
784
785 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
786 {
787 int err;
788
789 err = m88e1111_config_init_hwcfg_mode(
790 phydev,
791 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
792 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
793 if (err < 0)
794 return err;
795
796 /* make sure copper is selected */
797 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
798 }
799
800 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
801 {
802 int err;
803
804 err = m88e1111_config_init_rgmii_delays(phydev);
805 if (err)
806 return err;
807
808 err = m88e1111_config_init_hwcfg_mode(
809 phydev,
810 MII_M1111_HWCFG_MODE_RTBI,
811 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
812 if (err < 0)
813 return err;
814
815 /* soft reset */
816 err = genphy_soft_reset(phydev);
817 if (err < 0)
818 return err;
819
820 return m88e1111_config_init_hwcfg_mode(
821 phydev,
822 MII_M1111_HWCFG_MODE_RTBI,
823 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
824 }
825
826 static int m88e1111_config_init(struct phy_device *phydev)
827 {
828 int err;
829
830 if (phy_interface_is_rgmii(phydev)) {
831 err = m88e1111_config_init_rgmii(phydev);
832 if (err)
833 return err;
834 }
835
836 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
837 err = m88e1111_config_init_sgmii(phydev);
838 if (err < 0)
839 return err;
840 }
841
842 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
843 err = m88e1111_config_init_rtbi(phydev);
844 if (err < 0)
845 return err;
846 }
847
848 err = marvell_of_reg_init(phydev);
849 if (err < 0)
850 return err;
851
852 return genphy_soft_reset(phydev);
853 }
854
855 static int m88e1121_config_init(struct phy_device *phydev)
856 {
857 int err, oldpage;
858
859 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
860 if (oldpage < 0)
861 return oldpage;
862
863 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
864 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
865 MII_88E1121_PHY_LED_DEF);
866 if (err < 0)
867 return err;
868
869 marvell_set_page(phydev, oldpage);
870
871 /* Set marvell,reg-init configuration from device tree */
872 return marvell_config_init(phydev);
873 }
874
875 static int m88e1510_config_init(struct phy_device *phydev)
876 {
877 int err;
878 int temp;
879
880 /* SGMII-to-Copper mode initialization */
881 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
882 u32 pause;
883
884 /* Select page 18 */
885 err = marvell_set_page(phydev, 18);
886 if (err < 0)
887 return err;
888
889 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
890 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
891 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
892 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
893 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
894 if (err < 0)
895 return err;
896
897 /* PHY reset is necessary after changing MODE[2:0] */
898 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
899 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
900 if (err < 0)
901 return err;
902
903 /* Reset page selection */
904 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
905 if (err < 0)
906 return err;
907
908 /* There appears to be a bug in the 88e1512 when used in
909 * SGMII to copper mode, where the AN advertisment register
910 * clears the pause bits each time a negotiation occurs.
911 * This means we can never be truely sure what was advertised,
912 * so disable Pause support.
913 */
914 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
915 phydev->supported &= ~pause;
916 phydev->advertising &= ~pause;
917 }
918
919 return m88e1121_config_init(phydev);
920 }
921
922 static int m88e1118_config_aneg(struct phy_device *phydev)
923 {
924 int err;
925
926 err = genphy_soft_reset(phydev);
927 if (err < 0)
928 return err;
929
930 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
931 if (err < 0)
932 return err;
933
934 err = genphy_config_aneg(phydev);
935 return 0;
936 }
937
938 static int m88e1118_config_init(struct phy_device *phydev)
939 {
940 int err;
941
942 /* Change address */
943 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
944 if (err < 0)
945 return err;
946
947 /* Enable 1000 Mbit */
948 err = phy_write(phydev, 0x15, 0x1070);
949 if (err < 0)
950 return err;
951
952 /* Change address */
953 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
954 if (err < 0)
955 return err;
956
957 /* Adjust LED Control */
958 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
959 err = phy_write(phydev, 0x10, 0x1100);
960 else
961 err = phy_write(phydev, 0x10, 0x021e);
962 if (err < 0)
963 return err;
964
965 err = marvell_of_reg_init(phydev);
966 if (err < 0)
967 return err;
968
969 /* Reset address */
970 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
971 if (err < 0)
972 return err;
973
974 return genphy_soft_reset(phydev);
975 }
976
977 static int m88e1149_config_init(struct phy_device *phydev)
978 {
979 int err;
980
981 /* Change address */
982 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
983 if (err < 0)
984 return err;
985
986 /* Enable 1000 Mbit */
987 err = phy_write(phydev, 0x15, 0x1048);
988 if (err < 0)
989 return err;
990
991 err = marvell_of_reg_init(phydev);
992 if (err < 0)
993 return err;
994
995 /* Reset address */
996 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
997 if (err < 0)
998 return err;
999
1000 return genphy_soft_reset(phydev);
1001 }
1002
1003 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1004 {
1005 int temp;
1006 int err;
1007
1008 err = m88e1111_config_init_rgmii_delays(phydev);
1009 if (err < 0)
1010 return err;
1011
1012 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1013 err = phy_write(phydev, 0x1d, 0x0012);
1014 if (err < 0)
1015 return err;
1016
1017 temp = phy_read(phydev, 0x1e);
1018 if (temp < 0)
1019 return temp;
1020
1021 temp &= 0xf03f;
1022 temp |= 2 << 9; /* 36 ohm */
1023 temp |= 2 << 6; /* 39 ohm */
1024
1025 err = phy_write(phydev, 0x1e, temp);
1026 if (err < 0)
1027 return err;
1028
1029 err = phy_write(phydev, 0x1d, 0x3);
1030 if (err < 0)
1031 return err;
1032
1033 err = phy_write(phydev, 0x1e, 0x8000);
1034 }
1035 return err;
1036 }
1037
1038 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1039 {
1040 return m88e1111_config_init_hwcfg_mode(
1041 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1042 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1043 }
1044
1045 static int m88e1145_config_init(struct phy_device *phydev)
1046 {
1047 int err;
1048
1049 /* Take care of errata E0 & E1 */
1050 err = phy_write(phydev, 0x1d, 0x001b);
1051 if (err < 0)
1052 return err;
1053
1054 err = phy_write(phydev, 0x1e, 0x418f);
1055 if (err < 0)
1056 return err;
1057
1058 err = phy_write(phydev, 0x1d, 0x0016);
1059 if (err < 0)
1060 return err;
1061
1062 err = phy_write(phydev, 0x1e, 0xa2da);
1063 if (err < 0)
1064 return err;
1065
1066 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1067 err = m88e1145_config_init_rgmii(phydev);
1068 if (err < 0)
1069 return err;
1070 }
1071
1072 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1073 err = m88e1145_config_init_sgmii(phydev);
1074 if (err < 0)
1075 return err;
1076 }
1077
1078 err = marvell_of_reg_init(phydev);
1079 if (err < 0)
1080 return err;
1081
1082 return 0;
1083 }
1084
1085 /**
1086 * fiber_lpa_to_ethtool_lpa_t
1087 * @lpa: value of the MII_LPA register for fiber link
1088 *
1089 * A small helper function that translates MII_LPA
1090 * bits to ethtool LP advertisement settings.
1091 */
1092 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1093 {
1094 u32 result = 0;
1095
1096 if (lpa & LPA_FIBER_1000HALF)
1097 result |= ADVERTISED_1000baseT_Half;
1098 if (lpa & LPA_FIBER_1000FULL)
1099 result |= ADVERTISED_1000baseT_Full;
1100
1101 return result;
1102 }
1103
1104 /**
1105 * marvell_update_link - update link status in real time in @phydev
1106 * @phydev: target phy_device struct
1107 *
1108 * Description: Update the value in phydev->link to reflect the
1109 * current link value.
1110 */
1111 static int marvell_update_link(struct phy_device *phydev, int fiber)
1112 {
1113 int status;
1114
1115 /* Use the generic register for copper link, or specific
1116 * register for fiber case
1117 */
1118 if (fiber) {
1119 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1120 if (status < 0)
1121 return status;
1122
1123 if ((status & REGISTER_LINK_STATUS) == 0)
1124 phydev->link = 0;
1125 else
1126 phydev->link = 1;
1127 } else {
1128 return genphy_update_link(phydev);
1129 }
1130
1131 return 0;
1132 }
1133
1134 static int marvell_read_status_page_an(struct phy_device *phydev,
1135 int fiber)
1136 {
1137 int status;
1138 int lpa;
1139 int lpagb;
1140
1141 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1142 if (status < 0)
1143 return status;
1144
1145 lpa = phy_read(phydev, MII_LPA);
1146 if (lpa < 0)
1147 return lpa;
1148
1149 lpagb = phy_read(phydev, MII_STAT1000);
1150 if (lpagb < 0)
1151 return lpagb;
1152
1153 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1154 phydev->duplex = DUPLEX_FULL;
1155 else
1156 phydev->duplex = DUPLEX_HALF;
1157
1158 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1159 phydev->pause = 0;
1160 phydev->asym_pause = 0;
1161
1162 switch (status) {
1163 case MII_M1011_PHY_STATUS_1000:
1164 phydev->speed = SPEED_1000;
1165 break;
1166
1167 case MII_M1011_PHY_STATUS_100:
1168 phydev->speed = SPEED_100;
1169 break;
1170
1171 default:
1172 phydev->speed = SPEED_10;
1173 break;
1174 }
1175
1176 if (!fiber) {
1177 phydev->lp_advertising =
1178 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1179 mii_lpa_to_ethtool_lpa_t(lpa);
1180
1181 if (phydev->duplex == DUPLEX_FULL) {
1182 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1183 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1184 }
1185 } else {
1186 /* The fiber link is only 1000M capable */
1187 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1188
1189 if (phydev->duplex == DUPLEX_FULL) {
1190 if (!(lpa & LPA_PAUSE_FIBER)) {
1191 phydev->pause = 0;
1192 phydev->asym_pause = 0;
1193 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1194 phydev->pause = 1;
1195 phydev->asym_pause = 1;
1196 } else {
1197 phydev->pause = 1;
1198 phydev->asym_pause = 0;
1199 }
1200 }
1201 }
1202 return 0;
1203 }
1204
1205 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1206 {
1207 int bmcr = phy_read(phydev, MII_BMCR);
1208
1209 if (bmcr < 0)
1210 return bmcr;
1211
1212 if (bmcr & BMCR_FULLDPLX)
1213 phydev->duplex = DUPLEX_FULL;
1214 else
1215 phydev->duplex = DUPLEX_HALF;
1216
1217 if (bmcr & BMCR_SPEED1000)
1218 phydev->speed = SPEED_1000;
1219 else if (bmcr & BMCR_SPEED100)
1220 phydev->speed = SPEED_100;
1221 else
1222 phydev->speed = SPEED_10;
1223
1224 phydev->pause = 0;
1225 phydev->asym_pause = 0;
1226 phydev->lp_advertising = 0;
1227
1228 return 0;
1229 }
1230
1231 /* marvell_read_status_page
1232 *
1233 * Description:
1234 * Check the link, then figure out the current state
1235 * by comparing what we advertise with what the link partner
1236 * advertises. Start by checking the gigabit possibilities,
1237 * then move on to 10/100.
1238 */
1239 static int marvell_read_status_page(struct phy_device *phydev, int page)
1240 {
1241 int fiber;
1242 int err;
1243
1244 /* Detect and update the link, but return if there
1245 * was an error
1246 */
1247 if (page == MII_MARVELL_FIBER_PAGE)
1248 fiber = 1;
1249 else
1250 fiber = 0;
1251
1252 err = marvell_update_link(phydev, fiber);
1253 if (err)
1254 return err;
1255
1256 if (phydev->autoneg == AUTONEG_ENABLE)
1257 err = marvell_read_status_page_an(phydev, fiber);
1258 else
1259 err = marvell_read_status_page_fixed(phydev);
1260
1261 return err;
1262 }
1263
1264 /* marvell_read_status
1265 *
1266 * Some Marvell's phys have two modes: fiber and copper.
1267 * Both need status checked.
1268 * Description:
1269 * First, check the fiber link and status.
1270 * If the fiber link is down, check the copper link and status which
1271 * will be the default value if both link are down.
1272 */
1273 static int marvell_read_status(struct phy_device *phydev)
1274 {
1275 int err;
1276
1277 /* Check the fiber mode first */
1278 if (phydev->supported & SUPPORTED_FIBRE &&
1279 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1280 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1281 if (err < 0)
1282 goto error;
1283
1284 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1285 if (err < 0)
1286 goto error;
1287
1288 /* If the fiber link is up, it is the selected and
1289 * used link. In this case, we need to stay in the
1290 * fiber page. Please to be careful about that, avoid
1291 * to restore Copper page in other functions which
1292 * could break the behaviour for some fiber phy like
1293 * 88E1512.
1294 */
1295 if (phydev->link)
1296 return 0;
1297
1298 /* If fiber link is down, check and save copper mode state */
1299 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1300 if (err < 0)
1301 goto error;
1302 }
1303
1304 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1305
1306 error:
1307 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1308 return err;
1309 }
1310
1311 /* marvell_suspend
1312 *
1313 * Some Marvell's phys have two modes: fiber and copper.
1314 * Both need to be suspended
1315 */
1316 static int marvell_suspend(struct phy_device *phydev)
1317 {
1318 int err;
1319
1320 /* Suspend the fiber mode first */
1321 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1322 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1323 if (err < 0)
1324 goto error;
1325
1326 /* With the page set, use the generic suspend */
1327 err = genphy_suspend(phydev);
1328 if (err < 0)
1329 goto error;
1330
1331 /* Then, the copper link */
1332 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1333 if (err < 0)
1334 goto error;
1335 }
1336
1337 /* With the page set, use the generic suspend */
1338 return genphy_suspend(phydev);
1339
1340 error:
1341 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1342 return err;
1343 }
1344
1345 /* marvell_resume
1346 *
1347 * Some Marvell's phys have two modes: fiber and copper.
1348 * Both need to be resumed
1349 */
1350 static int marvell_resume(struct phy_device *phydev)
1351 {
1352 int err;
1353
1354 /* Resume the fiber mode first */
1355 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1356 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1357 if (err < 0)
1358 goto error;
1359
1360 /* With the page set, use the generic resume */
1361 err = genphy_resume(phydev);
1362 if (err < 0)
1363 goto error;
1364
1365 /* Then, the copper link */
1366 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1367 if (err < 0)
1368 goto error;
1369 }
1370
1371 /* With the page set, use the generic resume */
1372 return genphy_resume(phydev);
1373
1374 error:
1375 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1376 return err;
1377 }
1378
1379 static int marvell_aneg_done(struct phy_device *phydev)
1380 {
1381 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1382
1383 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1384 }
1385
1386 static int m88e1121_did_interrupt(struct phy_device *phydev)
1387 {
1388 int imask;
1389
1390 imask = phy_read(phydev, MII_M1011_IEVENT);
1391
1392 if (imask & MII_M1011_IMASK_INIT)
1393 return 1;
1394
1395 return 0;
1396 }
1397
1398 static void m88e1318_get_wol(struct phy_device *phydev,
1399 struct ethtool_wolinfo *wol)
1400 {
1401 wol->supported = WAKE_MAGIC;
1402 wol->wolopts = 0;
1403
1404 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
1405 return;
1406
1407 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1408 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1409 wol->wolopts |= WAKE_MAGIC;
1410
1411 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
1412 return;
1413 }
1414
1415 static int m88e1318_set_wol(struct phy_device *phydev,
1416 struct ethtool_wolinfo *wol)
1417 {
1418 int err, oldpage, temp;
1419
1420 oldpage = marvell_get_page(phydev);
1421
1422 if (wol->wolopts & WAKE_MAGIC) {
1423 /* Explicitly switch to page 0x00, just to be sure */
1424 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1425 if (err < 0)
1426 return err;
1427
1428 /* Enable the WOL interrupt */
1429 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1430 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1431 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1432 if (err < 0)
1433 return err;
1434
1435 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1436 if (err < 0)
1437 return err;
1438
1439 /* Setup LED[2] as interrupt pin (active low) */
1440 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1441 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1442 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1443 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1444 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1445 if (err < 0)
1446 return err;
1447
1448 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
1449 if (err < 0)
1450 return err;
1451
1452 /* Store the device address for the magic packet */
1453 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1454 ((phydev->attached_dev->dev_addr[5] << 8) |
1455 phydev->attached_dev->dev_addr[4]));
1456 if (err < 0)
1457 return err;
1458 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1459 ((phydev->attached_dev->dev_addr[3] << 8) |
1460 phydev->attached_dev->dev_addr[2]));
1461 if (err < 0)
1462 return err;
1463 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1464 ((phydev->attached_dev->dev_addr[1] << 8) |
1465 phydev->attached_dev->dev_addr[0]));
1466 if (err < 0)
1467 return err;
1468
1469 /* Clear WOL status and enable magic packet matching */
1470 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1471 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1472 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1473 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1474 if (err < 0)
1475 return err;
1476 } else {
1477 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
1478 if (err < 0)
1479 return err;
1480
1481 /* Clear WOL status and disable magic packet matching */
1482 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1483 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1484 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1485 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1486 if (err < 0)
1487 return err;
1488 }
1489
1490 err = marvell_set_page(phydev, oldpage);
1491 if (err < 0)
1492 return err;
1493
1494 return 0;
1495 }
1496
1497 static int marvell_get_sset_count(struct phy_device *phydev)
1498 {
1499 if (phydev->supported & SUPPORTED_FIBRE)
1500 return ARRAY_SIZE(marvell_hw_stats);
1501 else
1502 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1503 }
1504
1505 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1506 {
1507 int i;
1508
1509 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1510 memcpy(data + i * ETH_GSTRING_LEN,
1511 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1512 }
1513 }
1514
1515 #ifndef UINT64_MAX
1516 #define UINT64_MAX (u64)(~((u64)0))
1517 #endif
1518 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1519 {
1520 struct marvell_hw_stat stat = marvell_hw_stats[i];
1521 struct marvell_priv *priv = phydev->priv;
1522 int oldpage, val;
1523 u64 ret;
1524
1525 oldpage = marvell_get_set_page(phydev, stat.page);
1526 if (oldpage < 0)
1527 return UINT64_MAX;
1528
1529 val = phy_read(phydev, stat.reg);
1530 if (val < 0) {
1531 ret = UINT64_MAX;
1532 } else {
1533 val = val & ((1 << stat.bits) - 1);
1534 priv->stats[i] += val;
1535 ret = priv->stats[i];
1536 }
1537
1538 marvell_set_page(phydev, oldpage);
1539
1540 return ret;
1541 }
1542
1543 static void marvell_get_stats(struct phy_device *phydev,
1544 struct ethtool_stats *stats, u64 *data)
1545 {
1546 int i;
1547
1548 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1549 data[i] = marvell_get_stat(phydev, i);
1550 }
1551
1552 #ifdef CONFIG_HWMON
1553 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1554 {
1555 int oldpage;
1556 int ret;
1557 int val;
1558
1559 *temp = 0;
1560
1561 mutex_lock(&phydev->lock);
1562
1563 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1564 if (oldpage < 0) {
1565 mutex_unlock(&phydev->lock);
1566 return oldpage;
1567 }
1568
1569 /* Enable temperature sensor */
1570 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1571 if (ret < 0)
1572 goto error;
1573
1574 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1575 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1576 if (ret < 0)
1577 goto error;
1578
1579 /* Wait for temperature to stabilize */
1580 usleep_range(10000, 12000);
1581
1582 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1583 if (val < 0) {
1584 ret = val;
1585 goto error;
1586 }
1587
1588 /* Disable temperature sensor */
1589 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1590 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1591 if (ret < 0)
1592 goto error;
1593
1594 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1595
1596 error:
1597 marvell_set_page(phydev, oldpage);
1598 mutex_unlock(&phydev->lock);
1599
1600 return ret;
1601 }
1602
1603 static int m88e1121_hwmon_read(struct device *dev,
1604 enum hwmon_sensor_types type,
1605 u32 attr, int channel, long *temp)
1606 {
1607 struct phy_device *phydev = dev_get_drvdata(dev);
1608 int err;
1609
1610 switch (attr) {
1611 case hwmon_temp_input:
1612 err = m88e1121_get_temp(phydev, temp);
1613 break;
1614 default:
1615 return -EOPNOTSUPP;
1616 }
1617
1618 return err;
1619 }
1620
1621 static umode_t m88e1121_hwmon_is_visible(const void *data,
1622 enum hwmon_sensor_types type,
1623 u32 attr, int channel)
1624 {
1625 if (type != hwmon_temp)
1626 return 0;
1627
1628 switch (attr) {
1629 case hwmon_temp_input:
1630 return 0444;
1631 default:
1632 return 0;
1633 }
1634 }
1635
1636 static u32 m88e1121_hwmon_chip_config[] = {
1637 HWMON_C_REGISTER_TZ,
1638 0
1639 };
1640
1641 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1642 .type = hwmon_chip,
1643 .config = m88e1121_hwmon_chip_config,
1644 };
1645
1646 static u32 m88e1121_hwmon_temp_config[] = {
1647 HWMON_T_INPUT,
1648 0
1649 };
1650
1651 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1652 .type = hwmon_temp,
1653 .config = m88e1121_hwmon_temp_config,
1654 };
1655
1656 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1657 &m88e1121_hwmon_chip,
1658 &m88e1121_hwmon_temp,
1659 NULL
1660 };
1661
1662 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1663 .is_visible = m88e1121_hwmon_is_visible,
1664 .read = m88e1121_hwmon_read,
1665 };
1666
1667 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1668 .ops = &m88e1121_hwmon_hwmon_ops,
1669 .info = m88e1121_hwmon_info,
1670 };
1671
1672 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1673 {
1674 int oldpage;
1675 int ret;
1676
1677 *temp = 0;
1678
1679 mutex_lock(&phydev->lock);
1680
1681 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1682 if (oldpage < 0) {
1683 mutex_unlock(&phydev->lock);
1684 return oldpage;
1685 }
1686
1687 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1688 if (ret < 0)
1689 goto error;
1690
1691 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1692
1693 error:
1694 marvell_set_page(phydev, oldpage);
1695 mutex_unlock(&phydev->lock);
1696
1697 return ret;
1698 }
1699
1700 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1701 {
1702 int oldpage;
1703 int ret;
1704
1705 *temp = 0;
1706
1707 mutex_lock(&phydev->lock);
1708
1709 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1710 if (oldpage < 0) {
1711 mutex_unlock(&phydev->lock);
1712 return oldpage;
1713 }
1714
1715 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1716 if (ret < 0)
1717 goto error;
1718
1719 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1720 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1721 /* convert to mC */
1722 *temp *= 1000;
1723
1724 error:
1725 marvell_set_page(phydev, oldpage);
1726 mutex_unlock(&phydev->lock);
1727
1728 return ret;
1729 }
1730
1731 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1732 {
1733 int oldpage;
1734 int ret;
1735
1736 mutex_lock(&phydev->lock);
1737
1738 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1739 if (oldpage < 0) {
1740 mutex_unlock(&phydev->lock);
1741 return oldpage;
1742 }
1743
1744 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1745 if (ret < 0)
1746 goto error;
1747
1748 temp = temp / 1000;
1749 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1750 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1751 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1752 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1753
1754 error:
1755 marvell_set_page(phydev, oldpage);
1756 mutex_unlock(&phydev->lock);
1757
1758 return ret;
1759 }
1760
1761 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1762 {
1763 int oldpage;
1764 int ret;
1765
1766 *alarm = false;
1767
1768 mutex_lock(&phydev->lock);
1769
1770 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1771 if (oldpage < 0) {
1772 mutex_unlock(&phydev->lock);
1773 return oldpage;
1774 }
1775
1776 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1777 if (ret < 0)
1778 goto error;
1779 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1780
1781 error:
1782 marvell_set_page(phydev, oldpage);
1783 mutex_unlock(&phydev->lock);
1784
1785 return ret;
1786 }
1787
1788 static int m88e1510_hwmon_read(struct device *dev,
1789 enum hwmon_sensor_types type,
1790 u32 attr, int channel, long *temp)
1791 {
1792 struct phy_device *phydev = dev_get_drvdata(dev);
1793 int err;
1794
1795 switch (attr) {
1796 case hwmon_temp_input:
1797 err = m88e1510_get_temp(phydev, temp);
1798 break;
1799 case hwmon_temp_crit:
1800 err = m88e1510_get_temp_critical(phydev, temp);
1801 break;
1802 case hwmon_temp_max_alarm:
1803 err = m88e1510_get_temp_alarm(phydev, temp);
1804 break;
1805 default:
1806 return -EOPNOTSUPP;
1807 }
1808
1809 return err;
1810 }
1811
1812 static int m88e1510_hwmon_write(struct device *dev,
1813 enum hwmon_sensor_types type,
1814 u32 attr, int channel, long temp)
1815 {
1816 struct phy_device *phydev = dev_get_drvdata(dev);
1817 int err;
1818
1819 switch (attr) {
1820 case hwmon_temp_crit:
1821 err = m88e1510_set_temp_critical(phydev, temp);
1822 break;
1823 default:
1824 return -EOPNOTSUPP;
1825 }
1826 return err;
1827 }
1828
1829 static umode_t m88e1510_hwmon_is_visible(const void *data,
1830 enum hwmon_sensor_types type,
1831 u32 attr, int channel)
1832 {
1833 if (type != hwmon_temp)
1834 return 0;
1835
1836 switch (attr) {
1837 case hwmon_temp_input:
1838 case hwmon_temp_max_alarm:
1839 return 0444;
1840 case hwmon_temp_crit:
1841 return 0644;
1842 default:
1843 return 0;
1844 }
1845 }
1846
1847 static u32 m88e1510_hwmon_temp_config[] = {
1848 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1849 0
1850 };
1851
1852 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1853 .type = hwmon_temp,
1854 .config = m88e1510_hwmon_temp_config,
1855 };
1856
1857 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1858 &m88e1121_hwmon_chip,
1859 &m88e1510_hwmon_temp,
1860 NULL
1861 };
1862
1863 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1864 .is_visible = m88e1510_hwmon_is_visible,
1865 .read = m88e1510_hwmon_read,
1866 .write = m88e1510_hwmon_write,
1867 };
1868
1869 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1870 .ops = &m88e1510_hwmon_hwmon_ops,
1871 .info = m88e1510_hwmon_info,
1872 };
1873
1874 static int marvell_hwmon_name(struct phy_device *phydev)
1875 {
1876 struct marvell_priv *priv = phydev->priv;
1877 struct device *dev = &phydev->mdio.dev;
1878 const char *devname = dev_name(dev);
1879 size_t len = strlen(devname);
1880 int i, j;
1881
1882 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1883 if (!priv->hwmon_name)
1884 return -ENOMEM;
1885
1886 for (i = j = 0; i < len && devname[i]; i++) {
1887 if (isalnum(devname[i]))
1888 priv->hwmon_name[j++] = devname[i];
1889 }
1890
1891 return 0;
1892 }
1893
1894 static int marvell_hwmon_probe(struct phy_device *phydev,
1895 const struct hwmon_chip_info *chip)
1896 {
1897 struct marvell_priv *priv = phydev->priv;
1898 struct device *dev = &phydev->mdio.dev;
1899 int err;
1900
1901 err = marvell_hwmon_name(phydev);
1902 if (err)
1903 return err;
1904
1905 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1906 dev, priv->hwmon_name, phydev, chip, NULL);
1907
1908 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1909 }
1910
1911 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1912 {
1913 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1914 }
1915
1916 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1917 {
1918 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1919 }
1920 #else
1921 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1922 {
1923 return 0;
1924 }
1925
1926 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1927 {
1928 return 0;
1929 }
1930 #endif
1931
1932 static int marvell_probe(struct phy_device *phydev)
1933 {
1934 struct marvell_priv *priv;
1935
1936 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1937 if (!priv)
1938 return -ENOMEM;
1939
1940 phydev->priv = priv;
1941
1942 return 0;
1943 }
1944
1945 static int m88e1121_probe(struct phy_device *phydev)
1946 {
1947 int err;
1948
1949 err = marvell_probe(phydev);
1950 if (err)
1951 return err;
1952
1953 return m88e1121_hwmon_probe(phydev);
1954 }
1955
1956 static int m88e1510_probe(struct phy_device *phydev)
1957 {
1958 int err;
1959
1960 err = marvell_probe(phydev);
1961 if (err)
1962 return err;
1963
1964 return m88e1510_hwmon_probe(phydev);
1965 }
1966
1967 static struct phy_driver marvell_drivers[] = {
1968 {
1969 .phy_id = MARVELL_PHY_ID_88E1101,
1970 .phy_id_mask = MARVELL_PHY_ID_MASK,
1971 .name = "Marvell 88E1101",
1972 .features = PHY_GBIT_FEATURES,
1973 .flags = PHY_HAS_INTERRUPT,
1974 .probe = marvell_probe,
1975 .config_init = &marvell_config_init,
1976 .config_aneg = &m88e1101_config_aneg,
1977 .read_status = &genphy_read_status,
1978 .ack_interrupt = &marvell_ack_interrupt,
1979 .config_intr = &marvell_config_intr,
1980 .resume = &genphy_resume,
1981 .suspend = &genphy_suspend,
1982 .get_sset_count = marvell_get_sset_count,
1983 .get_strings = marvell_get_strings,
1984 .get_stats = marvell_get_stats,
1985 },
1986 {
1987 .phy_id = MARVELL_PHY_ID_88E1112,
1988 .phy_id_mask = MARVELL_PHY_ID_MASK,
1989 .name = "Marvell 88E1112",
1990 .features = PHY_GBIT_FEATURES,
1991 .flags = PHY_HAS_INTERRUPT,
1992 .probe = marvell_probe,
1993 .config_init = &m88e1111_config_init,
1994 .config_aneg = &marvell_config_aneg,
1995 .read_status = &genphy_read_status,
1996 .ack_interrupt = &marvell_ack_interrupt,
1997 .config_intr = &marvell_config_intr,
1998 .resume = &genphy_resume,
1999 .suspend = &genphy_suspend,
2000 .get_sset_count = marvell_get_sset_count,
2001 .get_strings = marvell_get_strings,
2002 .get_stats = marvell_get_stats,
2003 },
2004 {
2005 .phy_id = MARVELL_PHY_ID_88E1111,
2006 .phy_id_mask = MARVELL_PHY_ID_MASK,
2007 .name = "Marvell 88E1111",
2008 .features = PHY_GBIT_FEATURES,
2009 .flags = PHY_HAS_INTERRUPT,
2010 .probe = marvell_probe,
2011 .config_init = &m88e1111_config_init,
2012 .config_aneg = &m88e1111_config_aneg,
2013 .read_status = &marvell_read_status,
2014 .ack_interrupt = &marvell_ack_interrupt,
2015 .config_intr = &marvell_config_intr,
2016 .resume = &genphy_resume,
2017 .suspend = &genphy_suspend,
2018 .get_sset_count = marvell_get_sset_count,
2019 .get_strings = marvell_get_strings,
2020 .get_stats = marvell_get_stats,
2021 },
2022 {
2023 .phy_id = MARVELL_PHY_ID_88E1118,
2024 .phy_id_mask = MARVELL_PHY_ID_MASK,
2025 .name = "Marvell 88E1118",
2026 .features = PHY_GBIT_FEATURES,
2027 .flags = PHY_HAS_INTERRUPT,
2028 .probe = marvell_probe,
2029 .config_init = &m88e1118_config_init,
2030 .config_aneg = &m88e1118_config_aneg,
2031 .read_status = &genphy_read_status,
2032 .ack_interrupt = &marvell_ack_interrupt,
2033 .config_intr = &marvell_config_intr,
2034 .resume = &genphy_resume,
2035 .suspend = &genphy_suspend,
2036 .get_sset_count = marvell_get_sset_count,
2037 .get_strings = marvell_get_strings,
2038 .get_stats = marvell_get_stats,
2039 },
2040 {
2041 .phy_id = MARVELL_PHY_ID_88E1121R,
2042 .phy_id_mask = MARVELL_PHY_ID_MASK,
2043 .name = "Marvell 88E1121R",
2044 .features = PHY_GBIT_FEATURES,
2045 .flags = PHY_HAS_INTERRUPT,
2046 .probe = &m88e1121_probe,
2047 .config_init = &m88e1121_config_init,
2048 .config_aneg = &m88e1121_config_aneg,
2049 .read_status = &marvell_read_status,
2050 .ack_interrupt = &marvell_ack_interrupt,
2051 .config_intr = &marvell_config_intr,
2052 .did_interrupt = &m88e1121_did_interrupt,
2053 .resume = &genphy_resume,
2054 .suspend = &genphy_suspend,
2055 .get_sset_count = marvell_get_sset_count,
2056 .get_strings = marvell_get_strings,
2057 .get_stats = marvell_get_stats,
2058 },
2059 {
2060 .phy_id = MARVELL_PHY_ID_88E1318S,
2061 .phy_id_mask = MARVELL_PHY_ID_MASK,
2062 .name = "Marvell 88E1318S",
2063 .features = PHY_GBIT_FEATURES,
2064 .flags = PHY_HAS_INTERRUPT,
2065 .probe = marvell_probe,
2066 .config_init = &m88e1121_config_init,
2067 .config_aneg = &m88e1318_config_aneg,
2068 .read_status = &marvell_read_status,
2069 .ack_interrupt = &marvell_ack_interrupt,
2070 .config_intr = &marvell_config_intr,
2071 .did_interrupt = &m88e1121_did_interrupt,
2072 .get_wol = &m88e1318_get_wol,
2073 .set_wol = &m88e1318_set_wol,
2074 .resume = &genphy_resume,
2075 .suspend = &genphy_suspend,
2076 .get_sset_count = marvell_get_sset_count,
2077 .get_strings = marvell_get_strings,
2078 .get_stats = marvell_get_stats,
2079 },
2080 {
2081 .phy_id = MARVELL_PHY_ID_88E1145,
2082 .phy_id_mask = MARVELL_PHY_ID_MASK,
2083 .name = "Marvell 88E1145",
2084 .features = PHY_GBIT_FEATURES,
2085 .flags = PHY_HAS_INTERRUPT,
2086 .probe = marvell_probe,
2087 .config_init = &m88e1145_config_init,
2088 .config_aneg = &m88e1101_config_aneg,
2089 .read_status = &genphy_read_status,
2090 .ack_interrupt = &marvell_ack_interrupt,
2091 .config_intr = &marvell_config_intr,
2092 .resume = &genphy_resume,
2093 .suspend = &genphy_suspend,
2094 .get_sset_count = marvell_get_sset_count,
2095 .get_strings = marvell_get_strings,
2096 .get_stats = marvell_get_stats,
2097 },
2098 {
2099 .phy_id = MARVELL_PHY_ID_88E1149R,
2100 .phy_id_mask = MARVELL_PHY_ID_MASK,
2101 .name = "Marvell 88E1149R",
2102 .features = PHY_GBIT_FEATURES,
2103 .flags = PHY_HAS_INTERRUPT,
2104 .probe = marvell_probe,
2105 .config_init = &m88e1149_config_init,
2106 .config_aneg = &m88e1118_config_aneg,
2107 .read_status = &genphy_read_status,
2108 .ack_interrupt = &marvell_ack_interrupt,
2109 .config_intr = &marvell_config_intr,
2110 .resume = &genphy_resume,
2111 .suspend = &genphy_suspend,
2112 .get_sset_count = marvell_get_sset_count,
2113 .get_strings = marvell_get_strings,
2114 .get_stats = marvell_get_stats,
2115 },
2116 {
2117 .phy_id = MARVELL_PHY_ID_88E1240,
2118 .phy_id_mask = MARVELL_PHY_ID_MASK,
2119 .name = "Marvell 88E1240",
2120 .features = PHY_GBIT_FEATURES,
2121 .flags = PHY_HAS_INTERRUPT,
2122 .probe = marvell_probe,
2123 .config_init = &m88e1111_config_init,
2124 .config_aneg = &marvell_config_aneg,
2125 .read_status = &genphy_read_status,
2126 .ack_interrupt = &marvell_ack_interrupt,
2127 .config_intr = &marvell_config_intr,
2128 .resume = &genphy_resume,
2129 .suspend = &genphy_suspend,
2130 .get_sset_count = marvell_get_sset_count,
2131 .get_strings = marvell_get_strings,
2132 .get_stats = marvell_get_stats,
2133 },
2134 {
2135 .phy_id = MARVELL_PHY_ID_88E1116R,
2136 .phy_id_mask = MARVELL_PHY_ID_MASK,
2137 .name = "Marvell 88E1116R",
2138 .features = PHY_GBIT_FEATURES,
2139 .flags = PHY_HAS_INTERRUPT,
2140 .probe = marvell_probe,
2141 .config_init = &m88e1116r_config_init,
2142 .config_aneg = &genphy_config_aneg,
2143 .read_status = &genphy_read_status,
2144 .ack_interrupt = &marvell_ack_interrupt,
2145 .config_intr = &marvell_config_intr,
2146 .resume = &genphy_resume,
2147 .suspend = &genphy_suspend,
2148 .get_sset_count = marvell_get_sset_count,
2149 .get_strings = marvell_get_strings,
2150 .get_stats = marvell_get_stats,
2151 },
2152 {
2153 .phy_id = MARVELL_PHY_ID_88E1510,
2154 .phy_id_mask = MARVELL_PHY_ID_MASK,
2155 .name = "Marvell 88E1510",
2156 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2157 .flags = PHY_HAS_INTERRUPT,
2158 .probe = &m88e1510_probe,
2159 .config_init = &m88e1510_config_init,
2160 .config_aneg = &m88e1510_config_aneg,
2161 .read_status = &marvell_read_status,
2162 .ack_interrupt = &marvell_ack_interrupt,
2163 .config_intr = &marvell_config_intr,
2164 .did_interrupt = &m88e1121_did_interrupt,
2165 .get_wol = &m88e1318_get_wol,
2166 .set_wol = &m88e1318_set_wol,
2167 .resume = &marvell_resume,
2168 .suspend = &marvell_suspend,
2169 .get_sset_count = marvell_get_sset_count,
2170 .get_strings = marvell_get_strings,
2171 .get_stats = marvell_get_stats,
2172 .set_loopback = genphy_loopback,
2173 },
2174 {
2175 .phy_id = MARVELL_PHY_ID_88E1540,
2176 .phy_id_mask = MARVELL_PHY_ID_MASK,
2177 .name = "Marvell 88E1540",
2178 .features = PHY_GBIT_FEATURES,
2179 .flags = PHY_HAS_INTERRUPT,
2180 .probe = m88e1510_probe,
2181 .config_init = &marvell_config_init,
2182 .config_aneg = &m88e1510_config_aneg,
2183 .read_status = &marvell_read_status,
2184 .ack_interrupt = &marvell_ack_interrupt,
2185 .config_intr = &marvell_config_intr,
2186 .did_interrupt = &m88e1121_did_interrupt,
2187 .resume = &genphy_resume,
2188 .suspend = &genphy_suspend,
2189 .get_sset_count = marvell_get_sset_count,
2190 .get_strings = marvell_get_strings,
2191 .get_stats = marvell_get_stats,
2192 },
2193 {
2194 .phy_id = MARVELL_PHY_ID_88E1545,
2195 .phy_id_mask = MARVELL_PHY_ID_MASK,
2196 .name = "Marvell 88E1545",
2197 .probe = m88e1510_probe,
2198 .features = PHY_GBIT_FEATURES,
2199 .flags = PHY_HAS_INTERRUPT,
2200 .config_init = &marvell_config_init,
2201 .config_aneg = &m88e1510_config_aneg,
2202 .read_status = &marvell_read_status,
2203 .ack_interrupt = &marvell_ack_interrupt,
2204 .config_intr = &marvell_config_intr,
2205 .did_interrupt = &m88e1121_did_interrupt,
2206 .resume = &genphy_resume,
2207 .suspend = &genphy_suspend,
2208 .get_sset_count = marvell_get_sset_count,
2209 .get_strings = marvell_get_strings,
2210 .get_stats = marvell_get_stats,
2211 },
2212 {
2213 .phy_id = MARVELL_PHY_ID_88E3016,
2214 .phy_id_mask = MARVELL_PHY_ID_MASK,
2215 .name = "Marvell 88E3016",
2216 .features = PHY_BASIC_FEATURES,
2217 .flags = PHY_HAS_INTERRUPT,
2218 .probe = marvell_probe,
2219 .config_aneg = &genphy_config_aneg,
2220 .config_init = &m88e3016_config_init,
2221 .aneg_done = &marvell_aneg_done,
2222 .read_status = &marvell_read_status,
2223 .ack_interrupt = &marvell_ack_interrupt,
2224 .config_intr = &marvell_config_intr,
2225 .did_interrupt = &m88e1121_did_interrupt,
2226 .resume = &genphy_resume,
2227 .suspend = &genphy_suspend,
2228 .get_sset_count = marvell_get_sset_count,
2229 .get_strings = marvell_get_strings,
2230 .get_stats = marvell_get_stats,
2231 },
2232 {
2233 .phy_id = MARVELL_PHY_ID_88E6390,
2234 .phy_id_mask = MARVELL_PHY_ID_MASK,
2235 .name = "Marvell 88E6390",
2236 .features = PHY_GBIT_FEATURES,
2237 .flags = PHY_HAS_INTERRUPT,
2238 .probe = m88e1510_probe,
2239 .config_init = &marvell_config_init,
2240 .config_aneg = &m88e1510_config_aneg,
2241 .read_status = &marvell_read_status,
2242 .ack_interrupt = &marvell_ack_interrupt,
2243 .config_intr = &marvell_config_intr,
2244 .did_interrupt = &m88e1121_did_interrupt,
2245 .resume = &genphy_resume,
2246 .suspend = &genphy_suspend,
2247 .get_sset_count = marvell_get_sset_count,
2248 .get_strings = marvell_get_strings,
2249 .get_stats = marvell_get_stats,
2250 },
2251 };
2252
2253 module_phy_driver(marvell_drivers);
2254
2255 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2256 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2257 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2258 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2259 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2260 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2261 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2262 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2263 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2264 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2265 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2266 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2267 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2268 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2269 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2270 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2271 { }
2272 };
2273
2274 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
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