1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
30 #include <linux/export.h>
31 #include "dm_common.h"
32 #include "phy_common.h"
36 struct dig_t dm_digtable
;
37 static struct ps_t dm_pstable
;
39 #define BT_RSSI_STATE_NORMAL_POWER BIT_OFFSET_LEN_MASK_32(0, 1)
40 #define BT_RSSI_STATE_AMDPU_OFF BIT_OFFSET_LEN_MASK_32(1, 1)
41 #define BT_RSSI_STATE_SPECIAL_LOW BIT_OFFSET_LEN_MASK_32(2, 1)
42 #define BT_RSSI_STATE_BG_EDCA_LOW BIT_OFFSET_LEN_MASK_32(3, 1)
43 #define BT_RSSI_STATE_TXPOWER_LOW BIT_OFFSET_LEN_MASK_32(4, 1)
45 #define RTLPRIV (struct rtl_priv *)
46 #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \
47 ((RTLPRIV(_priv))->mac80211.opmode == \
48 NL80211_IFTYPE_ADHOC) ? \
49 ((RTLPRIV(_priv))->dm.entry_min_undecoratedsmoothed_pwdb) : \
50 ((RTLPRIV(_priv))->dm.undecorated_smoothed_pwdb)
52 static const u32 ofdmswing_table
[OFDM_TABLE_SIZE
] = {
92 static const u8 cckswing_table_ch1ch13
[CCK_TABLE_SIZE
][8] = {
93 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
94 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
95 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
96 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
97 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
98 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
99 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
100 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
101 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
102 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
103 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
104 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
105 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
106 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
107 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
108 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
109 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
110 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
111 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
112 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
113 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
114 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
115 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
116 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
117 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
118 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
119 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
120 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
121 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
122 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
123 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
124 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
125 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
128 static const u8 cckswing_table_ch14
[CCK_TABLE_SIZE
][8] = {
129 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
130 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
131 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
132 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
133 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
134 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
135 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
136 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
137 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
138 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
139 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
140 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
141 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
142 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
143 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
144 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
145 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
146 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
147 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
148 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
149 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
150 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
151 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
152 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
153 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
154 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
155 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
156 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
157 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
158 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
159 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
160 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
161 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
164 static void rtl92c_dm_diginit(struct ieee80211_hw
*hw
)
166 dm_digtable
.dig_enable_flag
= true;
167 dm_digtable
.dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
168 dm_digtable
.cur_igvalue
= 0x20;
169 dm_digtable
.pre_igvalue
= 0x0;
170 dm_digtable
.cursta_connectctate
= DIG_STA_DISCONNECT
;
171 dm_digtable
.presta_connectstate
= DIG_STA_DISCONNECT
;
172 dm_digtable
.curmultista_connectstate
= DIG_MULTISTA_DISCONNECT
;
173 dm_digtable
.rssi_lowthresh
= DM_DIG_THRESH_LOW
;
174 dm_digtable
.rssi_highthresh
= DM_DIG_THRESH_HIGH
;
175 dm_digtable
.fa_lowthresh
= DM_FALSEALARM_THRESH_LOW
;
176 dm_digtable
.fa_highthresh
= DM_FALSEALARM_THRESH_HIGH
;
177 dm_digtable
.rx_gain_range_max
= DM_DIG_MAX
;
178 dm_digtable
.rx_gain_range_min
= DM_DIG_MIN
;
179 dm_digtable
.backoff_val
= DM_DIG_BACKOFF_DEFAULT
;
180 dm_digtable
.backoff_val_range_max
= DM_DIG_BACKOFF_MAX
;
181 dm_digtable
.backoff_val_range_min
= DM_DIG_BACKOFF_MIN
;
182 dm_digtable
.pre_cck_pd_state
= CCK_PD_STAGE_MAX
;
183 dm_digtable
.cur_cck_pd_state
= CCK_PD_STAGE_MAX
;
186 static u8
rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw
*hw
)
188 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
189 long rssi_val_min
= 0;
191 if ((dm_digtable
.curmultista_connectstate
== DIG_MULTISTA_CONNECT
) &&
192 (dm_digtable
.cursta_connectctate
== DIG_STA_CONNECT
)) {
193 if (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
!= 0)
195 (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
>
196 rtlpriv
->dm
.undecorated_smoothed_pwdb
) ?
197 rtlpriv
->dm
.undecorated_smoothed_pwdb
:
198 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
200 rssi_val_min
= rtlpriv
->dm
.undecorated_smoothed_pwdb
;
201 } else if (dm_digtable
.cursta_connectctate
== DIG_STA_CONNECT
||
202 dm_digtable
.cursta_connectctate
== DIG_STA_BEFORE_CONNECT
) {
203 rssi_val_min
= rtlpriv
->dm
.undecorated_smoothed_pwdb
;
204 } else if (dm_digtable
.curmultista_connectstate
==
205 DIG_MULTISTA_CONNECT
) {
206 rssi_val_min
= rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
209 return (u8
) rssi_val_min
;
212 static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw
*hw
)
215 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
216 struct false_alarm_statistics
*falsealm_cnt
= &(rtlpriv
->falsealm_cnt
);
218 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER1
, MASKDWORD
);
219 falsealm_cnt
->cnt_parity_fail
= ((ret_value
& 0xffff0000) >> 16);
221 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER2
, MASKDWORD
);
222 falsealm_cnt
->cnt_rate_illegal
= (ret_value
& 0xffff);
223 falsealm_cnt
->cnt_crc8_fail
= ((ret_value
& 0xffff0000) >> 16);
225 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER3
, MASKDWORD
);
226 falsealm_cnt
->cnt_mcs_fail
= (ret_value
& 0xffff);
227 falsealm_cnt
->cnt_ofdm_fail
= falsealm_cnt
->cnt_parity_fail
+
228 falsealm_cnt
->cnt_rate_illegal
+
229 falsealm_cnt
->cnt_crc8_fail
+ falsealm_cnt
->cnt_mcs_fail
;
231 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, BIT(14), 1);
232 ret_value
= rtl_get_bbreg(hw
, RCCK0_FACOUNTERLOWER
, MASKBYTE0
);
233 falsealm_cnt
->cnt_cck_fail
= ret_value
;
235 ret_value
= rtl_get_bbreg(hw
, RCCK0_FACOUNTERUPPER
, MASKBYTE3
);
236 falsealm_cnt
->cnt_cck_fail
+= (ret_value
& 0xff) << 8;
237 falsealm_cnt
->cnt_all
= (falsealm_cnt
->cnt_parity_fail
+
238 falsealm_cnt
->cnt_rate_illegal
+
239 falsealm_cnt
->cnt_crc8_fail
+
240 falsealm_cnt
->cnt_mcs_fail
+
241 falsealm_cnt
->cnt_cck_fail
);
243 rtl_set_bbreg(hw
, ROFDM1_LSTF
, 0x08000000, 1);
244 rtl_set_bbreg(hw
, ROFDM1_LSTF
, 0x08000000, 0);
245 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, 0x0000c000, 0);
246 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, 0x0000c000, 2);
248 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
249 "cnt_parity_fail = %d, cnt_rate_illegal = %d, cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
250 falsealm_cnt
->cnt_parity_fail
,
251 falsealm_cnt
->cnt_rate_illegal
,
252 falsealm_cnt
->cnt_crc8_fail
, falsealm_cnt
->cnt_mcs_fail
);
254 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
255 "cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
256 falsealm_cnt
->cnt_ofdm_fail
,
257 falsealm_cnt
->cnt_cck_fail
, falsealm_cnt
->cnt_all
);
260 static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw
*hw
)
262 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
263 u8 value_igi
= dm_digtable
.cur_igvalue
;
265 if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH0
)
267 else if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH1
)
269 else if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH2
)
271 else if (rtlpriv
->falsealm_cnt
.cnt_all
>= DM_DIG_FA_TH2
)
273 if (value_igi
> DM_DIG_FA_UPPER
)
274 value_igi
= DM_DIG_FA_UPPER
;
275 else if (value_igi
< DM_DIG_FA_LOWER
)
276 value_igi
= DM_DIG_FA_LOWER
;
277 if (rtlpriv
->falsealm_cnt
.cnt_all
> 10000)
280 dm_digtable
.cur_igvalue
= value_igi
;
281 rtl92c_dm_write_dig(hw
);
284 static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw
*hw
)
286 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
288 if (rtlpriv
->falsealm_cnt
.cnt_all
> dm_digtable
.fa_highthresh
) {
289 if ((dm_digtable
.backoff_val
- 2) <
290 dm_digtable
.backoff_val_range_min
)
291 dm_digtable
.backoff_val
=
292 dm_digtable
.backoff_val_range_min
;
294 dm_digtable
.backoff_val
-= 2;
295 } else if (rtlpriv
->falsealm_cnt
.cnt_all
< dm_digtable
.fa_lowthresh
) {
296 if ((dm_digtable
.backoff_val
+ 2) >
297 dm_digtable
.backoff_val_range_max
)
298 dm_digtable
.backoff_val
=
299 dm_digtable
.backoff_val_range_max
;
301 dm_digtable
.backoff_val
+= 2;
304 if ((dm_digtable
.rssi_val_min
+ 10 - dm_digtable
.backoff_val
) >
305 dm_digtable
.rx_gain_range_max
)
306 dm_digtable
.cur_igvalue
= dm_digtable
.rx_gain_range_max
;
307 else if ((dm_digtable
.rssi_val_min
+ 10 -
308 dm_digtable
.backoff_val
) < dm_digtable
.rx_gain_range_min
)
309 dm_digtable
.cur_igvalue
= dm_digtable
.rx_gain_range_min
;
311 dm_digtable
.cur_igvalue
= dm_digtable
.rssi_val_min
+ 10 -
312 dm_digtable
.backoff_val
;
314 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
315 "rssi_val_min = %x backoff_val %x\n",
316 dm_digtable
.rssi_val_min
, dm_digtable
.backoff_val
);
318 rtl92c_dm_write_dig(hw
);
321 static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw
*hw
)
323 static u8 initialized
; /* initialized to false */
324 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
325 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
326 long rssi_strength
= rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
327 bool multi_sta
= false;
329 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
)
333 dm_digtable
.cursta_connectctate
!= DIG_STA_DISCONNECT
) {
335 dm_digtable
.dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
337 } else if (initialized
== false) {
339 dm_digtable
.dig_ext_port_stage
= DIG_EXT_PORT_STAGE_0
;
340 dm_digtable
.cur_igvalue
= 0x20;
341 rtl92c_dm_write_dig(hw
);
344 if (dm_digtable
.curmultista_connectstate
== DIG_MULTISTA_CONNECT
) {
345 if ((rssi_strength
< dm_digtable
.rssi_lowthresh
) &&
346 (dm_digtable
.dig_ext_port_stage
!= DIG_EXT_PORT_STAGE_1
)) {
348 if (dm_digtable
.dig_ext_port_stage
==
349 DIG_EXT_PORT_STAGE_2
) {
350 dm_digtable
.cur_igvalue
= 0x20;
351 rtl92c_dm_write_dig(hw
);
354 dm_digtable
.dig_ext_port_stage
= DIG_EXT_PORT_STAGE_1
;
355 } else if (rssi_strength
> dm_digtable
.rssi_highthresh
) {
356 dm_digtable
.dig_ext_port_stage
= DIG_EXT_PORT_STAGE_2
;
357 rtl92c_dm_ctrl_initgain_by_fa(hw
);
359 } else if (dm_digtable
.dig_ext_port_stage
!= DIG_EXT_PORT_STAGE_0
) {
360 dm_digtable
.dig_ext_port_stage
= DIG_EXT_PORT_STAGE_0
;
361 dm_digtable
.cur_igvalue
= 0x20;
362 rtl92c_dm_write_dig(hw
);
365 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
366 "curmultista_connectstate = %x dig_ext_port_stage %x\n",
367 dm_digtable
.curmultista_connectstate
,
368 dm_digtable
.dig_ext_port_stage
);
371 static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw
*hw
)
373 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
375 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
376 "presta_connectstate = %x, cursta_connectctate = %x\n",
377 dm_digtable
.presta_connectstate
,
378 dm_digtable
.cursta_connectctate
);
380 if (dm_digtable
.presta_connectstate
== dm_digtable
.cursta_connectctate
381 || dm_digtable
.cursta_connectctate
== DIG_STA_BEFORE_CONNECT
382 || dm_digtable
.cursta_connectctate
== DIG_STA_CONNECT
) {
384 if (dm_digtable
.cursta_connectctate
!= DIG_STA_DISCONNECT
) {
385 dm_digtable
.rssi_val_min
=
386 rtl92c_dm_initial_gain_min_pwdb(hw
);
387 rtl92c_dm_ctrl_initgain_by_rssi(hw
);
390 dm_digtable
.rssi_val_min
= 0;
391 dm_digtable
.dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
392 dm_digtable
.backoff_val
= DM_DIG_BACKOFF_DEFAULT
;
393 dm_digtable
.cur_igvalue
= 0x20;
394 dm_digtable
.pre_igvalue
= 0;
395 rtl92c_dm_write_dig(hw
);
399 static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw
*hw
)
401 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
402 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
404 if (dm_digtable
.cursta_connectctate
== DIG_STA_CONNECT
) {
405 dm_digtable
.rssi_val_min
= rtl92c_dm_initial_gain_min_pwdb(hw
);
407 if (dm_digtable
.pre_cck_pd_state
== CCK_PD_STAGE_LowRssi
) {
408 if (dm_digtable
.rssi_val_min
<= 25)
409 dm_digtable
.cur_cck_pd_state
=
410 CCK_PD_STAGE_LowRssi
;
412 dm_digtable
.cur_cck_pd_state
=
413 CCK_PD_STAGE_HighRssi
;
415 if (dm_digtable
.rssi_val_min
<= 20)
416 dm_digtable
.cur_cck_pd_state
=
417 CCK_PD_STAGE_LowRssi
;
419 dm_digtable
.cur_cck_pd_state
=
420 CCK_PD_STAGE_HighRssi
;
423 dm_digtable
.cur_cck_pd_state
= CCK_PD_STAGE_MAX
;
426 if (dm_digtable
.pre_cck_pd_state
!= dm_digtable
.cur_cck_pd_state
) {
427 if (dm_digtable
.cur_cck_pd_state
== CCK_PD_STAGE_LowRssi
) {
428 if (rtlpriv
->falsealm_cnt
.cnt_cck_fail
> 800)
429 dm_digtable
.cur_cck_fa_state
=
432 dm_digtable
.cur_cck_fa_state
= CCK_FA_STAGE_Low
;
434 if (dm_digtable
.pre_cck_fa_state
!=
435 dm_digtable
.cur_cck_fa_state
) {
436 if (dm_digtable
.cur_cck_fa_state
==
438 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
,
441 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
,
444 dm_digtable
.pre_cck_fa_state
=
445 dm_digtable
.cur_cck_fa_state
;
448 rtl_set_bbreg(hw
, RCCK0_SYSTEM
, MASKBYTE1
, 0x40);
450 if (IS_92C_SERIAL(rtlhal
->version
))
451 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
,
454 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
, 0xcd);
455 rtl_set_bbreg(hw
, RCCK0_SYSTEM
, MASKBYTE1
, 0x47);
457 if (IS_92C_SERIAL(rtlhal
->version
))
458 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
,
461 dm_digtable
.pre_cck_pd_state
= dm_digtable
.cur_cck_pd_state
;
464 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
, "CCKPDStage=%x\n",
465 dm_digtable
.cur_cck_pd_state
);
467 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
, "is92C=%x\n",
468 IS_92C_SERIAL(rtlhal
->version
));
471 static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw
*hw
)
473 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
475 if (mac
->act_scanning
)
478 if (mac
->link_state
>= MAC80211_LINKED
)
479 dm_digtable
.cursta_connectctate
= DIG_STA_CONNECT
;
481 dm_digtable
.cursta_connectctate
= DIG_STA_DISCONNECT
;
483 rtl92c_dm_initial_gain_sta(hw
);
484 rtl92c_dm_initial_gain_multi_sta(hw
);
485 rtl92c_dm_cck_packet_detection_thresh(hw
);
487 dm_digtable
.presta_connectstate
= dm_digtable
.cursta_connectctate
;
491 static void rtl92c_dm_dig(struct ieee80211_hw
*hw
)
493 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
495 if (rtlpriv
->dm
.dm_initialgain_enable
== false)
497 if (dm_digtable
.dig_enable_flag
== false)
500 rtl92c_dm_ctrl_initgain_by_twoport(hw
);
504 static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw
*hw
)
506 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
508 rtlpriv
->dm
.dynamic_txpower_enable
= false;
510 rtlpriv
->dm
.last_dtp_lvl
= TXHIGHPWRLEVEL_NORMAL
;
511 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
514 void rtl92c_dm_write_dig(struct ieee80211_hw
*hw
)
516 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
518 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_LOUD
,
519 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",
520 dm_digtable
.cur_igvalue
, dm_digtable
.pre_igvalue
,
521 dm_digtable
.backoff_val
);
523 dm_digtable
.cur_igvalue
+= 2;
524 if (dm_digtable
.cur_igvalue
> 0x3f)
525 dm_digtable
.cur_igvalue
= 0x3f;
527 if (dm_digtable
.pre_igvalue
!= dm_digtable
.cur_igvalue
) {
528 rtl_set_bbreg(hw
, ROFDM0_XAAGCCORE1
, 0x7f,
529 dm_digtable
.cur_igvalue
);
530 rtl_set_bbreg(hw
, ROFDM0_XBAGCCORE1
, 0x7f,
531 dm_digtable
.cur_igvalue
);
533 dm_digtable
.pre_igvalue
= dm_digtable
.cur_igvalue
;
536 EXPORT_SYMBOL(rtl92c_dm_write_dig
);
538 static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw
*hw
)
540 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
541 long tmpentry_max_pwdb
= 0, tmpentry_min_pwdb
= 0xff;
543 u8 h2c_parameter
[3] = { 0 };
547 if (tmpentry_max_pwdb
!= 0) {
548 rtlpriv
->dm
.entry_max_undecoratedsmoothed_pwdb
=
551 rtlpriv
->dm
.entry_max_undecoratedsmoothed_pwdb
= 0;
554 if (tmpentry_min_pwdb
!= 0xff) {
555 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
=
558 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
= 0;
561 h2c_parameter
[2] = (u8
) (rtlpriv
->dm
.undecorated_smoothed_pwdb
& 0xFF);
562 h2c_parameter
[0] = 0;
564 rtl92c_fill_h2c_cmd(hw
, H2C_RSSI_REPORT
, 3, h2c_parameter
);
567 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw
*hw
)
569 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
570 rtlpriv
->dm
.current_turbo_edca
= false;
571 rtlpriv
->dm
.is_any_nonbepkts
= false;
572 rtlpriv
->dm
.is_cur_rdlstate
= false;
574 EXPORT_SYMBOL(rtl92c_dm_init_edca_turbo
);
576 static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw
*hw
)
578 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
579 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
580 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
582 static u64 last_txok_cnt
;
583 static u64 last_rxok_cnt
;
584 static u32 last_bt_edca_ul
;
585 static u32 last_bt_edca_dl
;
586 u64 cur_txok_cnt
= 0;
587 u64 cur_rxok_cnt
= 0;
588 u32 edca_be_ul
= 0x5ea42b;
589 u32 edca_be_dl
= 0x5ea42b;
590 bool bt_change_edca
= false;
592 if ((last_bt_edca_ul
!= rtlpcipriv
->bt_coexist
.bt_edca_ul
) ||
593 (last_bt_edca_dl
!= rtlpcipriv
->bt_coexist
.bt_edca_dl
)) {
594 rtlpriv
->dm
.current_turbo_edca
= false;
595 last_bt_edca_ul
= rtlpcipriv
->bt_coexist
.bt_edca_ul
;
596 last_bt_edca_dl
= rtlpcipriv
->bt_coexist
.bt_edca_dl
;
599 if (rtlpcipriv
->bt_coexist
.bt_edca_ul
!= 0) {
600 edca_be_ul
= rtlpcipriv
->bt_coexist
.bt_edca_ul
;
601 bt_change_edca
= true;
604 if (rtlpcipriv
->bt_coexist
.bt_edca_dl
!= 0) {
605 edca_be_ul
= rtlpcipriv
->bt_coexist
.bt_edca_dl
;
606 bt_change_edca
= true;
609 if (mac
->link_state
!= MAC80211_LINKED
) {
610 rtlpriv
->dm
.current_turbo_edca
= false;
614 if ((!mac
->ht_enable
) && (!rtlpcipriv
->bt_coexist
.bt_coexistence
)) {
615 if (!(edca_be_ul
& 0xffff0000))
616 edca_be_ul
|= 0x005e0000;
618 if (!(edca_be_dl
& 0xffff0000))
619 edca_be_dl
|= 0x005e0000;
622 if ((bt_change_edca
) || ((!rtlpriv
->dm
.is_any_nonbepkts
) &&
623 (!rtlpriv
->dm
.disable_framebursting
))) {
625 cur_txok_cnt
= rtlpriv
->stats
.txbytesunicast
- last_txok_cnt
;
626 cur_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
- last_rxok_cnt
;
628 if (cur_rxok_cnt
> 4 * cur_txok_cnt
) {
629 if (!rtlpriv
->dm
.is_cur_rdlstate
||
630 !rtlpriv
->dm
.current_turbo_edca
) {
631 rtl_write_dword(rtlpriv
,
634 rtlpriv
->dm
.is_cur_rdlstate
= true;
637 if (rtlpriv
->dm
.is_cur_rdlstate
||
638 !rtlpriv
->dm
.current_turbo_edca
) {
639 rtl_write_dword(rtlpriv
,
642 rtlpriv
->dm
.is_cur_rdlstate
= false;
645 rtlpriv
->dm
.current_turbo_edca
= true;
647 if (rtlpriv
->dm
.current_turbo_edca
) {
649 rtlpriv
->cfg
->ops
->set_hw_reg(hw
,
652 rtlpriv
->dm
.current_turbo_edca
= false;
656 rtlpriv
->dm
.is_any_nonbepkts
= false;
657 last_txok_cnt
= rtlpriv
->stats
.txbytesunicast
;
658 last_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
;
661 static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
664 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
665 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
666 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
667 struct rtl_efuse
*rtlefuse
= rtl_efuse(rtl_priv(hw
));
668 u8 thermalvalue
, delta
, delta_lck
, delta_iqk
;
669 long ele_a
, ele_d
, temp_cck
, val_x
, value32
;
670 long val_y
, ele_c
= 0;
671 u8 ofdm_index
[2], cck_index
= 0, ofdm_index_old
[2], cck_index_old
= 0;
673 bool is2t
= IS_92C_SERIAL(rtlhal
->version
);
674 s8 txpwr_level
[2] = {0, 0};
675 u8 ofdm_min_index
= 6, rf
;
677 rtlpriv
->dm
.txpower_trackinginit
= true;
678 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
679 "rtl92c_dm_txpower_tracking_callback_thermalmeter\n");
681 thermalvalue
= (u8
) rtl_get_rfreg(hw
, RF90_PATH_A
, RF_T_METER
, 0x1f);
683 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
684 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
685 thermalvalue
, rtlpriv
->dm
.thermalvalue
,
686 rtlefuse
->eeprom_thermalmeter
);
688 rtl92c_phy_ap_calibrate(hw
, (thermalvalue
-
689 rtlefuse
->eeprom_thermalmeter
));
696 ele_d
= rtl_get_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
697 MASKDWORD
) & MASKOFDM_D
;
699 for (i
= 0; i
< OFDM_TABLE_LENGTH
; i
++) {
700 if (ele_d
== (ofdmswing_table
[i
] & MASKOFDM_D
)) {
701 ofdm_index_old
[0] = (u8
) i
;
703 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
704 "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
705 ROFDM0_XATXIQIMBALANCE
,
706 ele_d
, ofdm_index_old
[0]);
712 ele_d
= rtl_get_bbreg(hw
, ROFDM0_XBTXIQIMBALANCE
,
713 MASKDWORD
) & MASKOFDM_D
;
715 for (i
= 0; i
< OFDM_TABLE_LENGTH
; i
++) {
716 if (ele_d
== (ofdmswing_table
[i
] &
719 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
721 "Initial pathB ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
722 ROFDM0_XBTXIQIMBALANCE
, ele_d
,
730 rtl_get_bbreg(hw
, RCCK0_TXFILTER2
, MASKDWORD
) & MASKCCK
;
732 for (i
= 0; i
< CCK_TABLE_LENGTH
; i
++) {
733 if (rtlpriv
->dm
.cck_inch14
) {
734 if (memcmp((void *)&temp_cck
,
735 (void *)&cckswing_table_ch14
[i
][2],
737 cck_index_old
= (u8
) i
;
739 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
741 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
742 RCCK0_TXFILTER2
, temp_cck
,
744 rtlpriv
->dm
.cck_inch14
);
748 if (memcmp((void *)&temp_cck
,
750 &cckswing_table_ch1ch13
[i
][2],
752 cck_index_old
= (u8
) i
;
754 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
756 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch14 %d\n",
757 RCCK0_TXFILTER2
, temp_cck
,
759 rtlpriv
->dm
.cck_inch14
);
765 if (!rtlpriv
->dm
.thermalvalue
) {
766 rtlpriv
->dm
.thermalvalue
=
767 rtlefuse
->eeprom_thermalmeter
;
768 rtlpriv
->dm
.thermalvalue_lck
= thermalvalue
;
769 rtlpriv
->dm
.thermalvalue_iqk
= thermalvalue
;
770 for (i
= 0; i
< rf
; i
++)
771 rtlpriv
->dm
.ofdm_index
[i
] = ofdm_index_old
[i
];
772 rtlpriv
->dm
.cck_index
= cck_index_old
;
775 delta
= (thermalvalue
> rtlpriv
->dm
.thermalvalue
) ?
776 (thermalvalue
- rtlpriv
->dm
.thermalvalue
) :
777 (rtlpriv
->dm
.thermalvalue
- thermalvalue
);
779 delta_lck
= (thermalvalue
> rtlpriv
->dm
.thermalvalue_lck
) ?
780 (thermalvalue
- rtlpriv
->dm
.thermalvalue_lck
) :
781 (rtlpriv
->dm
.thermalvalue_lck
- thermalvalue
);
783 delta_iqk
= (thermalvalue
> rtlpriv
->dm
.thermalvalue_iqk
) ?
784 (thermalvalue
- rtlpriv
->dm
.thermalvalue_iqk
) :
785 (rtlpriv
->dm
.thermalvalue_iqk
- thermalvalue
);
787 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
788 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
789 thermalvalue
, rtlpriv
->dm
.thermalvalue
,
790 rtlefuse
->eeprom_thermalmeter
, delta
, delta_lck
,
794 rtlpriv
->dm
.thermalvalue_lck
= thermalvalue
;
795 rtl92c_phy_lc_calibrate(hw
);
798 if (delta
> 0 && rtlpriv
->dm
.txpower_track_control
) {
799 if (thermalvalue
> rtlpriv
->dm
.thermalvalue
) {
800 for (i
= 0; i
< rf
; i
++)
801 rtlpriv
->dm
.ofdm_index
[i
] -= delta
;
802 rtlpriv
->dm
.cck_index
-= delta
;
804 for (i
= 0; i
< rf
; i
++)
805 rtlpriv
->dm
.ofdm_index
[i
] += delta
;
806 rtlpriv
->dm
.cck_index
+= delta
;
810 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
811 "temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
812 rtlpriv
->dm
.ofdm_index
[0],
813 rtlpriv
->dm
.ofdm_index
[1],
814 rtlpriv
->dm
.cck_index
);
816 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
817 "temp OFDM_A_index=0x%x, cck_index=0x%x\n",
818 rtlpriv
->dm
.ofdm_index
[0],
819 rtlpriv
->dm
.cck_index
);
822 if (thermalvalue
> rtlefuse
->eeprom_thermalmeter
) {
823 for (i
= 0; i
< rf
; i
++)
825 rtlpriv
->dm
.ofdm_index
[i
]
827 cck_index
= rtlpriv
->dm
.cck_index
+ 1;
829 for (i
= 0; i
< rf
; i
++)
831 rtlpriv
->dm
.ofdm_index
[i
];
832 cck_index
= rtlpriv
->dm
.cck_index
;
835 for (i
= 0; i
< rf
; i
++) {
836 if (txpwr_level
[i
] >= 0 &&
837 txpwr_level
[i
] <= 26) {
839 rtlefuse
->eeprom_thermalmeter
) {
845 } else if (delta
> 5 && thermalvalue
<
847 eeprom_thermalmeter
) {
850 } else if (txpwr_level
[i
] >= 27 &&
853 rtlefuse
->eeprom_thermalmeter
) {
859 } else if (txpwr_level
[i
] >= 32 &&
860 txpwr_level
[i
] <= 38 &&
862 rtlefuse
->eeprom_thermalmeter
868 if (txpwr_level
[i
] >= 0 && txpwr_level
[i
] <= 26) {
870 rtlefuse
->eeprom_thermalmeter
) {
876 } else if (delta
> 5 && thermalvalue
<
877 rtlefuse
->eeprom_thermalmeter
) {
880 } else if (txpwr_level
[i
] >= 27 &&
881 txpwr_level
[i
] <= 32 &&
883 rtlefuse
->eeprom_thermalmeter
) {
889 } else if (txpwr_level
[i
] >= 32 &&
890 txpwr_level
[i
] <= 38 &&
891 thermalvalue
> rtlefuse
->eeprom_thermalmeter
896 for (i
= 0; i
< rf
; i
++) {
897 if (ofdm_index
[i
] > OFDM_TABLE_SIZE
- 1)
898 ofdm_index
[i
] = OFDM_TABLE_SIZE
- 1;
900 else if (ofdm_index
[i
] < ofdm_min_index
)
901 ofdm_index
[i
] = ofdm_min_index
;
904 if (cck_index
> CCK_TABLE_SIZE
- 1)
905 cck_index
= CCK_TABLE_SIZE
- 1;
906 else if (cck_index
< 0)
910 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
911 "new OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
912 ofdm_index
[0], ofdm_index
[1],
915 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
916 "new OFDM_A_index=0x%x, cck_index=0x%x\n",
917 ofdm_index
[0], cck_index
);
921 if (rtlpriv
->dm
.txpower_track_control
&& delta
!= 0) {
923 (ofdmswing_table
[ofdm_index
[0]] & 0xFFC00000) >> 22;
924 val_x
= rtlphy
->reg_e94
;
925 val_y
= rtlphy
->reg_e9c
;
928 if ((val_x
& 0x00000200) != 0)
929 val_x
= val_x
| 0xFFFFFC00;
930 ele_a
= ((val_x
* ele_d
) >> 8) & 0x000003FF;
932 if ((val_y
& 0x00000200) != 0)
933 val_y
= val_y
| 0xFFFFFC00;
934 ele_c
= ((val_y
* ele_d
) >> 8) & 0x000003FF;
936 value32
= (ele_d
<< 22) |
937 ((ele_c
& 0x3F) << 16) | ele_a
;
939 rtl_set_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
942 value32
= (ele_c
& 0x000003C0) >> 6;
943 rtl_set_bbreg(hw
, ROFDM0_XCTXAFE
, MASKH4BITS
,
946 value32
= ((val_x
* ele_d
) >> 7) & 0x01;
947 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
950 value32
= ((val_y
* ele_d
) >> 7) & 0x01;
951 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
954 rtl_set_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
956 ofdmswing_table
[ofdm_index
[0]]);
958 rtl_set_bbreg(hw
, ROFDM0_XCTXAFE
, MASKH4BITS
,
960 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
961 BIT(31) | BIT(29), 0x00);
964 if (!rtlpriv
->dm
.cck_inch14
) {
965 rtl_write_byte(rtlpriv
, 0xa22,
966 cckswing_table_ch1ch13
[cck_index
]
968 rtl_write_byte(rtlpriv
, 0xa23,
969 cckswing_table_ch1ch13
[cck_index
]
971 rtl_write_byte(rtlpriv
, 0xa24,
972 cckswing_table_ch1ch13
[cck_index
]
974 rtl_write_byte(rtlpriv
, 0xa25,
975 cckswing_table_ch1ch13
[cck_index
]
977 rtl_write_byte(rtlpriv
, 0xa26,
978 cckswing_table_ch1ch13
[cck_index
]
980 rtl_write_byte(rtlpriv
, 0xa27,
981 cckswing_table_ch1ch13
[cck_index
]
983 rtl_write_byte(rtlpriv
, 0xa28,
984 cckswing_table_ch1ch13
[cck_index
]
986 rtl_write_byte(rtlpriv
, 0xa29,
987 cckswing_table_ch1ch13
[cck_index
]
990 rtl_write_byte(rtlpriv
, 0xa22,
991 cckswing_table_ch14
[cck_index
]
993 rtl_write_byte(rtlpriv
, 0xa23,
994 cckswing_table_ch14
[cck_index
]
996 rtl_write_byte(rtlpriv
, 0xa24,
997 cckswing_table_ch14
[cck_index
]
999 rtl_write_byte(rtlpriv
, 0xa25,
1000 cckswing_table_ch14
[cck_index
]
1002 rtl_write_byte(rtlpriv
, 0xa26,
1003 cckswing_table_ch14
[cck_index
]
1005 rtl_write_byte(rtlpriv
, 0xa27,
1006 cckswing_table_ch14
[cck_index
]
1008 rtl_write_byte(rtlpriv
, 0xa28,
1009 cckswing_table_ch14
[cck_index
]
1011 rtl_write_byte(rtlpriv
, 0xa29,
1012 cckswing_table_ch14
[cck_index
]
1017 ele_d
= (ofdmswing_table
[ofdm_index
[1]] &
1020 val_x
= rtlphy
->reg_eb4
;
1021 val_y
= rtlphy
->reg_ebc
;
1024 if ((val_x
& 0x00000200) != 0)
1025 val_x
= val_x
| 0xFFFFFC00;
1026 ele_a
= ((val_x
* ele_d
) >> 8) &
1029 if ((val_y
& 0x00000200) != 0)
1030 val_y
= val_y
| 0xFFFFFC00;
1031 ele_c
= ((val_y
* ele_d
) >> 8) &
1034 value32
= (ele_d
<< 22) |
1035 ((ele_c
& 0x3F) << 16) | ele_a
;
1037 ROFDM0_XBTXIQIMBALANCE
,
1038 MASKDWORD
, value32
);
1040 value32
= (ele_c
& 0x000003C0) >> 6;
1041 rtl_set_bbreg(hw
, ROFDM0_XDTXAFE
,
1042 MASKH4BITS
, value32
);
1044 value32
= ((val_x
* ele_d
) >> 7) & 0x01;
1045 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1048 value32
= ((val_y
* ele_d
) >> 7) & 0x01;
1049 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1053 ROFDM0_XBTXIQIMBALANCE
,
1055 ofdmswing_table
[ofdm_index
1057 rtl_set_bbreg(hw
, ROFDM0_XDTXAFE
,
1059 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1060 BIT(27) | BIT(25), 0x00);
1066 if (delta_iqk
> 3) {
1067 rtlpriv
->dm
.thermalvalue_iqk
= thermalvalue
;
1068 rtl92c_phy_iq_calibrate(hw
, false);
1071 if (rtlpriv
->dm
.txpower_track_control
)
1072 rtlpriv
->dm
.thermalvalue
= thermalvalue
;
1075 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
, "<===\n");
1079 static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
1080 struct ieee80211_hw
*hw
)
1082 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1084 rtlpriv
->dm
.txpower_tracking
= true;
1085 rtlpriv
->dm
.txpower_trackinginit
= false;
1087 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1088 "pMgntInfo->txpower_tracking = %d\n",
1089 rtlpriv
->dm
.txpower_tracking
);
1092 static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw
*hw
)
1094 rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw
);
1097 static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw
*hw
)
1099 rtl92c_dm_txpower_tracking_callback_thermalmeter(hw
);
1102 static void rtl92c_dm_check_txpower_tracking_thermal_meter(
1103 struct ieee80211_hw
*hw
)
1105 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1106 static u8 tm_trigger
;
1108 if (!rtlpriv
->dm
.txpower_tracking
)
1112 rtl_set_rfreg(hw
, RF90_PATH_A
, RF_T_METER
, RFREG_OFFSET_MASK
,
1114 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1115 "Trigger 92S Thermal Meter!!\n");
1119 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1120 "Schedule TxPowerTracking direct call!!\n");
1121 rtl92c_dm_txpower_tracking_directcall(hw
);
1126 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw
*hw
)
1128 rtl92c_dm_check_txpower_tracking_thermal_meter(hw
);
1130 EXPORT_SYMBOL(rtl92c_dm_check_txpower_tracking
);
1132 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw
*hw
)
1134 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1135 struct rate_adaptive
*p_ra
= &(rtlpriv
->ra
);
1137 p_ra
->ratr_state
= DM_RATR_STA_INIT
;
1138 p_ra
->pre_ratr_state
= DM_RATR_STA_INIT
;
1140 if (rtlpriv
->dm
.dm_type
== DM_TYPE_BYDRIVER
)
1141 rtlpriv
->dm
.useramask
= true;
1143 rtlpriv
->dm
.useramask
= false;
1146 EXPORT_SYMBOL(rtl92c_dm_init_rate_adaptive_mask
);
1148 static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw
*hw
)
1150 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1151 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1152 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1153 struct rate_adaptive
*p_ra
= &(rtlpriv
->ra
);
1154 u32 low_rssithresh_for_ra
, high_rssithresh_for_ra
;
1155 struct ieee80211_sta
*sta
= NULL
;
1157 if (is_hal_stop(rtlhal
)) {
1158 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1159 "<---- driver is going to unload\n");
1163 if (!rtlpriv
->dm
.useramask
) {
1164 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1165 "<---- driver does not control rate adaptive mask\n");
1169 if (mac
->link_state
== MAC80211_LINKED
&&
1170 mac
->opmode
== NL80211_IFTYPE_STATION
) {
1171 switch (p_ra
->pre_ratr_state
) {
1172 case DM_RATR_STA_HIGH
:
1173 high_rssithresh_for_ra
= 50;
1174 low_rssithresh_for_ra
= 20;
1176 case DM_RATR_STA_MIDDLE
:
1177 high_rssithresh_for_ra
= 55;
1178 low_rssithresh_for_ra
= 20;
1180 case DM_RATR_STA_LOW
:
1181 high_rssithresh_for_ra
= 50;
1182 low_rssithresh_for_ra
= 25;
1185 high_rssithresh_for_ra
= 50;
1186 low_rssithresh_for_ra
= 20;
1190 if (rtlpriv
->dm
.undecorated_smoothed_pwdb
>
1191 (long)high_rssithresh_for_ra
)
1192 p_ra
->ratr_state
= DM_RATR_STA_HIGH
;
1193 else if (rtlpriv
->dm
.undecorated_smoothed_pwdb
>
1194 (long)low_rssithresh_for_ra
)
1195 p_ra
->ratr_state
= DM_RATR_STA_MIDDLE
;
1197 p_ra
->ratr_state
= DM_RATR_STA_LOW
;
1199 if (p_ra
->pre_ratr_state
!= p_ra
->ratr_state
) {
1200 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
, "RSSI = %ld\n",
1201 rtlpriv
->dm
.undecorated_smoothed_pwdb
);
1202 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1203 "RSSI_LEVEL = %d\n", p_ra
->ratr_state
);
1204 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1205 "PreState = %d, CurState = %d\n",
1206 p_ra
->pre_ratr_state
, p_ra
->ratr_state
);
1208 /* Only the PCI card uses sta in the update rate table
1209 * callback routine */
1210 if (rtlhal
->interface
== INTF_PCI
) {
1212 sta
= ieee80211_find_sta(mac
->vif
, mac
->bssid
);
1214 rtlpriv
->cfg
->ops
->update_rate_tbl(hw
, sta
,
1217 p_ra
->pre_ratr_state
= p_ra
->ratr_state
;
1218 if (rtlhal
->interface
== INTF_PCI
)
1224 static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw
*hw
)
1226 dm_pstable
.pre_ccastate
= CCA_MAX
;
1227 dm_pstable
.cur_ccasate
= CCA_MAX
;
1228 dm_pstable
.pre_rfstate
= RF_MAX
;
1229 dm_pstable
.cur_rfstate
= RF_MAX
;
1230 dm_pstable
.rssi_val_min
= 0;
1233 void rtl92c_dm_rf_saving(struct ieee80211_hw
*hw
, u8 bforce_in_normal
)
1235 static u8 initialize
;
1236 static u32 reg_874
, reg_c70
, reg_85c
, reg_a74
;
1238 if (initialize
== 0) {
1239 reg_874
= (rtl_get_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1240 MASKDWORD
) & 0x1CC000) >> 14;
1242 reg_c70
= (rtl_get_bbreg(hw
, ROFDM0_AGCPARAMETER1
,
1243 MASKDWORD
) & BIT(3)) >> 3;
1245 reg_85c
= (rtl_get_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
,
1246 MASKDWORD
) & 0xFF000000) >> 24;
1248 reg_a74
= (rtl_get_bbreg(hw
, 0xa74, MASKDWORD
) & 0xF000) >> 12;
1253 if (!bforce_in_normal
) {
1254 if (dm_pstable
.rssi_val_min
!= 0) {
1255 if (dm_pstable
.pre_rfstate
== RF_NORMAL
) {
1256 if (dm_pstable
.rssi_val_min
>= 30)
1257 dm_pstable
.cur_rfstate
= RF_SAVE
;
1259 dm_pstable
.cur_rfstate
= RF_NORMAL
;
1261 if (dm_pstable
.rssi_val_min
<= 25)
1262 dm_pstable
.cur_rfstate
= RF_NORMAL
;
1264 dm_pstable
.cur_rfstate
= RF_SAVE
;
1267 dm_pstable
.cur_rfstate
= RF_MAX
;
1270 dm_pstable
.cur_rfstate
= RF_NORMAL
;
1273 if (dm_pstable
.pre_rfstate
!= dm_pstable
.cur_rfstate
) {
1274 if (dm_pstable
.cur_rfstate
== RF_SAVE
) {
1275 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1277 rtl_set_bbreg(hw
, ROFDM0_AGCPARAMETER1
, BIT(3), 0);
1278 rtl_set_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
,
1280 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1282 rtl_set_bbreg(hw
, 0xa74, 0xF000, 0x3);
1283 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x0);
1284 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x1);
1286 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1288 rtl_set_bbreg(hw
, ROFDM0_AGCPARAMETER1
, BIT(3),
1290 rtl_set_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
, 0xFF000000,
1292 rtl_set_bbreg(hw
, 0xa74, 0xF000, reg_a74
);
1293 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x0);
1296 dm_pstable
.pre_rfstate
= dm_pstable
.cur_rfstate
;
1299 EXPORT_SYMBOL(rtl92c_dm_rf_saving
);
1301 static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw
*hw
)
1303 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1304 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1305 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1307 if (((mac
->link_state
== MAC80211_NOLINK
)) &&
1308 (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
== 0)) {
1309 dm_pstable
.rssi_val_min
= 0;
1310 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
, "Not connected to any\n");
1313 if (mac
->link_state
== MAC80211_LINKED
) {
1314 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
1315 dm_pstable
.rssi_val_min
=
1316 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1317 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1318 "AP Client PWDB = 0x%lx\n",
1319 dm_pstable
.rssi_val_min
);
1321 dm_pstable
.rssi_val_min
=
1322 rtlpriv
->dm
.undecorated_smoothed_pwdb
;
1323 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1324 "STA Default Port PWDB = 0x%lx\n",
1325 dm_pstable
.rssi_val_min
);
1328 dm_pstable
.rssi_val_min
=
1329 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1331 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1332 "AP Ext Port PWDB = 0x%lx\n",
1333 dm_pstable
.rssi_val_min
);
1336 if (IS_92C_SERIAL(rtlhal
->version
))
1337 ;/* rtl92c_dm_1r_cca(hw); */
1339 rtl92c_dm_rf_saving(hw
, false);
1342 void rtl92c_dm_init(struct ieee80211_hw
*hw
)
1344 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1346 rtlpriv
->dm
.dm_type
= DM_TYPE_BYDRIVER
;
1347 rtl92c_dm_diginit(hw
);
1348 rtl92c_dm_init_dynamic_txpower(hw
);
1349 rtl92c_dm_init_edca_turbo(hw
);
1350 rtl92c_dm_init_rate_adaptive_mask(hw
);
1351 rtl92c_dm_initialize_txpower_tracking(hw
);
1352 rtl92c_dm_init_dynamic_bb_powersaving(hw
);
1354 EXPORT_SYMBOL(rtl92c_dm_init
);
1356 void rtl92c_dm_dynamic_txpower(struct ieee80211_hw
*hw
)
1358 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1359 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
1360 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1361 long undecorated_smoothed_pwdb
;
1363 if (!rtlpriv
->dm
.dynamic_txpower_enable
)
1366 if (rtlpriv
->dm
.dm_flag
& HAL_DM_HIPWR_DISABLE
) {
1367 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1371 if ((mac
->link_state
< MAC80211_LINKED
) &&
1372 (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
== 0)) {
1373 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_TRACE
,
1374 "Not connected to any\n");
1376 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1378 rtlpriv
->dm
.last_dtp_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1382 if (mac
->link_state
>= MAC80211_LINKED
) {
1383 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
1384 undecorated_smoothed_pwdb
=
1385 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1386 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1387 "AP Client PWDB = 0x%lx\n",
1388 undecorated_smoothed_pwdb
);
1390 undecorated_smoothed_pwdb
=
1391 rtlpriv
->dm
.undecorated_smoothed_pwdb
;
1392 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1393 "STA Default Port PWDB = 0x%lx\n",
1394 undecorated_smoothed_pwdb
);
1397 undecorated_smoothed_pwdb
=
1398 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1400 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1401 "AP Ext Port PWDB = 0x%lx\n",
1402 undecorated_smoothed_pwdb
);
1405 if (undecorated_smoothed_pwdb
>= TX_POWER_NEAR_FIELD_THRESH_LVL2
) {
1406 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL1
;
1407 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1408 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
1409 } else if ((undecorated_smoothed_pwdb
<
1410 (TX_POWER_NEAR_FIELD_THRESH_LVL2
- 3)) &&
1411 (undecorated_smoothed_pwdb
>=
1412 TX_POWER_NEAR_FIELD_THRESH_LVL1
)) {
1414 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL1
;
1415 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1416 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
1417 } else if (undecorated_smoothed_pwdb
<
1418 (TX_POWER_NEAR_FIELD_THRESH_LVL1
- 5)) {
1419 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1420 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1421 "TXHIGHPWRLEVEL_NORMAL\n");
1424 if ((rtlpriv
->dm
.dynamic_txhighpower_lvl
!= rtlpriv
->dm
.last_dtp_lvl
)) {
1425 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1426 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
1427 rtlphy
->current_channel
);
1428 rtl92c_phy_set_txpower_level(hw
, rtlphy
->current_channel
);
1431 rtlpriv
->dm
.last_dtp_lvl
= rtlpriv
->dm
.dynamic_txhighpower_lvl
;
1434 void rtl92c_dm_watchdog(struct ieee80211_hw
*hw
)
1436 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1437 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
1438 bool fw_current_inpsmode
= false;
1439 bool fw_ps_awake
= true;
1441 rtlpriv
->cfg
->ops
->get_hw_reg(hw
, HW_VAR_FW_PSMODE_STATUS
,
1442 (u8
*) (&fw_current_inpsmode
));
1443 rtlpriv
->cfg
->ops
->get_hw_reg(hw
, HW_VAR_FWLPS_RF_ON
,
1444 (u8
*) (&fw_ps_awake
));
1446 if ((ppsc
->rfpwr_state
== ERFON
) && ((!fw_current_inpsmode
) &&
1448 && (!ppsc
->rfchange_inprogress
)) {
1449 rtl92c_dm_pwdb_monitor(hw
);
1451 rtl92c_dm_false_alarm_counter_statistics(hw
);
1452 rtl92c_dm_dynamic_bb_powersaving(hw
);
1453 rtl92c_dm_dynamic_txpower(hw
);
1454 rtl92c_dm_check_txpower_tracking(hw
);
1455 rtl92c_dm_refresh_rate_adaptive_mask(hw
);
1456 rtl92c_dm_bt_coexist(hw
);
1457 rtl92c_dm_check_edca_turbo(hw
);
1460 EXPORT_SYMBOL(rtl92c_dm_watchdog
);
1462 u8
rtl92c_bt_rssi_state_change(struct ieee80211_hw
*hw
)
1464 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1465 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1466 long undecorated_smoothed_pwdb
;
1467 u8 curr_bt_rssi_state
= 0x00;
1469 if (rtlpriv
->mac80211
.link_state
== MAC80211_LINKED
) {
1470 undecorated_smoothed_pwdb
=
1471 GET_UNDECORATED_AVERAGE_RSSI(rtlpriv
);
1473 if (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
== 0)
1474 undecorated_smoothed_pwdb
= 100;
1476 undecorated_smoothed_pwdb
=
1477 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1480 /* Check RSSI to determine HighPower/NormalPower state for
1481 * BT coexistence. */
1482 if (undecorated_smoothed_pwdb
>= 67)
1483 curr_bt_rssi_state
&= (~BT_RSSI_STATE_NORMAL_POWER
);
1484 else if (undecorated_smoothed_pwdb
< 62)
1485 curr_bt_rssi_state
|= BT_RSSI_STATE_NORMAL_POWER
;
1487 /* Check RSSI to determine AMPDU setting for BT coexistence. */
1488 if (undecorated_smoothed_pwdb
>= 40)
1489 curr_bt_rssi_state
&= (~BT_RSSI_STATE_AMDPU_OFF
);
1490 else if (undecorated_smoothed_pwdb
<= 32)
1491 curr_bt_rssi_state
|= BT_RSSI_STATE_AMDPU_OFF
;
1493 /* Marked RSSI state. It will be used to determine BT coexistence
1495 if (undecorated_smoothed_pwdb
< 35)
1496 curr_bt_rssi_state
|= BT_RSSI_STATE_SPECIAL_LOW
;
1498 curr_bt_rssi_state
&= (~BT_RSSI_STATE_SPECIAL_LOW
);
1500 /* Set Tx Power according to BT status. */
1501 if (undecorated_smoothed_pwdb
>= 30)
1502 curr_bt_rssi_state
|= BT_RSSI_STATE_TXPOWER_LOW
;
1503 else if (undecorated_smoothed_pwdb
< 25)
1504 curr_bt_rssi_state
&= (~BT_RSSI_STATE_TXPOWER_LOW
);
1506 /* Check BT state related to BT_Idle in B/G mode. */
1507 if (undecorated_smoothed_pwdb
< 15)
1508 curr_bt_rssi_state
|= BT_RSSI_STATE_BG_EDCA_LOW
;
1510 curr_bt_rssi_state
&= (~BT_RSSI_STATE_BG_EDCA_LOW
);
1512 if (curr_bt_rssi_state
!= rtlpcipriv
->bt_coexist
.bt_rssi_state
) {
1513 rtlpcipriv
->bt_coexist
.bt_rssi_state
= curr_bt_rssi_state
;
1519 EXPORT_SYMBOL(rtl92c_bt_rssi_state_change
);
1521 static bool rtl92c_bt_state_change(struct ieee80211_hw
*hw
)
1523 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1524 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1526 u32 polling
, ratio_tx
, ratio_pri
;
1529 u8 cur_service_type
;
1531 if (rtlpriv
->mac80211
.link_state
< MAC80211_LINKED
)
1534 bt_state
= rtl_read_byte(rtlpriv
, 0x4fd);
1535 bt_tx
= rtl_read_dword(rtlpriv
, 0x488);
1536 bt_tx
= bt_tx
& 0x00ffffff;
1537 bt_pri
= rtl_read_dword(rtlpriv
, 0x48c);
1538 bt_pri
= bt_pri
& 0x00ffffff;
1539 polling
= rtl_read_dword(rtlpriv
, 0x490);
1541 if (bt_tx
== 0xffffffff && bt_pri
== 0xffffffff &&
1542 polling
== 0xffffffff && bt_state
== 0xff)
1545 bt_state
&= BIT_OFFSET_LEN_MASK_32(0, 1);
1546 if (bt_state
!= rtlpcipriv
->bt_coexist
.bt_cur_state
) {
1547 rtlpcipriv
->bt_coexist
.bt_cur_state
= bt_state
;
1549 if (rtlpcipriv
->bt_coexist
.reg_bt_sco
== 3) {
1550 rtlpcipriv
->bt_coexist
.bt_service
= BT_IDLE
;
1552 bt_state
= bt_state
|
1553 ((rtlpcipriv
->bt_coexist
.bt_ant_isolation
== 1) ?
1554 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1555 BIT_OFFSET_LEN_MASK_32(2, 1);
1556 rtl_write_byte(rtlpriv
, 0x4fd, bt_state
);
1561 ratio_tx
= bt_tx
* 1000 / polling
;
1562 ratio_pri
= bt_pri
* 1000 / polling
;
1563 rtlpcipriv
->bt_coexist
.ratio_tx
= ratio_tx
;
1564 rtlpcipriv
->bt_coexist
.ratio_pri
= ratio_pri
;
1566 if (bt_state
&& rtlpcipriv
->bt_coexist
.reg_bt_sco
== 3) {
1568 if ((ratio_tx
< 30) && (ratio_pri
< 30))
1569 cur_service_type
= BT_IDLE
;
1570 else if ((ratio_pri
> 110) && (ratio_pri
< 250))
1571 cur_service_type
= BT_SCO
;
1572 else if ((ratio_tx
>= 200) && (ratio_pri
>= 200))
1573 cur_service_type
= BT_BUSY
;
1574 else if ((ratio_tx
>= 350) && (ratio_tx
< 500))
1575 cur_service_type
= BT_OTHERBUSY
;
1576 else if (ratio_tx
>= 500)
1577 cur_service_type
= BT_PAN
;
1579 cur_service_type
= BT_OTHER_ACTION
;
1581 if (cur_service_type
!= rtlpcipriv
->bt_coexist
.bt_service
) {
1582 rtlpcipriv
->bt_coexist
.bt_service
= cur_service_type
;
1583 bt_state
= bt_state
|
1584 ((rtlpcipriv
->bt_coexist
.bt_ant_isolation
== 1) ?
1585 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1586 ((rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) ?
1587 0 : BIT_OFFSET_LEN_MASK_32(2, 1));
1589 /* Add interrupt migration when bt is not ini
1590 * idle state (no traffic). */
1591 if (rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) {
1592 rtl_write_word(rtlpriv
, 0x504, 0x0ccc);
1593 rtl_write_byte(rtlpriv
, 0x506, 0x54);
1594 rtl_write_byte(rtlpriv
, 0x507, 0x54);
1596 rtl_write_byte(rtlpriv
, 0x506, 0x00);
1597 rtl_write_byte(rtlpriv
, 0x507, 0x00);
1600 rtl_write_byte(rtlpriv
, 0x4fd, bt_state
);
1609 static bool rtl92c_bt_wifi_connect_change(struct ieee80211_hw
*hw
)
1611 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1612 static bool media_connect
;
1614 if (rtlpriv
->mac80211
.link_state
< MAC80211_LINKED
) {
1615 media_connect
= false;
1617 if (!media_connect
) {
1618 media_connect
= true;
1621 media_connect
= true;
1627 static void rtl92c_bt_set_normal(struct ieee80211_hw
*hw
)
1629 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1630 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1633 if (rtlpcipriv
->bt_coexist
.bt_service
== BT_OTHERBUSY
) {
1634 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5ea72b;
1635 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5ea72b;
1636 } else if (rtlpcipriv
->bt_coexist
.bt_service
== BT_BUSY
) {
1637 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5eb82f;
1638 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5eb82f;
1639 } else if (rtlpcipriv
->bt_coexist
.bt_service
== BT_SCO
) {
1640 if (rtlpcipriv
->bt_coexist
.ratio_tx
> 160) {
1641 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5ea72f;
1642 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5ea72f;
1644 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5ea32b;
1645 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5ea42b;
1648 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0;
1649 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0;
1652 if ((rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) &&
1653 (rtlpriv
->mac80211
.mode
== WIRELESS_MODE_G
||
1654 (rtlpriv
->mac80211
.mode
== (WIRELESS_MODE_G
| WIRELESS_MODE_B
))) &&
1655 (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1656 BT_RSSI_STATE_BG_EDCA_LOW
)) {
1657 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5eb82b;
1658 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5eb82b;
1662 static void rtl92c_bt_ant_isolation(struct ieee80211_hw
*hw
)
1664 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1665 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1668 /* Only enable HW BT coexist when BT in "Busy" state. */
1669 if (rtlpriv
->mac80211
.vendor
== PEER_CISCO
&&
1670 rtlpcipriv
->bt_coexist
.bt_service
== BT_OTHER_ACTION
) {
1671 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1673 if ((rtlpcipriv
->bt_coexist
.bt_service
== BT_BUSY
) &&
1674 (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1675 BT_RSSI_STATE_NORMAL_POWER
)) {
1676 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1677 } else if ((rtlpcipriv
->bt_coexist
.bt_service
==
1678 BT_OTHER_ACTION
) && (rtlpriv
->mac80211
.mode
<
1679 WIRELESS_MODE_N_24G
) &&
1680 (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1681 BT_RSSI_STATE_SPECIAL_LOW
)) {
1682 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1683 } else if (rtlpcipriv
->bt_coexist
.bt_service
== BT_PAN
) {
1684 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0x00);
1686 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0x00);
1690 if (rtlpcipriv
->bt_coexist
.bt_service
== BT_PAN
)
1691 rtl_write_dword(rtlpriv
, REG_GPIO_PIN_CTRL
, 0x10100);
1693 rtl_write_dword(rtlpriv
, REG_GPIO_PIN_CTRL
, 0x0);
1695 if (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1696 BT_RSSI_STATE_NORMAL_POWER
) {
1697 rtl92c_bt_set_normal(hw
);
1699 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0;
1700 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0;
1703 if (rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) {
1704 rtlpriv
->cfg
->ops
->set_rfreg(hw
,
1709 rtlpriv
->cfg
->ops
->set_rfreg(hw
,
1710 RF90_PATH_A
, 0x1e, 0xf0,
1711 rtlpcipriv
->bt_coexist
.bt_rfreg_origin_1e
);
1714 if (!rtlpriv
->dm
.dynamic_txpower_enable
) {
1715 if (rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) {
1716 if (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1717 BT_RSSI_STATE_TXPOWER_LOW
) {
1718 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1721 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1725 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1726 TXHIGHPWRLEVEL_NORMAL
;
1728 rtl92c_phy_set_txpower_level(hw
,
1729 rtlpriv
->phy
.current_channel
);
1733 static void rtl92c_check_bt_change(struct ieee80211_hw
*hw
)
1735 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1736 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1738 if (rtlpcipriv
->bt_coexist
.bt_cur_state
) {
1739 if (rtlpcipriv
->bt_coexist
.bt_ant_isolation
)
1740 rtl92c_bt_ant_isolation(hw
);
1742 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0x00);
1743 rtlpriv
->cfg
->ops
->set_rfreg(hw
, RF90_PATH_A
, 0x1e, 0xf0,
1744 rtlpcipriv
->bt_coexist
.bt_rfreg_origin_1e
);
1746 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0;
1747 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0;
1751 void rtl92c_dm_bt_coexist(struct ieee80211_hw
*hw
)
1753 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1755 bool wifi_connect_change
;
1756 bool bt_state_change
;
1757 bool rssi_state_change
;
1759 if ((rtlpcipriv
->bt_coexist
.bt_coexistence
) &&
1760 (rtlpcipriv
->bt_coexist
.bt_coexist_type
== BT_CSR_BC4
)) {
1762 wifi_connect_change
= rtl92c_bt_wifi_connect_change(hw
);
1763 bt_state_change
= rtl92c_bt_state_change(hw
);
1764 rssi_state_change
= rtl92c_bt_rssi_state_change(hw
);
1766 if (wifi_connect_change
|| bt_state_change
|| rssi_state_change
)
1767 rtl92c_check_bt_change(hw
);
1770 EXPORT_SYMBOL(rtl92c_dm_bt_coexist
);