drivers/net/wireless/wl12xx/wl12xx.h

   1 /*
   2  * This file is part of wl1271
   3  *
   4  * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
   5  * Copyright (C) 2008-2009 Nokia Corporation
   6  *
   7  * Contact: Luciano Coelho <luciano.coelho@nokia.com>
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * version 2 as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21  * 02110-1301 USA
  22  *
  23  */
  24
  25 #ifndef __WL12XX_H__
  26 #define __WL12XX_H__
  27
  28 #include <linux/mutex.h>
  29 #include <linux/completion.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/list.h>
  32 #include <linux/bitops.h>
  33 #include <net/mac80211.h>
  34
  35 #include "conf.h"
  36 #include "ini.h"
  37
  38 #define DRIVER_NAME "wl1271"
  39 #define DRIVER_PREFIX DRIVER_NAME ": "
  40
  41 enum {
  42         DEBUG_NONE      = 0,
  43         DEBUG_IRQ       = BIT(0),
  44         DEBUG_SPI       = BIT(1),
  45         DEBUG_BOOT      = BIT(2),
  46         DEBUG_MAILBOX   = BIT(3),
  47         DEBUG_TESTMODE  = BIT(4),
  48         DEBUG_EVENT     = BIT(5),
  49         DEBUG_TX        = BIT(6),
  50         DEBUG_RX        = BIT(7),
  51         DEBUG_SCAN      = BIT(8),
  52         DEBUG_CRYPT     = BIT(9),
  53         DEBUG_PSM       = BIT(10),
  54         DEBUG_MAC80211  = BIT(11),
  55         DEBUG_CMD       = BIT(12),
  56         DEBUG_ACX       = BIT(13),
  57         DEBUG_SDIO      = BIT(14),
  58         DEBUG_FILTERS   = BIT(15),
  59         DEBUG_ADHOC     = BIT(16),
  60         DEBUG_ALL       = ~0,
  61 };
  62
  63 extern u32 wl12xx_debug_level;
  64
  65 #define DEBUG_DUMP_LIMIT 1024
  66
  67 #define wl1271_error(fmt, arg...) \
  68         pr_err(DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
  69
  70 #define wl1271_warning(fmt, arg...) \
  71         pr_warning(DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
  72
  73 #define wl1271_notice(fmt, arg...) \
  74         pr_info(DRIVER_PREFIX fmt "\n", ##arg)
  75
  76 #define wl1271_info(fmt, arg...) \
  77         pr_info(DRIVER_PREFIX fmt "\n", ##arg)
  78
  79 #define wl1271_debug(level, fmt, arg...) \
  80         do { \
  81                 if (level & wl12xx_debug_level) \
  82                         pr_debug(DRIVER_PREFIX fmt "\n", ##arg); \
  83         } while (0)
  84
  85 /* TODO: use pr_debug_hex_dump when it will be available */
  86 #define wl1271_dump(level, prefix, buf, len)    \
  87         do { \
  88                 if (level & wl12xx_debug_level) \
  89                         print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
  90                                        DUMP_PREFIX_OFFSET, 16, 1,       \
  91                                        buf,                             \
  92                                        min_t(size_t, len, DEBUG_DUMP_LIMIT), \
  93                                        0);                              \
  94         } while (0)
  95
  96 #define wl1271_dump_ascii(level, prefix, buf, len)      \
  97         do { \
  98                 if (level & wl12xx_debug_level) \
  99                         print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
 100                                        DUMP_PREFIX_OFFSET, 16, 1,       \
 101                                        buf,                             \
 102                                        min_t(size_t, len, DEBUG_DUMP_LIMIT), \
 103                                        true);                           \
 104         } while (0)
 105
 106 #define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN |   \
 107                                   CFG_BSSID_FILTER_EN | \
 108                                   CFG_MC_FILTER_EN)
 109
 110 #define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN |  \
 111                                   CFG_RX_MGMT_EN | CFG_RX_DATA_EN |   \
 112                                   CFG_RX_CTL_EN | CFG_RX_BCN_EN |     \
 113                                   CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
 114
 115 #define WL1271_FW_NAME "wl1271-fw.bin"
 116 #define WL1271_NVS_NAME "wl1271-nvs.bin"
 117
 118 #define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
 119 #define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
 120
 121 #define WL1271_CIPHER_SUITE_GEM 0x00147201
 122
 123 #define WL1271_BUSY_WORD_CNT 1
 124 #define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
 125
 126 #define WL1271_ELP_HW_STATE_ASLEEP 0
 127 #define WL1271_ELP_HW_STATE_IRQ    1
 128
 129 #define WL1271_DEFAULT_BEACON_INT  100
 130 #define WL1271_DEFAULT_DTIM_PERIOD 1
 131
 132 #define ACX_TX_DESCRIPTORS         32
 133
 134 #define WL1271_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)
 135
 136 enum wl1271_state {
 137         WL1271_STATE_OFF,
 138         WL1271_STATE_ON,
 139         WL1271_STATE_PLT,
 140 };
 141
 142 enum wl1271_partition_type {
 143         PART_DOWN,
 144         PART_WORK,
 145         PART_DRPW,
 146
 147         PART_TABLE_LEN
 148 };
 149
 150 struct wl1271_partition {
 151         u32 size;
 152         u32 start;
 153 };
 154
 155 struct wl1271_partition_set {
 156         struct wl1271_partition mem;
 157         struct wl1271_partition reg;
 158         struct wl1271_partition mem2;
 159         struct wl1271_partition mem3;
 160 };
 161
 162 struct wl1271;
 163
 164 /* FIXME: I'm not sure about this structure name */
 165 struct wl1271_chip {
 166         u32 id;
 167         char fw_ver[21];
 168 };
 169
 170 struct wl1271_stats {
 171         struct acx_statistics *fw_stats;
 172         unsigned long fw_stats_update;
 173
 174         unsigned int retry_count;
 175         unsigned int excessive_retries;
 176 };
 177
 178 #define NUM_TX_QUEUES              4
 179 #define NUM_RX_PKT_DESC            8
 180
 181 /* FW status registers */
 182 struct wl1271_fw_status {
 183         __le32 intr;
 184         u8  fw_rx_counter;
 185         u8  drv_rx_counter;
 186         u8  reserved;
 187         u8  tx_results_counter;
 188         __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
 189         __le32 tx_released_blks[NUM_TX_QUEUES];
 190         __le32 fw_localtime;
 191         __le32 padding[2];
 192 } __packed;
 193
 194 struct wl1271_rx_mem_pool_addr {
 195         u32 addr;
 196         u32 addr_extra;
 197 };
 198
 199 struct wl1271_scan {
 200         struct cfg80211_scan_request *req;
 201         bool *scanned_ch;
 202         bool failed;
 203         u8 state;
 204         u8 ssid[IW_ESSID_MAX_SIZE+1];
 205         size_t ssid_len;
 206 };
 207
 208 struct wl1271_if_operations {
 209         void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
 210                      bool fixed);
 211         void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
 212                      bool fixed);
 213         void (*reset)(struct wl1271 *wl);
 214         void (*init)(struct wl1271 *wl);
 215         int (*power)(struct wl1271 *wl, bool enable);
 216         struct device* (*dev)(struct wl1271 *wl);
 217         void (*enable_irq)(struct wl1271 *wl);
 218         void (*disable_irq)(struct wl1271 *wl);
 219 };
 220
 221 struct wl1271 {
 222         struct platform_device *plat_dev;
 223         struct ieee80211_hw *hw;
 224         bool mac80211_registered;
 225
 226         void *if_priv;
 227
 228         struct wl1271_if_operations *if_ops;
 229
 230         void (*set_power)(bool enable);
 231         int irq;
 232         int ref_clock;
 233
 234         spinlock_t wl_lock;
 235
 236         enum wl1271_state state;
 237         struct mutex mutex;
 238
 239 #define WL1271_FLAG_STA_RATES_CHANGED  (0)
 240 #define WL1271_FLAG_STA_ASSOCIATED     (1)
 241 #define WL1271_FLAG_JOINED             (2)
 242 #define WL1271_FLAG_GPIO_POWER         (3)
 243 #define WL1271_FLAG_TX_QUEUE_STOPPED   (4)
 244 #define WL1271_FLAG_IN_ELP             (5)
 245 #define WL1271_FLAG_PSM                (6)
 246 #define WL1271_FLAG_PSM_REQUESTED      (7)
 247 #define WL1271_FLAG_IRQ_PENDING        (8)
 248 #define WL1271_FLAG_IRQ_RUNNING        (9)
 249 #define WL1271_FLAG_IDLE              (10)
 250 #define WL1271_FLAG_IDLE_REQUESTED    (11)
 251 #define WL1271_FLAG_PSPOLL_FAILURE    (12)
 252 #define WL1271_FLAG_STA_STATE_SENT    (13)
 253 #define WL1271_FLAG_FW_TX_BUSY        (14)
 254         unsigned long flags;
 255
 256         struct wl1271_partition_set part;
 257
 258         struct wl1271_chip chip;
 259
 260         int cmd_box_addr;
 261         int event_box_addr;
 262
 263         u8 *fw;
 264         size_t fw_len;
 265         struct wl1271_nvs_file *nvs;
 266         size_t nvs_len;
 267
 268         s8 hw_pg_ver;
 269
 270         u8 bssid[ETH_ALEN];
 271         u8 mac_addr[ETH_ALEN];
 272         u8 bss_type;
 273         u8 set_bss_type;
 274         u8 ssid[IW_ESSID_MAX_SIZE + 1];
 275         u8 ssid_len;
 276         int channel;
 277
 278         struct wl1271_acx_mem_map *target_mem_map;
 279
 280         /* Accounting for allocated / available TX blocks on HW */
 281         u32 tx_blocks_freed[NUM_TX_QUEUES];
 282         u32 tx_blocks_available;
 283         u32 tx_results_count;
 284
 285         /* Transmitted TX packets counter for chipset interface */
 286         u32 tx_packets_count;
 287
 288         /* Time-offset between host and chipset clocks */
 289         s64 time_offset;
 290
 291         /* Session counter for the chipset */
 292         int session_counter;
 293
 294         /* Frames scheduled for transmission, not handled yet */
 295         struct sk_buff_head tx_queue[NUM_TX_QUEUES];
 296         int tx_queue_count;
 297
 298         struct work_struct tx_work;
 299
 300         /* Pending TX frames */
 301         unsigned long tx_frames_map[BITS_TO_LONGS(ACX_TX_DESCRIPTORS)];
 302         struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
 303         int tx_frames_cnt;
 304
 305         /* Security sequence number counters */
 306         u8 tx_security_last_seq;
 307         s64 tx_security_seq;
 308
 309         /* FW Rx counter */
 310         u32 rx_counter;
 311
 312         /* Rx memory pool address */
 313         struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
 314
 315         /* Intermediate buffer, used for packet aggregation */
 316         u8 *aggr_buf;
 317
 318         /* The target interrupt mask */
 319         struct work_struct irq_work;
 320
 321         /* Hardware recovery work */
 322         struct work_struct recovery_work;
 323
 324         /* The mbox event mask */
 325         u32 event_mask;
 326
 327         /* Mailbox pointers */
 328         u32 mbox_ptr[2];
 329
 330         /* Are we currently scanning */
 331         struct wl1271_scan scan;
 332         struct delayed_work scan_complete_work;
 333
 334         /* probe-req template for the current AP */
 335         struct sk_buff *probereq;
 336
 337         /* Our association ID */
 338         u16 aid;
 339
 340         /*
 341          * currently configured rate set:
 342          *      bits  0-15 - 802.11abg rates
 343          *      bits 16-23 - 802.11n   MCS index mask
 344          * support only 1 stream, thus only 8 bits for the MCS rates (0-7).
 345          */
 346         u32 sta_rate_set;
 347         u32 basic_rate_set;
 348         u32 basic_rate;
 349         u32 rate_set;
 350
 351         /* The current band */
 352         enum ieee80211_band band;
 353
 354         /* Beaconing interval (needed for ad-hoc) */
 355         u32 beacon_int;
 356
 357         /* Default key (for WEP) */
 358         u32 default_key;
 359
 360         unsigned int filters;
 361         unsigned int rx_config;
 362         unsigned int rx_filter;
 363
 364         struct completion *elp_compl;
 365         struct delayed_work elp_work;
 366         struct delayed_work pspoll_work;
 367
 368         /* counter for ps-poll delivery failures */
 369         int ps_poll_failures;
 370
 371         /* retry counter for PSM entries */
 372         u8 psm_entry_retry;
 373
 374         /* in dBm */
 375         int power_level;
 376
 377         int rssi_thold;
 378         int last_rssi_event;
 379
 380         struct wl1271_stats stats;
 381         struct dentry *rootdir;
 382
 383         __le32 buffer_32;
 384         u32 buffer_cmd;
 385         u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
 386
 387         struct wl1271_fw_status *fw_status;
 388         struct wl1271_tx_hw_res_if *tx_res_if;
 389
 390         struct ieee80211_vif *vif;
 391
 392         /* Current chipset configuration */
 393         struct conf_drv_settings conf;
 394
 395         bool sg_enabled;
 396
 397         bool enable_11a;
 398
 399         struct list_head list;
 400
 401         /* Most recently reported noise in dBm */
 402         s8 noise;
 403 };
 404
 405 int wl1271_plt_start(struct wl1271 *wl);
 406 int wl1271_plt_stop(struct wl1271 *wl);
 407
 408 #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
 409
 410 #define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
 411
 412 #define WL1271_DEFAULT_POWER_LEVEL 0
 413
 414 #define WL1271_TX_QUEUE_LOW_WATERMARK  10
 415 #define WL1271_TX_QUEUE_HIGH_WATERMARK 25
 416
 417 /* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
 418    on in case is has been shut down shortly before */
 419 #define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
 420 #define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
 421
 422 /* Macros to handle wl1271.sta_rate_set */
 423 #define HW_BG_RATES_MASK        0xffff
 424 #define HW_HT_RATES_OFFSET      16
 425
 426 #endif