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[mirror_ubuntu-jammy-kernel.git] / drivers / scsi / hpsa.c
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 *
16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/delay.h>
27 #include <linux/fs.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/spinlock.h>
31 #include <linux/compat.h>
32 #include <linux/blktrace_api.h>
33 #include <linux/uaccess.h>
34 #include <linux/io.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/completion.h>
37 #include <linux/moduleparam.h>
38 #include <scsi/scsi.h>
39 #include <scsi/scsi_cmnd.h>
40 #include <scsi/scsi_device.h>
41 #include <scsi/scsi_host.h>
42 #include <scsi/scsi_tcq.h>
43 #include <scsi/scsi_eh.h>
44 #include <scsi/scsi_transport_sas.h>
45 #include <scsi/scsi_dbg.h>
46 #include <linux/cciss_ioctl.h>
47 #include <linux/string.h>
48 #include <linux/bitmap.h>
49 #include <linux/atomic.h>
50 #include <linux/jiffies.h>
51 #include <linux/percpu-defs.h>
52 #include <linux/percpu.h>
53 #include <asm/unaligned.h>
54 #include <asm/div64.h>
55 #include "hpsa_cmd.h"
56 #include "hpsa.h"
57
58 /*
59 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
60 * with an optional trailing '-' followed by a byte value (0-255).
61 */
62 #define HPSA_DRIVER_VERSION "3.4.20-200"
63 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
64 #define HPSA "hpsa"
65
66 /* How long to wait for CISS doorbell communication */
67 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
68 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
69 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
70 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
71 #define MAX_IOCTL_CONFIG_WAIT 1000
72
73 /*define how many times we will try a command because of bus resets */
74 #define MAX_CMD_RETRIES 3
75 /* How long to wait before giving up on a command */
76 #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
77
78 /* Embedded module documentation macros - see modules.h */
79 MODULE_AUTHOR("Hewlett-Packard Company");
80 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
81 HPSA_DRIVER_VERSION);
82 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
83 MODULE_VERSION(HPSA_DRIVER_VERSION);
84 MODULE_LICENSE("GPL");
85 MODULE_ALIAS("cciss");
86
87 static int hpsa_simple_mode;
88 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
89 MODULE_PARM_DESC(hpsa_simple_mode,
90 "Use 'simple mode' rather than 'performant mode'");
91
92 /* define the PCI info for the cards we can control */
93 static const struct pci_device_id hpsa_pci_device_id[] = {
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151 {0,}
152 };
153
154 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155
156 /* board_id = Subsystem Device ID & Vendor ID
157 * product = Marketing Name for the board
158 * access = Address of the struct of function pointers
159 */
160 static struct board_type products[] = {
161 {0x40700E11, "Smart Array 5300", &SA5A_access},
162 {0x40800E11, "Smart Array 5i", &SA5B_access},
163 {0x40820E11, "Smart Array 532", &SA5B_access},
164 {0x40830E11, "Smart Array 5312", &SA5B_access},
165 {0x409A0E11, "Smart Array 641", &SA5A_access},
166 {0x409B0E11, "Smart Array 642", &SA5A_access},
167 {0x409C0E11, "Smart Array 6400", &SA5A_access},
168 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
169 {0x40910E11, "Smart Array 6i", &SA5A_access},
170 {0x3225103C, "Smart Array P600", &SA5A_access},
171 {0x3223103C, "Smart Array P800", &SA5A_access},
172 {0x3234103C, "Smart Array P400", &SA5A_access},
173 {0x3235103C, "Smart Array P400i", &SA5A_access},
174 {0x3211103C, "Smart Array E200i", &SA5A_access},
175 {0x3212103C, "Smart Array E200", &SA5A_access},
176 {0x3213103C, "Smart Array E200i", &SA5A_access},
177 {0x3214103C, "Smart Array E200i", &SA5A_access},
178 {0x3215103C, "Smart Array E200i", &SA5A_access},
179 {0x3237103C, "Smart Array E500", &SA5A_access},
180 {0x323D103C, "Smart Array P700m", &SA5A_access},
181 {0x3241103C, "Smart Array P212", &SA5_access},
182 {0x3243103C, "Smart Array P410", &SA5_access},
183 {0x3245103C, "Smart Array P410i", &SA5_access},
184 {0x3247103C, "Smart Array P411", &SA5_access},
185 {0x3249103C, "Smart Array P812", &SA5_access},
186 {0x324A103C, "Smart Array P712m", &SA5_access},
187 {0x324B103C, "Smart Array P711m", &SA5_access},
188 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
189 {0x3350103C, "Smart Array P222", &SA5_access},
190 {0x3351103C, "Smart Array P420", &SA5_access},
191 {0x3352103C, "Smart Array P421", &SA5_access},
192 {0x3353103C, "Smart Array P822", &SA5_access},
193 {0x3354103C, "Smart Array P420i", &SA5_access},
194 {0x3355103C, "Smart Array P220i", &SA5_access},
195 {0x3356103C, "Smart Array P721m", &SA5_access},
196 {0x1920103C, "Smart Array P430i", &SA5_access},
197 {0x1921103C, "Smart Array P830i", &SA5_access},
198 {0x1922103C, "Smart Array P430", &SA5_access},
199 {0x1923103C, "Smart Array P431", &SA5_access},
200 {0x1924103C, "Smart Array P830", &SA5_access},
201 {0x1925103C, "Smart Array P831", &SA5_access},
202 {0x1926103C, "Smart Array P731m", &SA5_access},
203 {0x1928103C, "Smart Array P230i", &SA5_access},
204 {0x1929103C, "Smart Array P530", &SA5_access},
205 {0x21BD103C, "Smart Array P244br", &SA5_access},
206 {0x21BE103C, "Smart Array P741m", &SA5_access},
207 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
208 {0x21C0103C, "Smart Array P440ar", &SA5_access},
209 {0x21C1103C, "Smart Array P840ar", &SA5_access},
210 {0x21C2103C, "Smart Array P440", &SA5_access},
211 {0x21C3103C, "Smart Array P441", &SA5_access},
212 {0x21C4103C, "Smart Array", &SA5_access},
213 {0x21C5103C, "Smart Array P841", &SA5_access},
214 {0x21C6103C, "Smart HBA H244br", &SA5_access},
215 {0x21C7103C, "Smart HBA H240", &SA5_access},
216 {0x21C8103C, "Smart HBA H241", &SA5_access},
217 {0x21C9103C, "Smart Array", &SA5_access},
218 {0x21CA103C, "Smart Array P246br", &SA5_access},
219 {0x21CB103C, "Smart Array P840", &SA5_access},
220 {0x21CC103C, "Smart Array", &SA5_access},
221 {0x21CD103C, "Smart Array", &SA5_access},
222 {0x21CE103C, "Smart HBA", &SA5_access},
223 {0x05809005, "SmartHBA-SA", &SA5_access},
224 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
225 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
226 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
227 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
228 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
229 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
230 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
231 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
232 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
233 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
234 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
235 };
236
237 static struct scsi_transport_template *hpsa_sas_transport_template;
238 static int hpsa_add_sas_host(struct ctlr_info *h);
239 static void hpsa_delete_sas_host(struct ctlr_info *h);
240 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
241 struct hpsa_scsi_dev_t *device);
242 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
243 static struct hpsa_scsi_dev_t
244 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
245 struct sas_rphy *rphy);
246
247 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
248 static const struct scsi_cmnd hpsa_cmd_busy;
249 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
250 static const struct scsi_cmnd hpsa_cmd_idle;
251 static int number_of_controllers;
252
253 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
254 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
255 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
256 void __user *arg);
257 static int hpsa_passthru_ioctl(struct ctlr_info *h,
258 IOCTL_Command_struct *iocommand);
259 static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
260 BIG_IOCTL_Command_struct *ioc);
261
262 #ifdef CONFIG_COMPAT
263 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
264 void __user *arg);
265 #endif
266
267 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
268 static struct CommandList *cmd_alloc(struct ctlr_info *h);
269 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
270 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
271 struct scsi_cmnd *scmd);
272 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
273 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
274 int cmd_type);
275 static void hpsa_free_cmd_pool(struct ctlr_info *h);
276 #define VPD_PAGE (1 << 8)
277 #define HPSA_SIMPLE_ERROR_BITS 0x03
278
279 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
280 static void hpsa_scan_start(struct Scsi_Host *);
281 static int hpsa_scan_finished(struct Scsi_Host *sh,
282 unsigned long elapsed_time);
283 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
284
285 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
286 static int hpsa_slave_alloc(struct scsi_device *sdev);
287 static int hpsa_slave_configure(struct scsi_device *sdev);
288 static void hpsa_slave_destroy(struct scsi_device *sdev);
289
290 static void hpsa_update_scsi_devices(struct ctlr_info *h);
291 static int check_for_unit_attention(struct ctlr_info *h,
292 struct CommandList *c);
293 static void check_ioctl_unit_attention(struct ctlr_info *h,
294 struct CommandList *c);
295 /* performant mode helper functions */
296 static void calc_bucket_map(int *bucket, int num_buckets,
297 int nsgs, int min_blocks, u32 *bucket_map);
298 static void hpsa_free_performant_mode(struct ctlr_info *h);
299 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
300 static inline u32 next_command(struct ctlr_info *h, u8 q);
301 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
302 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
303 u64 *cfg_offset);
304 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
305 unsigned long *memory_bar);
306 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
307 bool *legacy_board);
308 static int wait_for_device_to_become_ready(struct ctlr_info *h,
309 unsigned char lunaddr[],
310 int reply_queue);
311 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
312 int wait_for_ready);
313 static inline void finish_cmd(struct CommandList *c);
314 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
315 #define BOARD_NOT_READY 0
316 #define BOARD_READY 1
317 static void hpsa_drain_accel_commands(struct ctlr_info *h);
318 static void hpsa_flush_cache(struct ctlr_info *h);
319 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
320 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
321 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
322 static void hpsa_command_resubmit_worker(struct work_struct *work);
323 static u32 lockup_detected(struct ctlr_info *h);
324 static int detect_controller_lockup(struct ctlr_info *h);
325 static void hpsa_disable_rld_caching(struct ctlr_info *h);
326 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
327 struct ReportExtendedLUNdata *buf, int bufsize);
328 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
329 unsigned char scsi3addr[], u8 page);
330 static int hpsa_luns_changed(struct ctlr_info *h);
331 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
332 struct hpsa_scsi_dev_t *dev,
333 unsigned char *scsi3addr);
334
335 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
336 {
337 unsigned long *priv = shost_priv(sdev->host);
338 return (struct ctlr_info *) *priv;
339 }
340
341 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
342 {
343 unsigned long *priv = shost_priv(sh);
344 return (struct ctlr_info *) *priv;
345 }
346
347 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
348 {
349 return c->scsi_cmd == SCSI_CMD_IDLE;
350 }
351
352 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
353 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
354 u8 *sense_key, u8 *asc, u8 *ascq)
355 {
356 struct scsi_sense_hdr sshdr;
357 bool rc;
358
359 *sense_key = -1;
360 *asc = -1;
361 *ascq = -1;
362
363 if (sense_data_len < 1)
364 return;
365
366 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
367 if (rc) {
368 *sense_key = sshdr.sense_key;
369 *asc = sshdr.asc;
370 *ascq = sshdr.ascq;
371 }
372 }
373
374 static int check_for_unit_attention(struct ctlr_info *h,
375 struct CommandList *c)
376 {
377 u8 sense_key, asc, ascq;
378 int sense_len;
379
380 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
381 sense_len = sizeof(c->err_info->SenseInfo);
382 else
383 sense_len = c->err_info->SenseLen;
384
385 decode_sense_data(c->err_info->SenseInfo, sense_len,
386 &sense_key, &asc, &ascq);
387 if (sense_key != UNIT_ATTENTION || asc == 0xff)
388 return 0;
389
390 switch (asc) {
391 case STATE_CHANGED:
392 dev_warn(&h->pdev->dev,
393 "%s: a state change detected, command retried\n",
394 h->devname);
395 break;
396 case LUN_FAILED:
397 dev_warn(&h->pdev->dev,
398 "%s: LUN failure detected\n", h->devname);
399 break;
400 case REPORT_LUNS_CHANGED:
401 dev_warn(&h->pdev->dev,
402 "%s: report LUN data changed\n", h->devname);
403 /*
404 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
405 * target (array) devices.
406 */
407 break;
408 case POWER_OR_RESET:
409 dev_warn(&h->pdev->dev,
410 "%s: a power on or device reset detected\n",
411 h->devname);
412 break;
413 case UNIT_ATTENTION_CLEARED:
414 dev_warn(&h->pdev->dev,
415 "%s: unit attention cleared by another initiator\n",
416 h->devname);
417 break;
418 default:
419 dev_warn(&h->pdev->dev,
420 "%s: unknown unit attention detected\n",
421 h->devname);
422 break;
423 }
424 return 1;
425 }
426
427 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
428 {
429 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
430 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
431 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
432 return 0;
433 dev_warn(&h->pdev->dev, HPSA "device busy");
434 return 1;
435 }
436
437 static u32 lockup_detected(struct ctlr_info *h);
438 static ssize_t host_show_lockup_detected(struct device *dev,
439 struct device_attribute *attr, char *buf)
440 {
441 int ld;
442 struct ctlr_info *h;
443 struct Scsi_Host *shost = class_to_shost(dev);
444
445 h = shost_to_hba(shost);
446 ld = lockup_detected(h);
447
448 return sprintf(buf, "ld=%d\n", ld);
449 }
450
451 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
452 struct device_attribute *attr,
453 const char *buf, size_t count)
454 {
455 int status, len;
456 struct ctlr_info *h;
457 struct Scsi_Host *shost = class_to_shost(dev);
458 char tmpbuf[10];
459
460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461 return -EACCES;
462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
463 strncpy(tmpbuf, buf, len);
464 tmpbuf[len] = '\0';
465 if (sscanf(tmpbuf, "%d", &status) != 1)
466 return -EINVAL;
467 h = shost_to_hba(shost);
468 h->acciopath_status = !!status;
469 dev_warn(&h->pdev->dev,
470 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
471 h->acciopath_status ? "enabled" : "disabled");
472 return count;
473 }
474
475 static ssize_t host_store_raid_offload_debug(struct device *dev,
476 struct device_attribute *attr,
477 const char *buf, size_t count)
478 {
479 int debug_level, len;
480 struct ctlr_info *h;
481 struct Scsi_Host *shost = class_to_shost(dev);
482 char tmpbuf[10];
483
484 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
485 return -EACCES;
486 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
487 strncpy(tmpbuf, buf, len);
488 tmpbuf[len] = '\0';
489 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
490 return -EINVAL;
491 if (debug_level < 0)
492 debug_level = 0;
493 h = shost_to_hba(shost);
494 h->raid_offload_debug = debug_level;
495 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
496 h->raid_offload_debug);
497 return count;
498 }
499
500 static ssize_t host_store_rescan(struct device *dev,
501 struct device_attribute *attr,
502 const char *buf, size_t count)
503 {
504 struct ctlr_info *h;
505 struct Scsi_Host *shost = class_to_shost(dev);
506 h = shost_to_hba(shost);
507 hpsa_scan_start(h->scsi_host);
508 return count;
509 }
510
511 static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
512 {
513 device->offload_enabled = 0;
514 device->offload_to_be_enabled = 0;
515 }
516
517 static ssize_t host_show_firmware_revision(struct device *dev,
518 struct device_attribute *attr, char *buf)
519 {
520 struct ctlr_info *h;
521 struct Scsi_Host *shost = class_to_shost(dev);
522 unsigned char *fwrev;
523
524 h = shost_to_hba(shost);
525 if (!h->hba_inquiry_data)
526 return 0;
527 fwrev = &h->hba_inquiry_data[32];
528 return snprintf(buf, 20, "%c%c%c%c\n",
529 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
530 }
531
532 static ssize_t host_show_commands_outstanding(struct device *dev,
533 struct device_attribute *attr, char *buf)
534 {
535 struct Scsi_Host *shost = class_to_shost(dev);
536 struct ctlr_info *h = shost_to_hba(shost);
537
538 return snprintf(buf, 20, "%d\n",
539 atomic_read(&h->commands_outstanding));
540 }
541
542 static ssize_t host_show_transport_mode(struct device *dev,
543 struct device_attribute *attr, char *buf)
544 {
545 struct ctlr_info *h;
546 struct Scsi_Host *shost = class_to_shost(dev);
547
548 h = shost_to_hba(shost);
549 return snprintf(buf, 20, "%s\n",
550 h->transMethod & CFGTBL_Trans_Performant ?
551 "performant" : "simple");
552 }
553
554 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
555 struct device_attribute *attr, char *buf)
556 {
557 struct ctlr_info *h;
558 struct Scsi_Host *shost = class_to_shost(dev);
559
560 h = shost_to_hba(shost);
561 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
562 (h->acciopath_status == 1) ? "enabled" : "disabled");
563 }
564
565 /* List of controllers which cannot be hard reset on kexec with reset_devices */
566 static u32 unresettable_controller[] = {
567 0x324a103C, /* Smart Array P712m */
568 0x324b103C, /* Smart Array P711m */
569 0x3223103C, /* Smart Array P800 */
570 0x3234103C, /* Smart Array P400 */
571 0x3235103C, /* Smart Array P400i */
572 0x3211103C, /* Smart Array E200i */
573 0x3212103C, /* Smart Array E200 */
574 0x3213103C, /* Smart Array E200i */
575 0x3214103C, /* Smart Array E200i */
576 0x3215103C, /* Smart Array E200i */
577 0x3237103C, /* Smart Array E500 */
578 0x323D103C, /* Smart Array P700m */
579 0x40800E11, /* Smart Array 5i */
580 0x409C0E11, /* Smart Array 6400 */
581 0x409D0E11, /* Smart Array 6400 EM */
582 0x40700E11, /* Smart Array 5300 */
583 0x40820E11, /* Smart Array 532 */
584 0x40830E11, /* Smart Array 5312 */
585 0x409A0E11, /* Smart Array 641 */
586 0x409B0E11, /* Smart Array 642 */
587 0x40910E11, /* Smart Array 6i */
588 };
589
590 /* List of controllers which cannot even be soft reset */
591 static u32 soft_unresettable_controller[] = {
592 0x40800E11, /* Smart Array 5i */
593 0x40700E11, /* Smart Array 5300 */
594 0x40820E11, /* Smart Array 532 */
595 0x40830E11, /* Smart Array 5312 */
596 0x409A0E11, /* Smart Array 641 */
597 0x409B0E11, /* Smart Array 642 */
598 0x40910E11, /* Smart Array 6i */
599 /* Exclude 640x boards. These are two pci devices in one slot
600 * which share a battery backed cache module. One controls the
601 * cache, the other accesses the cache through the one that controls
602 * it. If we reset the one controlling the cache, the other will
603 * likely not be happy. Just forbid resetting this conjoined mess.
604 * The 640x isn't really supported by hpsa anyway.
605 */
606 0x409C0E11, /* Smart Array 6400 */
607 0x409D0E11, /* Smart Array 6400 EM */
608 };
609
610 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
611 {
612 int i;
613
614 for (i = 0; i < nelems; i++)
615 if (a[i] == board_id)
616 return 1;
617 return 0;
618 }
619
620 static int ctlr_is_hard_resettable(u32 board_id)
621 {
622 return !board_id_in_array(unresettable_controller,
623 ARRAY_SIZE(unresettable_controller), board_id);
624 }
625
626 static int ctlr_is_soft_resettable(u32 board_id)
627 {
628 return !board_id_in_array(soft_unresettable_controller,
629 ARRAY_SIZE(soft_unresettable_controller), board_id);
630 }
631
632 static int ctlr_is_resettable(u32 board_id)
633 {
634 return ctlr_is_hard_resettable(board_id) ||
635 ctlr_is_soft_resettable(board_id);
636 }
637
638 static ssize_t host_show_resettable(struct device *dev,
639 struct device_attribute *attr, char *buf)
640 {
641 struct ctlr_info *h;
642 struct Scsi_Host *shost = class_to_shost(dev);
643
644 h = shost_to_hba(shost);
645 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
646 }
647
648 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
649 {
650 return (scsi3addr[3] & 0xC0) == 0x40;
651 }
652
653 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
654 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
655 };
656 #define HPSA_RAID_0 0
657 #define HPSA_RAID_4 1
658 #define HPSA_RAID_1 2 /* also used for RAID 10 */
659 #define HPSA_RAID_5 3 /* also used for RAID 50 */
660 #define HPSA_RAID_51 4
661 #define HPSA_RAID_6 5 /* also used for RAID 60 */
662 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
663 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
664 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
665
666 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
667 {
668 return !device->physical_device;
669 }
670
671 static ssize_t raid_level_show(struct device *dev,
672 struct device_attribute *attr, char *buf)
673 {
674 ssize_t l = 0;
675 unsigned char rlevel;
676 struct ctlr_info *h;
677 struct scsi_device *sdev;
678 struct hpsa_scsi_dev_t *hdev;
679 unsigned long flags;
680
681 sdev = to_scsi_device(dev);
682 h = sdev_to_hba(sdev);
683 spin_lock_irqsave(&h->lock, flags);
684 hdev = sdev->hostdata;
685 if (!hdev) {
686 spin_unlock_irqrestore(&h->lock, flags);
687 return -ENODEV;
688 }
689
690 /* Is this even a logical drive? */
691 if (!is_logical_device(hdev)) {
692 spin_unlock_irqrestore(&h->lock, flags);
693 l = snprintf(buf, PAGE_SIZE, "N/A\n");
694 return l;
695 }
696
697 rlevel = hdev->raid_level;
698 spin_unlock_irqrestore(&h->lock, flags);
699 if (rlevel > RAID_UNKNOWN)
700 rlevel = RAID_UNKNOWN;
701 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
702 return l;
703 }
704
705 static ssize_t lunid_show(struct device *dev,
706 struct device_attribute *attr, char *buf)
707 {
708 struct ctlr_info *h;
709 struct scsi_device *sdev;
710 struct hpsa_scsi_dev_t *hdev;
711 unsigned long flags;
712 unsigned char lunid[8];
713
714 sdev = to_scsi_device(dev);
715 h = sdev_to_hba(sdev);
716 spin_lock_irqsave(&h->lock, flags);
717 hdev = sdev->hostdata;
718 if (!hdev) {
719 spin_unlock_irqrestore(&h->lock, flags);
720 return -ENODEV;
721 }
722 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
723 spin_unlock_irqrestore(&h->lock, flags);
724 return snprintf(buf, 20, "0x%8phN\n", lunid);
725 }
726
727 static ssize_t unique_id_show(struct device *dev,
728 struct device_attribute *attr, char *buf)
729 {
730 struct ctlr_info *h;
731 struct scsi_device *sdev;
732 struct hpsa_scsi_dev_t *hdev;
733 unsigned long flags;
734 unsigned char sn[16];
735
736 sdev = to_scsi_device(dev);
737 h = sdev_to_hba(sdev);
738 spin_lock_irqsave(&h->lock, flags);
739 hdev = sdev->hostdata;
740 if (!hdev) {
741 spin_unlock_irqrestore(&h->lock, flags);
742 return -ENODEV;
743 }
744 memcpy(sn, hdev->device_id, sizeof(sn));
745 spin_unlock_irqrestore(&h->lock, flags);
746 return snprintf(buf, 16 * 2 + 2,
747 "%02X%02X%02X%02X%02X%02X%02X%02X"
748 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
749 sn[0], sn[1], sn[2], sn[3],
750 sn[4], sn[5], sn[6], sn[7],
751 sn[8], sn[9], sn[10], sn[11],
752 sn[12], sn[13], sn[14], sn[15]);
753 }
754
755 static ssize_t sas_address_show(struct device *dev,
756 struct device_attribute *attr, char *buf)
757 {
758 struct ctlr_info *h;
759 struct scsi_device *sdev;
760 struct hpsa_scsi_dev_t *hdev;
761 unsigned long flags;
762 u64 sas_address;
763
764 sdev = to_scsi_device(dev);
765 h = sdev_to_hba(sdev);
766 spin_lock_irqsave(&h->lock, flags);
767 hdev = sdev->hostdata;
768 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
769 spin_unlock_irqrestore(&h->lock, flags);
770 return -ENODEV;
771 }
772 sas_address = hdev->sas_address;
773 spin_unlock_irqrestore(&h->lock, flags);
774
775 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
776 }
777
778 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
779 struct device_attribute *attr, char *buf)
780 {
781 struct ctlr_info *h;
782 struct scsi_device *sdev;
783 struct hpsa_scsi_dev_t *hdev;
784 unsigned long flags;
785 int offload_enabled;
786
787 sdev = to_scsi_device(dev);
788 h = sdev_to_hba(sdev);
789 spin_lock_irqsave(&h->lock, flags);
790 hdev = sdev->hostdata;
791 if (!hdev) {
792 spin_unlock_irqrestore(&h->lock, flags);
793 return -ENODEV;
794 }
795 offload_enabled = hdev->offload_enabled;
796 spin_unlock_irqrestore(&h->lock, flags);
797
798 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
799 return snprintf(buf, 20, "%d\n", offload_enabled);
800 else
801 return snprintf(buf, 40, "%s\n",
802 "Not applicable for a controller");
803 }
804
805 #define MAX_PATHS 8
806 static ssize_t path_info_show(struct device *dev,
807 struct device_attribute *attr, char *buf)
808 {
809 struct ctlr_info *h;
810 struct scsi_device *sdev;
811 struct hpsa_scsi_dev_t *hdev;
812 unsigned long flags;
813 int i;
814 int output_len = 0;
815 u8 box;
816 u8 bay;
817 u8 path_map_index = 0;
818 char *active;
819 unsigned char phys_connector[2];
820
821 sdev = to_scsi_device(dev);
822 h = sdev_to_hba(sdev);
823 spin_lock_irqsave(&h->devlock, flags);
824 hdev = sdev->hostdata;
825 if (!hdev) {
826 spin_unlock_irqrestore(&h->devlock, flags);
827 return -ENODEV;
828 }
829
830 bay = hdev->bay;
831 for (i = 0; i < MAX_PATHS; i++) {
832 path_map_index = 1<<i;
833 if (i == hdev->active_path_index)
834 active = "Active";
835 else if (hdev->path_map & path_map_index)
836 active = "Inactive";
837 else
838 continue;
839
840 output_len += scnprintf(buf + output_len,
841 PAGE_SIZE - output_len,
842 "[%d:%d:%d:%d] %20.20s ",
843 h->scsi_host->host_no,
844 hdev->bus, hdev->target, hdev->lun,
845 scsi_device_type(hdev->devtype));
846
847 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
848 output_len += scnprintf(buf + output_len,
849 PAGE_SIZE - output_len,
850 "%s\n", active);
851 continue;
852 }
853
854 box = hdev->box[i];
855 memcpy(&phys_connector, &hdev->phys_connector[i],
856 sizeof(phys_connector));
857 if (phys_connector[0] < '0')
858 phys_connector[0] = '0';
859 if (phys_connector[1] < '0')
860 phys_connector[1] = '0';
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
863 "PORT: %.2s ",
864 phys_connector);
865 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
866 hdev->expose_device) {
867 if (box == 0 || box == 0xFF) {
868 output_len += scnprintf(buf + output_len,
869 PAGE_SIZE - output_len,
870 "BAY: %hhu %s\n",
871 bay, active);
872 } else {
873 output_len += scnprintf(buf + output_len,
874 PAGE_SIZE - output_len,
875 "BOX: %hhu BAY: %hhu %s\n",
876 box, bay, active);
877 }
878 } else if (box != 0 && box != 0xFF) {
879 output_len += scnprintf(buf + output_len,
880 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
881 box, active);
882 } else
883 output_len += scnprintf(buf + output_len,
884 PAGE_SIZE - output_len, "%s\n", active);
885 }
886
887 spin_unlock_irqrestore(&h->devlock, flags);
888 return output_len;
889 }
890
891 static ssize_t host_show_ctlr_num(struct device *dev,
892 struct device_attribute *attr, char *buf)
893 {
894 struct ctlr_info *h;
895 struct Scsi_Host *shost = class_to_shost(dev);
896
897 h = shost_to_hba(shost);
898 return snprintf(buf, 20, "%d\n", h->ctlr);
899 }
900
901 static ssize_t host_show_legacy_board(struct device *dev,
902 struct device_attribute *attr, char *buf)
903 {
904 struct ctlr_info *h;
905 struct Scsi_Host *shost = class_to_shost(dev);
906
907 h = shost_to_hba(shost);
908 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
909 }
910
911 static DEVICE_ATTR_RO(raid_level);
912 static DEVICE_ATTR_RO(lunid);
913 static DEVICE_ATTR_RO(unique_id);
914 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
915 static DEVICE_ATTR_RO(sas_address);
916 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
917 host_show_hp_ssd_smart_path_enabled, NULL);
918 static DEVICE_ATTR_RO(path_info);
919 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
920 host_show_hp_ssd_smart_path_status,
921 host_store_hp_ssd_smart_path_status);
922 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
923 host_store_raid_offload_debug);
924 static DEVICE_ATTR(firmware_revision, S_IRUGO,
925 host_show_firmware_revision, NULL);
926 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
927 host_show_commands_outstanding, NULL);
928 static DEVICE_ATTR(transport_mode, S_IRUGO,
929 host_show_transport_mode, NULL);
930 static DEVICE_ATTR(resettable, S_IRUGO,
931 host_show_resettable, NULL);
932 static DEVICE_ATTR(lockup_detected, S_IRUGO,
933 host_show_lockup_detected, NULL);
934 static DEVICE_ATTR(ctlr_num, S_IRUGO,
935 host_show_ctlr_num, NULL);
936 static DEVICE_ATTR(legacy_board, S_IRUGO,
937 host_show_legacy_board, NULL);
938
939 static struct device_attribute *hpsa_sdev_attrs[] = {
940 &dev_attr_raid_level,
941 &dev_attr_lunid,
942 &dev_attr_unique_id,
943 &dev_attr_hp_ssd_smart_path_enabled,
944 &dev_attr_path_info,
945 &dev_attr_sas_address,
946 NULL,
947 };
948
949 static struct device_attribute *hpsa_shost_attrs[] = {
950 &dev_attr_rescan,
951 &dev_attr_firmware_revision,
952 &dev_attr_commands_outstanding,
953 &dev_attr_transport_mode,
954 &dev_attr_resettable,
955 &dev_attr_hp_ssd_smart_path_status,
956 &dev_attr_raid_offload_debug,
957 &dev_attr_lockup_detected,
958 &dev_attr_ctlr_num,
959 &dev_attr_legacy_board,
960 NULL,
961 };
962
963 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
964 HPSA_MAX_CONCURRENT_PASSTHRUS)
965
966 static struct scsi_host_template hpsa_driver_template = {
967 .module = THIS_MODULE,
968 .name = HPSA,
969 .proc_name = HPSA,
970 .queuecommand = hpsa_scsi_queue_command,
971 .scan_start = hpsa_scan_start,
972 .scan_finished = hpsa_scan_finished,
973 .change_queue_depth = hpsa_change_queue_depth,
974 .this_id = -1,
975 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
976 .ioctl = hpsa_ioctl,
977 .slave_alloc = hpsa_slave_alloc,
978 .slave_configure = hpsa_slave_configure,
979 .slave_destroy = hpsa_slave_destroy,
980 #ifdef CONFIG_COMPAT
981 .compat_ioctl = hpsa_compat_ioctl,
982 #endif
983 .sdev_attrs = hpsa_sdev_attrs,
984 .shost_attrs = hpsa_shost_attrs,
985 .max_sectors = 2048,
986 .no_write_same = 1,
987 };
988
989 static inline u32 next_command(struct ctlr_info *h, u8 q)
990 {
991 u32 a;
992 struct reply_queue_buffer *rq = &h->reply_queue[q];
993
994 if (h->transMethod & CFGTBL_Trans_io_accel1)
995 return h->access.command_completed(h, q);
996
997 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
998 return h->access.command_completed(h, q);
999
1000 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
1001 a = rq->head[rq->current_entry];
1002 rq->current_entry++;
1003 atomic_dec(&h->commands_outstanding);
1004 } else {
1005 a = FIFO_EMPTY;
1006 }
1007 /* Check for wraparound */
1008 if (rq->current_entry == h->max_commands) {
1009 rq->current_entry = 0;
1010 rq->wraparound ^= 1;
1011 }
1012 return a;
1013 }
1014
1015 /*
1016 * There are some special bits in the bus address of the
1017 * command that we have to set for the controller to know
1018 * how to process the command:
1019 *
1020 * Normal performant mode:
1021 * bit 0: 1 means performant mode, 0 means simple mode.
1022 * bits 1-3 = block fetch table entry
1023 * bits 4-6 = command type (== 0)
1024 *
1025 * ioaccel1 mode:
1026 * bit 0 = "performant mode" bit.
1027 * bits 1-3 = block fetch table entry
1028 * bits 4-6 = command type (== 110)
1029 * (command type is needed because ioaccel1 mode
1030 * commands are submitted through the same register as normal
1031 * mode commands, so this is how the controller knows whether
1032 * the command is normal mode or ioaccel1 mode.)
1033 *
1034 * ioaccel2 mode:
1035 * bit 0 = "performant mode" bit.
1036 * bits 1-4 = block fetch table entry (note extra bit)
1037 * bits 4-6 = not needed, because ioaccel2 mode has
1038 * a separate special register for submitting commands.
1039 */
1040
1041 /*
1042 * set_performant_mode: Modify the tag for cciss performant
1043 * set bit 0 for pull model, bits 3-1 for block fetch
1044 * register number
1045 */
1046 #define DEFAULT_REPLY_QUEUE (-1)
1047 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1048 int reply_queue)
1049 {
1050 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1051 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1052 if (unlikely(!h->msix_vectors))
1053 return;
1054 c->Header.ReplyQueue = reply_queue;
1055 }
1056 }
1057
1058 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1059 struct CommandList *c,
1060 int reply_queue)
1061 {
1062 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1063
1064 /*
1065 * Tell the controller to post the reply to the queue for this
1066 * processor. This seems to give the best I/O throughput.
1067 */
1068 cp->ReplyQueue = reply_queue;
1069 /*
1070 * Set the bits in the address sent down to include:
1071 * - performant mode bit (bit 0)
1072 * - pull count (bits 1-3)
1073 * - command type (bits 4-6)
1074 */
1075 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1076 IOACCEL1_BUSADDR_CMDTYPE;
1077 }
1078
1079 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1080 struct CommandList *c,
1081 int reply_queue)
1082 {
1083 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1084 &h->ioaccel2_cmd_pool[c->cmdindex];
1085
1086 /* Tell the controller to post the reply to the queue for this
1087 * processor. This seems to give the best I/O throughput.
1088 */
1089 cp->reply_queue = reply_queue;
1090 /* Set the bits in the address sent down to include:
1091 * - performant mode bit not used in ioaccel mode 2
1092 * - pull count (bits 0-3)
1093 * - command type isn't needed for ioaccel2
1094 */
1095 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1096 }
1097
1098 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1099 struct CommandList *c,
1100 int reply_queue)
1101 {
1102 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1103
1104 /*
1105 * Tell the controller to post the reply to the queue for this
1106 * processor. This seems to give the best I/O throughput.
1107 */
1108 cp->reply_queue = reply_queue;
1109 /*
1110 * Set the bits in the address sent down to include:
1111 * - performant mode bit not used in ioaccel mode 2
1112 * - pull count (bits 0-3)
1113 * - command type isn't needed for ioaccel2
1114 */
1115 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1116 }
1117
1118 static int is_firmware_flash_cmd(u8 *cdb)
1119 {
1120 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1121 }
1122
1123 /*
1124 * During firmware flash, the heartbeat register may not update as frequently
1125 * as it should. So we dial down lockup detection during firmware flash. and
1126 * dial it back up when firmware flash completes.
1127 */
1128 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1129 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1130 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1131 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1132 struct CommandList *c)
1133 {
1134 if (!is_firmware_flash_cmd(c->Request.CDB))
1135 return;
1136 atomic_inc(&h->firmware_flash_in_progress);
1137 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1138 }
1139
1140 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1141 struct CommandList *c)
1142 {
1143 if (is_firmware_flash_cmd(c->Request.CDB) &&
1144 atomic_dec_and_test(&h->firmware_flash_in_progress))
1145 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1146 }
1147
1148 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1149 struct CommandList *c, int reply_queue)
1150 {
1151 dial_down_lockup_detection_during_fw_flash(h, c);
1152 atomic_inc(&h->commands_outstanding);
1153 if (c->device)
1154 atomic_inc(&c->device->commands_outstanding);
1155
1156 reply_queue = h->reply_map[raw_smp_processor_id()];
1157 switch (c->cmd_type) {
1158 case CMD_IOACCEL1:
1159 set_ioaccel1_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1161 break;
1162 case CMD_IOACCEL2:
1163 set_ioaccel2_performant_mode(h, c, reply_queue);
1164 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1165 break;
1166 case IOACCEL2_TMF:
1167 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1168 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1169 break;
1170 default:
1171 set_performant_mode(h, c, reply_queue);
1172 h->access.submit_command(h, c);
1173 }
1174 }
1175
1176 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1177 {
1178 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1179 }
1180
1181 static inline int is_hba_lunid(unsigned char scsi3addr[])
1182 {
1183 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1184 }
1185
1186 static inline int is_scsi_rev_5(struct ctlr_info *h)
1187 {
1188 if (!h->hba_inquiry_data)
1189 return 0;
1190 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1191 return 1;
1192 return 0;
1193 }
1194
1195 static int hpsa_find_target_lun(struct ctlr_info *h,
1196 unsigned char scsi3addr[], int bus, int *target, int *lun)
1197 {
1198 /* finds an unused bus, target, lun for a new physical device
1199 * assumes h->devlock is held
1200 */
1201 int i, found = 0;
1202 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1203
1204 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1205
1206 for (i = 0; i < h->ndevices; i++) {
1207 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1208 __set_bit(h->dev[i]->target, lun_taken);
1209 }
1210
1211 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1212 if (i < HPSA_MAX_DEVICES) {
1213 /* *bus = 1; */
1214 *target = i;
1215 *lun = 0;
1216 found = 1;
1217 }
1218 return !found;
1219 }
1220
1221 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1222 struct hpsa_scsi_dev_t *dev, char *description)
1223 {
1224 #define LABEL_SIZE 25
1225 char label[LABEL_SIZE];
1226
1227 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1228 return;
1229
1230 switch (dev->devtype) {
1231 case TYPE_RAID:
1232 snprintf(label, LABEL_SIZE, "controller");
1233 break;
1234 case TYPE_ENCLOSURE:
1235 snprintf(label, LABEL_SIZE, "enclosure");
1236 break;
1237 case TYPE_DISK:
1238 case TYPE_ZBC:
1239 if (dev->external)
1240 snprintf(label, LABEL_SIZE, "external");
1241 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1242 snprintf(label, LABEL_SIZE, "%s",
1243 raid_label[PHYSICAL_DRIVE]);
1244 else
1245 snprintf(label, LABEL_SIZE, "RAID-%s",
1246 dev->raid_level > RAID_UNKNOWN ? "?" :
1247 raid_label[dev->raid_level]);
1248 break;
1249 case TYPE_ROM:
1250 snprintf(label, LABEL_SIZE, "rom");
1251 break;
1252 case TYPE_TAPE:
1253 snprintf(label, LABEL_SIZE, "tape");
1254 break;
1255 case TYPE_MEDIUM_CHANGER:
1256 snprintf(label, LABEL_SIZE, "changer");
1257 break;
1258 default:
1259 snprintf(label, LABEL_SIZE, "UNKNOWN");
1260 break;
1261 }
1262
1263 dev_printk(level, &h->pdev->dev,
1264 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1265 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1266 description,
1267 scsi_device_type(dev->devtype),
1268 dev->vendor,
1269 dev->model,
1270 label,
1271 dev->offload_config ? '+' : '-',
1272 dev->offload_to_be_enabled ? '+' : '-',
1273 dev->expose_device);
1274 }
1275
1276 /* Add an entry into h->dev[] array. */
1277 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1278 struct hpsa_scsi_dev_t *device,
1279 struct hpsa_scsi_dev_t *added[], int *nadded)
1280 {
1281 /* assumes h->devlock is held */
1282 int n = h->ndevices;
1283 int i;
1284 unsigned char addr1[8], addr2[8];
1285 struct hpsa_scsi_dev_t *sd;
1286
1287 if (n >= HPSA_MAX_DEVICES) {
1288 dev_err(&h->pdev->dev, "too many devices, some will be "
1289 "inaccessible.\n");
1290 return -1;
1291 }
1292
1293 /* physical devices do not have lun or target assigned until now. */
1294 if (device->lun != -1)
1295 /* Logical device, lun is already assigned. */
1296 goto lun_assigned;
1297
1298 /* If this device a non-zero lun of a multi-lun device
1299 * byte 4 of the 8-byte LUN addr will contain the logical
1300 * unit no, zero otherwise.
1301 */
1302 if (device->scsi3addr[4] == 0) {
1303 /* This is not a non-zero lun of a multi-lun device */
1304 if (hpsa_find_target_lun(h, device->scsi3addr,
1305 device->bus, &device->target, &device->lun) != 0)
1306 return -1;
1307 goto lun_assigned;
1308 }
1309
1310 /* This is a non-zero lun of a multi-lun device.
1311 * Search through our list and find the device which
1312 * has the same 8 byte LUN address, excepting byte 4 and 5.
1313 * Assign the same bus and target for this new LUN.
1314 * Use the logical unit number from the firmware.
1315 */
1316 memcpy(addr1, device->scsi3addr, 8);
1317 addr1[4] = 0;
1318 addr1[5] = 0;
1319 for (i = 0; i < n; i++) {
1320 sd = h->dev[i];
1321 memcpy(addr2, sd->scsi3addr, 8);
1322 addr2[4] = 0;
1323 addr2[5] = 0;
1324 /* differ only in byte 4 and 5? */
1325 if (memcmp(addr1, addr2, 8) == 0) {
1326 device->bus = sd->bus;
1327 device->target = sd->target;
1328 device->lun = device->scsi3addr[4];
1329 break;
1330 }
1331 }
1332 if (device->lun == -1) {
1333 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1334 " suspect firmware bug or unsupported hardware "
1335 "configuration.\n");
1336 return -1;
1337 }
1338
1339 lun_assigned:
1340
1341 h->dev[n] = device;
1342 h->ndevices++;
1343 added[*nadded] = device;
1344 (*nadded)++;
1345 hpsa_show_dev_msg(KERN_INFO, h, device,
1346 device->expose_device ? "added" : "masked");
1347 return 0;
1348 }
1349
1350 /*
1351 * Called during a scan operation.
1352 *
1353 * Update an entry in h->dev[] array.
1354 */
1355 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1356 int entry, struct hpsa_scsi_dev_t *new_entry)
1357 {
1358 /* assumes h->devlock is held */
1359 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1360
1361 /* Raid level changed. */
1362 h->dev[entry]->raid_level = new_entry->raid_level;
1363
1364 /*
1365 * ioacccel_handle may have changed for a dual domain disk
1366 */
1367 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1368
1369 /* Raid offload parameters changed. Careful about the ordering. */
1370 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1371 /*
1372 * if drive is newly offload_enabled, we want to copy the
1373 * raid map data first. If previously offload_enabled and
1374 * offload_config were set, raid map data had better be
1375 * the same as it was before. If raid map data has changed
1376 * then it had better be the case that
1377 * h->dev[entry]->offload_enabled is currently 0.
1378 */
1379 h->dev[entry]->raid_map = new_entry->raid_map;
1380 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1381 }
1382 if (new_entry->offload_to_be_enabled) {
1383 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1384 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1385 }
1386 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1387 h->dev[entry]->offload_config = new_entry->offload_config;
1388 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1389 h->dev[entry]->queue_depth = new_entry->queue_depth;
1390
1391 /*
1392 * We can turn off ioaccel offload now, but need to delay turning
1393 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1394 * can't do that until all the devices are updated.
1395 */
1396 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1397
1398 /*
1399 * turn ioaccel off immediately if told to do so.
1400 */
1401 if (!new_entry->offload_to_be_enabled)
1402 h->dev[entry]->offload_enabled = 0;
1403
1404 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1405 }
1406
1407 /* Replace an entry from h->dev[] array. */
1408 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1409 int entry, struct hpsa_scsi_dev_t *new_entry,
1410 struct hpsa_scsi_dev_t *added[], int *nadded,
1411 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1412 {
1413 /* assumes h->devlock is held */
1414 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1415 removed[*nremoved] = h->dev[entry];
1416 (*nremoved)++;
1417
1418 /*
1419 * New physical devices won't have target/lun assigned yet
1420 * so we need to preserve the values in the slot we are replacing.
1421 */
1422 if (new_entry->target == -1) {
1423 new_entry->target = h->dev[entry]->target;
1424 new_entry->lun = h->dev[entry]->lun;
1425 }
1426
1427 h->dev[entry] = new_entry;
1428 added[*nadded] = new_entry;
1429 (*nadded)++;
1430
1431 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1432 }
1433
1434 /* Remove an entry from h->dev[] array. */
1435 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1436 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1437 {
1438 /* assumes h->devlock is held */
1439 int i;
1440 struct hpsa_scsi_dev_t *sd;
1441
1442 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1443
1444 sd = h->dev[entry];
1445 removed[*nremoved] = h->dev[entry];
1446 (*nremoved)++;
1447
1448 for (i = entry; i < h->ndevices-1; i++)
1449 h->dev[i] = h->dev[i+1];
1450 h->ndevices--;
1451 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1452 }
1453
1454 #define SCSI3ADDR_EQ(a, b) ( \
1455 (a)[7] == (b)[7] && \
1456 (a)[6] == (b)[6] && \
1457 (a)[5] == (b)[5] && \
1458 (a)[4] == (b)[4] && \
1459 (a)[3] == (b)[3] && \
1460 (a)[2] == (b)[2] && \
1461 (a)[1] == (b)[1] && \
1462 (a)[0] == (b)[0])
1463
1464 static void fixup_botched_add(struct ctlr_info *h,
1465 struct hpsa_scsi_dev_t *added)
1466 {
1467 /* called when scsi_add_device fails in order to re-adjust
1468 * h->dev[] to match the mid layer's view.
1469 */
1470 unsigned long flags;
1471 int i, j;
1472
1473 spin_lock_irqsave(&h->lock, flags);
1474 for (i = 0; i < h->ndevices; i++) {
1475 if (h->dev[i] == added) {
1476 for (j = i; j < h->ndevices-1; j++)
1477 h->dev[j] = h->dev[j+1];
1478 h->ndevices--;
1479 break;
1480 }
1481 }
1482 spin_unlock_irqrestore(&h->lock, flags);
1483 kfree(added);
1484 }
1485
1486 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1487 struct hpsa_scsi_dev_t *dev2)
1488 {
1489 /* we compare everything except lun and target as these
1490 * are not yet assigned. Compare parts likely
1491 * to differ first
1492 */
1493 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1494 sizeof(dev1->scsi3addr)) != 0)
1495 return 0;
1496 if (memcmp(dev1->device_id, dev2->device_id,
1497 sizeof(dev1->device_id)) != 0)
1498 return 0;
1499 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1500 return 0;
1501 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1502 return 0;
1503 if (dev1->devtype != dev2->devtype)
1504 return 0;
1505 if (dev1->bus != dev2->bus)
1506 return 0;
1507 return 1;
1508 }
1509
1510 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1511 struct hpsa_scsi_dev_t *dev2)
1512 {
1513 /* Device attributes that can change, but don't mean
1514 * that the device is a different device, nor that the OS
1515 * needs to be told anything about the change.
1516 */
1517 if (dev1->raid_level != dev2->raid_level)
1518 return 1;
1519 if (dev1->offload_config != dev2->offload_config)
1520 return 1;
1521 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1522 return 1;
1523 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1524 if (dev1->queue_depth != dev2->queue_depth)
1525 return 1;
1526 /*
1527 * This can happen for dual domain devices. An active
1528 * path change causes the ioaccel handle to change
1529 *
1530 * for example note the handle differences between p0 and p1
1531 * Device WWN ,WWN hash,Handle
1532 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1533 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1534 */
1535 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1536 return 1;
1537 return 0;
1538 }
1539
1540 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1541 * and return needle location in *index. If scsi3addr matches, but not
1542 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1543 * location in *index.
1544 * In the case of a minor device attribute change, such as RAID level, just
1545 * return DEVICE_UPDATED, along with the updated device's location in index.
1546 * If needle not found, return DEVICE_NOT_FOUND.
1547 */
1548 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1549 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1550 int *index)
1551 {
1552 int i;
1553 #define DEVICE_NOT_FOUND 0
1554 #define DEVICE_CHANGED 1
1555 #define DEVICE_SAME 2
1556 #define DEVICE_UPDATED 3
1557 if (needle == NULL)
1558 return DEVICE_NOT_FOUND;
1559
1560 for (i = 0; i < haystack_size; i++) {
1561 if (haystack[i] == NULL) /* previously removed. */
1562 continue;
1563 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1564 *index = i;
1565 if (device_is_the_same(needle, haystack[i])) {
1566 if (device_updated(needle, haystack[i]))
1567 return DEVICE_UPDATED;
1568 return DEVICE_SAME;
1569 } else {
1570 /* Keep offline devices offline */
1571 if (needle->volume_offline)
1572 return DEVICE_NOT_FOUND;
1573 return DEVICE_CHANGED;
1574 }
1575 }
1576 }
1577 *index = -1;
1578 return DEVICE_NOT_FOUND;
1579 }
1580
1581 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1582 unsigned char scsi3addr[])
1583 {
1584 struct offline_device_entry *device;
1585 unsigned long flags;
1586
1587 /* Check to see if device is already on the list */
1588 spin_lock_irqsave(&h->offline_device_lock, flags);
1589 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1590 if (memcmp(device->scsi3addr, scsi3addr,
1591 sizeof(device->scsi3addr)) == 0) {
1592 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1593 return;
1594 }
1595 }
1596 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1597
1598 /* Device is not on the list, add it. */
1599 device = kmalloc(sizeof(*device), GFP_KERNEL);
1600 if (!device)
1601 return;
1602
1603 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1604 spin_lock_irqsave(&h->offline_device_lock, flags);
1605 list_add_tail(&device->offline_list, &h->offline_device_list);
1606 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1607 }
1608
1609 /* Print a message explaining various offline volume states */
1610 static void hpsa_show_volume_status(struct ctlr_info *h,
1611 struct hpsa_scsi_dev_t *sd)
1612 {
1613 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1614 dev_info(&h->pdev->dev,
1615 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1616 h->scsi_host->host_no,
1617 sd->bus, sd->target, sd->lun);
1618 switch (sd->volume_offline) {
1619 case HPSA_LV_OK:
1620 break;
1621 case HPSA_LV_UNDERGOING_ERASE:
1622 dev_info(&h->pdev->dev,
1623 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1624 h->scsi_host->host_no,
1625 sd->bus, sd->target, sd->lun);
1626 break;
1627 case HPSA_LV_NOT_AVAILABLE:
1628 dev_info(&h->pdev->dev,
1629 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1630 h->scsi_host->host_no,
1631 sd->bus, sd->target, sd->lun);
1632 break;
1633 case HPSA_LV_UNDERGOING_RPI:
1634 dev_info(&h->pdev->dev,
1635 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1636 h->scsi_host->host_no,
1637 sd->bus, sd->target, sd->lun);
1638 break;
1639 case HPSA_LV_PENDING_RPI:
1640 dev_info(&h->pdev->dev,
1641 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1642 h->scsi_host->host_no,
1643 sd->bus, sd->target, sd->lun);
1644 break;
1645 case HPSA_LV_ENCRYPTED_NO_KEY:
1646 dev_info(&h->pdev->dev,
1647 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1648 h->scsi_host->host_no,
1649 sd->bus, sd->target, sd->lun);
1650 break;
1651 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1652 dev_info(&h->pdev->dev,
1653 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1654 h->scsi_host->host_no,
1655 sd->bus, sd->target, sd->lun);
1656 break;
1657 case HPSA_LV_UNDERGOING_ENCRYPTION:
1658 dev_info(&h->pdev->dev,
1659 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1660 h->scsi_host->host_no,
1661 sd->bus, sd->target, sd->lun);
1662 break;
1663 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1664 dev_info(&h->pdev->dev,
1665 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1666 h->scsi_host->host_no,
1667 sd->bus, sd->target, sd->lun);
1668 break;
1669 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1670 dev_info(&h->pdev->dev,
1671 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1672 h->scsi_host->host_no,
1673 sd->bus, sd->target, sd->lun);
1674 break;
1675 case HPSA_LV_PENDING_ENCRYPTION:
1676 dev_info(&h->pdev->dev,
1677 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1678 h->scsi_host->host_no,
1679 sd->bus, sd->target, sd->lun);
1680 break;
1681 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1682 dev_info(&h->pdev->dev,
1683 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1684 h->scsi_host->host_no,
1685 sd->bus, sd->target, sd->lun);
1686 break;
1687 }
1688 }
1689
1690 /*
1691 * Figure the list of physical drive pointers for a logical drive with
1692 * raid offload configured.
1693 */
1694 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1695 struct hpsa_scsi_dev_t *dev[], int ndevices,
1696 struct hpsa_scsi_dev_t *logical_drive)
1697 {
1698 struct raid_map_data *map = &logical_drive->raid_map;
1699 struct raid_map_disk_data *dd = &map->data[0];
1700 int i, j;
1701 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1702 le16_to_cpu(map->metadata_disks_per_row);
1703 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1704 le16_to_cpu(map->layout_map_count) *
1705 total_disks_per_row;
1706 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1707 total_disks_per_row;
1708 int qdepth;
1709
1710 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1711 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1712
1713 logical_drive->nphysical_disks = nraid_map_entries;
1714
1715 qdepth = 0;
1716 for (i = 0; i < nraid_map_entries; i++) {
1717 logical_drive->phys_disk[i] = NULL;
1718 if (!logical_drive->offload_config)
1719 continue;
1720 for (j = 0; j < ndevices; j++) {
1721 if (dev[j] == NULL)
1722 continue;
1723 if (dev[j]->devtype != TYPE_DISK &&
1724 dev[j]->devtype != TYPE_ZBC)
1725 continue;
1726 if (is_logical_device(dev[j]))
1727 continue;
1728 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1729 continue;
1730
1731 logical_drive->phys_disk[i] = dev[j];
1732 if (i < nphys_disk)
1733 qdepth = min(h->nr_cmds, qdepth +
1734 logical_drive->phys_disk[i]->queue_depth);
1735 break;
1736 }
1737
1738 /*
1739 * This can happen if a physical drive is removed and
1740 * the logical drive is degraded. In that case, the RAID
1741 * map data will refer to a physical disk which isn't actually
1742 * present. And in that case offload_enabled should already
1743 * be 0, but we'll turn it off here just in case
1744 */
1745 if (!logical_drive->phys_disk[i]) {
1746 dev_warn(&h->pdev->dev,
1747 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1748 __func__,
1749 h->scsi_host->host_no, logical_drive->bus,
1750 logical_drive->target, logical_drive->lun);
1751 hpsa_turn_off_ioaccel_for_device(logical_drive);
1752 logical_drive->queue_depth = 8;
1753 }
1754 }
1755 if (nraid_map_entries)
1756 /*
1757 * This is correct for reads, too high for full stripe writes,
1758 * way too high for partial stripe writes
1759 */
1760 logical_drive->queue_depth = qdepth;
1761 else {
1762 if (logical_drive->external)
1763 logical_drive->queue_depth = EXTERNAL_QD;
1764 else
1765 logical_drive->queue_depth = h->nr_cmds;
1766 }
1767 }
1768
1769 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1770 struct hpsa_scsi_dev_t *dev[], int ndevices)
1771 {
1772 int i;
1773
1774 for (i = 0; i < ndevices; i++) {
1775 if (dev[i] == NULL)
1776 continue;
1777 if (dev[i]->devtype != TYPE_DISK &&
1778 dev[i]->devtype != TYPE_ZBC)
1779 continue;
1780 if (!is_logical_device(dev[i]))
1781 continue;
1782
1783 /*
1784 * If offload is currently enabled, the RAID map and
1785 * phys_disk[] assignment *better* not be changing
1786 * because we would be changing ioaccel phsy_disk[] pointers
1787 * on a ioaccel volume processing I/O requests.
1788 *
1789 * If an ioaccel volume status changed, initially because it was
1790 * re-configured and thus underwent a transformation, or
1791 * a drive failed, we would have received a state change
1792 * request and ioaccel should have been turned off. When the
1793 * transformation completes, we get another state change
1794 * request to turn ioaccel back on. In this case, we need
1795 * to update the ioaccel information.
1796 *
1797 * Thus: If it is not currently enabled, but will be after
1798 * the scan completes, make sure the ioaccel pointers
1799 * are up to date.
1800 */
1801
1802 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1803 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1804 }
1805 }
1806
1807 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1808 {
1809 int rc = 0;
1810
1811 if (!h->scsi_host)
1812 return 1;
1813
1814 if (is_logical_device(device)) /* RAID */
1815 rc = scsi_add_device(h->scsi_host, device->bus,
1816 device->target, device->lun);
1817 else /* HBA */
1818 rc = hpsa_add_sas_device(h->sas_host, device);
1819
1820 return rc;
1821 }
1822
1823 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1824 struct hpsa_scsi_dev_t *dev)
1825 {
1826 int i;
1827 int count = 0;
1828
1829 for (i = 0; i < h->nr_cmds; i++) {
1830 struct CommandList *c = h->cmd_pool + i;
1831 int refcount = atomic_inc_return(&c->refcount);
1832
1833 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1834 dev->scsi3addr)) {
1835 unsigned long flags;
1836
1837 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1838 if (!hpsa_is_cmd_idle(c))
1839 ++count;
1840 spin_unlock_irqrestore(&h->lock, flags);
1841 }
1842
1843 cmd_free(h, c);
1844 }
1845
1846 return count;
1847 }
1848
1849 #define NUM_WAIT 20
1850 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1851 struct hpsa_scsi_dev_t *device)
1852 {
1853 int cmds = 0;
1854 int waits = 0;
1855 int num_wait = NUM_WAIT;
1856
1857 if (device->external)
1858 num_wait = HPSA_EH_PTRAID_TIMEOUT;
1859
1860 while (1) {
1861 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1862 if (cmds == 0)
1863 break;
1864 if (++waits > num_wait)
1865 break;
1866 msleep(1000);
1867 }
1868
1869 if (waits > num_wait) {
1870 dev_warn(&h->pdev->dev,
1871 "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1872 __func__,
1873 h->scsi_host->host_no,
1874 device->bus, device->target, device->lun, cmds);
1875 }
1876 }
1877
1878 static void hpsa_remove_device(struct ctlr_info *h,
1879 struct hpsa_scsi_dev_t *device)
1880 {
1881 struct scsi_device *sdev = NULL;
1882
1883 if (!h->scsi_host)
1884 return;
1885
1886 /*
1887 * Allow for commands to drain
1888 */
1889 device->removed = 1;
1890 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1891
1892 if (is_logical_device(device)) { /* RAID */
1893 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1894 device->target, device->lun);
1895 if (sdev) {
1896 scsi_remove_device(sdev);
1897 scsi_device_put(sdev);
1898 } else {
1899 /*
1900 * We don't expect to get here. Future commands
1901 * to this device will get a selection timeout as
1902 * if the device were gone.
1903 */
1904 hpsa_show_dev_msg(KERN_WARNING, h, device,
1905 "didn't find device for removal.");
1906 }
1907 } else { /* HBA */
1908
1909 hpsa_remove_sas_device(device);
1910 }
1911 }
1912
1913 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1914 struct hpsa_scsi_dev_t *sd[], int nsds)
1915 {
1916 /* sd contains scsi3 addresses and devtypes, and inquiry
1917 * data. This function takes what's in sd to be the current
1918 * reality and updates h->dev[] to reflect that reality.
1919 */
1920 int i, entry, device_change, changes = 0;
1921 struct hpsa_scsi_dev_t *csd;
1922 unsigned long flags;
1923 struct hpsa_scsi_dev_t **added, **removed;
1924 int nadded, nremoved;
1925
1926 /*
1927 * A reset can cause a device status to change
1928 * re-schedule the scan to see what happened.
1929 */
1930 spin_lock_irqsave(&h->reset_lock, flags);
1931 if (h->reset_in_progress) {
1932 h->drv_req_rescan = 1;
1933 spin_unlock_irqrestore(&h->reset_lock, flags);
1934 return;
1935 }
1936 spin_unlock_irqrestore(&h->reset_lock, flags);
1937
1938 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1939 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1940
1941 if (!added || !removed) {
1942 dev_warn(&h->pdev->dev, "out of memory in "
1943 "adjust_hpsa_scsi_table\n");
1944 goto free_and_out;
1945 }
1946
1947 spin_lock_irqsave(&h->devlock, flags);
1948
1949 /* find any devices in h->dev[] that are not in
1950 * sd[] and remove them from h->dev[], and for any
1951 * devices which have changed, remove the old device
1952 * info and add the new device info.
1953 * If minor device attributes change, just update
1954 * the existing device structure.
1955 */
1956 i = 0;
1957 nremoved = 0;
1958 nadded = 0;
1959 while (i < h->ndevices) {
1960 csd = h->dev[i];
1961 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1962 if (device_change == DEVICE_NOT_FOUND) {
1963 changes++;
1964 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1965 continue; /* remove ^^^, hence i not incremented */
1966 } else if (device_change == DEVICE_CHANGED) {
1967 changes++;
1968 hpsa_scsi_replace_entry(h, i, sd[entry],
1969 added, &nadded, removed, &nremoved);
1970 /* Set it to NULL to prevent it from being freed
1971 * at the bottom of hpsa_update_scsi_devices()
1972 */
1973 sd[entry] = NULL;
1974 } else if (device_change == DEVICE_UPDATED) {
1975 hpsa_scsi_update_entry(h, i, sd[entry]);
1976 }
1977 i++;
1978 }
1979
1980 /* Now, make sure every device listed in sd[] is also
1981 * listed in h->dev[], adding them if they aren't found
1982 */
1983
1984 for (i = 0; i < nsds; i++) {
1985 if (!sd[i]) /* if already added above. */
1986 continue;
1987
1988 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1989 * as the SCSI mid-layer does not handle such devices well.
1990 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1991 * at 160Hz, and prevents the system from coming up.
1992 */
1993 if (sd[i]->volume_offline) {
1994 hpsa_show_volume_status(h, sd[i]);
1995 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1996 continue;
1997 }
1998
1999 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2000 h->ndevices, &entry);
2001 if (device_change == DEVICE_NOT_FOUND) {
2002 changes++;
2003 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2004 break;
2005 sd[i] = NULL; /* prevent from being freed later. */
2006 } else if (device_change == DEVICE_CHANGED) {
2007 /* should never happen... */
2008 changes++;
2009 dev_warn(&h->pdev->dev,
2010 "device unexpectedly changed.\n");
2011 /* but if it does happen, we just ignore that device */
2012 }
2013 }
2014 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2015
2016 /*
2017 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2018 * any logical drives that need it enabled.
2019 *
2020 * The raid map should be current by now.
2021 *
2022 * We are updating the device list used for I/O requests.
2023 */
2024 for (i = 0; i < h->ndevices; i++) {
2025 if (h->dev[i] == NULL)
2026 continue;
2027 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2028 }
2029
2030 spin_unlock_irqrestore(&h->devlock, flags);
2031
2032 /* Monitor devices which are in one of several NOT READY states to be
2033 * brought online later. This must be done without holding h->devlock,
2034 * so don't touch h->dev[]
2035 */
2036 for (i = 0; i < nsds; i++) {
2037 if (!sd[i]) /* if already added above. */
2038 continue;
2039 if (sd[i]->volume_offline)
2040 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2041 }
2042
2043 /* Don't notify scsi mid layer of any changes the first time through
2044 * (or if there are no changes) scsi_scan_host will do it later the
2045 * first time through.
2046 */
2047 if (!changes)
2048 goto free_and_out;
2049
2050 /* Notify scsi mid layer of any removed devices */
2051 for (i = 0; i < nremoved; i++) {
2052 if (removed[i] == NULL)
2053 continue;
2054 if (removed[i]->expose_device)
2055 hpsa_remove_device(h, removed[i]);
2056 kfree(removed[i]);
2057 removed[i] = NULL;
2058 }
2059
2060 /* Notify scsi mid layer of any added devices */
2061 for (i = 0; i < nadded; i++) {
2062 int rc = 0;
2063
2064 if (added[i] == NULL)
2065 continue;
2066 if (!(added[i]->expose_device))
2067 continue;
2068 rc = hpsa_add_device(h, added[i]);
2069 if (!rc)
2070 continue;
2071 dev_warn(&h->pdev->dev,
2072 "addition failed %d, device not added.", rc);
2073 /* now we have to remove it from h->dev,
2074 * since it didn't get added to scsi mid layer
2075 */
2076 fixup_botched_add(h, added[i]);
2077 h->drv_req_rescan = 1;
2078 }
2079
2080 free_and_out:
2081 kfree(added);
2082 kfree(removed);
2083 }
2084
2085 /*
2086 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2087 * Assume's h->devlock is held.
2088 */
2089 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2090 int bus, int target, int lun)
2091 {
2092 int i;
2093 struct hpsa_scsi_dev_t *sd;
2094
2095 for (i = 0; i < h->ndevices; i++) {
2096 sd = h->dev[i];
2097 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2098 return sd;
2099 }
2100 return NULL;
2101 }
2102
2103 static int hpsa_slave_alloc(struct scsi_device *sdev)
2104 {
2105 struct hpsa_scsi_dev_t *sd = NULL;
2106 unsigned long flags;
2107 struct ctlr_info *h;
2108
2109 h = sdev_to_hba(sdev);
2110 spin_lock_irqsave(&h->devlock, flags);
2111 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2112 struct scsi_target *starget;
2113 struct sas_rphy *rphy;
2114
2115 starget = scsi_target(sdev);
2116 rphy = target_to_rphy(starget);
2117 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2118 if (sd) {
2119 sd->target = sdev_id(sdev);
2120 sd->lun = sdev->lun;
2121 }
2122 }
2123 if (!sd)
2124 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2125 sdev_id(sdev), sdev->lun);
2126
2127 if (sd && sd->expose_device) {
2128 atomic_set(&sd->ioaccel_cmds_out, 0);
2129 sdev->hostdata = sd;
2130 } else
2131 sdev->hostdata = NULL;
2132 spin_unlock_irqrestore(&h->devlock, flags);
2133 return 0;
2134 }
2135
2136 /* configure scsi device based on internal per-device structure */
2137 #define CTLR_TIMEOUT (120 * HZ)
2138 static int hpsa_slave_configure(struct scsi_device *sdev)
2139 {
2140 struct hpsa_scsi_dev_t *sd;
2141 int queue_depth;
2142
2143 sd = sdev->hostdata;
2144 sdev->no_uld_attach = !sd || !sd->expose_device;
2145
2146 if (sd) {
2147 sd->was_removed = 0;
2148 queue_depth = sd->queue_depth != 0 ?
2149 sd->queue_depth : sdev->host->can_queue;
2150 if (sd->external) {
2151 queue_depth = EXTERNAL_QD;
2152 sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2153 blk_queue_rq_timeout(sdev->request_queue,
2154 HPSA_EH_PTRAID_TIMEOUT);
2155 }
2156 if (is_hba_lunid(sd->scsi3addr)) {
2157 sdev->eh_timeout = CTLR_TIMEOUT;
2158 blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT);
2159 }
2160 } else {
2161 queue_depth = sdev->host->can_queue;
2162 }
2163
2164 scsi_change_queue_depth(sdev, queue_depth);
2165
2166 return 0;
2167 }
2168
2169 static void hpsa_slave_destroy(struct scsi_device *sdev)
2170 {
2171 struct hpsa_scsi_dev_t *hdev = NULL;
2172
2173 hdev = sdev->hostdata;
2174
2175 if (hdev)
2176 hdev->was_removed = 1;
2177 }
2178
2179 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2180 {
2181 int i;
2182
2183 if (!h->ioaccel2_cmd_sg_list)
2184 return;
2185 for (i = 0; i < h->nr_cmds; i++) {
2186 kfree(h->ioaccel2_cmd_sg_list[i]);
2187 h->ioaccel2_cmd_sg_list[i] = NULL;
2188 }
2189 kfree(h->ioaccel2_cmd_sg_list);
2190 h->ioaccel2_cmd_sg_list = NULL;
2191 }
2192
2193 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2194 {
2195 int i;
2196
2197 if (h->chainsize <= 0)
2198 return 0;
2199
2200 h->ioaccel2_cmd_sg_list =
2201 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2202 GFP_KERNEL);
2203 if (!h->ioaccel2_cmd_sg_list)
2204 return -ENOMEM;
2205 for (i = 0; i < h->nr_cmds; i++) {
2206 h->ioaccel2_cmd_sg_list[i] =
2207 kmalloc_array(h->maxsgentries,
2208 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2209 GFP_KERNEL);
2210 if (!h->ioaccel2_cmd_sg_list[i])
2211 goto clean;
2212 }
2213 return 0;
2214
2215 clean:
2216 hpsa_free_ioaccel2_sg_chain_blocks(h);
2217 return -ENOMEM;
2218 }
2219
2220 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2221 {
2222 int i;
2223
2224 if (!h->cmd_sg_list)
2225 return;
2226 for (i = 0; i < h->nr_cmds; i++) {
2227 kfree(h->cmd_sg_list[i]);
2228 h->cmd_sg_list[i] = NULL;
2229 }
2230 kfree(h->cmd_sg_list);
2231 h->cmd_sg_list = NULL;
2232 }
2233
2234 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2235 {
2236 int i;
2237
2238 if (h->chainsize <= 0)
2239 return 0;
2240
2241 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2242 GFP_KERNEL);
2243 if (!h->cmd_sg_list)
2244 return -ENOMEM;
2245
2246 for (i = 0; i < h->nr_cmds; i++) {
2247 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2248 sizeof(*h->cmd_sg_list[i]),
2249 GFP_KERNEL);
2250 if (!h->cmd_sg_list[i])
2251 goto clean;
2252
2253 }
2254 return 0;
2255
2256 clean:
2257 hpsa_free_sg_chain_blocks(h);
2258 return -ENOMEM;
2259 }
2260
2261 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2262 struct io_accel2_cmd *cp, struct CommandList *c)
2263 {
2264 struct ioaccel2_sg_element *chain_block;
2265 u64 temp64;
2266 u32 chain_size;
2267
2268 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2269 chain_size = le32_to_cpu(cp->sg[0].length);
2270 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
2271 DMA_TO_DEVICE);
2272 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2273 /* prevent subsequent unmapping */
2274 cp->sg->address = 0;
2275 return -1;
2276 }
2277 cp->sg->address = cpu_to_le64(temp64);
2278 return 0;
2279 }
2280
2281 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2282 struct io_accel2_cmd *cp)
2283 {
2284 struct ioaccel2_sg_element *chain_sg;
2285 u64 temp64;
2286 u32 chain_size;
2287
2288 chain_sg = cp->sg;
2289 temp64 = le64_to_cpu(chain_sg->address);
2290 chain_size = le32_to_cpu(cp->sg[0].length);
2291 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2292 }
2293
2294 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2295 struct CommandList *c)
2296 {
2297 struct SGDescriptor *chain_sg, *chain_block;
2298 u64 temp64;
2299 u32 chain_len;
2300
2301 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2302 chain_block = h->cmd_sg_list[c->cmdindex];
2303 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2304 chain_len = sizeof(*chain_sg) *
2305 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2306 chain_sg->Len = cpu_to_le32(chain_len);
2307 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
2308 DMA_TO_DEVICE);
2309 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2310 /* prevent subsequent unmapping */
2311 chain_sg->Addr = cpu_to_le64(0);
2312 return -1;
2313 }
2314 chain_sg->Addr = cpu_to_le64(temp64);
2315 return 0;
2316 }
2317
2318 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2319 struct CommandList *c)
2320 {
2321 struct SGDescriptor *chain_sg;
2322
2323 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2324 return;
2325
2326 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2327 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
2328 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
2329 }
2330
2331
2332 /* Decode the various types of errors on ioaccel2 path.
2333 * Return 1 for any error that should generate a RAID path retry.
2334 * Return 0 for errors that don't require a RAID path retry.
2335 */
2336 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2337 struct CommandList *c,
2338 struct scsi_cmnd *cmd,
2339 struct io_accel2_cmd *c2,
2340 struct hpsa_scsi_dev_t *dev)
2341 {
2342 int data_len;
2343 int retry = 0;
2344 u32 ioaccel2_resid = 0;
2345
2346 switch (c2->error_data.serv_response) {
2347 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2348 switch (c2->error_data.status) {
2349 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2350 if (cmd)
2351 cmd->result = 0;
2352 break;
2353 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2354 cmd->result |= SAM_STAT_CHECK_CONDITION;
2355 if (c2->error_data.data_present !=
2356 IOACCEL2_SENSE_DATA_PRESENT) {
2357 memset(cmd->sense_buffer, 0,
2358 SCSI_SENSE_BUFFERSIZE);
2359 break;
2360 }
2361 /* copy the sense data */
2362 data_len = c2->error_data.sense_data_len;
2363 if (data_len > SCSI_SENSE_BUFFERSIZE)
2364 data_len = SCSI_SENSE_BUFFERSIZE;
2365 if (data_len > sizeof(c2->error_data.sense_data_buff))
2366 data_len =
2367 sizeof(c2->error_data.sense_data_buff);
2368 memcpy(cmd->sense_buffer,
2369 c2->error_data.sense_data_buff, data_len);
2370 retry = 1;
2371 break;
2372 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2373 retry = 1;
2374 break;
2375 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2376 retry = 1;
2377 break;
2378 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2379 retry = 1;
2380 break;
2381 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2382 retry = 1;
2383 break;
2384 default:
2385 retry = 1;
2386 break;
2387 }
2388 break;
2389 case IOACCEL2_SERV_RESPONSE_FAILURE:
2390 switch (c2->error_data.status) {
2391 case IOACCEL2_STATUS_SR_IO_ERROR:
2392 case IOACCEL2_STATUS_SR_IO_ABORTED:
2393 case IOACCEL2_STATUS_SR_OVERRUN:
2394 retry = 1;
2395 break;
2396 case IOACCEL2_STATUS_SR_UNDERRUN:
2397 cmd->result = (DID_OK << 16); /* host byte */
2398 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2399 ioaccel2_resid = get_unaligned_le32(
2400 &c2->error_data.resid_cnt[0]);
2401 scsi_set_resid(cmd, ioaccel2_resid);
2402 break;
2403 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2404 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2405 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2406 /*
2407 * Did an HBA disk disappear? We will eventually
2408 * get a state change event from the controller but
2409 * in the meantime, we need to tell the OS that the
2410 * HBA disk is no longer there and stop I/O
2411 * from going down. This allows the potential re-insert
2412 * of the disk to get the same device node.
2413 */
2414 if (dev->physical_device && dev->expose_device) {
2415 cmd->result = DID_NO_CONNECT << 16;
2416 dev->removed = 1;
2417 h->drv_req_rescan = 1;
2418 dev_warn(&h->pdev->dev,
2419 "%s: device is gone!\n", __func__);
2420 } else
2421 /*
2422 * Retry by sending down the RAID path.
2423 * We will get an event from ctlr to
2424 * trigger rescan regardless.
2425 */
2426 retry = 1;
2427 break;
2428 default:
2429 retry = 1;
2430 }
2431 break;
2432 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2433 break;
2434 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2435 break;
2436 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2437 retry = 1;
2438 break;
2439 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2440 break;
2441 default:
2442 retry = 1;
2443 break;
2444 }
2445
2446 if (dev->in_reset)
2447 retry = 0;
2448
2449 return retry; /* retry on raid path? */
2450 }
2451
2452 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2453 struct CommandList *c)
2454 {
2455 struct hpsa_scsi_dev_t *dev = c->device;
2456
2457 /*
2458 * Reset c->scsi_cmd here so that the reset handler will know
2459 * this command has completed. Then, check to see if the handler is
2460 * waiting for this command, and, if so, wake it.
2461 */
2462 c->scsi_cmd = SCSI_CMD_IDLE;
2463 mb(); /* Declare command idle before checking for pending events. */
2464 if (dev) {
2465 atomic_dec(&dev->commands_outstanding);
2466 if (dev->in_reset &&
2467 atomic_read(&dev->commands_outstanding) <= 0)
2468 wake_up_all(&h->event_sync_wait_queue);
2469 }
2470 }
2471
2472 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2473 struct CommandList *c)
2474 {
2475 hpsa_cmd_resolve_events(h, c);
2476 cmd_tagged_free(h, c);
2477 }
2478
2479 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2480 struct CommandList *c, struct scsi_cmnd *cmd)
2481 {
2482 hpsa_cmd_resolve_and_free(h, c);
2483 if (cmd && cmd->scsi_done)
2484 cmd->scsi_done(cmd);
2485 }
2486
2487 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2488 {
2489 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2490 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2491 }
2492
2493 static void process_ioaccel2_completion(struct ctlr_info *h,
2494 struct CommandList *c, struct scsi_cmnd *cmd,
2495 struct hpsa_scsi_dev_t *dev)
2496 {
2497 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2498
2499 /* check for good status */
2500 if (likely(c2->error_data.serv_response == 0 &&
2501 c2->error_data.status == 0)) {
2502 cmd->result = 0;
2503 return hpsa_cmd_free_and_done(h, c, cmd);
2504 }
2505
2506 /*
2507 * Any RAID offload error results in retry which will use
2508 * the normal I/O path so the controller can handle whatever is
2509 * wrong.
2510 */
2511 if (is_logical_device(dev) &&
2512 c2->error_data.serv_response ==
2513 IOACCEL2_SERV_RESPONSE_FAILURE) {
2514 if (c2->error_data.status ==
2515 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2516 hpsa_turn_off_ioaccel_for_device(dev);
2517 }
2518
2519 if (dev->in_reset) {
2520 cmd->result = DID_RESET << 16;
2521 return hpsa_cmd_free_and_done(h, c, cmd);
2522 }
2523
2524 return hpsa_retry_cmd(h, c);
2525 }
2526
2527 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2528 return hpsa_retry_cmd(h, c);
2529
2530 return hpsa_cmd_free_and_done(h, c, cmd);
2531 }
2532
2533 /* Returns 0 on success, < 0 otherwise. */
2534 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2535 struct CommandList *cp)
2536 {
2537 u8 tmf_status = cp->err_info->ScsiStatus;
2538
2539 switch (tmf_status) {
2540 case CISS_TMF_COMPLETE:
2541 /*
2542 * CISS_TMF_COMPLETE never happens, instead,
2543 * ei->CommandStatus == 0 for this case.
2544 */
2545 case CISS_TMF_SUCCESS:
2546 return 0;
2547 case CISS_TMF_INVALID_FRAME:
2548 case CISS_TMF_NOT_SUPPORTED:
2549 case CISS_TMF_FAILED:
2550 case CISS_TMF_WRONG_LUN:
2551 case CISS_TMF_OVERLAPPED_TAG:
2552 break;
2553 default:
2554 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2555 tmf_status);
2556 break;
2557 }
2558 return -tmf_status;
2559 }
2560
2561 static void complete_scsi_command(struct CommandList *cp)
2562 {
2563 struct scsi_cmnd *cmd;
2564 struct ctlr_info *h;
2565 struct ErrorInfo *ei;
2566 struct hpsa_scsi_dev_t *dev;
2567 struct io_accel2_cmd *c2;
2568
2569 u8 sense_key;
2570 u8 asc; /* additional sense code */
2571 u8 ascq; /* additional sense code qualifier */
2572 unsigned long sense_data_size;
2573
2574 ei = cp->err_info;
2575 cmd = cp->scsi_cmd;
2576 h = cp->h;
2577
2578 if (!cmd->device) {
2579 cmd->result = DID_NO_CONNECT << 16;
2580 return hpsa_cmd_free_and_done(h, cp, cmd);
2581 }
2582
2583 dev = cmd->device->hostdata;
2584 if (!dev) {
2585 cmd->result = DID_NO_CONNECT << 16;
2586 return hpsa_cmd_free_and_done(h, cp, cmd);
2587 }
2588 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2589
2590 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2591 if ((cp->cmd_type == CMD_SCSI) &&
2592 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2593 hpsa_unmap_sg_chain_block(h, cp);
2594
2595 if ((cp->cmd_type == CMD_IOACCEL2) &&
2596 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2597 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2598
2599 cmd->result = (DID_OK << 16); /* host byte */
2600 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2601
2602 /* SCSI command has already been cleaned up in SML */
2603 if (dev->was_removed) {
2604 hpsa_cmd_resolve_and_free(h, cp);
2605 return;
2606 }
2607
2608 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2609 if (dev->physical_device && dev->expose_device &&
2610 dev->removed) {
2611 cmd->result = DID_NO_CONNECT << 16;
2612 return hpsa_cmd_free_and_done(h, cp, cmd);
2613 }
2614 if (likely(cp->phys_disk != NULL))
2615 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2616 }
2617
2618 /*
2619 * We check for lockup status here as it may be set for
2620 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2621 * fail_all_oustanding_cmds()
2622 */
2623 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2624 /* DID_NO_CONNECT will prevent a retry */
2625 cmd->result = DID_NO_CONNECT << 16;
2626 return hpsa_cmd_free_and_done(h, cp, cmd);
2627 }
2628
2629 if (cp->cmd_type == CMD_IOACCEL2)
2630 return process_ioaccel2_completion(h, cp, cmd, dev);
2631
2632 scsi_set_resid(cmd, ei->ResidualCnt);
2633 if (ei->CommandStatus == 0)
2634 return hpsa_cmd_free_and_done(h, cp, cmd);
2635
2636 /* For I/O accelerator commands, copy over some fields to the normal
2637 * CISS header used below for error handling.
2638 */
2639 if (cp->cmd_type == CMD_IOACCEL1) {
2640 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2641 cp->Header.SGList = scsi_sg_count(cmd);
2642 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2643 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2644 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2645 cp->Header.tag = c->tag;
2646 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2647 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2648
2649 /* Any RAID offload error results in retry which will use
2650 * the normal I/O path so the controller can handle whatever's
2651 * wrong.
2652 */
2653 if (is_logical_device(dev)) {
2654 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2655 dev->offload_enabled = 0;
2656 return hpsa_retry_cmd(h, cp);
2657 }
2658 }
2659
2660 /* an error has occurred */
2661 switch (ei->CommandStatus) {
2662
2663 case CMD_TARGET_STATUS:
2664 cmd->result |= ei->ScsiStatus;
2665 /* copy the sense data */
2666 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2667 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2668 else
2669 sense_data_size = sizeof(ei->SenseInfo);
2670 if (ei->SenseLen < sense_data_size)
2671 sense_data_size = ei->SenseLen;
2672 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2673 if (ei->ScsiStatus)
2674 decode_sense_data(ei->SenseInfo, sense_data_size,
2675 &sense_key, &asc, &ascq);
2676 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2677 switch (sense_key) {
2678 case ABORTED_COMMAND:
2679 cmd->result |= DID_SOFT_ERROR << 16;
2680 break;
2681 case UNIT_ATTENTION:
2682 if (asc == 0x3F && ascq == 0x0E)
2683 h->drv_req_rescan = 1;
2684 break;
2685 case ILLEGAL_REQUEST:
2686 if (asc == 0x25 && ascq == 0x00) {
2687 dev->removed = 1;
2688 cmd->result = DID_NO_CONNECT << 16;
2689 }
2690 break;
2691 }
2692 break;
2693 }
2694 /* Problem was not a check condition
2695 * Pass it up to the upper layers...
2696 */
2697 if (ei->ScsiStatus) {
2698 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2699 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2700 "Returning result: 0x%x\n",
2701 cp, ei->ScsiStatus,
2702 sense_key, asc, ascq,
2703 cmd->result);
2704 } else { /* scsi status is zero??? How??? */
2705 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2706 "Returning no connection.\n", cp),
2707
2708 /* Ordinarily, this case should never happen,
2709 * but there is a bug in some released firmware
2710 * revisions that allows it to happen if, for
2711 * example, a 4100 backplane loses power and
2712 * the tape drive is in it. We assume that
2713 * it's a fatal error of some kind because we
2714 * can't show that it wasn't. We will make it
2715 * look like selection timeout since that is
2716 * the most common reason for this to occur,
2717 * and it's severe enough.
2718 */
2719
2720 cmd->result = DID_NO_CONNECT << 16;
2721 }
2722 break;
2723
2724 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2725 break;
2726 case CMD_DATA_OVERRUN:
2727 dev_warn(&h->pdev->dev,
2728 "CDB %16phN data overrun\n", cp->Request.CDB);
2729 break;
2730 case CMD_INVALID: {
2731 /* print_bytes(cp, sizeof(*cp), 1, 0);
2732 print_cmd(cp); */
2733 /* We get CMD_INVALID if you address a non-existent device
2734 * instead of a selection timeout (no response). You will
2735 * see this if you yank out a drive, then try to access it.
2736 * This is kind of a shame because it means that any other
2737 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2738 * missing target. */
2739 cmd->result = DID_NO_CONNECT << 16;
2740 }
2741 break;
2742 case CMD_PROTOCOL_ERR:
2743 cmd->result = DID_ERROR << 16;
2744 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2745 cp->Request.CDB);
2746 break;
2747 case CMD_HARDWARE_ERR:
2748 cmd->result = DID_ERROR << 16;
2749 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2750 cp->Request.CDB);
2751 break;
2752 case CMD_CONNECTION_LOST:
2753 cmd->result = DID_ERROR << 16;
2754 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2755 cp->Request.CDB);
2756 break;
2757 case CMD_ABORTED:
2758 cmd->result = DID_ABORT << 16;
2759 break;
2760 case CMD_ABORT_FAILED:
2761 cmd->result = DID_ERROR << 16;
2762 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2763 cp->Request.CDB);
2764 break;
2765 case CMD_UNSOLICITED_ABORT:
2766 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2767 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2768 cp->Request.CDB);
2769 break;
2770 case CMD_TIMEOUT:
2771 cmd->result = DID_TIME_OUT << 16;
2772 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2773 cp->Request.CDB);
2774 break;
2775 case CMD_UNABORTABLE:
2776 cmd->result = DID_ERROR << 16;
2777 dev_warn(&h->pdev->dev, "Command unabortable\n");
2778 break;
2779 case CMD_TMF_STATUS:
2780 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2781 cmd->result = DID_ERROR << 16;
2782 break;
2783 case CMD_IOACCEL_DISABLED:
2784 /* This only handles the direct pass-through case since RAID
2785 * offload is handled above. Just attempt a retry.
2786 */
2787 cmd->result = DID_SOFT_ERROR << 16;
2788 dev_warn(&h->pdev->dev,
2789 "cp %p had HP SSD Smart Path error\n", cp);
2790 break;
2791 default:
2792 cmd->result = DID_ERROR << 16;
2793 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2794 cp, ei->CommandStatus);
2795 }
2796
2797 return hpsa_cmd_free_and_done(h, cp, cmd);
2798 }
2799
2800 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
2801 int sg_used, enum dma_data_direction data_direction)
2802 {
2803 int i;
2804
2805 for (i = 0; i < sg_used; i++)
2806 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
2807 le32_to_cpu(c->SG[i].Len),
2808 data_direction);
2809 }
2810
2811 static int hpsa_map_one(struct pci_dev *pdev,
2812 struct CommandList *cp,
2813 unsigned char *buf,
2814 size_t buflen,
2815 enum dma_data_direction data_direction)
2816 {
2817 u64 addr64;
2818
2819 if (buflen == 0 || data_direction == DMA_NONE) {
2820 cp->Header.SGList = 0;
2821 cp->Header.SGTotal = cpu_to_le16(0);
2822 return 0;
2823 }
2824
2825 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2826 if (dma_mapping_error(&pdev->dev, addr64)) {
2827 /* Prevent subsequent unmap of something never mapped */
2828 cp->Header.SGList = 0;
2829 cp->Header.SGTotal = cpu_to_le16(0);
2830 return -1;
2831 }
2832 cp->SG[0].Addr = cpu_to_le64(addr64);
2833 cp->SG[0].Len = cpu_to_le32(buflen);
2834 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2835 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2836 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2837 return 0;
2838 }
2839
2840 #define NO_TIMEOUT ((unsigned long) -1)
2841 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2842 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2843 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2844 {
2845 DECLARE_COMPLETION_ONSTACK(wait);
2846
2847 c->waiting = &wait;
2848 __enqueue_cmd_and_start_io(h, c, reply_queue);
2849 if (timeout_msecs == NO_TIMEOUT) {
2850 /* TODO: get rid of this no-timeout thing */
2851 wait_for_completion_io(&wait);
2852 return IO_OK;
2853 }
2854 if (!wait_for_completion_io_timeout(&wait,
2855 msecs_to_jiffies(timeout_msecs))) {
2856 dev_warn(&h->pdev->dev, "Command timed out.\n");
2857 return -ETIMEDOUT;
2858 }
2859 return IO_OK;
2860 }
2861
2862 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2863 int reply_queue, unsigned long timeout_msecs)
2864 {
2865 if (unlikely(lockup_detected(h))) {
2866 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2867 return IO_OK;
2868 }
2869 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2870 }
2871
2872 static u32 lockup_detected(struct ctlr_info *h)
2873 {
2874 int cpu;
2875 u32 rc, *lockup_detected;
2876
2877 cpu = get_cpu();
2878 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2879 rc = *lockup_detected;
2880 put_cpu();
2881 return rc;
2882 }
2883
2884 #define MAX_DRIVER_CMD_RETRIES 25
2885 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2886 struct CommandList *c, enum dma_data_direction data_direction,
2887 unsigned long timeout_msecs)
2888 {
2889 int backoff_time = 10, retry_count = 0;
2890 int rc;
2891
2892 do {
2893 memset(c->err_info, 0, sizeof(*c->err_info));
2894 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2895 timeout_msecs);
2896 if (rc)
2897 break;
2898 retry_count++;
2899 if (retry_count > 3) {
2900 msleep(backoff_time);
2901 if (backoff_time < 1000)
2902 backoff_time *= 2;
2903 }
2904 } while ((check_for_unit_attention(h, c) ||
2905 check_for_busy(h, c)) &&
2906 retry_count <= MAX_DRIVER_CMD_RETRIES);
2907 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2908 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2909 rc = -EIO;
2910 return rc;
2911 }
2912
2913 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2914 struct CommandList *c)
2915 {
2916 const u8 *cdb = c->Request.CDB;
2917 const u8 *lun = c->Header.LUN.LunAddrBytes;
2918
2919 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2920 txt, lun, cdb);
2921 }
2922
2923 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2924 struct CommandList *cp)
2925 {
2926 const struct ErrorInfo *ei = cp->err_info;
2927 struct device *d = &cp->h->pdev->dev;
2928 u8 sense_key, asc, ascq;
2929 int sense_len;
2930
2931 switch (ei->CommandStatus) {
2932 case CMD_TARGET_STATUS:
2933 if (ei->SenseLen > sizeof(ei->SenseInfo))
2934 sense_len = sizeof(ei->SenseInfo);
2935 else
2936 sense_len = ei->SenseLen;
2937 decode_sense_data(ei->SenseInfo, sense_len,
2938 &sense_key, &asc, &ascq);
2939 hpsa_print_cmd(h, "SCSI status", cp);
2940 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2941 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2942 sense_key, asc, ascq);
2943 else
2944 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2945 if (ei->ScsiStatus == 0)
2946 dev_warn(d, "SCSI status is abnormally zero. "
2947 "(probably indicates selection timeout "
2948 "reported incorrectly due to a known "
2949 "firmware bug, circa July, 2001.)\n");
2950 break;
2951 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2952 break;
2953 case CMD_DATA_OVERRUN:
2954 hpsa_print_cmd(h, "overrun condition", cp);
2955 break;
2956 case CMD_INVALID: {
2957 /* controller unfortunately reports SCSI passthru's
2958 * to non-existent targets as invalid commands.
2959 */
2960 hpsa_print_cmd(h, "invalid command", cp);
2961 dev_warn(d, "probably means device no longer present\n");
2962 }
2963 break;
2964 case CMD_PROTOCOL_ERR:
2965 hpsa_print_cmd(h, "protocol error", cp);
2966 break;
2967 case CMD_HARDWARE_ERR:
2968 hpsa_print_cmd(h, "hardware error", cp);
2969 break;
2970 case CMD_CONNECTION_LOST:
2971 hpsa_print_cmd(h, "connection lost", cp);
2972 break;
2973 case CMD_ABORTED:
2974 hpsa_print_cmd(h, "aborted", cp);
2975 break;
2976 case CMD_ABORT_FAILED:
2977 hpsa_print_cmd(h, "abort failed", cp);
2978 break;
2979 case CMD_UNSOLICITED_ABORT:
2980 hpsa_print_cmd(h, "unsolicited abort", cp);
2981 break;
2982 case CMD_TIMEOUT:
2983 hpsa_print_cmd(h, "timed out", cp);
2984 break;
2985 case CMD_UNABORTABLE:
2986 hpsa_print_cmd(h, "unabortable", cp);
2987 break;
2988 case CMD_CTLR_LOCKUP:
2989 hpsa_print_cmd(h, "controller lockup detected", cp);
2990 break;
2991 default:
2992 hpsa_print_cmd(h, "unknown status", cp);
2993 dev_warn(d, "Unknown command status %x\n",
2994 ei->CommandStatus);
2995 }
2996 }
2997
2998 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2999 u8 page, u8 *buf, size_t bufsize)
3000 {
3001 int rc = IO_OK;
3002 struct CommandList *c;
3003 struct ErrorInfo *ei;
3004
3005 c = cmd_alloc(h);
3006 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
3007 page, scsi3addr, TYPE_CMD)) {
3008 rc = -1;
3009 goto out;
3010 }
3011 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3012 NO_TIMEOUT);
3013 if (rc)
3014 goto out;
3015 ei = c->err_info;
3016 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3017 hpsa_scsi_interpret_error(h, c);
3018 rc = -1;
3019 }
3020 out:
3021 cmd_free(h, c);
3022 return rc;
3023 }
3024
3025 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
3026 u8 *scsi3addr)
3027 {
3028 u8 *buf;
3029 u64 sa = 0;
3030 int rc = 0;
3031
3032 buf = kzalloc(1024, GFP_KERNEL);
3033 if (!buf)
3034 return 0;
3035
3036 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3037 buf, 1024);
3038
3039 if (rc)
3040 goto out;
3041
3042 sa = get_unaligned_be64(buf+12);
3043
3044 out:
3045 kfree(buf);
3046 return sa;
3047 }
3048
3049 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3050 u16 page, unsigned char *buf,
3051 unsigned char bufsize)
3052 {
3053 int rc = IO_OK;
3054 struct CommandList *c;
3055 struct ErrorInfo *ei;
3056
3057 c = cmd_alloc(h);
3058
3059 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3060 page, scsi3addr, TYPE_CMD)) {
3061 rc = -1;
3062 goto out;
3063 }
3064 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3065 NO_TIMEOUT);
3066 if (rc)
3067 goto out;
3068 ei = c->err_info;
3069 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3070 hpsa_scsi_interpret_error(h, c);
3071 rc = -1;
3072 }
3073 out:
3074 cmd_free(h, c);
3075 return rc;
3076 }
3077
3078 static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3079 u8 reset_type, int reply_queue)
3080 {
3081 int rc = IO_OK;
3082 struct CommandList *c;
3083 struct ErrorInfo *ei;
3084
3085 c = cmd_alloc(h);
3086 c->device = dev;
3087
3088 /* fill_cmd can't fail here, no data buffer to map. */
3089 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
3090 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3091 if (rc) {
3092 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3093 goto out;
3094 }
3095 /* no unmap needed here because no data xfer. */
3096
3097 ei = c->err_info;
3098 if (ei->CommandStatus != 0) {
3099 hpsa_scsi_interpret_error(h, c);
3100 rc = -1;
3101 }
3102 out:
3103 cmd_free(h, c);
3104 return rc;
3105 }
3106
3107 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3108 struct hpsa_scsi_dev_t *dev,
3109 unsigned char *scsi3addr)
3110 {
3111 int i;
3112 bool match = false;
3113 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3114 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3115
3116 if (hpsa_is_cmd_idle(c))
3117 return false;
3118
3119 switch (c->cmd_type) {
3120 case CMD_SCSI:
3121 case CMD_IOCTL_PEND:
3122 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3123 sizeof(c->Header.LUN.LunAddrBytes));
3124 break;
3125
3126 case CMD_IOACCEL1:
3127 case CMD_IOACCEL2:
3128 if (c->phys_disk == dev) {
3129 /* HBA mode match */
3130 match = true;
3131 } else {
3132 /* Possible RAID mode -- check each phys dev. */
3133 /* FIXME: Do we need to take out a lock here? If
3134 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3135 * instead. */
3136 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3137 /* FIXME: an alternate test might be
3138 *
3139 * match = dev->phys_disk[i]->ioaccel_handle
3140 * == c2->scsi_nexus; */
3141 match = dev->phys_disk[i] == c->phys_disk;
3142 }
3143 }
3144 break;
3145
3146 case IOACCEL2_TMF:
3147 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3148 match = dev->phys_disk[i]->ioaccel_handle ==
3149 le32_to_cpu(ac->it_nexus);
3150 }
3151 break;
3152
3153 case 0: /* The command is in the middle of being initialized. */
3154 match = false;
3155 break;
3156
3157 default:
3158 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3159 c->cmd_type);
3160 BUG();
3161 }
3162
3163 return match;
3164 }
3165
3166 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3167 u8 reset_type, int reply_queue)
3168 {
3169 int rc = 0;
3170
3171 /* We can really only handle one reset at a time */
3172 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3173 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3174 return -EINTR;
3175 }
3176
3177 rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3178 if (!rc) {
3179 /* incremented by sending the reset request */
3180 atomic_dec(&dev->commands_outstanding);
3181 wait_event(h->event_sync_wait_queue,
3182 atomic_read(&dev->commands_outstanding) <= 0 ||
3183 lockup_detected(h));
3184 }
3185
3186 if (unlikely(lockup_detected(h))) {
3187 dev_warn(&h->pdev->dev,
3188 "Controller lockup detected during reset wait\n");
3189 rc = -ENODEV;
3190 }
3191
3192 if (!rc)
3193 rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3194
3195 mutex_unlock(&h->reset_mutex);
3196 return rc;
3197 }
3198
3199 static void hpsa_get_raid_level(struct ctlr_info *h,
3200 unsigned char *scsi3addr, unsigned char *raid_level)
3201 {
3202 int rc;
3203 unsigned char *buf;
3204
3205 *raid_level = RAID_UNKNOWN;
3206 buf = kzalloc(64, GFP_KERNEL);
3207 if (!buf)
3208 return;
3209
3210 if (!hpsa_vpd_page_supported(h, scsi3addr,
3211 HPSA_VPD_LV_DEVICE_GEOMETRY))
3212 goto exit;
3213
3214 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3215 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3216
3217 if (rc == 0)
3218 *raid_level = buf[8];
3219 if (*raid_level > RAID_UNKNOWN)
3220 *raid_level = RAID_UNKNOWN;
3221 exit:
3222 kfree(buf);
3223 return;
3224 }
3225
3226 #define HPSA_MAP_DEBUG
3227 #ifdef HPSA_MAP_DEBUG
3228 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3229 struct raid_map_data *map_buff)
3230 {
3231 struct raid_map_disk_data *dd = &map_buff->data[0];
3232 int map, row, col;
3233 u16 map_cnt, row_cnt, disks_per_row;
3234
3235 if (rc != 0)
3236 return;
3237
3238 /* Show details only if debugging has been activated. */
3239 if (h->raid_offload_debug < 2)
3240 return;
3241
3242 dev_info(&h->pdev->dev, "structure_size = %u\n",
3243 le32_to_cpu(map_buff->structure_size));
3244 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3245 le32_to_cpu(map_buff->volume_blk_size));
3246 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3247 le64_to_cpu(map_buff->volume_blk_cnt));
3248 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3249 map_buff->phys_blk_shift);
3250 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3251 map_buff->parity_rotation_shift);
3252 dev_info(&h->pdev->dev, "strip_size = %u\n",
3253 le16_to_cpu(map_buff->strip_size));
3254 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3255 le64_to_cpu(map_buff->disk_starting_blk));
3256 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3257 le64_to_cpu(map_buff->disk_blk_cnt));
3258 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3259 le16_to_cpu(map_buff->data_disks_per_row));
3260 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3261 le16_to_cpu(map_buff->metadata_disks_per_row));
3262 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3263 le16_to_cpu(map_buff->row_cnt));
3264 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3265 le16_to_cpu(map_buff->layout_map_count));
3266 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3267 le16_to_cpu(map_buff->flags));
3268 dev_info(&h->pdev->dev, "encryption = %s\n",
3269 le16_to_cpu(map_buff->flags) &
3270 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3271 dev_info(&h->pdev->dev, "dekindex = %u\n",
3272 le16_to_cpu(map_buff->dekindex));
3273 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3274 for (map = 0; map < map_cnt; map++) {
3275 dev_info(&h->pdev->dev, "Map%u:\n", map);
3276 row_cnt = le16_to_cpu(map_buff->row_cnt);
3277 for (row = 0; row < row_cnt; row++) {
3278 dev_info(&h->pdev->dev, " Row%u:\n", row);
3279 disks_per_row =
3280 le16_to_cpu(map_buff->data_disks_per_row);
3281 for (col = 0; col < disks_per_row; col++, dd++)
3282 dev_info(&h->pdev->dev,
3283 " D%02u: h=0x%04x xor=%u,%u\n",
3284 col, dd->ioaccel_handle,
3285 dd->xor_mult[0], dd->xor_mult[1]);
3286 disks_per_row =
3287 le16_to_cpu(map_buff->metadata_disks_per_row);
3288 for (col = 0; col < disks_per_row; col++, dd++)
3289 dev_info(&h->pdev->dev,
3290 " M%02u: h=0x%04x xor=%u,%u\n",
3291 col, dd->ioaccel_handle,
3292 dd->xor_mult[0], dd->xor_mult[1]);
3293 }
3294 }
3295 }
3296 #else
3297 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3298 __attribute__((unused)) int rc,
3299 __attribute__((unused)) struct raid_map_data *map_buff)
3300 {
3301 }
3302 #endif
3303
3304 static int hpsa_get_raid_map(struct ctlr_info *h,
3305 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3306 {
3307 int rc = 0;
3308 struct CommandList *c;
3309 struct ErrorInfo *ei;
3310
3311 c = cmd_alloc(h);
3312
3313 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3314 sizeof(this_device->raid_map), 0,
3315 scsi3addr, TYPE_CMD)) {
3316 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3317 cmd_free(h, c);
3318 return -1;
3319 }
3320 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3321 NO_TIMEOUT);
3322 if (rc)
3323 goto out;
3324 ei = c->err_info;
3325 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3326 hpsa_scsi_interpret_error(h, c);
3327 rc = -1;
3328 goto out;
3329 }
3330 cmd_free(h, c);
3331
3332 /* @todo in the future, dynamically allocate RAID map memory */
3333 if (le32_to_cpu(this_device->raid_map.structure_size) >
3334 sizeof(this_device->raid_map)) {
3335 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3336 rc = -1;
3337 }
3338 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3339 return rc;
3340 out:
3341 cmd_free(h, c);
3342 return rc;
3343 }
3344
3345 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3346 unsigned char scsi3addr[], u16 bmic_device_index,
3347 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3348 {
3349 int rc = IO_OK;
3350 struct CommandList *c;
3351 struct ErrorInfo *ei;
3352
3353 c = cmd_alloc(h);
3354
3355 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3356 0, RAID_CTLR_LUNID, TYPE_CMD);
3357 if (rc)
3358 goto out;
3359
3360 c->Request.CDB[2] = bmic_device_index & 0xff;
3361 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3362
3363 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3364 NO_TIMEOUT);
3365 if (rc)
3366 goto out;
3367 ei = c->err_info;
3368 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3369 hpsa_scsi_interpret_error(h, c);
3370 rc = -1;
3371 }
3372 out:
3373 cmd_free(h, c);
3374 return rc;
3375 }
3376
3377 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3378 struct bmic_identify_controller *buf, size_t bufsize)
3379 {
3380 int rc = IO_OK;
3381 struct CommandList *c;
3382 struct ErrorInfo *ei;
3383
3384 c = cmd_alloc(h);
3385
3386 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3387 0, RAID_CTLR_LUNID, TYPE_CMD);
3388 if (rc)
3389 goto out;
3390
3391 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3392 NO_TIMEOUT);
3393 if (rc)
3394 goto out;
3395 ei = c->err_info;
3396 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3397 hpsa_scsi_interpret_error(h, c);
3398 rc = -1;
3399 }
3400 out:
3401 cmd_free(h, c);
3402 return rc;
3403 }
3404
3405 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3406 unsigned char scsi3addr[], u16 bmic_device_index,
3407 struct bmic_identify_physical_device *buf, size_t bufsize)
3408 {
3409 int rc = IO_OK;
3410 struct CommandList *c;
3411 struct ErrorInfo *ei;
3412
3413 c = cmd_alloc(h);
3414 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3415 0, RAID_CTLR_LUNID, TYPE_CMD);
3416 if (rc)
3417 goto out;
3418
3419 c->Request.CDB[2] = bmic_device_index & 0xff;
3420 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3421
3422 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3423 NO_TIMEOUT);
3424 ei = c->err_info;
3425 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3426 hpsa_scsi_interpret_error(h, c);
3427 rc = -1;
3428 }
3429 out:
3430 cmd_free(h, c);
3431
3432 return rc;
3433 }
3434
3435 /*
3436 * get enclosure information
3437 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3438 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3439 * Uses id_physical_device to determine the box_index.
3440 */
3441 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3442 unsigned char *scsi3addr,
3443 struct ReportExtendedLUNdata *rlep, int rle_index,
3444 struct hpsa_scsi_dev_t *encl_dev)
3445 {
3446 int rc = -1;
3447 struct CommandList *c = NULL;
3448 struct ErrorInfo *ei = NULL;
3449 struct bmic_sense_storage_box_params *bssbp = NULL;
3450 struct bmic_identify_physical_device *id_phys = NULL;
3451 struct ext_report_lun_entry *rle;
3452 u16 bmic_device_index = 0;
3453
3454 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
3455 return;
3456
3457 rle = &rlep->LUN[rle_index];
3458
3459 encl_dev->eli =
3460 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3461
3462 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3463
3464 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3465 rc = IO_OK;
3466 goto out;
3467 }
3468
3469 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3470 rc = IO_OK;
3471 goto out;
3472 }
3473
3474 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3475 if (!bssbp)
3476 goto out;
3477
3478 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3479 if (!id_phys)
3480 goto out;
3481
3482 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3483 id_phys, sizeof(*id_phys));
3484 if (rc) {
3485 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3486 __func__, encl_dev->external, bmic_device_index);
3487 goto out;
3488 }
3489
3490 c = cmd_alloc(h);
3491
3492 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3493 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3494
3495 if (rc)
3496 goto out;
3497
3498 if (id_phys->phys_connector[1] == 'E')
3499 c->Request.CDB[5] = id_phys->box_index;
3500 else
3501 c->Request.CDB[5] = 0;
3502
3503 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3504 NO_TIMEOUT);
3505 if (rc)
3506 goto out;
3507
3508 ei = c->err_info;
3509 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3510 rc = -1;
3511 goto out;
3512 }
3513
3514 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3515 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3516 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3517
3518 rc = IO_OK;
3519 out:
3520 kfree(bssbp);
3521 kfree(id_phys);
3522
3523 if (c)
3524 cmd_free(h, c);
3525
3526 if (rc != IO_OK)
3527 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3528 "Error, could not get enclosure information");
3529 }
3530
3531 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3532 unsigned char *scsi3addr)
3533 {
3534 struct ReportExtendedLUNdata *physdev;
3535 u32 nphysicals;
3536 u64 sa = 0;
3537 int i;
3538
3539 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3540 if (!physdev)
3541 return 0;
3542
3543 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3544 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3545 kfree(physdev);
3546 return 0;
3547 }
3548 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3549
3550 for (i = 0; i < nphysicals; i++)
3551 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3552 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3553 break;
3554 }
3555
3556 kfree(physdev);
3557
3558 return sa;
3559 }
3560
3561 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3562 struct hpsa_scsi_dev_t *dev)
3563 {
3564 int rc;
3565 u64 sa = 0;
3566
3567 if (is_hba_lunid(scsi3addr)) {
3568 struct bmic_sense_subsystem_info *ssi;
3569
3570 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3571 if (!ssi)
3572 return;
3573
3574 rc = hpsa_bmic_sense_subsystem_information(h,
3575 scsi3addr, 0, ssi, sizeof(*ssi));
3576 if (rc == 0) {
3577 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3578 h->sas_address = sa;
3579 }
3580
3581 kfree(ssi);
3582 } else
3583 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3584
3585 dev->sas_address = sa;
3586 }
3587
3588 static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3589 struct ReportExtendedLUNdata *physdev)
3590 {
3591 u32 nphysicals;
3592 int i;
3593
3594 if (h->discovery_polling)
3595 return;
3596
3597 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3598
3599 for (i = 0; i < nphysicals; i++) {
3600 if (physdev->LUN[i].device_type ==
3601 BMIC_DEVICE_TYPE_CONTROLLER
3602 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3603 dev_info(&h->pdev->dev,
3604 "External controller present, activate discovery polling and disable rld caching\n");
3605 hpsa_disable_rld_caching(h);
3606 h->discovery_polling = 1;
3607 break;
3608 }
3609 }
3610 }
3611
3612 /* Get a device id from inquiry page 0x83 */
3613 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3614 unsigned char scsi3addr[], u8 page)
3615 {
3616 int rc;
3617 int i;
3618 int pages;
3619 unsigned char *buf, bufsize;
3620
3621 buf = kzalloc(256, GFP_KERNEL);
3622 if (!buf)
3623 return false;
3624
3625 /* Get the size of the page list first */
3626 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3627 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3628 buf, HPSA_VPD_HEADER_SZ);
3629 if (rc != 0)
3630 goto exit_unsupported;
3631 pages = buf[3];
3632 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3633 bufsize = pages + HPSA_VPD_HEADER_SZ;
3634 else
3635 bufsize = 255;
3636
3637 /* Get the whole VPD page list */
3638 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3639 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3640 buf, bufsize);
3641 if (rc != 0)
3642 goto exit_unsupported;
3643
3644 pages = buf[3];
3645 for (i = 1; i <= pages; i++)
3646 if (buf[3 + i] == page)
3647 goto exit_supported;
3648 exit_unsupported:
3649 kfree(buf);
3650 return false;
3651 exit_supported:
3652 kfree(buf);
3653 return true;
3654 }
3655
3656 /*
3657 * Called during a scan operation.
3658 * Sets ioaccel status on the new device list, not the existing device list
3659 *
3660 * The device list used during I/O will be updated later in
3661 * adjust_hpsa_scsi_table.
3662 */
3663 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3664 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3665 {
3666 int rc;
3667 unsigned char *buf;
3668 u8 ioaccel_status;
3669
3670 this_device->offload_config = 0;
3671 this_device->offload_enabled = 0;
3672 this_device->offload_to_be_enabled = 0;
3673
3674 buf = kzalloc(64, GFP_KERNEL);
3675 if (!buf)
3676 return;
3677 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3678 goto out;
3679 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3680 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3681 if (rc != 0)
3682 goto out;
3683
3684 #define IOACCEL_STATUS_BYTE 4
3685 #define OFFLOAD_CONFIGURED_BIT 0x01
3686 #define OFFLOAD_ENABLED_BIT 0x02
3687 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3688 this_device->offload_config =
3689 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3690 if (this_device->offload_config) {
3691 bool offload_enabled =
3692 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3693 /*
3694 * Check to see if offload can be enabled.
3695 */
3696 if (offload_enabled) {
3697 rc = hpsa_get_raid_map(h, scsi3addr, this_device);
3698 if (rc) /* could not load raid_map */
3699 goto out;
3700 this_device->offload_to_be_enabled = 1;
3701 }
3702 }
3703
3704 out:
3705 kfree(buf);
3706 return;
3707 }
3708
3709 /* Get the device id from inquiry page 0x83 */
3710 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3711 unsigned char *device_id, int index, int buflen)
3712 {
3713 int rc;
3714 unsigned char *buf;
3715
3716 /* Does controller have VPD for device id? */
3717 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3718 return 1; /* not supported */
3719
3720 buf = kzalloc(64, GFP_KERNEL);
3721 if (!buf)
3722 return -ENOMEM;
3723
3724 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3725 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3726 if (rc == 0) {
3727 if (buflen > 16)
3728 buflen = 16;
3729 memcpy(device_id, &buf[8], buflen);
3730 }
3731
3732 kfree(buf);
3733
3734 return rc; /*0 - got id, otherwise, didn't */
3735 }
3736
3737 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3738 void *buf, int bufsize,
3739 int extended_response)
3740 {
3741 int rc = IO_OK;
3742 struct CommandList *c;
3743 unsigned char scsi3addr[8];
3744 struct ErrorInfo *ei;
3745
3746 c = cmd_alloc(h);
3747
3748 /* address the controller */
3749 memset(scsi3addr, 0, sizeof(scsi3addr));
3750 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3751 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3752 rc = -EAGAIN;
3753 goto out;
3754 }
3755 if (extended_response)
3756 c->Request.CDB[1] = extended_response;
3757 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3758 NO_TIMEOUT);
3759 if (rc)
3760 goto out;
3761 ei = c->err_info;
3762 if (ei->CommandStatus != 0 &&
3763 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3764 hpsa_scsi_interpret_error(h, c);
3765 rc = -EIO;
3766 } else {
3767 struct ReportLUNdata *rld = buf;
3768
3769 if (rld->extended_response_flag != extended_response) {
3770 if (!h->legacy_board) {
3771 dev_err(&h->pdev->dev,
3772 "report luns requested format %u, got %u\n",
3773 extended_response,
3774 rld->extended_response_flag);
3775 rc = -EINVAL;
3776 } else
3777 rc = -EOPNOTSUPP;
3778 }
3779 }
3780 out:
3781 cmd_free(h, c);
3782 return rc;
3783 }
3784
3785 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3786 struct ReportExtendedLUNdata *buf, int bufsize)
3787 {
3788 int rc;
3789 struct ReportLUNdata *lbuf;
3790
3791 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3792 HPSA_REPORT_PHYS_EXTENDED);
3793 if (!rc || rc != -EOPNOTSUPP)
3794 return rc;
3795
3796 /* REPORT PHYS EXTENDED is not supported */
3797 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3798 if (!lbuf)
3799 return -ENOMEM;
3800
3801 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3802 if (!rc) {
3803 int i;
3804 u32 nphys;
3805
3806 /* Copy ReportLUNdata header */
3807 memcpy(buf, lbuf, 8);
3808 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3809 for (i = 0; i < nphys; i++)
3810 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3811 }
3812 kfree(lbuf);
3813 return rc;
3814 }
3815
3816 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3817 struct ReportLUNdata *buf, int bufsize)
3818 {
3819 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3820 }
3821
3822 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3823 int bus, int target, int lun)
3824 {
3825 device->bus = bus;
3826 device->target = target;
3827 device->lun = lun;
3828 }
3829
3830 /* Use VPD inquiry to get details of volume status */
3831 static int hpsa_get_volume_status(struct ctlr_info *h,
3832 unsigned char scsi3addr[])
3833 {
3834 int rc;
3835 int status;
3836 int size;
3837 unsigned char *buf;
3838
3839 buf = kzalloc(64, GFP_KERNEL);
3840 if (!buf)
3841 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3842
3843 /* Does controller have VPD for logical volume status? */
3844 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3845 goto exit_failed;
3846
3847 /* Get the size of the VPD return buffer */
3848 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3849 buf, HPSA_VPD_HEADER_SZ);
3850 if (rc != 0)
3851 goto exit_failed;
3852 size = buf[3];
3853
3854 /* Now get the whole VPD buffer */
3855 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3856 buf, size + HPSA_VPD_HEADER_SZ);
3857 if (rc != 0)
3858 goto exit_failed;
3859 status = buf[4]; /* status byte */
3860
3861 kfree(buf);
3862 return status;
3863 exit_failed:
3864 kfree(buf);
3865 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3866 }
3867
3868 /* Determine offline status of a volume.
3869 * Return either:
3870 * 0 (not offline)
3871 * 0xff (offline for unknown reasons)
3872 * # (integer code indicating one of several NOT READY states
3873 * describing why a volume is to be kept offline)
3874 */
3875 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3876 unsigned char scsi3addr[])
3877 {
3878 struct CommandList *c;
3879 unsigned char *sense;
3880 u8 sense_key, asc, ascq;
3881 int sense_len;
3882 int rc, ldstat = 0;
3883 u16 cmd_status;
3884 u8 scsi_status;
3885 #define ASC_LUN_NOT_READY 0x04
3886 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3887 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3888
3889 c = cmd_alloc(h);
3890
3891 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3892 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3893 NO_TIMEOUT);
3894 if (rc) {
3895 cmd_free(h, c);
3896 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3897 }
3898 sense = c->err_info->SenseInfo;
3899 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3900 sense_len = sizeof(c->err_info->SenseInfo);
3901 else
3902 sense_len = c->err_info->SenseLen;
3903 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3904 cmd_status = c->err_info->CommandStatus;
3905 scsi_status = c->err_info->ScsiStatus;
3906 cmd_free(h, c);
3907
3908 /* Determine the reason for not ready state */
3909 ldstat = hpsa_get_volume_status(h, scsi3addr);
3910
3911 /* Keep volume offline in certain cases: */
3912 switch (ldstat) {
3913 case HPSA_LV_FAILED:
3914 case HPSA_LV_UNDERGOING_ERASE:
3915 case HPSA_LV_NOT_AVAILABLE:
3916 case HPSA_LV_UNDERGOING_RPI:
3917 case HPSA_LV_PENDING_RPI:
3918 case HPSA_LV_ENCRYPTED_NO_KEY:
3919 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3920 case HPSA_LV_UNDERGOING_ENCRYPTION:
3921 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3922 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3923 return ldstat;
3924 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3925 /* If VPD status page isn't available,
3926 * use ASC/ASCQ to determine state
3927 */
3928 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3929 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3930 return ldstat;
3931 break;
3932 default:
3933 break;
3934 }
3935 return HPSA_LV_OK;
3936 }
3937
3938 static int hpsa_update_device_info(struct ctlr_info *h,
3939 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3940 unsigned char *is_OBDR_device)
3941 {
3942
3943 #define OBDR_SIG_OFFSET 43
3944 #define OBDR_TAPE_SIG "$DR-10"
3945 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3946 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3947
3948 unsigned char *inq_buff;
3949 unsigned char *obdr_sig;
3950 int rc = 0;
3951
3952 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3953 if (!inq_buff) {
3954 rc = -ENOMEM;
3955 goto bail_out;
3956 }
3957
3958 /* Do an inquiry to the device to see what it is. */
3959 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3960 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3961 dev_err(&h->pdev->dev,
3962 "%s: inquiry failed, device will be skipped.\n",
3963 __func__);
3964 rc = HPSA_INQUIRY_FAILED;
3965 goto bail_out;
3966 }
3967
3968 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3969 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3970
3971 this_device->devtype = (inq_buff[0] & 0x1f);
3972 memcpy(this_device->scsi3addr, scsi3addr, 8);
3973 memcpy(this_device->vendor, &inq_buff[8],
3974 sizeof(this_device->vendor));
3975 memcpy(this_device->model, &inq_buff[16],
3976 sizeof(this_device->model));
3977 this_device->rev = inq_buff[2];
3978 memset(this_device->device_id, 0,
3979 sizeof(this_device->device_id));
3980 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3981 sizeof(this_device->device_id)) < 0) {
3982 dev_err(&h->pdev->dev,
3983 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
3984 h->ctlr, __func__,
3985 h->scsi_host->host_no,
3986 this_device->bus, this_device->target,
3987 this_device->lun,
3988 scsi_device_type(this_device->devtype),
3989 this_device->model);
3990 rc = HPSA_LV_FAILED;
3991 goto bail_out;
3992 }
3993
3994 if ((this_device->devtype == TYPE_DISK ||
3995 this_device->devtype == TYPE_ZBC) &&
3996 is_logical_dev_addr_mode(scsi3addr)) {
3997 unsigned char volume_offline;
3998
3999 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
4000 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
4001 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
4002 volume_offline = hpsa_volume_offline(h, scsi3addr);
4003 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
4004 h->legacy_board) {
4005 /*
4006 * Legacy boards might not support volume status
4007 */
4008 dev_info(&h->pdev->dev,
4009 "C0:T%d:L%d Volume status not available, assuming online.\n",
4010 this_device->target, this_device->lun);
4011 volume_offline = 0;
4012 }
4013 this_device->volume_offline = volume_offline;
4014 if (volume_offline == HPSA_LV_FAILED) {
4015 rc = HPSA_LV_FAILED;
4016 dev_err(&h->pdev->dev,
4017 "%s: LV failed, device will be skipped.\n",
4018 __func__);
4019 goto bail_out;
4020 }
4021 } else {
4022 this_device->raid_level = RAID_UNKNOWN;
4023 this_device->offload_config = 0;
4024 hpsa_turn_off_ioaccel_for_device(this_device);
4025 this_device->hba_ioaccel_enabled = 0;
4026 this_device->volume_offline = 0;
4027 this_device->queue_depth = h->nr_cmds;
4028 }
4029
4030 if (this_device->external)
4031 this_device->queue_depth = EXTERNAL_QD;
4032
4033 if (is_OBDR_device) {
4034 /* See if this is a One-Button-Disaster-Recovery device
4035 * by looking for "$DR-10" at offset 43 in inquiry data.
4036 */
4037 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4038 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4039 strncmp(obdr_sig, OBDR_TAPE_SIG,
4040 OBDR_SIG_LEN) == 0);
4041 }
4042 kfree(inq_buff);
4043 return 0;
4044
4045 bail_out:
4046 kfree(inq_buff);
4047 return rc;
4048 }
4049
4050 /*
4051 * Helper function to assign bus, target, lun mapping of devices.
4052 * Logical drive target and lun are assigned at this time, but
4053 * physical device lun and target assignment are deferred (assigned
4054 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4055 */
4056 static void figure_bus_target_lun(struct ctlr_info *h,
4057 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4058 {
4059 u32 lunid = get_unaligned_le32(lunaddrbytes);
4060
4061 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4062 /* physical device, target and lun filled in later */
4063 if (is_hba_lunid(lunaddrbytes)) {
4064 int bus = HPSA_HBA_BUS;
4065
4066 if (!device->rev)
4067 bus = HPSA_LEGACY_HBA_BUS;
4068 hpsa_set_bus_target_lun(device,
4069 bus, 0, lunid & 0x3fff);
4070 } else
4071 /* defer target, lun assignment for physical devices */
4072 hpsa_set_bus_target_lun(device,
4073 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4074 return;
4075 }
4076 /* It's a logical device */
4077 if (device->external) {
4078 hpsa_set_bus_target_lun(device,
4079 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4080 lunid & 0x00ff);
4081 return;
4082 }
4083 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4084 0, lunid & 0x3fff);
4085 }
4086
4087 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4088 int i, int nphysicals, int nlocal_logicals)
4089 {
4090 /* In report logicals, local logicals are listed first,
4091 * then any externals.
4092 */
4093 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4094
4095 if (i == raid_ctlr_position)
4096 return 0;
4097
4098 if (i < logicals_start)
4099 return 0;
4100
4101 /* i is in logicals range, but still within local logicals */
4102 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4103 return 0;
4104
4105 return 1; /* it's an external lun */
4106 }
4107
4108 /*
4109 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4110 * logdev. The number of luns in physdev and logdev are returned in
4111 * *nphysicals and *nlogicals, respectively.
4112 * Returns 0 on success, -1 otherwise.
4113 */
4114 static int hpsa_gather_lun_info(struct ctlr_info *h,
4115 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4116 struct ReportLUNdata *logdev, u32 *nlogicals)
4117 {
4118 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4119 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4120 return -1;
4121 }
4122 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4123 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4124 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4125 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4126 *nphysicals = HPSA_MAX_PHYS_LUN;
4127 }
4128 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4129 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4130 return -1;
4131 }
4132 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4133 /* Reject Logicals in excess of our max capability. */
4134 if (*nlogicals > HPSA_MAX_LUN) {
4135 dev_warn(&h->pdev->dev,
4136 "maximum logical LUNs (%d) exceeded. "
4137 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4138 *nlogicals - HPSA_MAX_LUN);
4139 *nlogicals = HPSA_MAX_LUN;
4140 }
4141 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4142 dev_warn(&h->pdev->dev,
4143 "maximum logical + physical LUNs (%d) exceeded. "
4144 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4145 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4146 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4147 }
4148 return 0;
4149 }
4150
4151 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4152 int i, int nphysicals, int nlogicals,
4153 struct ReportExtendedLUNdata *physdev_list,
4154 struct ReportLUNdata *logdev_list)
4155 {
4156 /* Helper function, figure out where the LUN ID info is coming from
4157 * given index i, lists of physical and logical devices, where in
4158 * the list the raid controller is supposed to appear (first or last)
4159 */
4160
4161 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4162 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4163
4164 if (i == raid_ctlr_position)
4165 return RAID_CTLR_LUNID;
4166
4167 if (i < logicals_start)
4168 return &physdev_list->LUN[i -
4169 (raid_ctlr_position == 0)].lunid[0];
4170
4171 if (i < last_device)
4172 return &logdev_list->LUN[i - nphysicals -
4173 (raid_ctlr_position == 0)][0];
4174 BUG();
4175 return NULL;
4176 }
4177
4178 /* get physical drive ioaccel handle and queue depth */
4179 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4180 struct hpsa_scsi_dev_t *dev,
4181 struct ReportExtendedLUNdata *rlep, int rle_index,
4182 struct bmic_identify_physical_device *id_phys)
4183 {
4184 int rc;
4185 struct ext_report_lun_entry *rle;
4186
4187 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4188 return;
4189
4190 rle = &rlep->LUN[rle_index];
4191
4192 dev->ioaccel_handle = rle->ioaccel_handle;
4193 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4194 dev->hba_ioaccel_enabled = 1;
4195 memset(id_phys, 0, sizeof(*id_phys));
4196 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4197 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4198 sizeof(*id_phys));
4199 if (!rc)
4200 /* Reserve space for FW operations */
4201 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4202 #define DRIVE_QUEUE_DEPTH 7
4203 dev->queue_depth =
4204 le16_to_cpu(id_phys->current_queue_depth_limit) -
4205 DRIVE_CMDS_RESERVED_FOR_FW;
4206 else
4207 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4208 }
4209
4210 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4211 struct ReportExtendedLUNdata *rlep, int rle_index,
4212 struct bmic_identify_physical_device *id_phys)
4213 {
4214 struct ext_report_lun_entry *rle;
4215
4216 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4217 return;
4218
4219 rle = &rlep->LUN[rle_index];
4220
4221 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4222 this_device->hba_ioaccel_enabled = 1;
4223
4224 memcpy(&this_device->active_path_index,
4225 &id_phys->active_path_number,
4226 sizeof(this_device->active_path_index));
4227 memcpy(&this_device->path_map,
4228 &id_phys->redundant_path_present_map,
4229 sizeof(this_device->path_map));
4230 memcpy(&this_device->box,
4231 &id_phys->alternate_paths_phys_box_on_port,
4232 sizeof(this_device->box));
4233 memcpy(&this_device->phys_connector,
4234 &id_phys->alternate_paths_phys_connector,
4235 sizeof(this_device->phys_connector));
4236 memcpy(&this_device->bay,
4237 &id_phys->phys_bay_in_box,
4238 sizeof(this_device->bay));
4239 }
4240
4241 /* get number of local logical disks. */
4242 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4243 struct bmic_identify_controller *id_ctlr,
4244 u32 *nlocals)
4245 {
4246 int rc;
4247
4248 if (!id_ctlr) {
4249 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4250 __func__);
4251 return -ENOMEM;
4252 }
4253 memset(id_ctlr, 0, sizeof(*id_ctlr));
4254 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4255 if (!rc)
4256 if (id_ctlr->configured_logical_drive_count < 255)
4257 *nlocals = id_ctlr->configured_logical_drive_count;
4258 else
4259 *nlocals = le16_to_cpu(
4260 id_ctlr->extended_logical_unit_count);
4261 else
4262 *nlocals = -1;
4263 return rc;
4264 }
4265
4266 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4267 {
4268 struct bmic_identify_physical_device *id_phys;
4269 bool is_spare = false;
4270 int rc;
4271
4272 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4273 if (!id_phys)
4274 return false;
4275
4276 rc = hpsa_bmic_id_physical_device(h,
4277 lunaddrbytes,
4278 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4279 id_phys, sizeof(*id_phys));
4280 if (rc == 0)
4281 is_spare = (id_phys->more_flags >> 6) & 0x01;
4282
4283 kfree(id_phys);
4284 return is_spare;
4285 }
4286
4287 #define RPL_DEV_FLAG_NON_DISK 0x1
4288 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4289 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4290
4291 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4292
4293 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4294 struct ext_report_lun_entry *rle)
4295 {
4296 u8 device_flags;
4297 u8 device_type;
4298
4299 if (!MASKED_DEVICE(lunaddrbytes))
4300 return false;
4301
4302 device_flags = rle->device_flags;
4303 device_type = rle->device_type;
4304
4305 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4306 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4307 return false;
4308 return true;
4309 }
4310
4311 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4312 return false;
4313
4314 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4315 return false;
4316
4317 /*
4318 * Spares may be spun down, we do not want to
4319 * do an Inquiry to a RAID set spare drive as
4320 * that would have them spun up, that is a
4321 * performance hit because I/O to the RAID device
4322 * stops while the spin up occurs which can take
4323 * over 50 seconds.
4324 */
4325 if (hpsa_is_disk_spare(h, lunaddrbytes))
4326 return true;
4327
4328 return false;
4329 }
4330
4331 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4332 {
4333 /* the idea here is we could get notified
4334 * that some devices have changed, so we do a report
4335 * physical luns and report logical luns cmd, and adjust
4336 * our list of devices accordingly.
4337 *
4338 * The scsi3addr's of devices won't change so long as the
4339 * adapter is not reset. That means we can rescan and
4340 * tell which devices we already know about, vs. new
4341 * devices, vs. disappearing devices.
4342 */
4343 struct ReportExtendedLUNdata *physdev_list = NULL;
4344 struct ReportLUNdata *logdev_list = NULL;
4345 struct bmic_identify_physical_device *id_phys = NULL;
4346 struct bmic_identify_controller *id_ctlr = NULL;
4347 u32 nphysicals = 0;
4348 u32 nlogicals = 0;
4349 u32 nlocal_logicals = 0;
4350 u32 ndev_allocated = 0;
4351 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4352 int ncurrent = 0;
4353 int i, n_ext_target_devs, ndevs_to_allocate;
4354 int raid_ctlr_position;
4355 bool physical_device;
4356 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4357
4358 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4359 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4360 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4361 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4362 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4363 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4364
4365 if (!currentsd || !physdev_list || !logdev_list ||
4366 !tmpdevice || !id_phys || !id_ctlr) {
4367 dev_err(&h->pdev->dev, "out of memory\n");
4368 goto out;
4369 }
4370 memset(lunzerobits, 0, sizeof(lunzerobits));
4371
4372 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4373
4374 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4375 logdev_list, &nlogicals)) {
4376 h->drv_req_rescan = 1;
4377 goto out;
4378 }
4379
4380 /* Set number of local logicals (non PTRAID) */
4381 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4382 dev_warn(&h->pdev->dev,
4383 "%s: Can't determine number of local logical devices.\n",
4384 __func__);
4385 }
4386
4387 /* We might see up to the maximum number of logical and physical disks
4388 * plus external target devices, and a device for the local RAID
4389 * controller.
4390 */
4391 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4392
4393 hpsa_ext_ctrl_present(h, physdev_list);
4394
4395 /* Allocate the per device structures */
4396 for (i = 0; i < ndevs_to_allocate; i++) {
4397 if (i >= HPSA_MAX_DEVICES) {
4398 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4399 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4400 ndevs_to_allocate - HPSA_MAX_DEVICES);
4401 break;
4402 }
4403
4404 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4405 if (!currentsd[i]) {
4406 h->drv_req_rescan = 1;
4407 goto out;
4408 }
4409 ndev_allocated++;
4410 }
4411
4412 if (is_scsi_rev_5(h))
4413 raid_ctlr_position = 0;
4414 else
4415 raid_ctlr_position = nphysicals + nlogicals;
4416
4417 /* adjust our table of devices */
4418 n_ext_target_devs = 0;
4419 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4420 u8 *lunaddrbytes, is_OBDR = 0;
4421 int rc = 0;
4422 int phys_dev_index = i - (raid_ctlr_position == 0);
4423 bool skip_device = false;
4424
4425 memset(tmpdevice, 0, sizeof(*tmpdevice));
4426
4427 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4428
4429 /* Figure out where the LUN ID info is coming from */
4430 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4431 i, nphysicals, nlogicals, physdev_list, logdev_list);
4432
4433 /* Determine if this is a lun from an external target array */
4434 tmpdevice->external =
4435 figure_external_status(h, raid_ctlr_position, i,
4436 nphysicals, nlocal_logicals);
4437
4438 /*
4439 * Skip over some devices such as a spare.
4440 */
4441 if (phys_dev_index >= 0 && !tmpdevice->external &&
4442 physical_device) {
4443 skip_device = hpsa_skip_device(h, lunaddrbytes,
4444 &physdev_list->LUN[phys_dev_index]);
4445 if (skip_device)
4446 continue;
4447 }
4448
4449 /* Get device type, vendor, model, device id, raid_map */
4450 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4451 &is_OBDR);
4452 if (rc == -ENOMEM) {
4453 dev_warn(&h->pdev->dev,
4454 "Out of memory, rescan deferred.\n");
4455 h->drv_req_rescan = 1;
4456 goto out;
4457 }
4458 if (rc) {
4459 h->drv_req_rescan = 1;
4460 continue;
4461 }
4462
4463 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4464 this_device = currentsd[ncurrent];
4465
4466 *this_device = *tmpdevice;
4467 this_device->physical_device = physical_device;
4468
4469 /*
4470 * Expose all devices except for physical devices that
4471 * are masked.
4472 */
4473 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4474 this_device->expose_device = 0;
4475 else
4476 this_device->expose_device = 1;
4477
4478
4479 /*
4480 * Get the SAS address for physical devices that are exposed.
4481 */
4482 if (this_device->physical_device && this_device->expose_device)
4483 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4484
4485 switch (this_device->devtype) {
4486 case TYPE_ROM:
4487 /* We don't *really* support actual CD-ROM devices,
4488 * just "One Button Disaster Recovery" tape drive
4489 * which temporarily pretends to be a CD-ROM drive.
4490 * So we check that the device is really an OBDR tape
4491 * device by checking for "$DR-10" in bytes 43-48 of
4492 * the inquiry data.
4493 */
4494 if (is_OBDR)
4495 ncurrent++;
4496 break;
4497 case TYPE_DISK:
4498 case TYPE_ZBC:
4499 if (this_device->physical_device) {
4500 /* The disk is in HBA mode. */
4501 /* Never use RAID mapper in HBA mode. */
4502 this_device->offload_enabled = 0;
4503 hpsa_get_ioaccel_drive_info(h, this_device,
4504 physdev_list, phys_dev_index, id_phys);
4505 hpsa_get_path_info(this_device,
4506 physdev_list, phys_dev_index, id_phys);
4507 }
4508 ncurrent++;
4509 break;
4510 case TYPE_TAPE:
4511 case TYPE_MEDIUM_CHANGER:
4512 ncurrent++;
4513 break;
4514 case TYPE_ENCLOSURE:
4515 if (!this_device->external)
4516 hpsa_get_enclosure_info(h, lunaddrbytes,
4517 physdev_list, phys_dev_index,
4518 this_device);
4519 ncurrent++;
4520 break;
4521 case TYPE_RAID:
4522 /* Only present the Smartarray HBA as a RAID controller.
4523 * If it's a RAID controller other than the HBA itself
4524 * (an external RAID controller, MSA500 or similar)
4525 * don't present it.
4526 */
4527 if (!is_hba_lunid(lunaddrbytes))
4528 break;
4529 ncurrent++;
4530 break;
4531 default:
4532 break;
4533 }
4534 if (ncurrent >= HPSA_MAX_DEVICES)
4535 break;
4536 }
4537
4538 if (h->sas_host == NULL) {
4539 int rc = 0;
4540
4541 rc = hpsa_add_sas_host(h);
4542 if (rc) {
4543 dev_warn(&h->pdev->dev,
4544 "Could not add sas host %d\n", rc);
4545 goto out;
4546 }
4547 }
4548
4549 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4550 out:
4551 kfree(tmpdevice);
4552 for (i = 0; i < ndev_allocated; i++)
4553 kfree(currentsd[i]);
4554 kfree(currentsd);
4555 kfree(physdev_list);
4556 kfree(logdev_list);
4557 kfree(id_ctlr);
4558 kfree(id_phys);
4559 }
4560
4561 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4562 struct scatterlist *sg)
4563 {
4564 u64 addr64 = (u64) sg_dma_address(sg);
4565 unsigned int len = sg_dma_len(sg);
4566
4567 desc->Addr = cpu_to_le64(addr64);
4568 desc->Len = cpu_to_le32(len);
4569 desc->Ext = 0;
4570 }
4571
4572 /*
4573 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4574 * dma mapping and fills in the scatter gather entries of the
4575 * hpsa command, cp.
4576 */
4577 static int hpsa_scatter_gather(struct ctlr_info *h,
4578 struct CommandList *cp,
4579 struct scsi_cmnd *cmd)
4580 {
4581 struct scatterlist *sg;
4582 int use_sg, i, sg_limit, chained, last_sg;
4583 struct SGDescriptor *curr_sg;
4584
4585 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4586
4587 use_sg = scsi_dma_map(cmd);
4588 if (use_sg < 0)
4589 return use_sg;
4590
4591 if (!use_sg)
4592 goto sglist_finished;
4593
4594 /*
4595 * If the number of entries is greater than the max for a single list,
4596 * then we have a chained list; we will set up all but one entry in the
4597 * first list (the last entry is saved for link information);
4598 * otherwise, we don't have a chained list and we'll set up at each of
4599 * the entries in the one list.
4600 */
4601 curr_sg = cp->SG;
4602 chained = use_sg > h->max_cmd_sg_entries;
4603 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4604 last_sg = scsi_sg_count(cmd) - 1;
4605 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4606 hpsa_set_sg_descriptor(curr_sg, sg);
4607 curr_sg++;
4608 }
4609
4610 if (chained) {
4611 /*
4612 * Continue with the chained list. Set curr_sg to the chained
4613 * list. Modify the limit to the total count less the entries
4614 * we've already set up. Resume the scan at the list entry
4615 * where the previous loop left off.
4616 */
4617 curr_sg = h->cmd_sg_list[cp->cmdindex];
4618 sg_limit = use_sg - sg_limit;
4619 for_each_sg(sg, sg, sg_limit, i) {
4620 hpsa_set_sg_descriptor(curr_sg, sg);
4621 curr_sg++;
4622 }
4623 }
4624
4625 /* Back the pointer up to the last entry and mark it as "last". */
4626 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4627
4628 if (use_sg + chained > h->maxSG)
4629 h->maxSG = use_sg + chained;
4630
4631 if (chained) {
4632 cp->Header.SGList = h->max_cmd_sg_entries;
4633 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4634 if (hpsa_map_sg_chain_block(h, cp)) {
4635 scsi_dma_unmap(cmd);
4636 return -1;
4637 }
4638 return 0;
4639 }
4640
4641 sglist_finished:
4642
4643 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4644 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4645 return 0;
4646 }
4647
4648 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4649 u8 *cdb, int cdb_len,
4650 const char *func)
4651 {
4652 dev_warn(&h->pdev->dev,
4653 "%s: Blocking zero-length request: CDB:%*phN\n",
4654 func, cdb_len, cdb);
4655 }
4656
4657 #define IO_ACCEL_INELIGIBLE 1
4658 /* zero-length transfers trigger hardware errors. */
4659 static bool is_zero_length_transfer(u8 *cdb)
4660 {
4661 u32 block_cnt;
4662
4663 /* Block zero-length transfer sizes on certain commands. */
4664 switch (cdb[0]) {
4665 case READ_10:
4666 case WRITE_10:
4667 case VERIFY: /* 0x2F */
4668 case WRITE_VERIFY: /* 0x2E */
4669 block_cnt = get_unaligned_be16(&cdb[7]);
4670 break;
4671 case READ_12:
4672 case WRITE_12:
4673 case VERIFY_12: /* 0xAF */
4674 case WRITE_VERIFY_12: /* 0xAE */
4675 block_cnt = get_unaligned_be32(&cdb[6]);
4676 break;
4677 case READ_16:
4678 case WRITE_16:
4679 case VERIFY_16: /* 0x8F */
4680 block_cnt = get_unaligned_be32(&cdb[10]);
4681 break;
4682 default:
4683 return false;
4684 }
4685
4686 return block_cnt == 0;
4687 }
4688
4689 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4690 {
4691 int is_write = 0;
4692 u32 block;
4693 u32 block_cnt;
4694
4695 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4696 switch (cdb[0]) {
4697 case WRITE_6:
4698 case WRITE_12:
4699 is_write = 1;
4700 fallthrough;
4701 case READ_6:
4702 case READ_12:
4703 if (*cdb_len == 6) {
4704 block = (((cdb[1] & 0x1F) << 16) |
4705 (cdb[2] << 8) |
4706 cdb[3]);
4707 block_cnt = cdb[4];
4708 if (block_cnt == 0)
4709 block_cnt = 256;
4710 } else {
4711 BUG_ON(*cdb_len != 12);
4712 block = get_unaligned_be32(&cdb[2]);
4713 block_cnt = get_unaligned_be32(&cdb[6]);
4714 }
4715 if (block_cnt > 0xffff)
4716 return IO_ACCEL_INELIGIBLE;
4717
4718 cdb[0] = is_write ? WRITE_10 : READ_10;
4719 cdb[1] = 0;
4720 cdb[2] = (u8) (block >> 24);
4721 cdb[3] = (u8) (block >> 16);
4722 cdb[4] = (u8) (block >> 8);
4723 cdb[5] = (u8) (block);
4724 cdb[6] = 0;
4725 cdb[7] = (u8) (block_cnt >> 8);
4726 cdb[8] = (u8) (block_cnt);
4727 cdb[9] = 0;
4728 *cdb_len = 10;
4729 break;
4730 }
4731 return 0;
4732 }
4733
4734 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4735 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4736 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4737 {
4738 struct scsi_cmnd *cmd = c->scsi_cmd;
4739 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4740 unsigned int len;
4741 unsigned int total_len = 0;
4742 struct scatterlist *sg;
4743 u64 addr64;
4744 int use_sg, i;
4745 struct SGDescriptor *curr_sg;
4746 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4747
4748 /* TODO: implement chaining support */
4749 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4750 atomic_dec(&phys_disk->ioaccel_cmds_out);
4751 return IO_ACCEL_INELIGIBLE;
4752 }
4753
4754 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4755
4756 if (is_zero_length_transfer(cdb)) {
4757 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4758 atomic_dec(&phys_disk->ioaccel_cmds_out);
4759 return IO_ACCEL_INELIGIBLE;
4760 }
4761
4762 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4763 atomic_dec(&phys_disk->ioaccel_cmds_out);
4764 return IO_ACCEL_INELIGIBLE;
4765 }
4766
4767 c->cmd_type = CMD_IOACCEL1;
4768
4769 /* Adjust the DMA address to point to the accelerated command buffer */
4770 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4771 (c->cmdindex * sizeof(*cp));
4772 BUG_ON(c->busaddr & 0x0000007F);
4773
4774 use_sg = scsi_dma_map(cmd);
4775 if (use_sg < 0) {
4776 atomic_dec(&phys_disk->ioaccel_cmds_out);
4777 return use_sg;
4778 }
4779
4780 if (use_sg) {
4781 curr_sg = cp->SG;
4782 scsi_for_each_sg(cmd, sg, use_sg, i) {
4783 addr64 = (u64) sg_dma_address(sg);
4784 len = sg_dma_len(sg);
4785 total_len += len;
4786 curr_sg->Addr = cpu_to_le64(addr64);
4787 curr_sg->Len = cpu_to_le32(len);
4788 curr_sg->Ext = cpu_to_le32(0);
4789 curr_sg++;
4790 }
4791 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4792
4793 switch (cmd->sc_data_direction) {
4794 case DMA_TO_DEVICE:
4795 control |= IOACCEL1_CONTROL_DATA_OUT;
4796 break;
4797 case DMA_FROM_DEVICE:
4798 control |= IOACCEL1_CONTROL_DATA_IN;
4799 break;
4800 case DMA_NONE:
4801 control |= IOACCEL1_CONTROL_NODATAXFER;
4802 break;
4803 default:
4804 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4805 cmd->sc_data_direction);
4806 BUG();
4807 break;
4808 }
4809 } else {
4810 control |= IOACCEL1_CONTROL_NODATAXFER;
4811 }
4812
4813 c->Header.SGList = use_sg;
4814 /* Fill out the command structure to submit */
4815 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4816 cp->transfer_len = cpu_to_le32(total_len);
4817 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4818 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4819 cp->control = cpu_to_le32(control);
4820 memcpy(cp->CDB, cdb, cdb_len);
4821 memcpy(cp->CISS_LUN, scsi3addr, 8);
4822 /* Tag was already set at init time. */
4823 enqueue_cmd_and_start_io(h, c);
4824 return 0;
4825 }
4826
4827 /*
4828 * Queue a command directly to a device behind the controller using the
4829 * I/O accelerator path.
4830 */
4831 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4832 struct CommandList *c)
4833 {
4834 struct scsi_cmnd *cmd = c->scsi_cmd;
4835 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4836
4837 if (!dev)
4838 return -1;
4839
4840 c->phys_disk = dev;
4841
4842 if (dev->in_reset)
4843 return -1;
4844
4845 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4846 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4847 }
4848
4849 /*
4850 * Set encryption parameters for the ioaccel2 request
4851 */
4852 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4853 struct CommandList *c, struct io_accel2_cmd *cp)
4854 {
4855 struct scsi_cmnd *cmd = c->scsi_cmd;
4856 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4857 struct raid_map_data *map = &dev->raid_map;
4858 u64 first_block;
4859
4860 /* Are we doing encryption on this device */
4861 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4862 return;
4863 /* Set the data encryption key index. */
4864 cp->dekindex = map->dekindex;
4865
4866 /* Set the encryption enable flag, encoded into direction field. */
4867 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4868
4869 /* Set encryption tweak values based on logical block address
4870 * If block size is 512, tweak value is LBA.
4871 * For other block sizes, tweak is (LBA * block size)/ 512)
4872 */
4873 switch (cmd->cmnd[0]) {
4874 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4875 case READ_6:
4876 case WRITE_6:
4877 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4878 (cmd->cmnd[2] << 8) |
4879 cmd->cmnd[3]);
4880 break;
4881 case WRITE_10:
4882 case READ_10:
4883 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4884 case WRITE_12:
4885 case READ_12:
4886 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4887 break;
4888 case WRITE_16:
4889 case READ_16:
4890 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4891 break;
4892 default:
4893 dev_err(&h->pdev->dev,
4894 "ERROR: %s: size (0x%x) not supported for encryption\n",
4895 __func__, cmd->cmnd[0]);
4896 BUG();
4897 break;
4898 }
4899
4900 if (le32_to_cpu(map->volume_blk_size) != 512)
4901 first_block = first_block *
4902 le32_to_cpu(map->volume_blk_size)/512;
4903
4904 cp->tweak_lower = cpu_to_le32(first_block);
4905 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4906 }
4907
4908 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4909 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4910 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4911 {
4912 struct scsi_cmnd *cmd = c->scsi_cmd;
4913 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4914 struct ioaccel2_sg_element *curr_sg;
4915 int use_sg, i;
4916 struct scatterlist *sg;
4917 u64 addr64;
4918 u32 len;
4919 u32 total_len = 0;
4920
4921 if (!cmd->device)
4922 return -1;
4923
4924 if (!cmd->device->hostdata)
4925 return -1;
4926
4927 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4928
4929 if (is_zero_length_transfer(cdb)) {
4930 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4931 atomic_dec(&phys_disk->ioaccel_cmds_out);
4932 return IO_ACCEL_INELIGIBLE;
4933 }
4934
4935 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4936 atomic_dec(&phys_disk->ioaccel_cmds_out);
4937 return IO_ACCEL_INELIGIBLE;
4938 }
4939
4940 c->cmd_type = CMD_IOACCEL2;
4941 /* Adjust the DMA address to point to the accelerated command buffer */
4942 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4943 (c->cmdindex * sizeof(*cp));
4944 BUG_ON(c->busaddr & 0x0000007F);
4945
4946 memset(cp, 0, sizeof(*cp));
4947 cp->IU_type = IOACCEL2_IU_TYPE;
4948
4949 use_sg = scsi_dma_map(cmd);
4950 if (use_sg < 0) {
4951 atomic_dec(&phys_disk->ioaccel_cmds_out);
4952 return use_sg;
4953 }
4954
4955 if (use_sg) {
4956 curr_sg = cp->sg;
4957 if (use_sg > h->ioaccel_maxsg) {
4958 addr64 = le64_to_cpu(
4959 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4960 curr_sg->address = cpu_to_le64(addr64);
4961 curr_sg->length = 0;
4962 curr_sg->reserved[0] = 0;
4963 curr_sg->reserved[1] = 0;
4964 curr_sg->reserved[2] = 0;
4965 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4966
4967 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4968 }
4969 scsi_for_each_sg(cmd, sg, use_sg, i) {
4970 addr64 = (u64) sg_dma_address(sg);
4971 len = sg_dma_len(sg);
4972 total_len += len;
4973 curr_sg->address = cpu_to_le64(addr64);
4974 curr_sg->length = cpu_to_le32(len);
4975 curr_sg->reserved[0] = 0;
4976 curr_sg->reserved[1] = 0;
4977 curr_sg->reserved[2] = 0;
4978 curr_sg->chain_indicator = 0;
4979 curr_sg++;
4980 }
4981
4982 /*
4983 * Set the last s/g element bit
4984 */
4985 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4986
4987 switch (cmd->sc_data_direction) {
4988 case DMA_TO_DEVICE:
4989 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4990 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4991 break;
4992 case DMA_FROM_DEVICE:
4993 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4994 cp->direction |= IOACCEL2_DIR_DATA_IN;
4995 break;
4996 case DMA_NONE:
4997 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4998 cp->direction |= IOACCEL2_DIR_NO_DATA;
4999 break;
5000 default:
5001 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5002 cmd->sc_data_direction);
5003 BUG();
5004 break;
5005 }
5006 } else {
5007 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
5008 cp->direction |= IOACCEL2_DIR_NO_DATA;
5009 }
5010
5011 /* Set encryption parameters, if necessary */
5012 set_encrypt_ioaccel2(h, c, cp);
5013
5014 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
5015 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5016 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
5017
5018 cp->data_len = cpu_to_le32(total_len);
5019 cp->err_ptr = cpu_to_le64(c->busaddr +
5020 offsetof(struct io_accel2_cmd, error_data));
5021 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5022
5023 /* fill in sg elements */
5024 if (use_sg > h->ioaccel_maxsg) {
5025 cp->sg_count = 1;
5026 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5027 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5028 atomic_dec(&phys_disk->ioaccel_cmds_out);
5029 scsi_dma_unmap(cmd);
5030 return -1;
5031 }
5032 } else
5033 cp->sg_count = (u8) use_sg;
5034
5035 if (phys_disk->in_reset) {
5036 cmd->result = DID_RESET << 16;
5037 return -1;
5038 }
5039
5040 enqueue_cmd_and_start_io(h, c);
5041 return 0;
5042 }
5043
5044 /*
5045 * Queue a command to the correct I/O accelerator path.
5046 */
5047 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5048 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5049 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5050 {
5051 if (!c->scsi_cmd->device)
5052 return -1;
5053
5054 if (!c->scsi_cmd->device->hostdata)
5055 return -1;
5056
5057 if (phys_disk->in_reset)
5058 return -1;
5059
5060 /* Try to honor the device's queue depth */
5061 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5062 phys_disk->queue_depth) {
5063 atomic_dec(&phys_disk->ioaccel_cmds_out);
5064 return IO_ACCEL_INELIGIBLE;
5065 }
5066 if (h->transMethod & CFGTBL_Trans_io_accel1)
5067 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5068 cdb, cdb_len, scsi3addr,
5069 phys_disk);
5070 else
5071 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5072 cdb, cdb_len, scsi3addr,
5073 phys_disk);
5074 }
5075
5076 static void raid_map_helper(struct raid_map_data *map,
5077 int offload_to_mirror, u32 *map_index, u32 *current_group)
5078 {
5079 if (offload_to_mirror == 0) {
5080 /* use physical disk in the first mirrored group. */
5081 *map_index %= le16_to_cpu(map->data_disks_per_row);
5082 return;
5083 }
5084 do {
5085 /* determine mirror group that *map_index indicates */
5086 *current_group = *map_index /
5087 le16_to_cpu(map->data_disks_per_row);
5088 if (offload_to_mirror == *current_group)
5089 continue;
5090 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5091 /* select map index from next group */
5092 *map_index += le16_to_cpu(map->data_disks_per_row);
5093 (*current_group)++;
5094 } else {
5095 /* select map index from first group */
5096 *map_index %= le16_to_cpu(map->data_disks_per_row);
5097 *current_group = 0;
5098 }
5099 } while (offload_to_mirror != *current_group);
5100 }
5101
5102 /*
5103 * Attempt to perform offload RAID mapping for a logical volume I/O.
5104 */
5105 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5106 struct CommandList *c)
5107 {
5108 struct scsi_cmnd *cmd = c->scsi_cmd;
5109 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5110 struct raid_map_data *map = &dev->raid_map;
5111 struct raid_map_disk_data *dd = &map->data[0];
5112 int is_write = 0;
5113 u32 map_index;
5114 u64 first_block, last_block;
5115 u32 block_cnt;
5116 u32 blocks_per_row;
5117 u64 first_row, last_row;
5118 u32 first_row_offset, last_row_offset;
5119 u32 first_column, last_column;
5120 u64 r0_first_row, r0_last_row;
5121 u32 r5or6_blocks_per_row;
5122 u64 r5or6_first_row, r5or6_last_row;
5123 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5124 u32 r5or6_first_column, r5or6_last_column;
5125 u32 total_disks_per_row;
5126 u32 stripesize;
5127 u32 first_group, last_group, current_group;
5128 u32 map_row;
5129 u32 disk_handle;
5130 u64 disk_block;
5131 u32 disk_block_cnt;
5132 u8 cdb[16];
5133 u8 cdb_len;
5134 u16 strip_size;
5135 #if BITS_PER_LONG == 32
5136 u64 tmpdiv;
5137 #endif
5138 int offload_to_mirror;
5139
5140 if (!dev)
5141 return -1;
5142
5143 if (dev->in_reset)
5144 return -1;
5145
5146 /* check for valid opcode, get LBA and block count */
5147 switch (cmd->cmnd[0]) {
5148 case WRITE_6:
5149 is_write = 1;
5150 fallthrough;
5151 case READ_6:
5152 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5153 (cmd->cmnd[2] << 8) |
5154 cmd->cmnd[3]);
5155 block_cnt = cmd->cmnd[4];
5156 if (block_cnt == 0)
5157 block_cnt = 256;
5158 break;
5159 case WRITE_10:
5160 is_write = 1;
5161 fallthrough;
5162 case READ_10:
5163 first_block =
5164 (((u64) cmd->cmnd[2]) << 24) |
5165 (((u64) cmd->cmnd[3]) << 16) |
5166 (((u64) cmd->cmnd[4]) << 8) |
5167 cmd->cmnd[5];
5168 block_cnt =
5169 (((u32) cmd->cmnd[7]) << 8) |
5170 cmd->cmnd[8];
5171 break;
5172 case WRITE_12:
5173 is_write = 1;
5174 fallthrough;
5175 case READ_12:
5176 first_block =
5177 (((u64) cmd->cmnd[2]) << 24) |
5178 (((u64) cmd->cmnd[3]) << 16) |
5179 (((u64) cmd->cmnd[4]) << 8) |
5180 cmd->cmnd[5];
5181 block_cnt =
5182 (((u32) cmd->cmnd[6]) << 24) |
5183 (((u32) cmd->cmnd[7]) << 16) |
5184 (((u32) cmd->cmnd[8]) << 8) |
5185 cmd->cmnd[9];
5186 break;
5187 case WRITE_16:
5188 is_write = 1;
5189 fallthrough;
5190 case READ_16:
5191 first_block =
5192 (((u64) cmd->cmnd[2]) << 56) |
5193 (((u64) cmd->cmnd[3]) << 48) |
5194 (((u64) cmd->cmnd[4]) << 40) |
5195 (((u64) cmd->cmnd[5]) << 32) |
5196 (((u64) cmd->cmnd[6]) << 24) |
5197 (((u64) cmd->cmnd[7]) << 16) |
5198 (((u64) cmd->cmnd[8]) << 8) |
5199 cmd->cmnd[9];
5200 block_cnt =
5201 (((u32) cmd->cmnd[10]) << 24) |
5202 (((u32) cmd->cmnd[11]) << 16) |
5203 (((u32) cmd->cmnd[12]) << 8) |
5204 cmd->cmnd[13];
5205 break;
5206 default:
5207 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5208 }
5209 last_block = first_block + block_cnt - 1;
5210
5211 /* check for write to non-RAID-0 */
5212 if (is_write && dev->raid_level != 0)
5213 return IO_ACCEL_INELIGIBLE;
5214
5215 /* check for invalid block or wraparound */
5216 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5217 last_block < first_block)
5218 return IO_ACCEL_INELIGIBLE;
5219
5220 /* calculate stripe information for the request */
5221 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5222 le16_to_cpu(map->strip_size);
5223 strip_size = le16_to_cpu(map->strip_size);
5224 #if BITS_PER_LONG == 32
5225 tmpdiv = first_block;
5226 (void) do_div(tmpdiv, blocks_per_row);
5227 first_row = tmpdiv;
5228 tmpdiv = last_block;
5229 (void) do_div(tmpdiv, blocks_per_row);
5230 last_row = tmpdiv;
5231 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5232 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5233 tmpdiv = first_row_offset;
5234 (void) do_div(tmpdiv, strip_size);
5235 first_column = tmpdiv;
5236 tmpdiv = last_row_offset;
5237 (void) do_div(tmpdiv, strip_size);
5238 last_column = tmpdiv;
5239 #else
5240 first_row = first_block / blocks_per_row;
5241 last_row = last_block / blocks_per_row;
5242 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5243 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5244 first_column = first_row_offset / strip_size;
5245 last_column = last_row_offset / strip_size;
5246 #endif
5247
5248 /* if this isn't a single row/column then give to the controller */
5249 if ((first_row != last_row) || (first_column != last_column))
5250 return IO_ACCEL_INELIGIBLE;
5251
5252 /* proceeding with driver mapping */
5253 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5254 le16_to_cpu(map->metadata_disks_per_row);
5255 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5256 le16_to_cpu(map->row_cnt);
5257 map_index = (map_row * total_disks_per_row) + first_column;
5258
5259 switch (dev->raid_level) {
5260 case HPSA_RAID_0:
5261 break; /* nothing special to do */
5262 case HPSA_RAID_1:
5263 /* Handles load balance across RAID 1 members.
5264 * (2-drive R1 and R10 with even # of drives.)
5265 * Appropriate for SSDs, not optimal for HDDs
5266 * Ensure we have the correct raid_map.
5267 */
5268 if (le16_to_cpu(map->layout_map_count) != 2) {
5269 hpsa_turn_off_ioaccel_for_device(dev);
5270 return IO_ACCEL_INELIGIBLE;
5271 }
5272 if (dev->offload_to_mirror)
5273 map_index += le16_to_cpu(map->data_disks_per_row);
5274 dev->offload_to_mirror = !dev->offload_to_mirror;
5275 break;
5276 case HPSA_RAID_ADM:
5277 /* Handles N-way mirrors (R1-ADM)
5278 * and R10 with # of drives divisible by 3.)
5279 * Ensure we have the correct raid_map.
5280 */
5281 if (le16_to_cpu(map->layout_map_count) != 3) {
5282 hpsa_turn_off_ioaccel_for_device(dev);
5283 return IO_ACCEL_INELIGIBLE;
5284 }
5285
5286 offload_to_mirror = dev->offload_to_mirror;
5287 raid_map_helper(map, offload_to_mirror,
5288 &map_index, &current_group);
5289 /* set mirror group to use next time */
5290 offload_to_mirror =
5291 (offload_to_mirror >=
5292 le16_to_cpu(map->layout_map_count) - 1)
5293 ? 0 : offload_to_mirror + 1;
5294 dev->offload_to_mirror = offload_to_mirror;
5295 /* Avoid direct use of dev->offload_to_mirror within this
5296 * function since multiple threads might simultaneously
5297 * increment it beyond the range of dev->layout_map_count -1.
5298 */
5299 break;
5300 case HPSA_RAID_5:
5301 case HPSA_RAID_6:
5302 if (le16_to_cpu(map->layout_map_count) <= 1)
5303 break;
5304
5305 /* Verify first and last block are in same RAID group */
5306 r5or6_blocks_per_row =
5307 le16_to_cpu(map->strip_size) *
5308 le16_to_cpu(map->data_disks_per_row);
5309 if (r5or6_blocks_per_row == 0) {
5310 hpsa_turn_off_ioaccel_for_device(dev);
5311 return IO_ACCEL_INELIGIBLE;
5312 }
5313 stripesize = r5or6_blocks_per_row *
5314 le16_to_cpu(map->layout_map_count);
5315 #if BITS_PER_LONG == 32
5316 tmpdiv = first_block;
5317 first_group = do_div(tmpdiv, stripesize);
5318 tmpdiv = first_group;
5319 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5320 first_group = tmpdiv;
5321 tmpdiv = last_block;
5322 last_group = do_div(tmpdiv, stripesize);
5323 tmpdiv = last_group;
5324 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5325 last_group = tmpdiv;
5326 #else
5327 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5328 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5329 #endif
5330 if (first_group != last_group)
5331 return IO_ACCEL_INELIGIBLE;
5332
5333 /* Verify request is in a single row of RAID 5/6 */
5334 #if BITS_PER_LONG == 32
5335 tmpdiv = first_block;
5336 (void) do_div(tmpdiv, stripesize);
5337 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5338 tmpdiv = last_block;
5339 (void) do_div(tmpdiv, stripesize);
5340 r5or6_last_row = r0_last_row = tmpdiv;
5341 #else
5342 first_row = r5or6_first_row = r0_first_row =
5343 first_block / stripesize;
5344 r5or6_last_row = r0_last_row = last_block / stripesize;
5345 #endif
5346 if (r5or6_first_row != r5or6_last_row)
5347 return IO_ACCEL_INELIGIBLE;
5348
5349
5350 /* Verify request is in a single column */
5351 #if BITS_PER_LONG == 32
5352 tmpdiv = first_block;
5353 first_row_offset = do_div(tmpdiv, stripesize);
5354 tmpdiv = first_row_offset;
5355 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5356 r5or6_first_row_offset = first_row_offset;
5357 tmpdiv = last_block;
5358 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5359 tmpdiv = r5or6_last_row_offset;
5360 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5361 tmpdiv = r5or6_first_row_offset;
5362 (void) do_div(tmpdiv, map->strip_size);
5363 first_column = r5or6_first_column = tmpdiv;
5364 tmpdiv = r5or6_last_row_offset;
5365 (void) do_div(tmpdiv, map->strip_size);
5366 r5or6_last_column = tmpdiv;
5367 #else
5368 first_row_offset = r5or6_first_row_offset =
5369 (u32)((first_block % stripesize) %
5370 r5or6_blocks_per_row);
5371
5372 r5or6_last_row_offset =
5373 (u32)((last_block % stripesize) %
5374 r5or6_blocks_per_row);
5375
5376 first_column = r5or6_first_column =
5377 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5378 r5or6_last_column =
5379 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5380 #endif
5381 if (r5or6_first_column != r5or6_last_column)
5382 return IO_ACCEL_INELIGIBLE;
5383
5384 /* Request is eligible */
5385 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5386 le16_to_cpu(map->row_cnt);
5387
5388 map_index = (first_group *
5389 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5390 (map_row * total_disks_per_row) + first_column;
5391 break;
5392 default:
5393 return IO_ACCEL_INELIGIBLE;
5394 }
5395
5396 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5397 return IO_ACCEL_INELIGIBLE;
5398
5399 c->phys_disk = dev->phys_disk[map_index];
5400 if (!c->phys_disk)
5401 return IO_ACCEL_INELIGIBLE;
5402
5403 disk_handle = dd[map_index].ioaccel_handle;
5404 disk_block = le64_to_cpu(map->disk_starting_blk) +
5405 first_row * le16_to_cpu(map->strip_size) +
5406 (first_row_offset - first_column *
5407 le16_to_cpu(map->strip_size));
5408 disk_block_cnt = block_cnt;
5409
5410 /* handle differing logical/physical block sizes */
5411 if (map->phys_blk_shift) {
5412 disk_block <<= map->phys_blk_shift;
5413 disk_block_cnt <<= map->phys_blk_shift;
5414 }
5415 BUG_ON(disk_block_cnt > 0xffff);
5416
5417 /* build the new CDB for the physical disk I/O */
5418 if (disk_block > 0xffffffff) {
5419 cdb[0] = is_write ? WRITE_16 : READ_16;
5420 cdb[1] = 0;
5421 cdb[2] = (u8) (disk_block >> 56);
5422 cdb[3] = (u8) (disk_block >> 48);
5423 cdb[4] = (u8) (disk_block >> 40);
5424 cdb[5] = (u8) (disk_block >> 32);
5425 cdb[6] = (u8) (disk_block >> 24);
5426 cdb[7] = (u8) (disk_block >> 16);
5427 cdb[8] = (u8) (disk_block >> 8);
5428 cdb[9] = (u8) (disk_block);
5429 cdb[10] = (u8) (disk_block_cnt >> 24);
5430 cdb[11] = (u8) (disk_block_cnt >> 16);
5431 cdb[12] = (u8) (disk_block_cnt >> 8);
5432 cdb[13] = (u8) (disk_block_cnt);
5433 cdb[14] = 0;
5434 cdb[15] = 0;
5435 cdb_len = 16;
5436 } else {
5437 cdb[0] = is_write ? WRITE_10 : READ_10;
5438 cdb[1] = 0;
5439 cdb[2] = (u8) (disk_block >> 24);
5440 cdb[3] = (u8) (disk_block >> 16);
5441 cdb[4] = (u8) (disk_block >> 8);
5442 cdb[5] = (u8) (disk_block);
5443 cdb[6] = 0;
5444 cdb[7] = (u8) (disk_block_cnt >> 8);
5445 cdb[8] = (u8) (disk_block_cnt);
5446 cdb[9] = 0;
5447 cdb_len = 10;
5448 }
5449 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5450 dev->scsi3addr,
5451 dev->phys_disk[map_index]);
5452 }
5453
5454 /*
5455 * Submit commands down the "normal" RAID stack path
5456 * All callers to hpsa_ciss_submit must check lockup_detected
5457 * beforehand, before (opt.) and after calling cmd_alloc
5458 */
5459 static int hpsa_ciss_submit(struct ctlr_info *h,
5460 struct CommandList *c, struct scsi_cmnd *cmd,
5461 struct hpsa_scsi_dev_t *dev)
5462 {
5463 cmd->host_scribble = (unsigned char *) c;
5464 c->cmd_type = CMD_SCSI;
5465 c->scsi_cmd = cmd;
5466 c->Header.ReplyQueue = 0; /* unused in simple mode */
5467 memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5468 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5469
5470 /* Fill in the request block... */
5471
5472 c->Request.Timeout = 0;
5473 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5474 c->Request.CDBLen = cmd->cmd_len;
5475 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5476 switch (cmd->sc_data_direction) {
5477 case DMA_TO_DEVICE:
5478 c->Request.type_attr_dir =
5479 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5480 break;
5481 case DMA_FROM_DEVICE:
5482 c->Request.type_attr_dir =
5483 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5484 break;
5485 case DMA_NONE:
5486 c->Request.type_attr_dir =
5487 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5488 break;
5489 case DMA_BIDIRECTIONAL:
5490 /* This can happen if a buggy application does a scsi passthru
5491 * and sets both inlen and outlen to non-zero. ( see
5492 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5493 */
5494
5495 c->Request.type_attr_dir =
5496 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5497 /* This is technically wrong, and hpsa controllers should
5498 * reject it with CMD_INVALID, which is the most correct
5499 * response, but non-fibre backends appear to let it
5500 * slide by, and give the same results as if this field
5501 * were set correctly. Either way is acceptable for
5502 * our purposes here.
5503 */
5504
5505 break;
5506
5507 default:
5508 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5509 cmd->sc_data_direction);
5510 BUG();
5511 break;
5512 }
5513
5514 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5515 hpsa_cmd_resolve_and_free(h, c);
5516 return SCSI_MLQUEUE_HOST_BUSY;
5517 }
5518
5519 if (dev->in_reset) {
5520 hpsa_cmd_resolve_and_free(h, c);
5521 return SCSI_MLQUEUE_HOST_BUSY;
5522 }
5523
5524 c->device = dev;
5525
5526 enqueue_cmd_and_start_io(h, c);
5527 /* the cmd'll come back via intr handler in complete_scsi_command() */
5528 return 0;
5529 }
5530
5531 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5532 struct CommandList *c)
5533 {
5534 dma_addr_t cmd_dma_handle, err_dma_handle;
5535
5536 /* Zero out all of commandlist except the last field, refcount */
5537 memset(c, 0, offsetof(struct CommandList, refcount));
5538 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5539 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5540 c->err_info = h->errinfo_pool + index;
5541 memset(c->err_info, 0, sizeof(*c->err_info));
5542 err_dma_handle = h->errinfo_pool_dhandle
5543 + index * sizeof(*c->err_info);
5544 c->cmdindex = index;
5545 c->busaddr = (u32) cmd_dma_handle;
5546 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5547 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5548 c->h = h;
5549 c->scsi_cmd = SCSI_CMD_IDLE;
5550 }
5551
5552 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5553 {
5554 int i;
5555
5556 for (i = 0; i < h->nr_cmds; i++) {
5557 struct CommandList *c = h->cmd_pool + i;
5558
5559 hpsa_cmd_init(h, i, c);
5560 atomic_set(&c->refcount, 0);
5561 }
5562 }
5563
5564 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5565 struct CommandList *c)
5566 {
5567 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5568
5569 BUG_ON(c->cmdindex != index);
5570
5571 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5572 memset(c->err_info, 0, sizeof(*c->err_info));
5573 c->busaddr = (u32) cmd_dma_handle;
5574 }
5575
5576 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5577 struct CommandList *c, struct scsi_cmnd *cmd)
5578 {
5579 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5580 int rc = IO_ACCEL_INELIGIBLE;
5581
5582 if (!dev)
5583 return SCSI_MLQUEUE_HOST_BUSY;
5584
5585 if (dev->in_reset)
5586 return SCSI_MLQUEUE_HOST_BUSY;
5587
5588 if (hpsa_simple_mode)
5589 return IO_ACCEL_INELIGIBLE;
5590
5591 cmd->host_scribble = (unsigned char *) c;
5592
5593 if (dev->offload_enabled) {
5594 hpsa_cmd_init(h, c->cmdindex, c);
5595 c->cmd_type = CMD_SCSI;
5596 c->scsi_cmd = cmd;
5597 c->device = dev;
5598 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5599 if (rc < 0) /* scsi_dma_map failed. */
5600 rc = SCSI_MLQUEUE_HOST_BUSY;
5601 } else if (dev->hba_ioaccel_enabled) {
5602 hpsa_cmd_init(h, c->cmdindex, c);
5603 c->cmd_type = CMD_SCSI;
5604 c->scsi_cmd = cmd;
5605 c->device = dev;
5606 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5607 if (rc < 0) /* scsi_dma_map failed. */
5608 rc = SCSI_MLQUEUE_HOST_BUSY;
5609 }
5610 return rc;
5611 }
5612
5613 static void hpsa_command_resubmit_worker(struct work_struct *work)
5614 {
5615 struct scsi_cmnd *cmd;
5616 struct hpsa_scsi_dev_t *dev;
5617 struct CommandList *c = container_of(work, struct CommandList, work);
5618
5619 cmd = c->scsi_cmd;
5620 dev = cmd->device->hostdata;
5621 if (!dev) {
5622 cmd->result = DID_NO_CONNECT << 16;
5623 return hpsa_cmd_free_and_done(c->h, c, cmd);
5624 }
5625
5626 if (dev->in_reset) {
5627 cmd->result = DID_RESET << 16;
5628 return hpsa_cmd_free_and_done(c->h, c, cmd);
5629 }
5630
5631 if (c->cmd_type == CMD_IOACCEL2) {
5632 struct ctlr_info *h = c->h;
5633 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5634 int rc;
5635
5636 if (c2->error_data.serv_response ==
5637 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5638 rc = hpsa_ioaccel_submit(h, c, cmd);
5639 if (rc == 0)
5640 return;
5641 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5642 /*
5643 * If we get here, it means dma mapping failed.
5644 * Try again via scsi mid layer, which will
5645 * then get SCSI_MLQUEUE_HOST_BUSY.
5646 */
5647 cmd->result = DID_IMM_RETRY << 16;
5648 return hpsa_cmd_free_and_done(h, c, cmd);
5649 }
5650 /* else, fall thru and resubmit down CISS path */
5651 }
5652 }
5653 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5654 if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5655 /*
5656 * If we get here, it means dma mapping failed. Try
5657 * again via scsi mid layer, which will then get
5658 * SCSI_MLQUEUE_HOST_BUSY.
5659 *
5660 * hpsa_ciss_submit will have already freed c
5661 * if it encountered a dma mapping failure.
5662 */
5663 cmd->result = DID_IMM_RETRY << 16;
5664 cmd->scsi_done(cmd);
5665 }
5666 }
5667
5668 /* Running in struct Scsi_Host->host_lock less mode */
5669 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5670 {
5671 struct ctlr_info *h;
5672 struct hpsa_scsi_dev_t *dev;
5673 struct CommandList *c;
5674 int rc = 0;
5675
5676 /* Get the ptr to our adapter structure out of cmd->host. */
5677 h = sdev_to_hba(cmd->device);
5678
5679 BUG_ON(cmd->request->tag < 0);
5680
5681 dev = cmd->device->hostdata;
5682 if (!dev) {
5683 cmd->result = DID_NO_CONNECT << 16;
5684 cmd->scsi_done(cmd);
5685 return 0;
5686 }
5687
5688 if (dev->removed) {
5689 cmd->result = DID_NO_CONNECT << 16;
5690 cmd->scsi_done(cmd);
5691 return 0;
5692 }
5693
5694 if (unlikely(lockup_detected(h))) {
5695 cmd->result = DID_NO_CONNECT << 16;
5696 cmd->scsi_done(cmd);
5697 return 0;
5698 }
5699
5700 if (dev->in_reset)
5701 return SCSI_MLQUEUE_DEVICE_BUSY;
5702
5703 c = cmd_tagged_alloc(h, cmd);
5704 if (c == NULL)
5705 return SCSI_MLQUEUE_DEVICE_BUSY;
5706
5707 /*
5708 * This is necessary because the SML doesn't zero out this field during
5709 * error recovery.
5710 */
5711 cmd->result = 0;
5712
5713 /*
5714 * Call alternate submit routine for I/O accelerated commands.
5715 * Retries always go down the normal I/O path.
5716 */
5717 if (likely(cmd->retries == 0 &&
5718 !blk_rq_is_passthrough(cmd->request) &&
5719 h->acciopath_status)) {
5720 rc = hpsa_ioaccel_submit(h, c, cmd);
5721 if (rc == 0)
5722 return 0;
5723 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5724 hpsa_cmd_resolve_and_free(h, c);
5725 return SCSI_MLQUEUE_HOST_BUSY;
5726 }
5727 }
5728 return hpsa_ciss_submit(h, c, cmd, dev);
5729 }
5730
5731 static void hpsa_scan_complete(struct ctlr_info *h)
5732 {
5733 unsigned long flags;
5734
5735 spin_lock_irqsave(&h->scan_lock, flags);
5736 h->scan_finished = 1;
5737 wake_up(&h->scan_wait_queue);
5738 spin_unlock_irqrestore(&h->scan_lock, flags);
5739 }
5740
5741 static void hpsa_scan_start(struct Scsi_Host *sh)
5742 {
5743 struct ctlr_info *h = shost_to_hba(sh);
5744 unsigned long flags;
5745
5746 /*
5747 * Don't let rescans be initiated on a controller known to be locked
5748 * up. If the controller locks up *during* a rescan, that thread is
5749 * probably hosed, but at least we can prevent new rescan threads from
5750 * piling up on a locked up controller.
5751 */
5752 if (unlikely(lockup_detected(h)))
5753 return hpsa_scan_complete(h);
5754
5755 /*
5756 * If a scan is already waiting to run, no need to add another
5757 */
5758 spin_lock_irqsave(&h->scan_lock, flags);
5759 if (h->scan_waiting) {
5760 spin_unlock_irqrestore(&h->scan_lock, flags);
5761 return;
5762 }
5763
5764 spin_unlock_irqrestore(&h->scan_lock, flags);
5765
5766 /* wait until any scan already in progress is finished. */
5767 while (1) {
5768 spin_lock_irqsave(&h->scan_lock, flags);
5769 if (h->scan_finished)
5770 break;
5771 h->scan_waiting = 1;
5772 spin_unlock_irqrestore(&h->scan_lock, flags);
5773 wait_event(h->scan_wait_queue, h->scan_finished);
5774 /* Note: We don't need to worry about a race between this
5775 * thread and driver unload because the midlayer will
5776 * have incremented the reference count, so unload won't
5777 * happen if we're in here.
5778 */
5779 }
5780 h->scan_finished = 0; /* mark scan as in progress */
5781 h->scan_waiting = 0;
5782 spin_unlock_irqrestore(&h->scan_lock, flags);
5783
5784 if (unlikely(lockup_detected(h)))
5785 return hpsa_scan_complete(h);
5786
5787 /*
5788 * Do the scan after a reset completion
5789 */
5790 spin_lock_irqsave(&h->reset_lock, flags);
5791 if (h->reset_in_progress) {
5792 h->drv_req_rescan = 1;
5793 spin_unlock_irqrestore(&h->reset_lock, flags);
5794 hpsa_scan_complete(h);
5795 return;
5796 }
5797 spin_unlock_irqrestore(&h->reset_lock, flags);
5798
5799 hpsa_update_scsi_devices(h);
5800
5801 hpsa_scan_complete(h);
5802 }
5803
5804 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5805 {
5806 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5807
5808 if (!logical_drive)
5809 return -ENODEV;
5810
5811 if (qdepth < 1)
5812 qdepth = 1;
5813 else if (qdepth > logical_drive->queue_depth)
5814 qdepth = logical_drive->queue_depth;
5815
5816 return scsi_change_queue_depth(sdev, qdepth);
5817 }
5818
5819 static int hpsa_scan_finished(struct Scsi_Host *sh,
5820 unsigned long elapsed_time)
5821 {
5822 struct ctlr_info *h = shost_to_hba(sh);
5823 unsigned long flags;
5824 int finished;
5825
5826 spin_lock_irqsave(&h->scan_lock, flags);
5827 finished = h->scan_finished;
5828 spin_unlock_irqrestore(&h->scan_lock, flags);
5829 return finished;
5830 }
5831
5832 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5833 {
5834 struct Scsi_Host *sh;
5835
5836 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5837 if (sh == NULL) {
5838 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5839 return -ENOMEM;
5840 }
5841
5842 sh->io_port = 0;
5843 sh->n_io_port = 0;
5844 sh->this_id = -1;
5845 sh->max_channel = 3;
5846 sh->max_cmd_len = MAX_COMMAND_SIZE;
5847 sh->max_lun = HPSA_MAX_LUN;
5848 sh->max_id = HPSA_MAX_LUN;
5849 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5850 sh->cmd_per_lun = sh->can_queue;
5851 sh->sg_tablesize = h->maxsgentries;
5852 sh->transportt = hpsa_sas_transport_template;
5853 sh->hostdata[0] = (unsigned long) h;
5854 sh->irq = pci_irq_vector(h->pdev, 0);
5855 sh->unique_id = sh->irq;
5856
5857 h->scsi_host = sh;
5858 return 0;
5859 }
5860
5861 static int hpsa_scsi_add_host(struct ctlr_info *h)
5862 {
5863 int rv;
5864
5865 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5866 if (rv) {
5867 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5868 return rv;
5869 }
5870 scsi_scan_host(h->scsi_host);
5871 return 0;
5872 }
5873
5874 /*
5875 * The block layer has already gone to the trouble of picking out a unique,
5876 * small-integer tag for this request. We use an offset from that value as
5877 * an index to select our command block. (The offset allows us to reserve the
5878 * low-numbered entries for our own uses.)
5879 */
5880 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5881 {
5882 int idx = scmd->request->tag;
5883
5884 if (idx < 0)
5885 return idx;
5886
5887 /* Offset to leave space for internal cmds. */
5888 return idx += HPSA_NRESERVED_CMDS;
5889 }
5890
5891 /*
5892 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5893 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5894 */
5895 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5896 struct CommandList *c, unsigned char lunaddr[],
5897 int reply_queue)
5898 {
5899 int rc;
5900
5901 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5902 (void) fill_cmd(c, TEST_UNIT_READY, h,
5903 NULL, 0, 0, lunaddr, TYPE_CMD);
5904 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5905 if (rc)
5906 return rc;
5907 /* no unmap needed here because no data xfer. */
5908
5909 /* Check if the unit is already ready. */
5910 if (c->err_info->CommandStatus == CMD_SUCCESS)
5911 return 0;
5912
5913 /*
5914 * The first command sent after reset will receive "unit attention" to
5915 * indicate that the LUN has been reset...this is actually what we're
5916 * looking for (but, success is good too).
5917 */
5918 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5919 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5920 (c->err_info->SenseInfo[2] == NO_SENSE ||
5921 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5922 return 0;
5923
5924 return 1;
5925 }
5926
5927 /*
5928 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5929 * returns zero when the unit is ready, and non-zero when giving up.
5930 */
5931 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5932 struct CommandList *c,
5933 unsigned char lunaddr[], int reply_queue)
5934 {
5935 int rc;
5936 int count = 0;
5937 int waittime = 1; /* seconds */
5938
5939 /* Send test unit ready until device ready, or give up. */
5940 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5941
5942 /*
5943 * Wait for a bit. do this first, because if we send
5944 * the TUR right away, the reset will just abort it.
5945 */
5946 msleep(1000 * waittime);
5947
5948 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5949 if (!rc)
5950 break;
5951
5952 /* Increase wait time with each try, up to a point. */
5953 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5954 waittime *= 2;
5955
5956 dev_warn(&h->pdev->dev,
5957 "waiting %d secs for device to become ready.\n",
5958 waittime);
5959 }
5960
5961 return rc;
5962 }
5963
5964 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5965 unsigned char lunaddr[],
5966 int reply_queue)
5967 {
5968 int first_queue;
5969 int last_queue;
5970 int rq;
5971 int rc = 0;
5972 struct CommandList *c;
5973
5974 c = cmd_alloc(h);
5975
5976 /*
5977 * If no specific reply queue was requested, then send the TUR
5978 * repeatedly, requesting a reply on each reply queue; otherwise execute
5979 * the loop exactly once using only the specified queue.
5980 */
5981 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5982 first_queue = 0;
5983 last_queue = h->nreply_queues - 1;
5984 } else {
5985 first_queue = reply_queue;
5986 last_queue = reply_queue;
5987 }
5988
5989 for (rq = first_queue; rq <= last_queue; rq++) {
5990 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5991 if (rc)
5992 break;
5993 }
5994
5995 if (rc)
5996 dev_warn(&h->pdev->dev, "giving up on device.\n");
5997 else
5998 dev_warn(&h->pdev->dev, "device is ready.\n");
5999
6000 cmd_free(h, c);
6001 return rc;
6002 }
6003
6004 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
6005 * complaining. Doing a host- or bus-reset can't do anything good here.
6006 */
6007 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
6008 {
6009 int rc = SUCCESS;
6010 int i;
6011 struct ctlr_info *h;
6012 struct hpsa_scsi_dev_t *dev = NULL;
6013 u8 reset_type;
6014 char msg[48];
6015 unsigned long flags;
6016
6017 /* find the controller to which the command to be aborted was sent */
6018 h = sdev_to_hba(scsicmd->device);
6019 if (h == NULL) /* paranoia */
6020 return FAILED;
6021
6022 spin_lock_irqsave(&h->reset_lock, flags);
6023 h->reset_in_progress = 1;
6024 spin_unlock_irqrestore(&h->reset_lock, flags);
6025
6026 if (lockup_detected(h)) {
6027 rc = FAILED;
6028 goto return_reset_status;
6029 }
6030
6031 dev = scsicmd->device->hostdata;
6032 if (!dev) {
6033 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6034 rc = FAILED;
6035 goto return_reset_status;
6036 }
6037
6038 if (dev->devtype == TYPE_ENCLOSURE) {
6039 rc = SUCCESS;
6040 goto return_reset_status;
6041 }
6042
6043 /* if controller locked up, we can guarantee command won't complete */
6044 if (lockup_detected(h)) {
6045 snprintf(msg, sizeof(msg),
6046 "cmd %d RESET FAILED, lockup detected",
6047 hpsa_get_cmd_index(scsicmd));
6048 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6049 rc = FAILED;
6050 goto return_reset_status;
6051 }
6052
6053 /* this reset request might be the result of a lockup; check */
6054 if (detect_controller_lockup(h)) {
6055 snprintf(msg, sizeof(msg),
6056 "cmd %d RESET FAILED, new lockup detected",
6057 hpsa_get_cmd_index(scsicmd));
6058 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6059 rc = FAILED;
6060 goto return_reset_status;
6061 }
6062
6063 /* Do not attempt on controller */
6064 if (is_hba_lunid(dev->scsi3addr)) {
6065 rc = SUCCESS;
6066 goto return_reset_status;
6067 }
6068
6069 if (is_logical_dev_addr_mode(dev->scsi3addr))
6070 reset_type = HPSA_DEVICE_RESET_MSG;
6071 else
6072 reset_type = HPSA_PHYS_TARGET_RESET;
6073
6074 sprintf(msg, "resetting %s",
6075 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
6076 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6077
6078 /*
6079 * wait to see if any commands will complete before sending reset
6080 */
6081 dev->in_reset = true; /* block any new cmds from OS for this device */
6082 for (i = 0; i < 10; i++) {
6083 if (atomic_read(&dev->commands_outstanding) > 0)
6084 msleep(1000);
6085 else
6086 break;
6087 }
6088
6089 /* send a reset to the SCSI LUN which the command was sent to */
6090 rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6091 if (rc == 0)
6092 rc = SUCCESS;
6093 else
6094 rc = FAILED;
6095
6096 sprintf(msg, "reset %s %s",
6097 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6098 rc == SUCCESS ? "completed successfully" : "failed");
6099 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6100
6101 return_reset_status:
6102 spin_lock_irqsave(&h->reset_lock, flags);
6103 h->reset_in_progress = 0;
6104 if (dev)
6105 dev->in_reset = false;
6106 spin_unlock_irqrestore(&h->reset_lock, flags);
6107 return rc;
6108 }
6109
6110 /*
6111 * For operations with an associated SCSI command, a command block is allocated
6112 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6113 * block request tag as an index into a table of entries. cmd_tagged_free() is
6114 * the complement, although cmd_free() may be called instead.
6115 */
6116 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6117 struct scsi_cmnd *scmd)
6118 {
6119 int idx = hpsa_get_cmd_index(scmd);
6120 struct CommandList *c = h->cmd_pool + idx;
6121
6122 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6123 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6124 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6125 /* The index value comes from the block layer, so if it's out of
6126 * bounds, it's probably not our bug.
6127 */
6128 BUG();
6129 }
6130
6131 if (unlikely(!hpsa_is_cmd_idle(c))) {
6132 /*
6133 * We expect that the SCSI layer will hand us a unique tag
6134 * value. Thus, there should never be a collision here between
6135 * two requests...because if the selected command isn't idle
6136 * then someone is going to be very disappointed.
6137 */
6138 if (idx != h->last_collision_tag) { /* Print once per tag */
6139 dev_warn(&h->pdev->dev,
6140 "%s: tag collision (tag=%d)\n", __func__, idx);
6141 if (scmd)
6142 scsi_print_command(scmd);
6143 h->last_collision_tag = idx;
6144 }
6145 return NULL;
6146 }
6147
6148 atomic_inc(&c->refcount);
6149
6150 hpsa_cmd_partial_init(h, idx, c);
6151 return c;
6152 }
6153
6154 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6155 {
6156 /*
6157 * Release our reference to the block. We don't need to do anything
6158 * else to free it, because it is accessed by index.
6159 */
6160 (void)atomic_dec(&c->refcount);
6161 }
6162
6163 /*
6164 * For operations that cannot sleep, a command block is allocated at init,
6165 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6166 * which ones are free or in use. Lock must be held when calling this.
6167 * cmd_free() is the complement.
6168 * This function never gives up and returns NULL. If it hangs,
6169 * another thread must call cmd_free() to free some tags.
6170 */
6171
6172 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6173 {
6174 struct CommandList *c;
6175 int refcount, i;
6176 int offset = 0;
6177
6178 /*
6179 * There is some *extremely* small but non-zero chance that that
6180 * multiple threads could get in here, and one thread could
6181 * be scanning through the list of bits looking for a free
6182 * one, but the free ones are always behind him, and other
6183 * threads sneak in behind him and eat them before he can
6184 * get to them, so that while there is always a free one, a
6185 * very unlucky thread might be starved anyway, never able to
6186 * beat the other threads. In reality, this happens so
6187 * infrequently as to be indistinguishable from never.
6188 *
6189 * Note that we start allocating commands before the SCSI host structure
6190 * is initialized. Since the search starts at bit zero, this
6191 * all works, since we have at least one command structure available;
6192 * however, it means that the structures with the low indexes have to be
6193 * reserved for driver-initiated requests, while requests from the block
6194 * layer will use the higher indexes.
6195 */
6196
6197 for (;;) {
6198 i = find_next_zero_bit(h->cmd_pool_bits,
6199 HPSA_NRESERVED_CMDS,
6200 offset);
6201 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6202 offset = 0;
6203 continue;
6204 }
6205 c = h->cmd_pool + i;
6206 refcount = atomic_inc_return(&c->refcount);
6207 if (unlikely(refcount > 1)) {
6208 cmd_free(h, c); /* already in use */
6209 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6210 continue;
6211 }
6212 set_bit(i & (BITS_PER_LONG - 1),
6213 h->cmd_pool_bits + (i / BITS_PER_LONG));
6214 break; /* it's ours now. */
6215 }
6216 hpsa_cmd_partial_init(h, i, c);
6217 c->device = NULL;
6218 return c;
6219 }
6220
6221 /*
6222 * This is the complementary operation to cmd_alloc(). Note, however, in some
6223 * corner cases it may also be used to free blocks allocated by
6224 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6225 * the clear-bit is harmless.
6226 */
6227 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6228 {
6229 if (atomic_dec_and_test(&c->refcount)) {
6230 int i;
6231
6232 i = c - h->cmd_pool;
6233 clear_bit(i & (BITS_PER_LONG - 1),
6234 h->cmd_pool_bits + (i / BITS_PER_LONG));
6235 }
6236 }
6237
6238 #ifdef CONFIG_COMPAT
6239
6240 static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
6241 void __user *arg)
6242 {
6243 struct ctlr_info *h = sdev_to_hba(dev);
6244 IOCTL32_Command_struct __user *arg32 = arg;
6245 IOCTL_Command_struct arg64;
6246 int err;
6247 u32 cp;
6248
6249 if (!arg)
6250 return -EINVAL;
6251
6252 memset(&arg64, 0, sizeof(arg64));
6253 if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
6254 return -EFAULT;
6255 if (get_user(cp, &arg32->buf))
6256 return -EFAULT;
6257 arg64.buf = compat_ptr(cp);
6258
6259 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6260 return -EAGAIN;
6261 err = hpsa_passthru_ioctl(h, &arg64);
6262 atomic_inc(&h->passthru_cmds_avail);
6263 if (err)
6264 return err;
6265 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6266 sizeof(arg32->error_info)))
6267 return -EFAULT;
6268 return 0;
6269 }
6270
6271 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6272 unsigned int cmd, void __user *arg)
6273 {
6274 struct ctlr_info *h = sdev_to_hba(dev);
6275 BIG_IOCTL32_Command_struct __user *arg32 = arg;
6276 BIG_IOCTL_Command_struct arg64;
6277 int err;
6278 u32 cp;
6279
6280 if (!arg)
6281 return -EINVAL;
6282 memset(&arg64, 0, sizeof(arg64));
6283 if (copy_from_user(&arg64, arg32,
6284 offsetof(BIG_IOCTL32_Command_struct, buf)))
6285 return -EFAULT;
6286 if (get_user(cp, &arg32->buf))
6287 return -EFAULT;
6288 arg64.buf = compat_ptr(cp);
6289
6290 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6291 return -EAGAIN;
6292 err = hpsa_big_passthru_ioctl(h, &arg64);
6293 atomic_inc(&h->passthru_cmds_avail);
6294 if (err)
6295 return err;
6296 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6297 sizeof(arg32->error_info)))
6298 return -EFAULT;
6299 return 0;
6300 }
6301
6302 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
6303 void __user *arg)
6304 {
6305 switch (cmd) {
6306 case CCISS_GETPCIINFO:
6307 case CCISS_GETINTINFO:
6308 case CCISS_SETINTINFO:
6309 case CCISS_GETNODENAME:
6310 case CCISS_SETNODENAME:
6311 case CCISS_GETHEARTBEAT:
6312 case CCISS_GETBUSTYPES:
6313 case CCISS_GETFIRMVER:
6314 case CCISS_GETDRIVVER:
6315 case CCISS_REVALIDVOLS:
6316 case CCISS_DEREGDISK:
6317 case CCISS_REGNEWDISK:
6318 case CCISS_REGNEWD:
6319 case CCISS_RESCANDISK:
6320 case CCISS_GETLUNINFO:
6321 return hpsa_ioctl(dev, cmd, arg);
6322
6323 case CCISS_PASSTHRU32:
6324 return hpsa_ioctl32_passthru(dev, cmd, arg);
6325 case CCISS_BIG_PASSTHRU32:
6326 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6327
6328 default:
6329 return -ENOIOCTLCMD;
6330 }
6331 }
6332 #endif
6333
6334 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6335 {
6336 struct hpsa_pci_info pciinfo;
6337
6338 if (!argp)
6339 return -EINVAL;
6340 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6341 pciinfo.bus = h->pdev->bus->number;
6342 pciinfo.dev_fn = h->pdev->devfn;
6343 pciinfo.board_id = h->board_id;
6344 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6345 return -EFAULT;
6346 return 0;
6347 }
6348
6349 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6350 {
6351 DriverVer_type DriverVer;
6352 unsigned char vmaj, vmin, vsubmin;
6353 int rc;
6354
6355 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6356 &vmaj, &vmin, &vsubmin);
6357 if (rc != 3) {
6358 dev_info(&h->pdev->dev, "driver version string '%s' "
6359 "unrecognized.", HPSA_DRIVER_VERSION);
6360 vmaj = 0;
6361 vmin = 0;
6362 vsubmin = 0;
6363 }
6364 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6365 if (!argp)
6366 return -EINVAL;
6367 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6368 return -EFAULT;
6369 return 0;
6370 }
6371
6372 static int hpsa_passthru_ioctl(struct ctlr_info *h,
6373 IOCTL_Command_struct *iocommand)
6374 {
6375 struct CommandList *c;
6376 char *buff = NULL;
6377 u64 temp64;
6378 int rc = 0;
6379
6380 if (!capable(CAP_SYS_RAWIO))
6381 return -EPERM;
6382 if ((iocommand->buf_size < 1) &&
6383 (iocommand->Request.Type.Direction != XFER_NONE)) {
6384 return -EINVAL;
6385 }
6386 if (iocommand->buf_size > 0) {
6387 buff = kmalloc(iocommand->buf_size, GFP_KERNEL);
6388 if (buff == NULL)
6389 return -ENOMEM;
6390 if (iocommand->Request.Type.Direction & XFER_WRITE) {
6391 /* Copy the data into the buffer we created */
6392 if (copy_from_user(buff, iocommand->buf,
6393 iocommand->buf_size)) {
6394 rc = -EFAULT;
6395 goto out_kfree;
6396 }
6397 } else {
6398 memset(buff, 0, iocommand->buf_size);
6399 }
6400 }
6401 c = cmd_alloc(h);
6402
6403 /* Fill in the command type */
6404 c->cmd_type = CMD_IOCTL_PEND;
6405 c->scsi_cmd = SCSI_CMD_BUSY;
6406 /* Fill in Command Header */
6407 c->Header.ReplyQueue = 0; /* unused in simple mode */
6408 if (iocommand->buf_size > 0) { /* buffer to fill */
6409 c->Header.SGList = 1;
6410 c->Header.SGTotal = cpu_to_le16(1);
6411 } else { /* no buffers to fill */
6412 c->Header.SGList = 0;
6413 c->Header.SGTotal = cpu_to_le16(0);
6414 }
6415 memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6416
6417 /* Fill in Request block */
6418 memcpy(&c->Request, &iocommand->Request,
6419 sizeof(c->Request));
6420
6421 /* Fill in the scatter gather information */
6422 if (iocommand->buf_size > 0) {
6423 temp64 = dma_map_single(&h->pdev->dev, buff,
6424 iocommand->buf_size, DMA_BIDIRECTIONAL);
6425 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6426 c->SG[0].Addr = cpu_to_le64(0);
6427 c->SG[0].Len = cpu_to_le32(0);
6428 rc = -ENOMEM;
6429 goto out;
6430 }
6431 c->SG[0].Addr = cpu_to_le64(temp64);
6432 c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
6433 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6434 }
6435 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6436 NO_TIMEOUT);
6437 if (iocommand->buf_size > 0)
6438 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6439 check_ioctl_unit_attention(h, c);
6440 if (rc) {
6441 rc = -EIO;
6442 goto out;
6443 }
6444
6445 /* Copy the error information out */
6446 memcpy(&iocommand->error_info, c->err_info,
6447 sizeof(iocommand->error_info));
6448 if ((iocommand->Request.Type.Direction & XFER_READ) &&
6449 iocommand->buf_size > 0) {
6450 /* Copy the data out of the buffer we created */
6451 if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6452 rc = -EFAULT;
6453 goto out;
6454 }
6455 }
6456 out:
6457 cmd_free(h, c);
6458 out_kfree:
6459 kfree(buff);
6460 return rc;
6461 }
6462
6463 static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6464 BIG_IOCTL_Command_struct *ioc)
6465 {
6466 struct CommandList *c;
6467 unsigned char **buff = NULL;
6468 int *buff_size = NULL;
6469 u64 temp64;
6470 BYTE sg_used = 0;
6471 int status = 0;
6472 u32 left;
6473 u32 sz;
6474 BYTE __user *data_ptr;
6475
6476 if (!capable(CAP_SYS_RAWIO))
6477 return -EPERM;
6478
6479 if ((ioc->buf_size < 1) &&
6480 (ioc->Request.Type.Direction != XFER_NONE))
6481 return -EINVAL;
6482 /* Check kmalloc limits using all SGs */
6483 if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6484 return -EINVAL;
6485 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6486 return -EINVAL;
6487 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6488 if (!buff) {
6489 status = -ENOMEM;
6490 goto cleanup1;
6491 }
6492 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6493 if (!buff_size) {
6494 status = -ENOMEM;
6495 goto cleanup1;
6496 }
6497 left = ioc->buf_size;
6498 data_ptr = ioc->buf;
6499 while (left) {
6500 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6501 buff_size[sg_used] = sz;
6502 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6503 if (buff[sg_used] == NULL) {
6504 status = -ENOMEM;
6505 goto cleanup1;
6506 }
6507 if (ioc->Request.Type.Direction & XFER_WRITE) {
6508 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6509 status = -EFAULT;
6510 goto cleanup1;
6511 }
6512 } else
6513 memset(buff[sg_used], 0, sz);
6514 left -= sz;
6515 data_ptr += sz;
6516 sg_used++;
6517 }
6518 c = cmd_alloc(h);
6519
6520 c->cmd_type = CMD_IOCTL_PEND;
6521 c->scsi_cmd = SCSI_CMD_BUSY;
6522 c->Header.ReplyQueue = 0;
6523 c->Header.SGList = (u8) sg_used;
6524 c->Header.SGTotal = cpu_to_le16(sg_used);
6525 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6526 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6527 if (ioc->buf_size > 0) {
6528 int i;
6529 for (i = 0; i < sg_used; i++) {
6530 temp64 = dma_map_single(&h->pdev->dev, buff[i],
6531 buff_size[i], DMA_BIDIRECTIONAL);
6532 if (dma_mapping_error(&h->pdev->dev,
6533 (dma_addr_t) temp64)) {
6534 c->SG[i].Addr = cpu_to_le64(0);
6535 c->SG[i].Len = cpu_to_le32(0);
6536 hpsa_pci_unmap(h->pdev, c, i,
6537 DMA_BIDIRECTIONAL);
6538 status = -ENOMEM;
6539 goto cleanup0;
6540 }
6541 c->SG[i].Addr = cpu_to_le64(temp64);
6542 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6543 c->SG[i].Ext = cpu_to_le32(0);
6544 }
6545 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6546 }
6547 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6548 NO_TIMEOUT);
6549 if (sg_used)
6550 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6551 check_ioctl_unit_attention(h, c);
6552 if (status) {
6553 status = -EIO;
6554 goto cleanup0;
6555 }
6556
6557 /* Copy the error information out */
6558 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6559 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6560 int i;
6561
6562 /* Copy the data out of the buffer we created */
6563 BYTE __user *ptr = ioc->buf;
6564 for (i = 0; i < sg_used; i++) {
6565 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6566 status = -EFAULT;
6567 goto cleanup0;
6568 }
6569 ptr += buff_size[i];
6570 }
6571 }
6572 status = 0;
6573 cleanup0:
6574 cmd_free(h, c);
6575 cleanup1:
6576 if (buff) {
6577 int i;
6578
6579 for (i = 0; i < sg_used; i++)
6580 kfree(buff[i]);
6581 kfree(buff);
6582 }
6583 kfree(buff_size);
6584 return status;
6585 }
6586
6587 static void check_ioctl_unit_attention(struct ctlr_info *h,
6588 struct CommandList *c)
6589 {
6590 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6591 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6592 (void) check_for_unit_attention(h, c);
6593 }
6594
6595 /*
6596 * ioctl
6597 */
6598 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
6599 void __user *argp)
6600 {
6601 struct ctlr_info *h = sdev_to_hba(dev);
6602 int rc;
6603
6604 switch (cmd) {
6605 case CCISS_DEREGDISK:
6606 case CCISS_REGNEWDISK:
6607 case CCISS_REGNEWD:
6608 hpsa_scan_start(h->scsi_host);
6609 return 0;
6610 case CCISS_GETPCIINFO:
6611 return hpsa_getpciinfo_ioctl(h, argp);
6612 case CCISS_GETDRIVVER:
6613 return hpsa_getdrivver_ioctl(h, argp);
6614 case CCISS_PASSTHRU: {
6615 IOCTL_Command_struct iocommand;
6616
6617 if (!argp)
6618 return -EINVAL;
6619 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6620 return -EFAULT;
6621 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6622 return -EAGAIN;
6623 rc = hpsa_passthru_ioctl(h, &iocommand);
6624 atomic_inc(&h->passthru_cmds_avail);
6625 if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6626 rc = -EFAULT;
6627 return rc;
6628 }
6629 case CCISS_BIG_PASSTHRU: {
6630 BIG_IOCTL_Command_struct ioc;
6631 if (!argp)
6632 return -EINVAL;
6633 if (copy_from_user(&ioc, argp, sizeof(ioc)))
6634 return -EFAULT;
6635 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6636 return -EAGAIN;
6637 rc = hpsa_big_passthru_ioctl(h, &ioc);
6638 atomic_inc(&h->passthru_cmds_avail);
6639 if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6640 rc = -EFAULT;
6641 return rc;
6642 }
6643 default:
6644 return -ENOTTY;
6645 }
6646 }
6647
6648 static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
6649 {
6650 struct CommandList *c;
6651
6652 c = cmd_alloc(h);
6653
6654 /* fill_cmd can't fail here, no data buffer to map */
6655 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6656 RAID_CTLR_LUNID, TYPE_MSG);
6657 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6658 c->waiting = NULL;
6659 enqueue_cmd_and_start_io(h, c);
6660 /* Don't wait for completion, the reset won't complete. Don't free
6661 * the command either. This is the last command we will send before
6662 * re-initializing everything, so it doesn't matter and won't leak.
6663 */
6664 return;
6665 }
6666
6667 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6668 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6669 int cmd_type)
6670 {
6671 enum dma_data_direction dir = DMA_NONE;
6672
6673 c->cmd_type = CMD_IOCTL_PEND;
6674 c->scsi_cmd = SCSI_CMD_BUSY;
6675 c->Header.ReplyQueue = 0;
6676 if (buff != NULL && size > 0) {
6677 c->Header.SGList = 1;
6678 c->Header.SGTotal = cpu_to_le16(1);
6679 } else {
6680 c->Header.SGList = 0;
6681 c->Header.SGTotal = cpu_to_le16(0);
6682 }
6683 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6684
6685 if (cmd_type == TYPE_CMD) {
6686 switch (cmd) {
6687 case HPSA_INQUIRY:
6688 /* are we trying to read a vital product page */
6689 if (page_code & VPD_PAGE) {
6690 c->Request.CDB[1] = 0x01;
6691 c->Request.CDB[2] = (page_code & 0xff);
6692 }
6693 c->Request.CDBLen = 6;
6694 c->Request.type_attr_dir =
6695 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6696 c->Request.Timeout = 0;
6697 c->Request.CDB[0] = HPSA_INQUIRY;
6698 c->Request.CDB[4] = size & 0xFF;
6699 break;
6700 case RECEIVE_DIAGNOSTIC:
6701 c->Request.CDBLen = 6;
6702 c->Request.type_attr_dir =
6703 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6704 c->Request.Timeout = 0;
6705 c->Request.CDB[0] = cmd;
6706 c->Request.CDB[1] = 1;
6707 c->Request.CDB[2] = 1;
6708 c->Request.CDB[3] = (size >> 8) & 0xFF;
6709 c->Request.CDB[4] = size & 0xFF;
6710 break;
6711 case HPSA_REPORT_LOG:
6712 case HPSA_REPORT_PHYS:
6713 /* Talking to controller so It's a physical command
6714 mode = 00 target = 0. Nothing to write.
6715 */
6716 c->Request.CDBLen = 12;
6717 c->Request.type_attr_dir =
6718 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6719 c->Request.Timeout = 0;
6720 c->Request.CDB[0] = cmd;
6721 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6722 c->Request.CDB[7] = (size >> 16) & 0xFF;
6723 c->Request.CDB[8] = (size >> 8) & 0xFF;
6724 c->Request.CDB[9] = size & 0xFF;
6725 break;
6726 case BMIC_SENSE_DIAG_OPTIONS:
6727 c->Request.CDBLen = 16;
6728 c->Request.type_attr_dir =
6729 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6730 c->Request.Timeout = 0;
6731 /* Spec says this should be BMIC_WRITE */
6732 c->Request.CDB[0] = BMIC_READ;
6733 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6734 break;
6735 case BMIC_SET_DIAG_OPTIONS:
6736 c->Request.CDBLen = 16;
6737 c->Request.type_attr_dir =
6738 TYPE_ATTR_DIR(cmd_type,
6739 ATTR_SIMPLE, XFER_WRITE);
6740 c->Request.Timeout = 0;
6741 c->Request.CDB[0] = BMIC_WRITE;
6742 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6743 break;
6744 case HPSA_CACHE_FLUSH:
6745 c->Request.CDBLen = 12;
6746 c->Request.type_attr_dir =
6747 TYPE_ATTR_DIR(cmd_type,
6748 ATTR_SIMPLE, XFER_WRITE);
6749 c->Request.Timeout = 0;
6750 c->Request.CDB[0] = BMIC_WRITE;
6751 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6752 c->Request.CDB[7] = (size >> 8) & 0xFF;
6753 c->Request.CDB[8] = size & 0xFF;
6754 break;
6755 case TEST_UNIT_READY:
6756 c->Request.CDBLen = 6;
6757 c->Request.type_attr_dir =
6758 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6759 c->Request.Timeout = 0;
6760 break;
6761 case HPSA_GET_RAID_MAP:
6762 c->Request.CDBLen = 12;
6763 c->Request.type_attr_dir =
6764 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6765 c->Request.Timeout = 0;
6766 c->Request.CDB[0] = HPSA_CISS_READ;
6767 c->Request.CDB[1] = cmd;
6768 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6769 c->Request.CDB[7] = (size >> 16) & 0xFF;
6770 c->Request.CDB[8] = (size >> 8) & 0xFF;
6771 c->Request.CDB[9] = size & 0xFF;
6772 break;
6773 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6774 c->Request.CDBLen = 10;
6775 c->Request.type_attr_dir =
6776 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6777 c->Request.Timeout = 0;
6778 c->Request.CDB[0] = BMIC_READ;
6779 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6780 c->Request.CDB[7] = (size >> 16) & 0xFF;
6781 c->Request.CDB[8] = (size >> 8) & 0xFF;
6782 break;
6783 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6784 c->Request.CDBLen = 10;
6785 c->Request.type_attr_dir =
6786 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6787 c->Request.Timeout = 0;
6788 c->Request.CDB[0] = BMIC_READ;
6789 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6790 c->Request.CDB[7] = (size >> 16) & 0xFF;
6791 c->Request.CDB[8] = (size >> 8) & 0XFF;
6792 break;
6793 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6794 c->Request.CDBLen = 10;
6795 c->Request.type_attr_dir =
6796 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6797 c->Request.Timeout = 0;
6798 c->Request.CDB[0] = BMIC_READ;
6799 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6800 c->Request.CDB[7] = (size >> 16) & 0xFF;
6801 c->Request.CDB[8] = (size >> 8) & 0XFF;
6802 break;
6803 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6804 c->Request.CDBLen = 10;
6805 c->Request.type_attr_dir =
6806 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6807 c->Request.Timeout = 0;
6808 c->Request.CDB[0] = BMIC_READ;
6809 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6810 c->Request.CDB[7] = (size >> 16) & 0xFF;
6811 c->Request.CDB[8] = (size >> 8) & 0XFF;
6812 break;
6813 case BMIC_IDENTIFY_CONTROLLER:
6814 c->Request.CDBLen = 10;
6815 c->Request.type_attr_dir =
6816 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6817 c->Request.Timeout = 0;
6818 c->Request.CDB[0] = BMIC_READ;
6819 c->Request.CDB[1] = 0;
6820 c->Request.CDB[2] = 0;
6821 c->Request.CDB[3] = 0;
6822 c->Request.CDB[4] = 0;
6823 c->Request.CDB[5] = 0;
6824 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6825 c->Request.CDB[7] = (size >> 16) & 0xFF;
6826 c->Request.CDB[8] = (size >> 8) & 0XFF;
6827 c->Request.CDB[9] = 0;
6828 break;
6829 default:
6830 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6831 BUG();
6832 }
6833 } else if (cmd_type == TYPE_MSG) {
6834 switch (cmd) {
6835
6836 case HPSA_PHYS_TARGET_RESET:
6837 c->Request.CDBLen = 16;
6838 c->Request.type_attr_dir =
6839 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6840 c->Request.Timeout = 0; /* Don't time out */
6841 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6842 c->Request.CDB[0] = HPSA_RESET;
6843 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6844 /* Physical target reset needs no control bytes 4-7*/
6845 c->Request.CDB[4] = 0x00;
6846 c->Request.CDB[5] = 0x00;
6847 c->Request.CDB[6] = 0x00;
6848 c->Request.CDB[7] = 0x00;
6849 break;
6850 case HPSA_DEVICE_RESET_MSG:
6851 c->Request.CDBLen = 16;
6852 c->Request.type_attr_dir =
6853 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6854 c->Request.Timeout = 0; /* Don't time out */
6855 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6856 c->Request.CDB[0] = cmd;
6857 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6858 /* If bytes 4-7 are zero, it means reset the */
6859 /* LunID device */
6860 c->Request.CDB[4] = 0x00;
6861 c->Request.CDB[5] = 0x00;
6862 c->Request.CDB[6] = 0x00;
6863 c->Request.CDB[7] = 0x00;
6864 break;
6865 default:
6866 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6867 cmd);
6868 BUG();
6869 }
6870 } else {
6871 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6872 BUG();
6873 }
6874
6875 switch (GET_DIR(c->Request.type_attr_dir)) {
6876 case XFER_READ:
6877 dir = DMA_FROM_DEVICE;
6878 break;
6879 case XFER_WRITE:
6880 dir = DMA_TO_DEVICE;
6881 break;
6882 case XFER_NONE:
6883 dir = DMA_NONE;
6884 break;
6885 default:
6886 dir = DMA_BIDIRECTIONAL;
6887 }
6888 if (hpsa_map_one(h->pdev, c, buff, size, dir))
6889 return -1;
6890 return 0;
6891 }
6892
6893 /*
6894 * Map (physical) PCI mem into (virtual) kernel space
6895 */
6896 static void __iomem *remap_pci_mem(ulong base, ulong size)
6897 {
6898 ulong page_base = ((ulong) base) & PAGE_MASK;
6899 ulong page_offs = ((ulong) base) - page_base;
6900 void __iomem *page_remapped = ioremap(page_base,
6901 page_offs + size);
6902
6903 return page_remapped ? (page_remapped + page_offs) : NULL;
6904 }
6905
6906 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6907 {
6908 return h->access.command_completed(h, q);
6909 }
6910
6911 static inline bool interrupt_pending(struct ctlr_info *h)
6912 {
6913 return h->access.intr_pending(h);
6914 }
6915
6916 static inline long interrupt_not_for_us(struct ctlr_info *h)
6917 {
6918 return (h->access.intr_pending(h) == 0) ||
6919 (h->interrupts_enabled == 0);
6920 }
6921
6922 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6923 u32 raw_tag)
6924 {
6925 if (unlikely(tag_index >= h->nr_cmds)) {
6926 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6927 return 1;
6928 }
6929 return 0;
6930 }
6931
6932 static inline void finish_cmd(struct CommandList *c)
6933 {
6934 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6935 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6936 || c->cmd_type == CMD_IOACCEL2))
6937 complete_scsi_command(c);
6938 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6939 complete(c->waiting);
6940 }
6941
6942 /* process completion of an indexed ("direct lookup") command */
6943 static inline void process_indexed_cmd(struct ctlr_info *h,
6944 u32 raw_tag)
6945 {
6946 u32 tag_index;
6947 struct CommandList *c;
6948
6949 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6950 if (!bad_tag(h, tag_index, raw_tag)) {
6951 c = h->cmd_pool + tag_index;
6952 finish_cmd(c);
6953 }
6954 }
6955
6956 /* Some controllers, like p400, will give us one interrupt
6957 * after a soft reset, even if we turned interrupts off.
6958 * Only need to check for this in the hpsa_xxx_discard_completions
6959 * functions.
6960 */
6961 static int ignore_bogus_interrupt(struct ctlr_info *h)
6962 {
6963 if (likely(!reset_devices))
6964 return 0;
6965
6966 if (likely(h->interrupts_enabled))
6967 return 0;
6968
6969 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6970 "(known firmware bug.) Ignoring.\n");
6971
6972 return 1;
6973 }
6974
6975 /*
6976 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6977 * Relies on (h-q[x] == x) being true for x such that
6978 * 0 <= x < MAX_REPLY_QUEUES.
6979 */
6980 static struct ctlr_info *queue_to_hba(u8 *queue)
6981 {
6982 return container_of((queue - *queue), struct ctlr_info, q[0]);
6983 }
6984
6985 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6986 {
6987 struct ctlr_info *h = queue_to_hba(queue);
6988 u8 q = *(u8 *) queue;
6989 u32 raw_tag;
6990
6991 if (ignore_bogus_interrupt(h))
6992 return IRQ_NONE;
6993
6994 if (interrupt_not_for_us(h))
6995 return IRQ_NONE;
6996 h->last_intr_timestamp = get_jiffies_64();
6997 while (interrupt_pending(h)) {
6998 raw_tag = get_next_completion(h, q);
6999 while (raw_tag != FIFO_EMPTY)
7000 raw_tag = next_command(h, q);
7001 }
7002 return IRQ_HANDLED;
7003 }
7004
7005 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7006 {
7007 struct ctlr_info *h = queue_to_hba(queue);
7008 u32 raw_tag;
7009 u8 q = *(u8 *) queue;
7010
7011 if (ignore_bogus_interrupt(h))
7012 return IRQ_NONE;
7013
7014 h->last_intr_timestamp = get_jiffies_64();
7015 raw_tag = get_next_completion(h, q);
7016 while (raw_tag != FIFO_EMPTY)
7017 raw_tag = next_command(h, q);
7018 return IRQ_HANDLED;
7019 }
7020
7021 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7022 {
7023 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7024 u32 raw_tag;
7025 u8 q = *(u8 *) queue;
7026
7027 if (interrupt_not_for_us(h))
7028 return IRQ_NONE;
7029 h->last_intr_timestamp = get_jiffies_64();
7030 while (interrupt_pending(h)) {
7031 raw_tag = get_next_completion(h, q);
7032 while (raw_tag != FIFO_EMPTY) {
7033 process_indexed_cmd(h, raw_tag);
7034 raw_tag = next_command(h, q);
7035 }
7036 }
7037 return IRQ_HANDLED;
7038 }
7039
7040 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7041 {
7042 struct ctlr_info *h = queue_to_hba(queue);
7043 u32 raw_tag;
7044 u8 q = *(u8 *) queue;
7045
7046 h->last_intr_timestamp = get_jiffies_64();
7047 raw_tag = get_next_completion(h, q);
7048 while (raw_tag != FIFO_EMPTY) {
7049 process_indexed_cmd(h, raw_tag);
7050 raw_tag = next_command(h, q);
7051 }
7052 return IRQ_HANDLED;
7053 }
7054
7055 /* Send a message CDB to the firmware. Careful, this only works
7056 * in simple mode, not performant mode due to the tag lookup.
7057 * We only ever use this immediately after a controller reset.
7058 */
7059 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7060 unsigned char type)
7061 {
7062 struct Command {
7063 struct CommandListHeader CommandHeader;
7064 struct RequestBlock Request;
7065 struct ErrDescriptor ErrorDescriptor;
7066 };
7067 struct Command *cmd;
7068 static const size_t cmd_sz = sizeof(*cmd) +
7069 sizeof(cmd->ErrorDescriptor);
7070 dma_addr_t paddr64;
7071 __le32 paddr32;
7072 u32 tag;
7073 void __iomem *vaddr;
7074 int i, err;
7075
7076 vaddr = pci_ioremap_bar(pdev, 0);
7077 if (vaddr == NULL)
7078 return -ENOMEM;
7079
7080 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7081 * CCISS commands, so they must be allocated from the lower 4GiB of
7082 * memory.
7083 */
7084 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7085 if (err) {
7086 iounmap(vaddr);
7087 return err;
7088 }
7089
7090 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7091 if (cmd == NULL) {
7092 iounmap(vaddr);
7093 return -ENOMEM;
7094 }
7095
7096 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7097 * although there's no guarantee, we assume that the address is at
7098 * least 4-byte aligned (most likely, it's page-aligned).
7099 */
7100 paddr32 = cpu_to_le32(paddr64);
7101
7102 cmd->CommandHeader.ReplyQueue = 0;
7103 cmd->CommandHeader.SGList = 0;
7104 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7105 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7106 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7107
7108 cmd->Request.CDBLen = 16;
7109 cmd->Request.type_attr_dir =
7110 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7111 cmd->Request.Timeout = 0; /* Don't time out */
7112 cmd->Request.CDB[0] = opcode;
7113 cmd->Request.CDB[1] = type;
7114 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7115 cmd->ErrorDescriptor.Addr =
7116 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7117 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7118
7119 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7120
7121 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7122 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7123 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7124 break;
7125 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7126 }
7127
7128 iounmap(vaddr);
7129
7130 /* we leak the DMA buffer here ... no choice since the controller could
7131 * still complete the command.
7132 */
7133 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7134 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7135 opcode, type);
7136 return -ETIMEDOUT;
7137 }
7138
7139 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7140
7141 if (tag & HPSA_ERROR_BIT) {
7142 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7143 opcode, type);
7144 return -EIO;
7145 }
7146
7147 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7148 opcode, type);
7149 return 0;
7150 }
7151
7152 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7153
7154 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7155 void __iomem *vaddr, u32 use_doorbell)
7156 {
7157
7158 if (use_doorbell) {
7159 /* For everything after the P600, the PCI power state method
7160 * of resetting the controller doesn't work, so we have this
7161 * other way using the doorbell register.
7162 */
7163 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7164 writel(use_doorbell, vaddr + SA5_DOORBELL);
7165
7166 /* PMC hardware guys tell us we need a 10 second delay after
7167 * doorbell reset and before any attempt to talk to the board
7168 * at all to ensure that this actually works and doesn't fall
7169 * over in some weird corner cases.
7170 */
7171 msleep(10000);
7172 } else { /* Try to do it the PCI power state way */
7173
7174 /* Quoting from the Open CISS Specification: "The Power
7175 * Management Control/Status Register (CSR) controls the power
7176 * state of the device. The normal operating state is D0,
7177 * CSR=00h. The software off state is D3, CSR=03h. To reset
7178 * the controller, place the interface device in D3 then to D0,
7179 * this causes a secondary PCI reset which will reset the
7180 * controller." */
7181
7182 int rc = 0;
7183
7184 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7185
7186 /* enter the D3hot power management state */
7187 rc = pci_set_power_state(pdev, PCI_D3hot);
7188 if (rc)
7189 return rc;
7190
7191 msleep(500);
7192
7193 /* enter the D0 power management state */
7194 rc = pci_set_power_state(pdev, PCI_D0);
7195 if (rc)
7196 return rc;
7197
7198 /*
7199 * The P600 requires a small delay when changing states.
7200 * Otherwise we may think the board did not reset and we bail.
7201 * This for kdump only and is particular to the P600.
7202 */
7203 msleep(500);
7204 }
7205 return 0;
7206 }
7207
7208 static void init_driver_version(char *driver_version, int len)
7209 {
7210 memset(driver_version, 0, len);
7211 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7212 }
7213
7214 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7215 {
7216 char *driver_version;
7217 int i, size = sizeof(cfgtable->driver_version);
7218
7219 driver_version = kmalloc(size, GFP_KERNEL);
7220 if (!driver_version)
7221 return -ENOMEM;
7222
7223 init_driver_version(driver_version, size);
7224 for (i = 0; i < size; i++)
7225 writeb(driver_version[i], &cfgtable->driver_version[i]);
7226 kfree(driver_version);
7227 return 0;
7228 }
7229
7230 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7231 unsigned char *driver_ver)
7232 {
7233 int i;
7234
7235 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7236 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7237 }
7238
7239 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7240 {
7241
7242 char *driver_ver, *old_driver_ver;
7243 int rc, size = sizeof(cfgtable->driver_version);
7244
7245 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7246 if (!old_driver_ver)
7247 return -ENOMEM;
7248 driver_ver = old_driver_ver + size;
7249
7250 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7251 * should have been changed, otherwise we know the reset failed.
7252 */
7253 init_driver_version(old_driver_ver, size);
7254 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7255 rc = !memcmp(driver_ver, old_driver_ver, size);
7256 kfree(old_driver_ver);
7257 return rc;
7258 }
7259 /* This does a hard reset of the controller using PCI power management
7260 * states or the using the doorbell register.
7261 */
7262 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7263 {
7264 u64 cfg_offset;
7265 u32 cfg_base_addr;
7266 u64 cfg_base_addr_index;
7267 void __iomem *vaddr;
7268 unsigned long paddr;
7269 u32 misc_fw_support;
7270 int rc;
7271 struct CfgTable __iomem *cfgtable;
7272 u32 use_doorbell;
7273 u16 command_register;
7274
7275 /* For controllers as old as the P600, this is very nearly
7276 * the same thing as
7277 *
7278 * pci_save_state(pci_dev);
7279 * pci_set_power_state(pci_dev, PCI_D3hot);
7280 * pci_set_power_state(pci_dev, PCI_D0);
7281 * pci_restore_state(pci_dev);
7282 *
7283 * For controllers newer than the P600, the pci power state
7284 * method of resetting doesn't work so we have another way
7285 * using the doorbell register.
7286 */
7287
7288 if (!ctlr_is_resettable(board_id)) {
7289 dev_warn(&pdev->dev, "Controller not resettable\n");
7290 return -ENODEV;
7291 }
7292
7293 /* if controller is soft- but not hard resettable... */
7294 if (!ctlr_is_hard_resettable(board_id))
7295 return -ENOTSUPP; /* try soft reset later. */
7296
7297 /* Save the PCI command register */
7298 pci_read_config_word(pdev, 4, &command_register);
7299 pci_save_state(pdev);
7300
7301 /* find the first memory BAR, so we can find the cfg table */
7302 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7303 if (rc)
7304 return rc;
7305 vaddr = remap_pci_mem(paddr, 0x250);
7306 if (!vaddr)
7307 return -ENOMEM;
7308
7309 /* find cfgtable in order to check if reset via doorbell is supported */
7310 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7311 &cfg_base_addr_index, &cfg_offset);
7312 if (rc)
7313 goto unmap_vaddr;
7314 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7315 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7316 if (!cfgtable) {
7317 rc = -ENOMEM;
7318 goto unmap_vaddr;
7319 }
7320 rc = write_driver_ver_to_cfgtable(cfgtable);
7321 if (rc)
7322 goto unmap_cfgtable;
7323
7324 /* If reset via doorbell register is supported, use that.
7325 * There are two such methods. Favor the newest method.
7326 */
7327 misc_fw_support = readl(&cfgtable->misc_fw_support);
7328 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7329 if (use_doorbell) {
7330 use_doorbell = DOORBELL_CTLR_RESET2;
7331 } else {
7332 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7333 if (use_doorbell) {
7334 dev_warn(&pdev->dev,
7335 "Soft reset not supported. Firmware update is required.\n");
7336 rc = -ENOTSUPP; /* try soft reset */
7337 goto unmap_cfgtable;
7338 }
7339 }
7340
7341 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7342 if (rc)
7343 goto unmap_cfgtable;
7344
7345 pci_restore_state(pdev);
7346 pci_write_config_word(pdev, 4, command_register);
7347
7348 /* Some devices (notably the HP Smart Array 5i Controller)
7349 need a little pause here */
7350 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7351
7352 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7353 if (rc) {
7354 dev_warn(&pdev->dev,
7355 "Failed waiting for board to become ready after hard reset\n");
7356 goto unmap_cfgtable;
7357 }
7358
7359 rc = controller_reset_failed(vaddr);
7360 if (rc < 0)
7361 goto unmap_cfgtable;
7362 if (rc) {
7363 dev_warn(&pdev->dev, "Unable to successfully reset "
7364 "controller. Will try soft reset.\n");
7365 rc = -ENOTSUPP;
7366 } else {
7367 dev_info(&pdev->dev, "board ready after hard reset.\n");
7368 }
7369
7370 unmap_cfgtable:
7371 iounmap(cfgtable);
7372
7373 unmap_vaddr:
7374 iounmap(vaddr);
7375 return rc;
7376 }
7377
7378 /*
7379 * We cannot read the structure directly, for portability we must use
7380 * the io functions.
7381 * This is for debug only.
7382 */
7383 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7384 {
7385 #ifdef HPSA_DEBUG
7386 int i;
7387 char temp_name[17];
7388
7389 dev_info(dev, "Controller Configuration information\n");
7390 dev_info(dev, "------------------------------------\n");
7391 for (i = 0; i < 4; i++)
7392 temp_name[i] = readb(&(tb->Signature[i]));
7393 temp_name[4] = '\0';
7394 dev_info(dev, " Signature = %s\n", temp_name);
7395 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7396 dev_info(dev, " Transport methods supported = 0x%x\n",
7397 readl(&(tb->TransportSupport)));
7398 dev_info(dev, " Transport methods active = 0x%x\n",
7399 readl(&(tb->TransportActive)));
7400 dev_info(dev, " Requested transport Method = 0x%x\n",
7401 readl(&(tb->HostWrite.TransportRequest)));
7402 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7403 readl(&(tb->HostWrite.CoalIntDelay)));
7404 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7405 readl(&(tb->HostWrite.CoalIntCount)));
7406 dev_info(dev, " Max outstanding commands = %d\n",
7407 readl(&(tb->CmdsOutMax)));
7408 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7409 for (i = 0; i < 16; i++)
7410 temp_name[i] = readb(&(tb->ServerName[i]));
7411 temp_name[16] = '\0';
7412 dev_info(dev, " Server Name = %s\n", temp_name);
7413 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7414 readl(&(tb->HeartBeat)));
7415 #endif /* HPSA_DEBUG */
7416 }
7417
7418 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7419 {
7420 int i, offset, mem_type, bar_type;
7421
7422 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7423 return 0;
7424 offset = 0;
7425 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7426 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7427 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7428 offset += 4;
7429 else {
7430 mem_type = pci_resource_flags(pdev, i) &
7431 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7432 switch (mem_type) {
7433 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7434 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7435 offset += 4; /* 32 bit */
7436 break;
7437 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7438 offset += 8;
7439 break;
7440 default: /* reserved in PCI 2.2 */
7441 dev_warn(&pdev->dev,
7442 "base address is invalid\n");
7443 return -1;
7444 break;
7445 }
7446 }
7447 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7448 return i + 1;
7449 }
7450 return -1;
7451 }
7452
7453 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7454 {
7455 pci_free_irq_vectors(h->pdev);
7456 h->msix_vectors = 0;
7457 }
7458
7459 static void hpsa_setup_reply_map(struct ctlr_info *h)
7460 {
7461 const struct cpumask *mask;
7462 unsigned int queue, cpu;
7463
7464 for (queue = 0; queue < h->msix_vectors; queue++) {
7465 mask = pci_irq_get_affinity(h->pdev, queue);
7466 if (!mask)
7467 goto fallback;
7468
7469 for_each_cpu(cpu, mask)
7470 h->reply_map[cpu] = queue;
7471 }
7472 return;
7473
7474 fallback:
7475 for_each_possible_cpu(cpu)
7476 h->reply_map[cpu] = 0;
7477 }
7478
7479 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7480 * controllers that are capable. If not, we use legacy INTx mode.
7481 */
7482 static int hpsa_interrupt_mode(struct ctlr_info *h)
7483 {
7484 unsigned int flags = PCI_IRQ_LEGACY;
7485 int ret;
7486
7487 /* Some boards advertise MSI but don't really support it */
7488 switch (h->board_id) {
7489 case 0x40700E11:
7490 case 0x40800E11:
7491 case 0x40820E11:
7492 case 0x40830E11:
7493 break;
7494 default:
7495 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7496 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7497 if (ret > 0) {
7498 h->msix_vectors = ret;
7499 return 0;
7500 }
7501
7502 flags |= PCI_IRQ_MSI;
7503 break;
7504 }
7505
7506 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7507 if (ret < 0)
7508 return ret;
7509 return 0;
7510 }
7511
7512 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7513 bool *legacy_board)
7514 {
7515 int i;
7516 u32 subsystem_vendor_id, subsystem_device_id;
7517
7518 subsystem_vendor_id = pdev->subsystem_vendor;
7519 subsystem_device_id = pdev->subsystem_device;
7520 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7521 subsystem_vendor_id;
7522
7523 if (legacy_board)
7524 *legacy_board = false;
7525 for (i = 0; i < ARRAY_SIZE(products); i++)
7526 if (*board_id == products[i].board_id) {
7527 if (products[i].access != &SA5A_access &&
7528 products[i].access != &SA5B_access)
7529 return i;
7530 dev_warn(&pdev->dev,
7531 "legacy board ID: 0x%08x\n",
7532 *board_id);
7533 if (legacy_board)
7534 *legacy_board = true;
7535 return i;
7536 }
7537
7538 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7539 if (legacy_board)
7540 *legacy_board = true;
7541 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7542 }
7543
7544 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7545 unsigned long *memory_bar)
7546 {
7547 int i;
7548
7549 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7550 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7551 /* addressing mode bits already removed */
7552 *memory_bar = pci_resource_start(pdev, i);
7553 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7554 *memory_bar);
7555 return 0;
7556 }
7557 dev_warn(&pdev->dev, "no memory BAR found\n");
7558 return -ENODEV;
7559 }
7560
7561 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7562 int wait_for_ready)
7563 {
7564 int i, iterations;
7565 u32 scratchpad;
7566 if (wait_for_ready)
7567 iterations = HPSA_BOARD_READY_ITERATIONS;
7568 else
7569 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7570
7571 for (i = 0; i < iterations; i++) {
7572 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7573 if (wait_for_ready) {
7574 if (scratchpad == HPSA_FIRMWARE_READY)
7575 return 0;
7576 } else {
7577 if (scratchpad != HPSA_FIRMWARE_READY)
7578 return 0;
7579 }
7580 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7581 }
7582 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7583 return -ENODEV;
7584 }
7585
7586 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7587 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7588 u64 *cfg_offset)
7589 {
7590 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7591 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7592 *cfg_base_addr &= (u32) 0x0000ffff;
7593 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7594 if (*cfg_base_addr_index == -1) {
7595 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7596 return -ENODEV;
7597 }
7598 return 0;
7599 }
7600
7601 static void hpsa_free_cfgtables(struct ctlr_info *h)
7602 {
7603 if (h->transtable) {
7604 iounmap(h->transtable);
7605 h->transtable = NULL;
7606 }
7607 if (h->cfgtable) {
7608 iounmap(h->cfgtable);
7609 h->cfgtable = NULL;
7610 }
7611 }
7612
7613 /* Find and map CISS config table and transfer table
7614 + * several items must be unmapped (freed) later
7615 + * */
7616 static int hpsa_find_cfgtables(struct ctlr_info *h)
7617 {
7618 u64 cfg_offset;
7619 u32 cfg_base_addr;
7620 u64 cfg_base_addr_index;
7621 u32 trans_offset;
7622 int rc;
7623
7624 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7625 &cfg_base_addr_index, &cfg_offset);
7626 if (rc)
7627 return rc;
7628 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7629 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7630 if (!h->cfgtable) {
7631 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7632 return -ENOMEM;
7633 }
7634 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7635 if (rc)
7636 return rc;
7637 /* Find performant mode table. */
7638 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7639 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7640 cfg_base_addr_index)+cfg_offset+trans_offset,
7641 sizeof(*h->transtable));
7642 if (!h->transtable) {
7643 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7644 hpsa_free_cfgtables(h);
7645 return -ENOMEM;
7646 }
7647 return 0;
7648 }
7649
7650 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7651 {
7652 #define MIN_MAX_COMMANDS 16
7653 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7654
7655 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7656
7657 /* Limit commands in memory limited kdump scenario. */
7658 if (reset_devices && h->max_commands > 32)
7659 h->max_commands = 32;
7660
7661 if (h->max_commands < MIN_MAX_COMMANDS) {
7662 dev_warn(&h->pdev->dev,
7663 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7664 h->max_commands,
7665 MIN_MAX_COMMANDS);
7666 h->max_commands = MIN_MAX_COMMANDS;
7667 }
7668 }
7669
7670 /* If the controller reports that the total max sg entries is greater than 512,
7671 * then we know that chained SG blocks work. (Original smart arrays did not
7672 * support chained SG blocks and would return zero for max sg entries.)
7673 */
7674 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7675 {
7676 return h->maxsgentries > 512;
7677 }
7678
7679 /* Interrogate the hardware for some limits:
7680 * max commands, max SG elements without chaining, and with chaining,
7681 * SG chain block size, etc.
7682 */
7683 static void hpsa_find_board_params(struct ctlr_info *h)
7684 {
7685 hpsa_get_max_perf_mode_cmds(h);
7686 h->nr_cmds = h->max_commands;
7687 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7688 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7689 if (hpsa_supports_chained_sg_blocks(h)) {
7690 /* Limit in-command s/g elements to 32 save dma'able memory. */
7691 h->max_cmd_sg_entries = 32;
7692 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7693 h->maxsgentries--; /* save one for chain pointer */
7694 } else {
7695 /*
7696 * Original smart arrays supported at most 31 s/g entries
7697 * embedded inline in the command (trying to use more
7698 * would lock up the controller)
7699 */
7700 h->max_cmd_sg_entries = 31;
7701 h->maxsgentries = 31; /* default to traditional values */
7702 h->chainsize = 0;
7703 }
7704
7705 /* Find out what task management functions are supported and cache */
7706 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7707 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7708 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7709 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7710 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7711 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7712 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7713 }
7714
7715 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7716 {
7717 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7718 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7719 return false;
7720 }
7721 return true;
7722 }
7723
7724 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7725 {
7726 u32 driver_support;
7727
7728 driver_support = readl(&(h->cfgtable->driver_support));
7729 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7730 #ifdef CONFIG_X86
7731 driver_support |= ENABLE_SCSI_PREFETCH;
7732 #endif
7733 driver_support |= ENABLE_UNIT_ATTN;
7734 writel(driver_support, &(h->cfgtable->driver_support));
7735 }
7736
7737 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7738 * in a prefetch beyond physical memory.
7739 */
7740 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7741 {
7742 u32 dma_prefetch;
7743
7744 if (h->board_id != 0x3225103C)
7745 return;
7746 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7747 dma_prefetch |= 0x8000;
7748 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7749 }
7750
7751 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7752 {
7753 int i;
7754 u32 doorbell_value;
7755 unsigned long flags;
7756 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7757 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7758 spin_lock_irqsave(&h->lock, flags);
7759 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7760 spin_unlock_irqrestore(&h->lock, flags);
7761 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7762 goto done;
7763 /* delay and try again */
7764 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7765 }
7766 return -ENODEV;
7767 done:
7768 return 0;
7769 }
7770
7771 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7772 {
7773 int i;
7774 u32 doorbell_value;
7775 unsigned long flags;
7776
7777 /* under certain very rare conditions, this can take awhile.
7778 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7779 * as we enter this code.)
7780 */
7781 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7782 if (h->remove_in_progress)
7783 goto done;
7784 spin_lock_irqsave(&h->lock, flags);
7785 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7786 spin_unlock_irqrestore(&h->lock, flags);
7787 if (!(doorbell_value & CFGTBL_ChangeReq))
7788 goto done;
7789 /* delay and try again */
7790 msleep(MODE_CHANGE_WAIT_INTERVAL);
7791 }
7792 return -ENODEV;
7793 done:
7794 return 0;
7795 }
7796
7797 /* return -ENODEV or other reason on error, 0 on success */
7798 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7799 {
7800 u32 trans_support;
7801
7802 trans_support = readl(&(h->cfgtable->TransportSupport));
7803 if (!(trans_support & SIMPLE_MODE))
7804 return -ENOTSUPP;
7805
7806 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7807
7808 /* Update the field, and then ring the doorbell */
7809 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7810 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7811 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7812 if (hpsa_wait_for_mode_change_ack(h))
7813 goto error;
7814 print_cfg_table(&h->pdev->dev, h->cfgtable);
7815 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7816 goto error;
7817 h->transMethod = CFGTBL_Trans_Simple;
7818 return 0;
7819 error:
7820 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7821 return -ENODEV;
7822 }
7823
7824 /* free items allocated or mapped by hpsa_pci_init */
7825 static void hpsa_free_pci_init(struct ctlr_info *h)
7826 {
7827 hpsa_free_cfgtables(h); /* pci_init 4 */
7828 iounmap(h->vaddr); /* pci_init 3 */
7829 h->vaddr = NULL;
7830 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7831 /*
7832 * call pci_disable_device before pci_release_regions per
7833 * Documentation/driver-api/pci/pci.rst
7834 */
7835 pci_disable_device(h->pdev); /* pci_init 1 */
7836 pci_release_regions(h->pdev); /* pci_init 2 */
7837 }
7838
7839 /* several items must be freed later */
7840 static int hpsa_pci_init(struct ctlr_info *h)
7841 {
7842 int prod_index, err;
7843 bool legacy_board;
7844
7845 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7846 if (prod_index < 0)
7847 return prod_index;
7848 h->product_name = products[prod_index].product_name;
7849 h->access = *(products[prod_index].access);
7850 h->legacy_board = legacy_board;
7851 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7852 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7853
7854 err = pci_enable_device(h->pdev);
7855 if (err) {
7856 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7857 pci_disable_device(h->pdev);
7858 return err;
7859 }
7860
7861 err = pci_request_regions(h->pdev, HPSA);
7862 if (err) {
7863 dev_err(&h->pdev->dev,
7864 "failed to obtain PCI resources\n");
7865 pci_disable_device(h->pdev);
7866 return err;
7867 }
7868
7869 pci_set_master(h->pdev);
7870
7871 err = hpsa_interrupt_mode(h);
7872 if (err)
7873 goto clean1;
7874
7875 /* setup mapping between CPU and reply queue */
7876 hpsa_setup_reply_map(h);
7877
7878 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7879 if (err)
7880 goto clean2; /* intmode+region, pci */
7881 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7882 if (!h->vaddr) {
7883 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7884 err = -ENOMEM;
7885 goto clean2; /* intmode+region, pci */
7886 }
7887 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7888 if (err)
7889 goto clean3; /* vaddr, intmode+region, pci */
7890 err = hpsa_find_cfgtables(h);
7891 if (err)
7892 goto clean3; /* vaddr, intmode+region, pci */
7893 hpsa_find_board_params(h);
7894
7895 if (!hpsa_CISS_signature_present(h)) {
7896 err = -ENODEV;
7897 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7898 }
7899 hpsa_set_driver_support_bits(h);
7900 hpsa_p600_dma_prefetch_quirk(h);
7901 err = hpsa_enter_simple_mode(h);
7902 if (err)
7903 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7904 return 0;
7905
7906 clean4: /* cfgtables, vaddr, intmode+region, pci */
7907 hpsa_free_cfgtables(h);
7908 clean3: /* vaddr, intmode+region, pci */
7909 iounmap(h->vaddr);
7910 h->vaddr = NULL;
7911 clean2: /* intmode+region, pci */
7912 hpsa_disable_interrupt_mode(h);
7913 clean1:
7914 /*
7915 * call pci_disable_device before pci_release_regions per
7916 * Documentation/driver-api/pci/pci.rst
7917 */
7918 pci_disable_device(h->pdev);
7919 pci_release_regions(h->pdev);
7920 return err;
7921 }
7922
7923 static void hpsa_hba_inquiry(struct ctlr_info *h)
7924 {
7925 int rc;
7926
7927 #define HBA_INQUIRY_BYTE_COUNT 64
7928 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7929 if (!h->hba_inquiry_data)
7930 return;
7931 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7932 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7933 if (rc != 0) {
7934 kfree(h->hba_inquiry_data);
7935 h->hba_inquiry_data = NULL;
7936 }
7937 }
7938
7939 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7940 {
7941 int rc, i;
7942 void __iomem *vaddr;
7943
7944 if (!reset_devices)
7945 return 0;
7946
7947 /* kdump kernel is loading, we don't know in which state is
7948 * the pci interface. The dev->enable_cnt is equal zero
7949 * so we call enable+disable, wait a while and switch it on.
7950 */
7951 rc = pci_enable_device(pdev);
7952 if (rc) {
7953 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7954 return -ENODEV;
7955 }
7956 pci_disable_device(pdev);
7957 msleep(260); /* a randomly chosen number */
7958 rc = pci_enable_device(pdev);
7959 if (rc) {
7960 dev_warn(&pdev->dev, "failed to enable device.\n");
7961 return -ENODEV;
7962 }
7963
7964 pci_set_master(pdev);
7965
7966 vaddr = pci_ioremap_bar(pdev, 0);
7967 if (vaddr == NULL) {
7968 rc = -ENOMEM;
7969 goto out_disable;
7970 }
7971 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7972 iounmap(vaddr);
7973
7974 /* Reset the controller with a PCI power-cycle or via doorbell */
7975 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7976
7977 /* -ENOTSUPP here means we cannot reset the controller
7978 * but it's already (and still) up and running in
7979 * "performant mode". Or, it might be 640x, which can't reset
7980 * due to concerns about shared bbwc between 6402/6404 pair.
7981 */
7982 if (rc)
7983 goto out_disable;
7984
7985 /* Now try to get the controller to respond to a no-op */
7986 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7987 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7988 if (hpsa_noop(pdev) == 0)
7989 break;
7990 else
7991 dev_warn(&pdev->dev, "no-op failed%s\n",
7992 (i < 11 ? "; re-trying" : ""));
7993 }
7994
7995 out_disable:
7996
7997 pci_disable_device(pdev);
7998 return rc;
7999 }
8000
8001 static void hpsa_free_cmd_pool(struct ctlr_info *h)
8002 {
8003 kfree(h->cmd_pool_bits);
8004 h->cmd_pool_bits = NULL;
8005 if (h->cmd_pool) {
8006 dma_free_coherent(&h->pdev->dev,
8007 h->nr_cmds * sizeof(struct CommandList),
8008 h->cmd_pool,
8009 h->cmd_pool_dhandle);
8010 h->cmd_pool = NULL;
8011 h->cmd_pool_dhandle = 0;
8012 }
8013 if (h->errinfo_pool) {
8014 dma_free_coherent(&h->pdev->dev,
8015 h->nr_cmds * sizeof(struct ErrorInfo),
8016 h->errinfo_pool,
8017 h->errinfo_pool_dhandle);
8018 h->errinfo_pool = NULL;
8019 h->errinfo_pool_dhandle = 0;
8020 }
8021 }
8022
8023 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8024 {
8025 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
8026 sizeof(unsigned long),
8027 GFP_KERNEL);
8028 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
8029 h->nr_cmds * sizeof(*h->cmd_pool),
8030 &h->cmd_pool_dhandle, GFP_KERNEL);
8031 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
8032 h->nr_cmds * sizeof(*h->errinfo_pool),
8033 &h->errinfo_pool_dhandle, GFP_KERNEL);
8034 if ((h->cmd_pool_bits == NULL)
8035 || (h->cmd_pool == NULL)
8036 || (h->errinfo_pool == NULL)) {
8037 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8038 goto clean_up;
8039 }
8040 hpsa_preinitialize_commands(h);
8041 return 0;
8042 clean_up:
8043 hpsa_free_cmd_pool(h);
8044 return -ENOMEM;
8045 }
8046
8047 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8048 static void hpsa_free_irqs(struct ctlr_info *h)
8049 {
8050 int i;
8051 int irq_vector = 0;
8052
8053 if (hpsa_simple_mode)
8054 irq_vector = h->intr_mode;
8055
8056 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8057 /* Single reply queue, only one irq to free */
8058 free_irq(pci_irq_vector(h->pdev, irq_vector),
8059 &h->q[h->intr_mode]);
8060 h->q[h->intr_mode] = 0;
8061 return;
8062 }
8063
8064 for (i = 0; i < h->msix_vectors; i++) {
8065 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8066 h->q[i] = 0;
8067 }
8068 for (; i < MAX_REPLY_QUEUES; i++)
8069 h->q[i] = 0;
8070 }
8071
8072 /* returns 0 on success; cleans up and returns -Enn on error */
8073 static int hpsa_request_irqs(struct ctlr_info *h,
8074 irqreturn_t (*msixhandler)(int, void *),
8075 irqreturn_t (*intxhandler)(int, void *))
8076 {
8077 int rc, i;
8078 int irq_vector = 0;
8079
8080 if (hpsa_simple_mode)
8081 irq_vector = h->intr_mode;
8082
8083 /*
8084 * initialize h->q[x] = x so that interrupt handlers know which
8085 * queue to process.
8086 */
8087 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8088 h->q[i] = (u8) i;
8089
8090 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8091 /* If performant mode and MSI-X, use multiple reply queues */
8092 for (i = 0; i < h->msix_vectors; i++) {
8093 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8094 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8095 0, h->intrname[i],
8096 &h->q[i]);
8097 if (rc) {
8098 int j;
8099
8100 dev_err(&h->pdev->dev,
8101 "failed to get irq %d for %s\n",
8102 pci_irq_vector(h->pdev, i), h->devname);
8103 for (j = 0; j < i; j++) {
8104 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8105 h->q[j] = 0;
8106 }
8107 for (; j < MAX_REPLY_QUEUES; j++)
8108 h->q[j] = 0;
8109 return rc;
8110 }
8111 }
8112 } else {
8113 /* Use single reply pool */
8114 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8115 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8116 h->msix_vectors ? "x" : "");
8117 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8118 msixhandler, 0,
8119 h->intrname[0],
8120 &h->q[h->intr_mode]);
8121 } else {
8122 sprintf(h->intrname[h->intr_mode],
8123 "%s-intx", h->devname);
8124 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8125 intxhandler, IRQF_SHARED,
8126 h->intrname[0],
8127 &h->q[h->intr_mode]);
8128 }
8129 }
8130 if (rc) {
8131 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8132 pci_irq_vector(h->pdev, irq_vector), h->devname);
8133 hpsa_free_irqs(h);
8134 return -ENODEV;
8135 }
8136 return 0;
8137 }
8138
8139 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8140 {
8141 int rc;
8142 hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
8143
8144 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8145 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8146 if (rc) {
8147 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8148 return rc;
8149 }
8150
8151 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8152 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8153 if (rc) {
8154 dev_warn(&h->pdev->dev, "Board failed to become ready "
8155 "after soft reset.\n");
8156 return rc;
8157 }
8158
8159 return 0;
8160 }
8161
8162 static void hpsa_free_reply_queues(struct ctlr_info *h)
8163 {
8164 int i;
8165
8166 for (i = 0; i < h->nreply_queues; i++) {
8167 if (!h->reply_queue[i].head)
8168 continue;
8169 dma_free_coherent(&h->pdev->dev,
8170 h->reply_queue_size,
8171 h->reply_queue[i].head,
8172 h->reply_queue[i].busaddr);
8173 h->reply_queue[i].head = NULL;
8174 h->reply_queue[i].busaddr = 0;
8175 }
8176 h->reply_queue_size = 0;
8177 }
8178
8179 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8180 {
8181 hpsa_free_performant_mode(h); /* init_one 7 */
8182 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8183 hpsa_free_cmd_pool(h); /* init_one 5 */
8184 hpsa_free_irqs(h); /* init_one 4 */
8185 scsi_host_put(h->scsi_host); /* init_one 3 */
8186 h->scsi_host = NULL; /* init_one 3 */
8187 hpsa_free_pci_init(h); /* init_one 2_5 */
8188 free_percpu(h->lockup_detected); /* init_one 2 */
8189 h->lockup_detected = NULL; /* init_one 2 */
8190 if (h->resubmit_wq) {
8191 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8192 h->resubmit_wq = NULL;
8193 }
8194 if (h->rescan_ctlr_wq) {
8195 destroy_workqueue(h->rescan_ctlr_wq);
8196 h->rescan_ctlr_wq = NULL;
8197 }
8198 if (h->monitor_ctlr_wq) {
8199 destroy_workqueue(h->monitor_ctlr_wq);
8200 h->monitor_ctlr_wq = NULL;
8201 }
8202
8203 kfree(h); /* init_one 1 */
8204 }
8205
8206 /* Called when controller lockup detected. */
8207 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8208 {
8209 int i, refcount;
8210 struct CommandList *c;
8211 int failcount = 0;
8212
8213 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8214 for (i = 0; i < h->nr_cmds; i++) {
8215 c = h->cmd_pool + i;
8216 refcount = atomic_inc_return(&c->refcount);
8217 if (refcount > 1) {
8218 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8219 finish_cmd(c);
8220 atomic_dec(&h->commands_outstanding);
8221 failcount++;
8222 }
8223 cmd_free(h, c);
8224 }
8225 dev_warn(&h->pdev->dev,
8226 "failed %d commands in fail_all\n", failcount);
8227 }
8228
8229 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8230 {
8231 int cpu;
8232
8233 for_each_online_cpu(cpu) {
8234 u32 *lockup_detected;
8235 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8236 *lockup_detected = value;
8237 }
8238 wmb(); /* be sure the per-cpu variables are out to memory */
8239 }
8240
8241 static void controller_lockup_detected(struct ctlr_info *h)
8242 {
8243 unsigned long flags;
8244 u32 lockup_detected;
8245
8246 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8247 spin_lock_irqsave(&h->lock, flags);
8248 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8249 if (!lockup_detected) {
8250 /* no heartbeat, but controller gave us a zero. */
8251 dev_warn(&h->pdev->dev,
8252 "lockup detected after %d but scratchpad register is zero\n",
8253 h->heartbeat_sample_interval / HZ);
8254 lockup_detected = 0xffffffff;
8255 }
8256 set_lockup_detected_for_all_cpus(h, lockup_detected);
8257 spin_unlock_irqrestore(&h->lock, flags);
8258 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8259 lockup_detected, h->heartbeat_sample_interval / HZ);
8260 if (lockup_detected == 0xffff0000) {
8261 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8262 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8263 }
8264 pci_disable_device(h->pdev);
8265 fail_all_outstanding_cmds(h);
8266 }
8267
8268 static int detect_controller_lockup(struct ctlr_info *h)
8269 {
8270 u64 now;
8271 u32 heartbeat;
8272 unsigned long flags;
8273
8274 now = get_jiffies_64();
8275 /* If we've received an interrupt recently, we're ok. */
8276 if (time_after64(h->last_intr_timestamp +
8277 (h->heartbeat_sample_interval), now))
8278 return false;
8279
8280 /*
8281 * If we've already checked the heartbeat recently, we're ok.
8282 * This could happen if someone sends us a signal. We
8283 * otherwise don't care about signals in this thread.
8284 */
8285 if (time_after64(h->last_heartbeat_timestamp +
8286 (h->heartbeat_sample_interval), now))
8287 return false;
8288
8289 /* If heartbeat has not changed since we last looked, we're not ok. */
8290 spin_lock_irqsave(&h->lock, flags);
8291 heartbeat = readl(&h->cfgtable->HeartBeat);
8292 spin_unlock_irqrestore(&h->lock, flags);
8293 if (h->last_heartbeat == heartbeat) {
8294 controller_lockup_detected(h);
8295 return true;
8296 }
8297
8298 /* We're ok. */
8299 h->last_heartbeat = heartbeat;
8300 h->last_heartbeat_timestamp = now;
8301 return false;
8302 }
8303
8304 /*
8305 * Set ioaccel status for all ioaccel volumes.
8306 *
8307 * Called from monitor controller worker (hpsa_event_monitor_worker)
8308 *
8309 * A Volume (or Volumes that comprise an Array set) may be undergoing a
8310 * transformation, so we will be turning off ioaccel for all volumes that
8311 * make up the Array.
8312 */
8313 static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8314 {
8315 int rc;
8316 int i;
8317 u8 ioaccel_status;
8318 unsigned char *buf;
8319 struct hpsa_scsi_dev_t *device;
8320
8321 if (!h)
8322 return;
8323
8324 buf = kmalloc(64, GFP_KERNEL);
8325 if (!buf)
8326 return;
8327
8328 /*
8329 * Run through current device list used during I/O requests.
8330 */
8331 for (i = 0; i < h->ndevices; i++) {
8332 int offload_to_be_enabled = 0;
8333 int offload_config = 0;
8334
8335 device = h->dev[i];
8336
8337 if (!device)
8338 continue;
8339 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8340 HPSA_VPD_LV_IOACCEL_STATUS))
8341 continue;
8342
8343 memset(buf, 0, 64);
8344
8345 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8346 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8347 buf, 64);
8348 if (rc != 0)
8349 continue;
8350
8351 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8352
8353 /*
8354 * Check if offload is still configured on
8355 */
8356 offload_config =
8357 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8358 /*
8359 * If offload is configured on, check to see if ioaccel
8360 * needs to be enabled.
8361 */
8362 if (offload_config)
8363 offload_to_be_enabled =
8364 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8365
8366 /*
8367 * If ioaccel is to be re-enabled, re-enable later during the
8368 * scan operation so the driver can get a fresh raidmap
8369 * before turning ioaccel back on.
8370 */
8371 if (offload_to_be_enabled)
8372 continue;
8373
8374 /*
8375 * Immediately turn off ioaccel for any volume the
8376 * controller tells us to. Some of the reasons could be:
8377 * transformation - change to the LVs of an Array.
8378 * degraded volume - component failure
8379 */
8380 hpsa_turn_off_ioaccel_for_device(device);
8381 }
8382
8383 kfree(buf);
8384 }
8385
8386 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8387 {
8388 char *event_type;
8389
8390 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8391 return;
8392
8393 /* Ask the controller to clear the events we're handling. */
8394 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8395 | CFGTBL_Trans_io_accel2)) &&
8396 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8397 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8398
8399 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8400 event_type = "state change";
8401 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8402 event_type = "configuration change";
8403 /* Stop sending new RAID offload reqs via the IO accelerator */
8404 scsi_block_requests(h->scsi_host);
8405 hpsa_set_ioaccel_status(h);
8406 hpsa_drain_accel_commands(h);
8407 /* Set 'accelerator path config change' bit */
8408 dev_warn(&h->pdev->dev,
8409 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8410 h->events, event_type);
8411 writel(h->events, &(h->cfgtable->clear_event_notify));
8412 /* Set the "clear event notify field update" bit 6 */
8413 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8414 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8415 hpsa_wait_for_clear_event_notify_ack(h);
8416 scsi_unblock_requests(h->scsi_host);
8417 } else {
8418 /* Acknowledge controller notification events. */
8419 writel(h->events, &(h->cfgtable->clear_event_notify));
8420 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8421 hpsa_wait_for_clear_event_notify_ack(h);
8422 }
8423 return;
8424 }
8425
8426 /* Check a register on the controller to see if there are configuration
8427 * changes (added/changed/removed logical drives, etc.) which mean that
8428 * we should rescan the controller for devices.
8429 * Also check flag for driver-initiated rescan.
8430 */
8431 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8432 {
8433 if (h->drv_req_rescan) {
8434 h->drv_req_rescan = 0;
8435 return 1;
8436 }
8437
8438 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8439 return 0;
8440
8441 h->events = readl(&(h->cfgtable->event_notify));
8442 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8443 }
8444
8445 /*
8446 * Check if any of the offline devices have become ready
8447 */
8448 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8449 {
8450 unsigned long flags;
8451 struct offline_device_entry *d;
8452 struct list_head *this, *tmp;
8453
8454 spin_lock_irqsave(&h->offline_device_lock, flags);
8455 list_for_each_safe(this, tmp, &h->offline_device_list) {
8456 d = list_entry(this, struct offline_device_entry,
8457 offline_list);
8458 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8459 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8460 spin_lock_irqsave(&h->offline_device_lock, flags);
8461 list_del(&d->offline_list);
8462 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8463 return 1;
8464 }
8465 spin_lock_irqsave(&h->offline_device_lock, flags);
8466 }
8467 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8468 return 0;
8469 }
8470
8471 static int hpsa_luns_changed(struct ctlr_info *h)
8472 {
8473 int rc = 1; /* assume there are changes */
8474 struct ReportLUNdata *logdev = NULL;
8475
8476 /* if we can't find out if lun data has changed,
8477 * assume that it has.
8478 */
8479
8480 if (!h->lastlogicals)
8481 return rc;
8482
8483 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8484 if (!logdev)
8485 return rc;
8486
8487 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8488 dev_warn(&h->pdev->dev,
8489 "report luns failed, can't track lun changes.\n");
8490 goto out;
8491 }
8492 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8493 dev_info(&h->pdev->dev,
8494 "Lun changes detected.\n");
8495 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8496 goto out;
8497 } else
8498 rc = 0; /* no changes detected. */
8499 out:
8500 kfree(logdev);
8501 return rc;
8502 }
8503
8504 static void hpsa_perform_rescan(struct ctlr_info *h)
8505 {
8506 struct Scsi_Host *sh = NULL;
8507 unsigned long flags;
8508
8509 /*
8510 * Do the scan after the reset
8511 */
8512 spin_lock_irqsave(&h->reset_lock, flags);
8513 if (h->reset_in_progress) {
8514 h->drv_req_rescan = 1;
8515 spin_unlock_irqrestore(&h->reset_lock, flags);
8516 return;
8517 }
8518 spin_unlock_irqrestore(&h->reset_lock, flags);
8519
8520 sh = scsi_host_get(h->scsi_host);
8521 if (sh != NULL) {
8522 hpsa_scan_start(sh);
8523 scsi_host_put(sh);
8524 h->drv_req_rescan = 0;
8525 }
8526 }
8527
8528 /*
8529 * watch for controller events
8530 */
8531 static void hpsa_event_monitor_worker(struct work_struct *work)
8532 {
8533 struct ctlr_info *h = container_of(to_delayed_work(work),
8534 struct ctlr_info, event_monitor_work);
8535 unsigned long flags;
8536
8537 spin_lock_irqsave(&h->lock, flags);
8538 if (h->remove_in_progress) {
8539 spin_unlock_irqrestore(&h->lock, flags);
8540 return;
8541 }
8542 spin_unlock_irqrestore(&h->lock, flags);
8543
8544 if (hpsa_ctlr_needs_rescan(h)) {
8545 hpsa_ack_ctlr_events(h);
8546 hpsa_perform_rescan(h);
8547 }
8548
8549 spin_lock_irqsave(&h->lock, flags);
8550 if (!h->remove_in_progress)
8551 queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
8552 HPSA_EVENT_MONITOR_INTERVAL);
8553 spin_unlock_irqrestore(&h->lock, flags);
8554 }
8555
8556 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8557 {
8558 unsigned long flags;
8559 struct ctlr_info *h = container_of(to_delayed_work(work),
8560 struct ctlr_info, rescan_ctlr_work);
8561
8562 spin_lock_irqsave(&h->lock, flags);
8563 if (h->remove_in_progress) {
8564 spin_unlock_irqrestore(&h->lock, flags);
8565 return;
8566 }
8567 spin_unlock_irqrestore(&h->lock, flags);
8568
8569 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8570 hpsa_perform_rescan(h);
8571 } else if (h->discovery_polling) {
8572 if (hpsa_luns_changed(h)) {
8573 dev_info(&h->pdev->dev,
8574 "driver discovery polling rescan.\n");
8575 hpsa_perform_rescan(h);
8576 }
8577 }
8578 spin_lock_irqsave(&h->lock, flags);
8579 if (!h->remove_in_progress)
8580 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8581 h->heartbeat_sample_interval);
8582 spin_unlock_irqrestore(&h->lock, flags);
8583 }
8584
8585 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8586 {
8587 unsigned long flags;
8588 struct ctlr_info *h = container_of(to_delayed_work(work),
8589 struct ctlr_info, monitor_ctlr_work);
8590
8591 detect_controller_lockup(h);
8592 if (lockup_detected(h))
8593 return;
8594
8595 spin_lock_irqsave(&h->lock, flags);
8596 if (!h->remove_in_progress)
8597 queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
8598 h->heartbeat_sample_interval);
8599 spin_unlock_irqrestore(&h->lock, flags);
8600 }
8601
8602 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8603 char *name)
8604 {
8605 struct workqueue_struct *wq = NULL;
8606
8607 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8608 if (!wq)
8609 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8610
8611 return wq;
8612 }
8613
8614 static void hpda_free_ctlr_info(struct ctlr_info *h)
8615 {
8616 kfree(h->reply_map);
8617 kfree(h);
8618 }
8619
8620 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8621 {
8622 struct ctlr_info *h;
8623
8624 h = kzalloc(sizeof(*h), GFP_KERNEL);
8625 if (!h)
8626 return NULL;
8627
8628 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8629 if (!h->reply_map) {
8630 kfree(h);
8631 return NULL;
8632 }
8633 return h;
8634 }
8635
8636 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8637 {
8638 int dac, rc;
8639 struct ctlr_info *h;
8640 int try_soft_reset = 0;
8641 unsigned long flags;
8642 u32 board_id;
8643
8644 if (number_of_controllers == 0)
8645 printk(KERN_INFO DRIVER_NAME "\n");
8646
8647 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8648 if (rc < 0) {
8649 dev_warn(&pdev->dev, "Board ID not found\n");
8650 return rc;
8651 }
8652
8653 rc = hpsa_init_reset_devices(pdev, board_id);
8654 if (rc) {
8655 if (rc != -ENOTSUPP)
8656 return rc;
8657 /* If the reset fails in a particular way (it has no way to do
8658 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8659 * a soft reset once we get the controller configured up to the
8660 * point that it can accept a command.
8661 */
8662 try_soft_reset = 1;
8663 rc = 0;
8664 }
8665
8666 reinit_after_soft_reset:
8667
8668 /* Command structures must be aligned on a 32-byte boundary because
8669 * the 5 lower bits of the address are used by the hardware. and by
8670 * the driver. See comments in hpsa.h for more info.
8671 */
8672 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8673 h = hpda_alloc_ctlr_info();
8674 if (!h) {
8675 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8676 return -ENOMEM;
8677 }
8678
8679 h->pdev = pdev;
8680
8681 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8682 INIT_LIST_HEAD(&h->offline_device_list);
8683 spin_lock_init(&h->lock);
8684 spin_lock_init(&h->offline_device_lock);
8685 spin_lock_init(&h->scan_lock);
8686 spin_lock_init(&h->reset_lock);
8687 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8688
8689 /* Allocate and clear per-cpu variable lockup_detected */
8690 h->lockup_detected = alloc_percpu(u32);
8691 if (!h->lockup_detected) {
8692 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8693 rc = -ENOMEM;
8694 goto clean1; /* aer/h */
8695 }
8696 set_lockup_detected_for_all_cpus(h, 0);
8697
8698 rc = hpsa_pci_init(h);
8699 if (rc)
8700 goto clean2; /* lu, aer/h */
8701
8702 /* relies on h-> settings made by hpsa_pci_init, including
8703 * interrupt_mode h->intr */
8704 rc = hpsa_scsi_host_alloc(h);
8705 if (rc)
8706 goto clean2_5; /* pci, lu, aer/h */
8707
8708 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8709 h->ctlr = number_of_controllers;
8710 number_of_controllers++;
8711
8712 /* configure PCI DMA stuff */
8713 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8714 if (rc == 0) {
8715 dac = 1;
8716 } else {
8717 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8718 if (rc == 0) {
8719 dac = 0;
8720 } else {
8721 dev_err(&pdev->dev, "no suitable DMA available\n");
8722 goto clean3; /* shost, pci, lu, aer/h */
8723 }
8724 }
8725
8726 /* make sure the board interrupts are off */
8727 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8728
8729 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8730 if (rc)
8731 goto clean3; /* shost, pci, lu, aer/h */
8732 rc = hpsa_alloc_cmd_pool(h);
8733 if (rc)
8734 goto clean4; /* irq, shost, pci, lu, aer/h */
8735 rc = hpsa_alloc_sg_chain_blocks(h);
8736 if (rc)
8737 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8738 init_waitqueue_head(&h->scan_wait_queue);
8739 init_waitqueue_head(&h->event_sync_wait_queue);
8740 mutex_init(&h->reset_mutex);
8741 h->scan_finished = 1; /* no scan currently in progress */
8742 h->scan_waiting = 0;
8743
8744 pci_set_drvdata(pdev, h);
8745 h->ndevices = 0;
8746
8747 spin_lock_init(&h->devlock);
8748 rc = hpsa_put_ctlr_into_performant_mode(h);
8749 if (rc)
8750 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8751
8752 /* create the resubmit workqueue */
8753 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8754 if (!h->rescan_ctlr_wq) {
8755 rc = -ENOMEM;
8756 goto clean7;
8757 }
8758
8759 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8760 if (!h->resubmit_wq) {
8761 rc = -ENOMEM;
8762 goto clean7; /* aer/h */
8763 }
8764
8765 h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
8766 if (!h->monitor_ctlr_wq) {
8767 rc = -ENOMEM;
8768 goto clean7;
8769 }
8770
8771 /*
8772 * At this point, the controller is ready to take commands.
8773 * Now, if reset_devices and the hard reset didn't work, try
8774 * the soft reset and see if that works.
8775 */
8776 if (try_soft_reset) {
8777
8778 /* This is kind of gross. We may or may not get a completion
8779 * from the soft reset command, and if we do, then the value
8780 * from the fifo may or may not be valid. So, we wait 10 secs
8781 * after the reset throwing away any completions we get during
8782 * that time. Unregister the interrupt handler and register
8783 * fake ones to scoop up any residual completions.
8784 */
8785 spin_lock_irqsave(&h->lock, flags);
8786 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8787 spin_unlock_irqrestore(&h->lock, flags);
8788 hpsa_free_irqs(h);
8789 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8790 hpsa_intx_discard_completions);
8791 if (rc) {
8792 dev_warn(&h->pdev->dev,
8793 "Failed to request_irq after soft reset.\n");
8794 /*
8795 * cannot goto clean7 or free_irqs will be called
8796 * again. Instead, do its work
8797 */
8798 hpsa_free_performant_mode(h); /* clean7 */
8799 hpsa_free_sg_chain_blocks(h); /* clean6 */
8800 hpsa_free_cmd_pool(h); /* clean5 */
8801 /*
8802 * skip hpsa_free_irqs(h) clean4 since that
8803 * was just called before request_irqs failed
8804 */
8805 goto clean3;
8806 }
8807
8808 rc = hpsa_kdump_soft_reset(h);
8809 if (rc)
8810 /* Neither hard nor soft reset worked, we're hosed. */
8811 goto clean7;
8812
8813 dev_info(&h->pdev->dev, "Board READY.\n");
8814 dev_info(&h->pdev->dev,
8815 "Waiting for stale completions to drain.\n");
8816 h->access.set_intr_mask(h, HPSA_INTR_ON);
8817 msleep(10000);
8818 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8819
8820 rc = controller_reset_failed(h->cfgtable);
8821 if (rc)
8822 dev_info(&h->pdev->dev,
8823 "Soft reset appears to have failed.\n");
8824
8825 /* since the controller's reset, we have to go back and re-init
8826 * everything. Easiest to just forget what we've done and do it
8827 * all over again.
8828 */
8829 hpsa_undo_allocations_after_kdump_soft_reset(h);
8830 try_soft_reset = 0;
8831 if (rc)
8832 /* don't goto clean, we already unallocated */
8833 return -ENODEV;
8834
8835 goto reinit_after_soft_reset;
8836 }
8837
8838 /* Enable Accelerated IO path at driver layer */
8839 h->acciopath_status = 1;
8840 /* Disable discovery polling.*/
8841 h->discovery_polling = 0;
8842
8843
8844 /* Turn the interrupts on so we can service requests */
8845 h->access.set_intr_mask(h, HPSA_INTR_ON);
8846
8847 hpsa_hba_inquiry(h);
8848
8849 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8850 if (!h->lastlogicals)
8851 dev_info(&h->pdev->dev,
8852 "Can't track change to report lun data\n");
8853
8854 /* hook into SCSI subsystem */
8855 rc = hpsa_scsi_add_host(h);
8856 if (rc)
8857 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8858
8859 /* Monitor the controller for firmware lockups */
8860 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8861 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8862 schedule_delayed_work(&h->monitor_ctlr_work,
8863 h->heartbeat_sample_interval);
8864 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8865 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8866 h->heartbeat_sample_interval);
8867 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8868 schedule_delayed_work(&h->event_monitor_work,
8869 HPSA_EVENT_MONITOR_INTERVAL);
8870 return 0;
8871
8872 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8873 hpsa_free_performant_mode(h);
8874 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8875 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8876 hpsa_free_sg_chain_blocks(h);
8877 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8878 hpsa_free_cmd_pool(h);
8879 clean4: /* irq, shost, pci, lu, aer/h */
8880 hpsa_free_irqs(h);
8881 clean3: /* shost, pci, lu, aer/h */
8882 scsi_host_put(h->scsi_host);
8883 h->scsi_host = NULL;
8884 clean2_5: /* pci, lu, aer/h */
8885 hpsa_free_pci_init(h);
8886 clean2: /* lu, aer/h */
8887 if (h->lockup_detected) {
8888 free_percpu(h->lockup_detected);
8889 h->lockup_detected = NULL;
8890 }
8891 clean1: /* wq/aer/h */
8892 if (h->resubmit_wq) {
8893 destroy_workqueue(h->resubmit_wq);
8894 h->resubmit_wq = NULL;
8895 }
8896 if (h->rescan_ctlr_wq) {
8897 destroy_workqueue(h->rescan_ctlr_wq);
8898 h->rescan_ctlr_wq = NULL;
8899 }
8900 if (h->monitor_ctlr_wq) {
8901 destroy_workqueue(h->monitor_ctlr_wq);
8902 h->monitor_ctlr_wq = NULL;
8903 }
8904 kfree(h);
8905 return rc;
8906 }
8907
8908 static void hpsa_flush_cache(struct ctlr_info *h)
8909 {
8910 char *flush_buf;
8911 struct CommandList *c;
8912 int rc;
8913
8914 if (unlikely(lockup_detected(h)))
8915 return;
8916 flush_buf = kzalloc(4, GFP_KERNEL);
8917 if (!flush_buf)
8918 return;
8919
8920 c = cmd_alloc(h);
8921
8922 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8923 RAID_CTLR_LUNID, TYPE_CMD)) {
8924 goto out;
8925 }
8926 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8927 DEFAULT_TIMEOUT);
8928 if (rc)
8929 goto out;
8930 if (c->err_info->CommandStatus != 0)
8931 out:
8932 dev_warn(&h->pdev->dev,
8933 "error flushing cache on controller\n");
8934 cmd_free(h, c);
8935 kfree(flush_buf);
8936 }
8937
8938 /* Make controller gather fresh report lun data each time we
8939 * send down a report luns request
8940 */
8941 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8942 {
8943 u32 *options;
8944 struct CommandList *c;
8945 int rc;
8946
8947 /* Don't bother trying to set diag options if locked up */
8948 if (unlikely(h->lockup_detected))
8949 return;
8950
8951 options = kzalloc(sizeof(*options), GFP_KERNEL);
8952 if (!options)
8953 return;
8954
8955 c = cmd_alloc(h);
8956
8957 /* first, get the current diag options settings */
8958 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8959 RAID_CTLR_LUNID, TYPE_CMD))
8960 goto errout;
8961
8962 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8963 NO_TIMEOUT);
8964 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8965 goto errout;
8966
8967 /* Now, set the bit for disabling the RLD caching */
8968 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8969
8970 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8971 RAID_CTLR_LUNID, TYPE_CMD))
8972 goto errout;
8973
8974 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8975 NO_TIMEOUT);
8976 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8977 goto errout;
8978
8979 /* Now verify that it got set: */
8980 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8981 RAID_CTLR_LUNID, TYPE_CMD))
8982 goto errout;
8983
8984 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8985 NO_TIMEOUT);
8986 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8987 goto errout;
8988
8989 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8990 goto out;
8991
8992 errout:
8993 dev_err(&h->pdev->dev,
8994 "Error: failed to disable report lun data caching.\n");
8995 out:
8996 cmd_free(h, c);
8997 kfree(options);
8998 }
8999
9000 static void __hpsa_shutdown(struct pci_dev *pdev)
9001 {
9002 struct ctlr_info *h;
9003
9004 h = pci_get_drvdata(pdev);
9005 /* Turn board interrupts off and send the flush cache command
9006 * sendcmd will turn off interrupt, and send the flush...
9007 * To write all data in the battery backed cache to disks
9008 */
9009 hpsa_flush_cache(h);
9010 h->access.set_intr_mask(h, HPSA_INTR_OFF);
9011 hpsa_free_irqs(h); /* init_one 4 */
9012 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
9013 }
9014
9015 static void hpsa_shutdown(struct pci_dev *pdev)
9016 {
9017 __hpsa_shutdown(pdev);
9018 pci_disable_device(pdev);
9019 }
9020
9021 static void hpsa_free_device_info(struct ctlr_info *h)
9022 {
9023 int i;
9024
9025 for (i = 0; i < h->ndevices; i++) {
9026 kfree(h->dev[i]);
9027 h->dev[i] = NULL;
9028 }
9029 }
9030
9031 static void hpsa_remove_one(struct pci_dev *pdev)
9032 {
9033 struct ctlr_info *h;
9034 unsigned long flags;
9035
9036 if (pci_get_drvdata(pdev) == NULL) {
9037 dev_err(&pdev->dev, "unable to remove device\n");
9038 return;
9039 }
9040 h = pci_get_drvdata(pdev);
9041
9042 /* Get rid of any controller monitoring work items */
9043 spin_lock_irqsave(&h->lock, flags);
9044 h->remove_in_progress = 1;
9045 spin_unlock_irqrestore(&h->lock, flags);
9046 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9047 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9048 cancel_delayed_work_sync(&h->event_monitor_work);
9049 destroy_workqueue(h->rescan_ctlr_wq);
9050 destroy_workqueue(h->resubmit_wq);
9051 destroy_workqueue(h->monitor_ctlr_wq);
9052
9053 hpsa_delete_sas_host(h);
9054
9055 /*
9056 * Call before disabling interrupts.
9057 * scsi_remove_host can trigger I/O operations especially
9058 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9059 * operations which cannot complete and will hang the system.
9060 */
9061 if (h->scsi_host)
9062 scsi_remove_host(h->scsi_host); /* init_one 8 */
9063 /* includes hpsa_free_irqs - init_one 4 */
9064 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9065 __hpsa_shutdown(pdev);
9066
9067 hpsa_free_device_info(h); /* scan */
9068
9069 kfree(h->hba_inquiry_data); /* init_one 10 */
9070 h->hba_inquiry_data = NULL; /* init_one 10 */
9071 hpsa_free_ioaccel2_sg_chain_blocks(h);
9072 hpsa_free_performant_mode(h); /* init_one 7 */
9073 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
9074 hpsa_free_cmd_pool(h); /* init_one 5 */
9075 kfree(h->lastlogicals);
9076
9077 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9078
9079 scsi_host_put(h->scsi_host); /* init_one 3 */
9080 h->scsi_host = NULL; /* init_one 3 */
9081
9082 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9083 hpsa_free_pci_init(h); /* init_one 2.5 */
9084
9085 free_percpu(h->lockup_detected); /* init_one 2 */
9086 h->lockup_detected = NULL; /* init_one 2 */
9087 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
9088
9089 hpda_free_ctlr_info(h); /* init_one 1 */
9090 }
9091
9092 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9093 __attribute__((unused)) pm_message_t state)
9094 {
9095 return -ENOSYS;
9096 }
9097
9098 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9099 {
9100 return -ENOSYS;
9101 }
9102
9103 static struct pci_driver hpsa_pci_driver = {
9104 .name = HPSA,
9105 .probe = hpsa_init_one,
9106 .remove = hpsa_remove_one,
9107 .id_table = hpsa_pci_device_id, /* id_table */
9108 .shutdown = hpsa_shutdown,
9109 .suspend = hpsa_suspend,
9110 .resume = hpsa_resume,
9111 };
9112
9113 /* Fill in bucket_map[], given nsgs (the max number of
9114 * scatter gather elements supported) and bucket[],
9115 * which is an array of 8 integers. The bucket[] array
9116 * contains 8 different DMA transfer sizes (in 16
9117 * byte increments) which the controller uses to fetch
9118 * commands. This function fills in bucket_map[], which
9119 * maps a given number of scatter gather elements to one of
9120 * the 8 DMA transfer sizes. The point of it is to allow the
9121 * controller to only do as much DMA as needed to fetch the
9122 * command, with the DMA transfer size encoded in the lower
9123 * bits of the command address.
9124 */
9125 static void calc_bucket_map(int bucket[], int num_buckets,
9126 int nsgs, int min_blocks, u32 *bucket_map)
9127 {
9128 int i, j, b, size;
9129
9130 /* Note, bucket_map must have nsgs+1 entries. */
9131 for (i = 0; i <= nsgs; i++) {
9132 /* Compute size of a command with i SG entries */
9133 size = i + min_blocks;
9134 b = num_buckets; /* Assume the biggest bucket */
9135 /* Find the bucket that is just big enough */
9136 for (j = 0; j < num_buckets; j++) {
9137 if (bucket[j] >= size) {
9138 b = j;
9139 break;
9140 }
9141 }
9142 /* for a command with i SG entries, use bucket b. */
9143 bucket_map[i] = b;
9144 }
9145 }
9146
9147 /*
9148 * return -ENODEV on err, 0 on success (or no action)
9149 * allocates numerous items that must be freed later
9150 */
9151 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9152 {
9153 int i;
9154 unsigned long register_value;
9155 unsigned long transMethod = CFGTBL_Trans_Performant |
9156 (trans_support & CFGTBL_Trans_use_short_tags) |
9157 CFGTBL_Trans_enable_directed_msix |
9158 (trans_support & (CFGTBL_Trans_io_accel1 |
9159 CFGTBL_Trans_io_accel2));
9160 struct access_method access = SA5_performant_access;
9161
9162 /* This is a bit complicated. There are 8 registers on
9163 * the controller which we write to to tell it 8 different
9164 * sizes of commands which there may be. It's a way of
9165 * reducing the DMA done to fetch each command. Encoded into
9166 * each command's tag are 3 bits which communicate to the controller
9167 * which of the eight sizes that command fits within. The size of
9168 * each command depends on how many scatter gather entries there are.
9169 * Each SG entry requires 16 bytes. The eight registers are programmed
9170 * with the number of 16-byte blocks a command of that size requires.
9171 * The smallest command possible requires 5 such 16 byte blocks.
9172 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9173 * blocks. Note, this only extends to the SG entries contained
9174 * within the command block, and does not extend to chained blocks
9175 * of SG elements. bft[] contains the eight values we write to
9176 * the registers. They are not evenly distributed, but have more
9177 * sizes for small commands, and fewer sizes for larger commands.
9178 */
9179 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9180 #define MIN_IOACCEL2_BFT_ENTRY 5
9181 #define HPSA_IOACCEL2_HEADER_SZ 4
9182 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9183 13, 14, 15, 16, 17, 18, 19,
9184 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9185 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9186 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9187 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9188 16 * MIN_IOACCEL2_BFT_ENTRY);
9189 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9190 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9191 /* 5 = 1 s/g entry or 4k
9192 * 6 = 2 s/g entry or 8k
9193 * 8 = 4 s/g entry or 16k
9194 * 10 = 6 s/g entry or 24k
9195 */
9196
9197 /* If the controller supports either ioaccel method then
9198 * we can also use the RAID stack submit path that does not
9199 * perform the superfluous readl() after each command submission.
9200 */
9201 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9202 access = SA5_performant_access_no_read;
9203
9204 /* Controller spec: zero out this buffer. */
9205 for (i = 0; i < h->nreply_queues; i++)
9206 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9207
9208 bft[7] = SG_ENTRIES_IN_CMD + 4;
9209 calc_bucket_map(bft, ARRAY_SIZE(bft),
9210 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9211 for (i = 0; i < 8; i++)
9212 writel(bft[i], &h->transtable->BlockFetch[i]);
9213
9214 /* size of controller ring buffer */
9215 writel(h->max_commands, &h->transtable->RepQSize);
9216 writel(h->nreply_queues, &h->transtable->RepQCount);
9217 writel(0, &h->transtable->RepQCtrAddrLow32);
9218 writel(0, &h->transtable->RepQCtrAddrHigh32);
9219
9220 for (i = 0; i < h->nreply_queues; i++) {
9221 writel(0, &h->transtable->RepQAddr[i].upper);
9222 writel(h->reply_queue[i].busaddr,
9223 &h->transtable->RepQAddr[i].lower);
9224 }
9225
9226 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9227 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9228 /*
9229 * enable outbound interrupt coalescing in accelerator mode;
9230 */
9231 if (trans_support & CFGTBL_Trans_io_accel1) {
9232 access = SA5_ioaccel_mode1_access;
9233 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9234 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9235 } else
9236 if (trans_support & CFGTBL_Trans_io_accel2)
9237 access = SA5_ioaccel_mode2_access;
9238 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9239 if (hpsa_wait_for_mode_change_ack(h)) {
9240 dev_err(&h->pdev->dev,
9241 "performant mode problem - doorbell timeout\n");
9242 return -ENODEV;
9243 }
9244 register_value = readl(&(h->cfgtable->TransportActive));
9245 if (!(register_value & CFGTBL_Trans_Performant)) {
9246 dev_err(&h->pdev->dev,
9247 "performant mode problem - transport not active\n");
9248 return -ENODEV;
9249 }
9250 /* Change the access methods to the performant access methods */
9251 h->access = access;
9252 h->transMethod = transMethod;
9253
9254 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9255 (trans_support & CFGTBL_Trans_io_accel2)))
9256 return 0;
9257
9258 if (trans_support & CFGTBL_Trans_io_accel1) {
9259 /* Set up I/O accelerator mode */
9260 for (i = 0; i < h->nreply_queues; i++) {
9261 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9262 h->reply_queue[i].current_entry =
9263 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9264 }
9265 bft[7] = h->ioaccel_maxsg + 8;
9266 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9267 h->ioaccel1_blockFetchTable);
9268
9269 /* initialize all reply queue entries to unused */
9270 for (i = 0; i < h->nreply_queues; i++)
9271 memset(h->reply_queue[i].head,
9272 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9273 h->reply_queue_size);
9274
9275 /* set all the constant fields in the accelerator command
9276 * frames once at init time to save CPU cycles later.
9277 */
9278 for (i = 0; i < h->nr_cmds; i++) {
9279 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9280
9281 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9282 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9283 (i * sizeof(struct ErrorInfo)));
9284 cp->err_info_len = sizeof(struct ErrorInfo);
9285 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9286 cp->host_context_flags =
9287 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9288 cp->timeout_sec = 0;
9289 cp->ReplyQueue = 0;
9290 cp->tag =
9291 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9292 cp->host_addr =
9293 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9294 (i * sizeof(struct io_accel1_cmd)));
9295 }
9296 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9297 u64 cfg_offset, cfg_base_addr_index;
9298 u32 bft2_offset, cfg_base_addr;
9299 int rc;
9300
9301 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9302 &cfg_base_addr_index, &cfg_offset);
9303 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9304 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9305 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9306 4, h->ioaccel2_blockFetchTable);
9307 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9308 BUILD_BUG_ON(offsetof(struct CfgTable,
9309 io_accel_request_size_offset) != 0xb8);
9310 h->ioaccel2_bft2_regs =
9311 remap_pci_mem(pci_resource_start(h->pdev,
9312 cfg_base_addr_index) +
9313 cfg_offset + bft2_offset,
9314 ARRAY_SIZE(bft2) *
9315 sizeof(*h->ioaccel2_bft2_regs));
9316 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9317 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9318 }
9319 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9320 if (hpsa_wait_for_mode_change_ack(h)) {
9321 dev_err(&h->pdev->dev,
9322 "performant mode problem - enabling ioaccel mode\n");
9323 return -ENODEV;
9324 }
9325 return 0;
9326 }
9327
9328 /* Free ioaccel1 mode command blocks and block fetch table */
9329 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9330 {
9331 if (h->ioaccel_cmd_pool) {
9332 pci_free_consistent(h->pdev,
9333 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9334 h->ioaccel_cmd_pool,
9335 h->ioaccel_cmd_pool_dhandle);
9336 h->ioaccel_cmd_pool = NULL;
9337 h->ioaccel_cmd_pool_dhandle = 0;
9338 }
9339 kfree(h->ioaccel1_blockFetchTable);
9340 h->ioaccel1_blockFetchTable = NULL;
9341 }
9342
9343 /* Allocate ioaccel1 mode command blocks and block fetch table */
9344 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9345 {
9346 h->ioaccel_maxsg =
9347 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9348 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9349 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9350
9351 /* Command structures must be aligned on a 128-byte boundary
9352 * because the 7 lower bits of the address are used by the
9353 * hardware.
9354 */
9355 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9356 IOACCEL1_COMMANDLIST_ALIGNMENT);
9357 h->ioaccel_cmd_pool =
9358 dma_alloc_coherent(&h->pdev->dev,
9359 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9360 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9361
9362 h->ioaccel1_blockFetchTable =
9363 kmalloc(((h->ioaccel_maxsg + 1) *
9364 sizeof(u32)), GFP_KERNEL);
9365
9366 if ((h->ioaccel_cmd_pool == NULL) ||
9367 (h->ioaccel1_blockFetchTable == NULL))
9368 goto clean_up;
9369
9370 memset(h->ioaccel_cmd_pool, 0,
9371 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9372 return 0;
9373
9374 clean_up:
9375 hpsa_free_ioaccel1_cmd_and_bft(h);
9376 return -ENOMEM;
9377 }
9378
9379 /* Free ioaccel2 mode command blocks and block fetch table */
9380 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9381 {
9382 hpsa_free_ioaccel2_sg_chain_blocks(h);
9383
9384 if (h->ioaccel2_cmd_pool) {
9385 pci_free_consistent(h->pdev,
9386 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9387 h->ioaccel2_cmd_pool,
9388 h->ioaccel2_cmd_pool_dhandle);
9389 h->ioaccel2_cmd_pool = NULL;
9390 h->ioaccel2_cmd_pool_dhandle = 0;
9391 }
9392 kfree(h->ioaccel2_blockFetchTable);
9393 h->ioaccel2_blockFetchTable = NULL;
9394 }
9395
9396 /* Allocate ioaccel2 mode command blocks and block fetch table */
9397 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9398 {
9399 int rc;
9400
9401 /* Allocate ioaccel2 mode command blocks and block fetch table */
9402
9403 h->ioaccel_maxsg =
9404 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9405 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9406 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9407
9408 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9409 IOACCEL2_COMMANDLIST_ALIGNMENT);
9410 h->ioaccel2_cmd_pool =
9411 dma_alloc_coherent(&h->pdev->dev,
9412 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9413 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9414
9415 h->ioaccel2_blockFetchTable =
9416 kmalloc(((h->ioaccel_maxsg + 1) *
9417 sizeof(u32)), GFP_KERNEL);
9418
9419 if ((h->ioaccel2_cmd_pool == NULL) ||
9420 (h->ioaccel2_blockFetchTable == NULL)) {
9421 rc = -ENOMEM;
9422 goto clean_up;
9423 }
9424
9425 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9426 if (rc)
9427 goto clean_up;
9428
9429 memset(h->ioaccel2_cmd_pool, 0,
9430 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9431 return 0;
9432
9433 clean_up:
9434 hpsa_free_ioaccel2_cmd_and_bft(h);
9435 return rc;
9436 }
9437
9438 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9439 static void hpsa_free_performant_mode(struct ctlr_info *h)
9440 {
9441 kfree(h->blockFetchTable);
9442 h->blockFetchTable = NULL;
9443 hpsa_free_reply_queues(h);
9444 hpsa_free_ioaccel1_cmd_and_bft(h);
9445 hpsa_free_ioaccel2_cmd_and_bft(h);
9446 }
9447
9448 /* return -ENODEV on error, 0 on success (or no action)
9449 * allocates numerous items that must be freed later
9450 */
9451 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9452 {
9453 u32 trans_support;
9454 unsigned long transMethod = CFGTBL_Trans_Performant |
9455 CFGTBL_Trans_use_short_tags;
9456 int i, rc;
9457
9458 if (hpsa_simple_mode)
9459 return 0;
9460
9461 trans_support = readl(&(h->cfgtable->TransportSupport));
9462 if (!(trans_support & PERFORMANT_MODE))
9463 return 0;
9464
9465 /* Check for I/O accelerator mode support */
9466 if (trans_support & CFGTBL_Trans_io_accel1) {
9467 transMethod |= CFGTBL_Trans_io_accel1 |
9468 CFGTBL_Trans_enable_directed_msix;
9469 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9470 if (rc)
9471 return rc;
9472 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9473 transMethod |= CFGTBL_Trans_io_accel2 |
9474 CFGTBL_Trans_enable_directed_msix;
9475 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9476 if (rc)
9477 return rc;
9478 }
9479
9480 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9481 hpsa_get_max_perf_mode_cmds(h);
9482 /* Performant mode ring buffer and supporting data structures */
9483 h->reply_queue_size = h->max_commands * sizeof(u64);
9484
9485 for (i = 0; i < h->nreply_queues; i++) {
9486 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9487 h->reply_queue_size,
9488 &h->reply_queue[i].busaddr,
9489 GFP_KERNEL);
9490 if (!h->reply_queue[i].head) {
9491 rc = -ENOMEM;
9492 goto clean1; /* rq, ioaccel */
9493 }
9494 h->reply_queue[i].size = h->max_commands;
9495 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9496 h->reply_queue[i].current_entry = 0;
9497 }
9498
9499 /* Need a block fetch table for performant mode */
9500 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9501 sizeof(u32)), GFP_KERNEL);
9502 if (!h->blockFetchTable) {
9503 rc = -ENOMEM;
9504 goto clean1; /* rq, ioaccel */
9505 }
9506
9507 rc = hpsa_enter_performant_mode(h, trans_support);
9508 if (rc)
9509 goto clean2; /* bft, rq, ioaccel */
9510 return 0;
9511
9512 clean2: /* bft, rq, ioaccel */
9513 kfree(h->blockFetchTable);
9514 h->blockFetchTable = NULL;
9515 clean1: /* rq, ioaccel */
9516 hpsa_free_reply_queues(h);
9517 hpsa_free_ioaccel1_cmd_and_bft(h);
9518 hpsa_free_ioaccel2_cmd_and_bft(h);
9519 return rc;
9520 }
9521
9522 static int is_accelerated_cmd(struct CommandList *c)
9523 {
9524 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9525 }
9526
9527 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9528 {
9529 struct CommandList *c = NULL;
9530 int i, accel_cmds_out;
9531 int refcount;
9532
9533 do { /* wait for all outstanding ioaccel commands to drain out */
9534 accel_cmds_out = 0;
9535 for (i = 0; i < h->nr_cmds; i++) {
9536 c = h->cmd_pool + i;
9537 refcount = atomic_inc_return(&c->refcount);
9538 if (refcount > 1) /* Command is allocated */
9539 accel_cmds_out += is_accelerated_cmd(c);
9540 cmd_free(h, c);
9541 }
9542 if (accel_cmds_out <= 0)
9543 break;
9544 msleep(100);
9545 } while (1);
9546 }
9547
9548 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9549 struct hpsa_sas_port *hpsa_sas_port)
9550 {
9551 struct hpsa_sas_phy *hpsa_sas_phy;
9552 struct sas_phy *phy;
9553
9554 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9555 if (!hpsa_sas_phy)
9556 return NULL;
9557
9558 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9559 hpsa_sas_port->next_phy_index);
9560 if (!phy) {
9561 kfree(hpsa_sas_phy);
9562 return NULL;
9563 }
9564
9565 hpsa_sas_port->next_phy_index++;
9566 hpsa_sas_phy->phy = phy;
9567 hpsa_sas_phy->parent_port = hpsa_sas_port;
9568
9569 return hpsa_sas_phy;
9570 }
9571
9572 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9573 {
9574 struct sas_phy *phy = hpsa_sas_phy->phy;
9575
9576 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9577 if (hpsa_sas_phy->added_to_port)
9578 list_del(&hpsa_sas_phy->phy_list_entry);
9579 sas_phy_delete(phy);
9580 kfree(hpsa_sas_phy);
9581 }
9582
9583 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9584 {
9585 int rc;
9586 struct hpsa_sas_port *hpsa_sas_port;
9587 struct sas_phy *phy;
9588 struct sas_identify *identify;
9589
9590 hpsa_sas_port = hpsa_sas_phy->parent_port;
9591 phy = hpsa_sas_phy->phy;
9592
9593 identify = &phy->identify;
9594 memset(identify, 0, sizeof(*identify));
9595 identify->sas_address = hpsa_sas_port->sas_address;
9596 identify->device_type = SAS_END_DEVICE;
9597 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9598 identify->target_port_protocols = SAS_PROTOCOL_STP;
9599 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9600 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9601 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9602 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9603 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9604
9605 rc = sas_phy_add(hpsa_sas_phy->phy);
9606 if (rc)
9607 return rc;
9608
9609 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9610 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9611 &hpsa_sas_port->phy_list_head);
9612 hpsa_sas_phy->added_to_port = true;
9613
9614 return 0;
9615 }
9616
9617 static int
9618 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9619 struct sas_rphy *rphy)
9620 {
9621 struct sas_identify *identify;
9622
9623 identify = &rphy->identify;
9624 identify->sas_address = hpsa_sas_port->sas_address;
9625 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9626 identify->target_port_protocols = SAS_PROTOCOL_STP;
9627
9628 return sas_rphy_add(rphy);
9629 }
9630
9631 static struct hpsa_sas_port
9632 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9633 u64 sas_address)
9634 {
9635 int rc;
9636 struct hpsa_sas_port *hpsa_sas_port;
9637 struct sas_port *port;
9638
9639 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9640 if (!hpsa_sas_port)
9641 return NULL;
9642
9643 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9644 hpsa_sas_port->parent_node = hpsa_sas_node;
9645
9646 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9647 if (!port)
9648 goto free_hpsa_port;
9649
9650 rc = sas_port_add(port);
9651 if (rc)
9652 goto free_sas_port;
9653
9654 hpsa_sas_port->port = port;
9655 hpsa_sas_port->sas_address = sas_address;
9656 list_add_tail(&hpsa_sas_port->port_list_entry,
9657 &hpsa_sas_node->port_list_head);
9658
9659 return hpsa_sas_port;
9660
9661 free_sas_port:
9662 sas_port_free(port);
9663 free_hpsa_port:
9664 kfree(hpsa_sas_port);
9665
9666 return NULL;
9667 }
9668
9669 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9670 {
9671 struct hpsa_sas_phy *hpsa_sas_phy;
9672 struct hpsa_sas_phy *next;
9673
9674 list_for_each_entry_safe(hpsa_sas_phy, next,
9675 &hpsa_sas_port->phy_list_head, phy_list_entry)
9676 hpsa_free_sas_phy(hpsa_sas_phy);
9677
9678 sas_port_delete(hpsa_sas_port->port);
9679 list_del(&hpsa_sas_port->port_list_entry);
9680 kfree(hpsa_sas_port);
9681 }
9682
9683 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9684 {
9685 struct hpsa_sas_node *hpsa_sas_node;
9686
9687 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9688 if (hpsa_sas_node) {
9689 hpsa_sas_node->parent_dev = parent_dev;
9690 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9691 }
9692
9693 return hpsa_sas_node;
9694 }
9695
9696 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9697 {
9698 struct hpsa_sas_port *hpsa_sas_port;
9699 struct hpsa_sas_port *next;
9700
9701 if (!hpsa_sas_node)
9702 return;
9703
9704 list_for_each_entry_safe(hpsa_sas_port, next,
9705 &hpsa_sas_node->port_list_head, port_list_entry)
9706 hpsa_free_sas_port(hpsa_sas_port);
9707
9708 kfree(hpsa_sas_node);
9709 }
9710
9711 static struct hpsa_scsi_dev_t
9712 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9713 struct sas_rphy *rphy)
9714 {
9715 int i;
9716 struct hpsa_scsi_dev_t *device;
9717
9718 for (i = 0; i < h->ndevices; i++) {
9719 device = h->dev[i];
9720 if (!device->sas_port)
9721 continue;
9722 if (device->sas_port->rphy == rphy)
9723 return device;
9724 }
9725
9726 return NULL;
9727 }
9728
9729 static int hpsa_add_sas_host(struct ctlr_info *h)
9730 {
9731 int rc;
9732 struct device *parent_dev;
9733 struct hpsa_sas_node *hpsa_sas_node;
9734 struct hpsa_sas_port *hpsa_sas_port;
9735 struct hpsa_sas_phy *hpsa_sas_phy;
9736
9737 parent_dev = &h->scsi_host->shost_dev;
9738
9739 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9740 if (!hpsa_sas_node)
9741 return -ENOMEM;
9742
9743 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9744 if (!hpsa_sas_port) {
9745 rc = -ENODEV;
9746 goto free_sas_node;
9747 }
9748
9749 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9750 if (!hpsa_sas_phy) {
9751 rc = -ENODEV;
9752 goto free_sas_port;
9753 }
9754
9755 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9756 if (rc)
9757 goto free_sas_phy;
9758
9759 h->sas_host = hpsa_sas_node;
9760
9761 return 0;
9762
9763 free_sas_phy:
9764 hpsa_free_sas_phy(hpsa_sas_phy);
9765 free_sas_port:
9766 hpsa_free_sas_port(hpsa_sas_port);
9767 free_sas_node:
9768 hpsa_free_sas_node(hpsa_sas_node);
9769
9770 return rc;
9771 }
9772
9773 static void hpsa_delete_sas_host(struct ctlr_info *h)
9774 {
9775 hpsa_free_sas_node(h->sas_host);
9776 }
9777
9778 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9779 struct hpsa_scsi_dev_t *device)
9780 {
9781 int rc;
9782 struct hpsa_sas_port *hpsa_sas_port;
9783 struct sas_rphy *rphy;
9784
9785 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9786 if (!hpsa_sas_port)
9787 return -ENOMEM;
9788
9789 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9790 if (!rphy) {
9791 rc = -ENODEV;
9792 goto free_sas_port;
9793 }
9794
9795 hpsa_sas_port->rphy = rphy;
9796 device->sas_port = hpsa_sas_port;
9797
9798 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9799 if (rc)
9800 goto free_sas_port;
9801
9802 return 0;
9803
9804 free_sas_port:
9805 hpsa_free_sas_port(hpsa_sas_port);
9806 device->sas_port = NULL;
9807
9808 return rc;
9809 }
9810
9811 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9812 {
9813 if (device->sas_port) {
9814 hpsa_free_sas_port(device->sas_port);
9815 device->sas_port = NULL;
9816 }
9817 }
9818
9819 static int
9820 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9821 {
9822 return 0;
9823 }
9824
9825 static int
9826 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9827 {
9828 struct Scsi_Host *shost = phy_to_shost(rphy);
9829 struct ctlr_info *h;
9830 struct hpsa_scsi_dev_t *sd;
9831
9832 if (!shost)
9833 return -ENXIO;
9834
9835 h = shost_to_hba(shost);
9836
9837 if (!h)
9838 return -ENXIO;
9839
9840 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9841 if (!sd)
9842 return -ENXIO;
9843
9844 *identifier = sd->eli;
9845
9846 return 0;
9847 }
9848
9849 static int
9850 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9851 {
9852 return -ENXIO;
9853 }
9854
9855 static int
9856 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9857 {
9858 return 0;
9859 }
9860
9861 static int
9862 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9863 {
9864 return 0;
9865 }
9866
9867 static int
9868 hpsa_sas_phy_setup(struct sas_phy *phy)
9869 {
9870 return 0;
9871 }
9872
9873 static void
9874 hpsa_sas_phy_release(struct sas_phy *phy)
9875 {
9876 }
9877
9878 static int
9879 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9880 {
9881 return -EINVAL;
9882 }
9883
9884 static struct sas_function_template hpsa_sas_transport_functions = {
9885 .get_linkerrors = hpsa_sas_get_linkerrors,
9886 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9887 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9888 .phy_reset = hpsa_sas_phy_reset,
9889 .phy_enable = hpsa_sas_phy_enable,
9890 .phy_setup = hpsa_sas_phy_setup,
9891 .phy_release = hpsa_sas_phy_release,
9892 .set_phy_speed = hpsa_sas_phy_speed,
9893 };
9894
9895 /*
9896 * This is it. Register the PCI driver information for the cards we control
9897 * the OS will call our registered routines when it finds one of our cards.
9898 */
9899 static int __init hpsa_init(void)
9900 {
9901 int rc;
9902
9903 hpsa_sas_transport_template =
9904 sas_attach_transport(&hpsa_sas_transport_functions);
9905 if (!hpsa_sas_transport_template)
9906 return -ENODEV;
9907
9908 rc = pci_register_driver(&hpsa_pci_driver);
9909
9910 if (rc)
9911 sas_release_transport(hpsa_sas_transport_template);
9912
9913 return rc;
9914 }
9915
9916 static void __exit hpsa_cleanup(void)
9917 {
9918 pci_unregister_driver(&hpsa_pci_driver);
9919 sas_release_transport(hpsa_sas_transport_template);
9920 }
9921
9922 static void __attribute__((unused)) verify_offsets(void)
9923 {
9924 #define VERIFY_OFFSET(member, offset) \
9925 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9926
9927 VERIFY_OFFSET(structure_size, 0);
9928 VERIFY_OFFSET(volume_blk_size, 4);
9929 VERIFY_OFFSET(volume_blk_cnt, 8);
9930 VERIFY_OFFSET(phys_blk_shift, 16);
9931 VERIFY_OFFSET(parity_rotation_shift, 17);
9932 VERIFY_OFFSET(strip_size, 18);
9933 VERIFY_OFFSET(disk_starting_blk, 20);
9934 VERIFY_OFFSET(disk_blk_cnt, 28);
9935 VERIFY_OFFSET(data_disks_per_row, 36);
9936 VERIFY_OFFSET(metadata_disks_per_row, 38);
9937 VERIFY_OFFSET(row_cnt, 40);
9938 VERIFY_OFFSET(layout_map_count, 42);
9939 VERIFY_OFFSET(flags, 44);
9940 VERIFY_OFFSET(dekindex, 46);
9941 /* VERIFY_OFFSET(reserved, 48 */
9942 VERIFY_OFFSET(data, 64);
9943
9944 #undef VERIFY_OFFSET
9945
9946 #define VERIFY_OFFSET(member, offset) \
9947 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9948
9949 VERIFY_OFFSET(IU_type, 0);
9950 VERIFY_OFFSET(direction, 1);
9951 VERIFY_OFFSET(reply_queue, 2);
9952 /* VERIFY_OFFSET(reserved1, 3); */
9953 VERIFY_OFFSET(scsi_nexus, 4);
9954 VERIFY_OFFSET(Tag, 8);
9955 VERIFY_OFFSET(cdb, 16);
9956 VERIFY_OFFSET(cciss_lun, 32);
9957 VERIFY_OFFSET(data_len, 40);
9958 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9959 VERIFY_OFFSET(sg_count, 45);
9960 /* VERIFY_OFFSET(reserved3 */
9961 VERIFY_OFFSET(err_ptr, 48);
9962 VERIFY_OFFSET(err_len, 56);
9963 /* VERIFY_OFFSET(reserved4 */
9964 VERIFY_OFFSET(sg, 64);
9965
9966 #undef VERIFY_OFFSET
9967
9968 #define VERIFY_OFFSET(member, offset) \
9969 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9970
9971 VERIFY_OFFSET(dev_handle, 0x00);
9972 VERIFY_OFFSET(reserved1, 0x02);
9973 VERIFY_OFFSET(function, 0x03);
9974 VERIFY_OFFSET(reserved2, 0x04);
9975 VERIFY_OFFSET(err_info, 0x0C);
9976 VERIFY_OFFSET(reserved3, 0x10);
9977 VERIFY_OFFSET(err_info_len, 0x12);
9978 VERIFY_OFFSET(reserved4, 0x13);
9979 VERIFY_OFFSET(sgl_offset, 0x14);
9980 VERIFY_OFFSET(reserved5, 0x15);
9981 VERIFY_OFFSET(transfer_len, 0x1C);
9982 VERIFY_OFFSET(reserved6, 0x20);
9983 VERIFY_OFFSET(io_flags, 0x24);
9984 VERIFY_OFFSET(reserved7, 0x26);
9985 VERIFY_OFFSET(LUN, 0x34);
9986 VERIFY_OFFSET(control, 0x3C);
9987 VERIFY_OFFSET(CDB, 0x40);
9988 VERIFY_OFFSET(reserved8, 0x50);
9989 VERIFY_OFFSET(host_context_flags, 0x60);
9990 VERIFY_OFFSET(timeout_sec, 0x62);
9991 VERIFY_OFFSET(ReplyQueue, 0x64);
9992 VERIFY_OFFSET(reserved9, 0x65);
9993 VERIFY_OFFSET(tag, 0x68);
9994 VERIFY_OFFSET(host_addr, 0x70);
9995 VERIFY_OFFSET(CISS_LUN, 0x78);
9996 VERIFY_OFFSET(SG, 0x78 + 8);
9997 #undef VERIFY_OFFSET
9998 }
9999
10000 module_init(hpsa_init);
10001 module_exit(hpsa_cleanup);
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