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[mirror_ubuntu-artful-kernel.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2010 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/kernel.h>
46 #include <linux/module.h>
47 #include <linux/errno.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/types.h>
51 #include <linux/pci.h>
52 #include <linux/kdev_t.h>
53 #include <linux/blkdev.h>
54 #include <linux/delay.h>
55 #include <linux/interrupt.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/sort.h>
58 #include <linux/io.h>
59 #include <linux/time.h>
60 #include <linux/kthread.h>
61 #include <linux/aer.h>
62
63 #include "mpt2sas_base.h"
64
65 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
66
67 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
68
69 #define MAX_HBA_QUEUE_DEPTH 30000
70 #define MAX_CHAIN_DEPTH 100000
71 static int max_queue_depth = -1;
72 module_param(max_queue_depth, int, 0);
73 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
74
75 static int max_sgl_entries = -1;
76 module_param(max_sgl_entries, int, 0);
77 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
78
79 static int msix_disable = -1;
80 module_param(msix_disable, int, 0);
81 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
82
83 static int missing_delay[2] = {-1, -1};
84 module_param_array(missing_delay, int, NULL, 0);
85 MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
86
87 static int mpt2sas_fwfault_debug;
88 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
89 "and halt firmware - (default=0)");
90
91 static int disable_discovery = -1;
92 module_param(disable_discovery, int, 0);
93 MODULE_PARM_DESC(disable_discovery, " disable discovery ");
94
95 /**
96 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
97 *
98 */
99 static int
100 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
101 {
102 int ret = param_set_int(val, kp);
103 struct MPT2SAS_ADAPTER *ioc;
104
105 if (ret)
106 return ret;
107
108 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
109 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
110 ioc->fwfault_debug = mpt2sas_fwfault_debug;
111 return 0;
112 }
113
114 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
115 param_get_int, &mpt2sas_fwfault_debug, 0644);
116
117 /**
118 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
119 * @arg: input argument, used to derive ioc
120 *
121 * Return 0 if controller is removed from pci subsystem.
122 * Return -1 for other case.
123 */
124 static int mpt2sas_remove_dead_ioc_func(void *arg)
125 {
126 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
127 struct pci_dev *pdev;
128
129 if ((ioc == NULL))
130 return -1;
131
132 pdev = ioc->pdev;
133 if ((pdev == NULL))
134 return -1;
135 pci_remove_bus_device(pdev);
136 return 0;
137 }
138
139
140 /**
141 * _base_fault_reset_work - workq handling ioc fault conditions
142 * @work: input argument, used to derive ioc
143 * Context: sleep.
144 *
145 * Return nothing.
146 */
147 static void
148 _base_fault_reset_work(struct work_struct *work)
149 {
150 struct MPT2SAS_ADAPTER *ioc =
151 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
152 unsigned long flags;
153 u32 doorbell;
154 int rc;
155 struct task_struct *p;
156
157 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
158 if (ioc->shost_recovery)
159 goto rearm_timer;
160 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
161
162 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
163 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
164 printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
165 ioc->name, __func__);
166
167 /*
168 * Call _scsih_flush_pending_cmds callback so that we flush all
169 * pending commands back to OS. This call is required to aovid
170 * deadlock at block layer. Dead IOC will fail to do diag reset,
171 * and this call is safe since dead ioc will never return any
172 * command back from HW.
173 */
174 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
175 /*
176 * Set remove_host flag early since kernel thread will
177 * take some time to execute.
178 */
179 ioc->remove_host = 1;
180 /*Remove the Dead Host */
181 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
182 "mpt2sas_dead_ioc_%d", ioc->id);
183 if (IS_ERR(p)) {
184 printk(MPT2SAS_ERR_FMT
185 "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
186 ioc->name, __func__);
187 } else {
188 printk(MPT2SAS_ERR_FMT
189 "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
190 ioc->name, __func__);
191 }
192
193 return; /* don't rearm timer */
194 }
195
196 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
197 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
198 FORCE_BIG_HAMMER);
199 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
200 __func__, (rc == 0) ? "success" : "failed");
201 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
202 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
203 mpt2sas_base_fault_info(ioc, doorbell &
204 MPI2_DOORBELL_DATA_MASK);
205 }
206
207 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
208 rearm_timer:
209 if (ioc->fault_reset_work_q)
210 queue_delayed_work(ioc->fault_reset_work_q,
211 &ioc->fault_reset_work,
212 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
213 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
214 }
215
216 /**
217 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
218 * @ioc: per adapter object
219 * Context: sleep.
220 *
221 * Return nothing.
222 */
223 void
224 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
225 {
226 unsigned long flags;
227
228 if (ioc->fault_reset_work_q)
229 return;
230
231 /* initialize fault polling */
232 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
233 snprintf(ioc->fault_reset_work_q_name,
234 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
235 ioc->fault_reset_work_q =
236 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
237 if (!ioc->fault_reset_work_q) {
238 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
239 ioc->name, __func__, __LINE__);
240 return;
241 }
242 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
243 if (ioc->fault_reset_work_q)
244 queue_delayed_work(ioc->fault_reset_work_q,
245 &ioc->fault_reset_work,
246 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
247 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
248 }
249
250 /**
251 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
252 * @ioc: per adapter object
253 * Context: sleep.
254 *
255 * Return nothing.
256 */
257 void
258 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
259 {
260 unsigned long flags;
261 struct workqueue_struct *wq;
262
263 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
264 wq = ioc->fault_reset_work_q;
265 ioc->fault_reset_work_q = NULL;
266 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
267 if (wq) {
268 if (!cancel_delayed_work(&ioc->fault_reset_work))
269 flush_workqueue(wq);
270 destroy_workqueue(wq);
271 }
272 }
273
274 /**
275 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
276 * @ioc: per adapter object
277 * @fault_code: fault code
278 *
279 * Return nothing.
280 */
281 void
282 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
283 {
284 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
285 ioc->name, fault_code);
286 }
287
288 /**
289 * mpt2sas_halt_firmware - halt's mpt controller firmware
290 * @ioc: per adapter object
291 *
292 * For debugging timeout related issues. Writing 0xCOFFEE00
293 * to the doorbell register will halt controller firmware. With
294 * the purpose to stop both driver and firmware, the enduser can
295 * obtain a ring buffer from controller UART.
296 */
297 void
298 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
299 {
300 u32 doorbell;
301
302 if (!ioc->fwfault_debug)
303 return;
304
305 dump_stack();
306
307 doorbell = readl(&ioc->chip->Doorbell);
308 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
309 mpt2sas_base_fault_info(ioc , doorbell);
310 else {
311 writel(0xC0FFEE00, &ioc->chip->Doorbell);
312 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
313 "timeout\n", ioc->name);
314 }
315
316 panic("panic in %s\n", __func__);
317 }
318
319 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
320 /**
321 * _base_sas_ioc_info - verbose translation of the ioc status
322 * @ioc: per adapter object
323 * @mpi_reply: reply mf payload returned from firmware
324 * @request_hdr: request mf
325 *
326 * Return nothing.
327 */
328 static void
329 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
330 MPI2RequestHeader_t *request_hdr)
331 {
332 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
333 MPI2_IOCSTATUS_MASK;
334 char *desc = NULL;
335 u16 frame_sz;
336 char *func_str = NULL;
337
338 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
339 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
340 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
341 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
342 return;
343
344 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
345 return;
346
347 switch (ioc_status) {
348
349 /****************************************************************************
350 * Common IOCStatus values for all replies
351 ****************************************************************************/
352
353 case MPI2_IOCSTATUS_INVALID_FUNCTION:
354 desc = "invalid function";
355 break;
356 case MPI2_IOCSTATUS_BUSY:
357 desc = "busy";
358 break;
359 case MPI2_IOCSTATUS_INVALID_SGL:
360 desc = "invalid sgl";
361 break;
362 case MPI2_IOCSTATUS_INTERNAL_ERROR:
363 desc = "internal error";
364 break;
365 case MPI2_IOCSTATUS_INVALID_VPID:
366 desc = "invalid vpid";
367 break;
368 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
369 desc = "insufficient resources";
370 break;
371 case MPI2_IOCSTATUS_INVALID_FIELD:
372 desc = "invalid field";
373 break;
374 case MPI2_IOCSTATUS_INVALID_STATE:
375 desc = "invalid state";
376 break;
377 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
378 desc = "op state not supported";
379 break;
380
381 /****************************************************************************
382 * Config IOCStatus values
383 ****************************************************************************/
384
385 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
386 desc = "config invalid action";
387 break;
388 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
389 desc = "config invalid type";
390 break;
391 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
392 desc = "config invalid page";
393 break;
394 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
395 desc = "config invalid data";
396 break;
397 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
398 desc = "config no defaults";
399 break;
400 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
401 desc = "config cant commit";
402 break;
403
404 /****************************************************************************
405 * SCSI IO Reply
406 ****************************************************************************/
407
408 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
409 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
410 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
411 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
412 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
413 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
414 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
415 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
416 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
417 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
418 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
419 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
420 break;
421
422 /****************************************************************************
423 * For use by SCSI Initiator and SCSI Target end-to-end data protection
424 ****************************************************************************/
425
426 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
427 desc = "eedp guard error";
428 break;
429 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
430 desc = "eedp ref tag error";
431 break;
432 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
433 desc = "eedp app tag error";
434 break;
435
436 /****************************************************************************
437 * SCSI Target values
438 ****************************************************************************/
439
440 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
441 desc = "target invalid io index";
442 break;
443 case MPI2_IOCSTATUS_TARGET_ABORTED:
444 desc = "target aborted";
445 break;
446 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
447 desc = "target no conn retryable";
448 break;
449 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
450 desc = "target no connection";
451 break;
452 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
453 desc = "target xfer count mismatch";
454 break;
455 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
456 desc = "target data offset error";
457 break;
458 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
459 desc = "target too much write data";
460 break;
461 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
462 desc = "target iu too short";
463 break;
464 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
465 desc = "target ack nak timeout";
466 break;
467 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
468 desc = "target nak received";
469 break;
470
471 /****************************************************************************
472 * Serial Attached SCSI values
473 ****************************************************************************/
474
475 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
476 desc = "smp request failed";
477 break;
478 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
479 desc = "smp data overrun";
480 break;
481
482 /****************************************************************************
483 * Diagnostic Buffer Post / Diagnostic Release values
484 ****************************************************************************/
485
486 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
487 desc = "diagnostic released";
488 break;
489 default:
490 break;
491 }
492
493 if (!desc)
494 return;
495
496 switch (request_hdr->Function) {
497 case MPI2_FUNCTION_CONFIG:
498 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
499 func_str = "config_page";
500 break;
501 case MPI2_FUNCTION_SCSI_TASK_MGMT:
502 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
503 func_str = "task_mgmt";
504 break;
505 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
506 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
507 func_str = "sas_iounit_ctl";
508 break;
509 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
510 frame_sz = sizeof(Mpi2SepRequest_t);
511 func_str = "enclosure";
512 break;
513 case MPI2_FUNCTION_IOC_INIT:
514 frame_sz = sizeof(Mpi2IOCInitRequest_t);
515 func_str = "ioc_init";
516 break;
517 case MPI2_FUNCTION_PORT_ENABLE:
518 frame_sz = sizeof(Mpi2PortEnableRequest_t);
519 func_str = "port_enable";
520 break;
521 case MPI2_FUNCTION_SMP_PASSTHROUGH:
522 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
523 func_str = "smp_passthru";
524 break;
525 default:
526 frame_sz = 32;
527 func_str = "unknown";
528 break;
529 }
530
531 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
532 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
533
534 _debug_dump_mf(request_hdr, frame_sz/4);
535 }
536
537 /**
538 * _base_display_event_data - verbose translation of firmware asyn events
539 * @ioc: per adapter object
540 * @mpi_reply: reply mf payload returned from firmware
541 *
542 * Return nothing.
543 */
544 static void
545 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
546 Mpi2EventNotificationReply_t *mpi_reply)
547 {
548 char *desc = NULL;
549 u16 event;
550
551 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
552 return;
553
554 event = le16_to_cpu(mpi_reply->Event);
555
556 switch (event) {
557 case MPI2_EVENT_LOG_DATA:
558 desc = "Log Data";
559 break;
560 case MPI2_EVENT_STATE_CHANGE:
561 desc = "Status Change";
562 break;
563 case MPI2_EVENT_HARD_RESET_RECEIVED:
564 desc = "Hard Reset Received";
565 break;
566 case MPI2_EVENT_EVENT_CHANGE:
567 desc = "Event Change";
568 break;
569 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
570 desc = "Device Status Change";
571 break;
572 case MPI2_EVENT_IR_OPERATION_STATUS:
573 if (!ioc->hide_ir_msg)
574 desc = "IR Operation Status";
575 break;
576 case MPI2_EVENT_SAS_DISCOVERY:
577 {
578 Mpi2EventDataSasDiscovery_t *event_data =
579 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
580 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
581 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
582 "start" : "stop");
583 if (event_data->DiscoveryStatus)
584 printk("discovery_status(0x%08x)",
585 le32_to_cpu(event_data->DiscoveryStatus));
586 printk("\n");
587 return;
588 }
589 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
590 desc = "SAS Broadcast Primitive";
591 break;
592 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
593 desc = "SAS Init Device Status Change";
594 break;
595 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
596 desc = "SAS Init Table Overflow";
597 break;
598 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
599 desc = "SAS Topology Change List";
600 break;
601 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
602 desc = "SAS Enclosure Device Status Change";
603 break;
604 case MPI2_EVENT_IR_VOLUME:
605 if (!ioc->hide_ir_msg)
606 desc = "IR Volume";
607 break;
608 case MPI2_EVENT_IR_PHYSICAL_DISK:
609 if (!ioc->hide_ir_msg)
610 desc = "IR Physical Disk";
611 break;
612 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
613 if (!ioc->hide_ir_msg)
614 desc = "IR Configuration Change List";
615 break;
616 case MPI2_EVENT_LOG_ENTRY_ADDED:
617 if (!ioc->hide_ir_msg)
618 desc = "Log Entry Added";
619 break;
620 }
621
622 if (!desc)
623 return;
624
625 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
626 }
627 #endif
628
629 /**
630 * _base_sas_log_info - verbose translation of firmware log info
631 * @ioc: per adapter object
632 * @log_info: log info
633 *
634 * Return nothing.
635 */
636 static void
637 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
638 {
639 union loginfo_type {
640 u32 loginfo;
641 struct {
642 u32 subcode:16;
643 u32 code:8;
644 u32 originator:4;
645 u32 bus_type:4;
646 } dw;
647 };
648 union loginfo_type sas_loginfo;
649 char *originator_str = NULL;
650
651 sas_loginfo.loginfo = log_info;
652 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
653 return;
654
655 /* each nexus loss loginfo */
656 if (log_info == 0x31170000)
657 return;
658
659 /* eat the loginfos associated with task aborts */
660 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
661 0x31140000 || log_info == 0x31130000))
662 return;
663
664 switch (sas_loginfo.dw.originator) {
665 case 0:
666 originator_str = "IOP";
667 break;
668 case 1:
669 originator_str = "PL";
670 break;
671 case 2:
672 if (!ioc->hide_ir_msg)
673 originator_str = "IR";
674 else
675 originator_str = "WarpDrive";
676 break;
677 }
678
679 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
680 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
681 originator_str, sas_loginfo.dw.code,
682 sas_loginfo.dw.subcode);
683 }
684
685 /**
686 * _base_display_reply_info -
687 * @ioc: per adapter object
688 * @smid: system request message index
689 * @msix_index: MSIX table index supplied by the OS
690 * @reply: reply message frame(lower 32bit addr)
691 *
692 * Return nothing.
693 */
694 static void
695 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
696 u32 reply)
697 {
698 MPI2DefaultReply_t *mpi_reply;
699 u16 ioc_status;
700
701 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
702 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
703 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
704 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
705 (ioc->logging_level & MPT_DEBUG_REPLY)) {
706 _base_sas_ioc_info(ioc , mpi_reply,
707 mpt2sas_base_get_msg_frame(ioc, smid));
708 }
709 #endif
710 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
711 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
712 }
713
714 /**
715 * mpt2sas_base_done - base internal command completion routine
716 * @ioc: per adapter object
717 * @smid: system request message index
718 * @msix_index: MSIX table index supplied by the OS
719 * @reply: reply message frame(lower 32bit addr)
720 *
721 * Return 1 meaning mf should be freed from _base_interrupt
722 * 0 means the mf is freed from this function.
723 */
724 u8
725 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
726 u32 reply)
727 {
728 MPI2DefaultReply_t *mpi_reply;
729
730 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
731 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
732 return 1;
733
734 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
735 return 1;
736
737 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
738 if (mpi_reply) {
739 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
740 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
741 }
742 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
743
744 complete(&ioc->base_cmds.done);
745 return 1;
746 }
747
748 /**
749 * _base_async_event - main callback handler for firmware asyn events
750 * @ioc: per adapter object
751 * @msix_index: MSIX table index supplied by the OS
752 * @reply: reply message frame(lower 32bit addr)
753 *
754 * Return 1 meaning mf should be freed from _base_interrupt
755 * 0 means the mf is freed from this function.
756 */
757 static u8
758 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
759 {
760 Mpi2EventNotificationReply_t *mpi_reply;
761 Mpi2EventAckRequest_t *ack_request;
762 u16 smid;
763
764 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
765 if (!mpi_reply)
766 return 1;
767 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
768 return 1;
769 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
770 _base_display_event_data(ioc, mpi_reply);
771 #endif
772 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
773 goto out;
774 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
775 if (!smid) {
776 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
777 ioc->name, __func__);
778 goto out;
779 }
780
781 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
782 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
783 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
784 ack_request->Event = mpi_reply->Event;
785 ack_request->EventContext = mpi_reply->EventContext;
786 ack_request->VF_ID = 0; /* TODO */
787 ack_request->VP_ID = 0;
788 mpt2sas_base_put_smid_default(ioc, smid);
789
790 out:
791
792 /* scsih callback handler */
793 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
794
795 /* ctl callback handler */
796 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
797
798 return 1;
799 }
800
801 /**
802 * _base_get_cb_idx - obtain the callback index
803 * @ioc: per adapter object
804 * @smid: system request message index
805 *
806 * Return callback index.
807 */
808 static u8
809 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
810 {
811 int i;
812 u8 cb_idx;
813
814 if (smid < ioc->hi_priority_smid) {
815 i = smid - 1;
816 cb_idx = ioc->scsi_lookup[i].cb_idx;
817 } else if (smid < ioc->internal_smid) {
818 i = smid - ioc->hi_priority_smid;
819 cb_idx = ioc->hpr_lookup[i].cb_idx;
820 } else if (smid <= ioc->hba_queue_depth) {
821 i = smid - ioc->internal_smid;
822 cb_idx = ioc->internal_lookup[i].cb_idx;
823 } else
824 cb_idx = 0xFF;
825 return cb_idx;
826 }
827
828 /**
829 * _base_mask_interrupts - disable interrupts
830 * @ioc: per adapter object
831 *
832 * Disabling ResetIRQ, Reply and Doorbell Interrupts
833 *
834 * Return nothing.
835 */
836 static void
837 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
838 {
839 u32 him_register;
840
841 ioc->mask_interrupts = 1;
842 him_register = readl(&ioc->chip->HostInterruptMask);
843 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
844 writel(him_register, &ioc->chip->HostInterruptMask);
845 readl(&ioc->chip->HostInterruptMask);
846 }
847
848 /**
849 * _base_unmask_interrupts - enable interrupts
850 * @ioc: per adapter object
851 *
852 * Enabling only Reply Interrupts
853 *
854 * Return nothing.
855 */
856 static void
857 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
858 {
859 u32 him_register;
860
861 him_register = readl(&ioc->chip->HostInterruptMask);
862 him_register &= ~MPI2_HIM_RIM;
863 writel(him_register, &ioc->chip->HostInterruptMask);
864 ioc->mask_interrupts = 0;
865 }
866
867 union reply_descriptor {
868 u64 word;
869 struct {
870 u32 low;
871 u32 high;
872 } u;
873 };
874
875 /**
876 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
877 * @irq: irq number (not used)
878 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
879 * @r: pt_regs pointer (not used)
880 *
881 * Return IRQ_HANDLE if processed, else IRQ_NONE.
882 */
883 static irqreturn_t
884 _base_interrupt(int irq, void *bus_id)
885 {
886 struct adapter_reply_queue *reply_q = bus_id;
887 union reply_descriptor rd;
888 u32 completed_cmds;
889 u8 request_desript_type;
890 u16 smid;
891 u8 cb_idx;
892 u32 reply;
893 u8 msix_index = reply_q->msix_index;
894 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
895 Mpi2ReplyDescriptorsUnion_t *rpf;
896 u8 rc;
897
898 if (ioc->mask_interrupts)
899 return IRQ_NONE;
900
901 if (!atomic_add_unless(&reply_q->busy, 1, 1))
902 return IRQ_NONE;
903
904 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
905 request_desript_type = rpf->Default.ReplyFlags
906 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
907 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
908 atomic_dec(&reply_q->busy);
909 return IRQ_NONE;
910 }
911
912 completed_cmds = 0;
913 cb_idx = 0xFF;
914 do {
915 rd.word = le64_to_cpu(rpf->Words);
916 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
917 goto out;
918 reply = 0;
919 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
920 if (request_desript_type ==
921 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
922 reply = le32_to_cpu
923 (rpf->AddressReply.ReplyFrameAddress);
924 if (reply > ioc->reply_dma_max_address ||
925 reply < ioc->reply_dma_min_address)
926 reply = 0;
927 } else if (request_desript_type ==
928 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
929 goto next;
930 else if (request_desript_type ==
931 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
932 goto next;
933 if (smid)
934 cb_idx = _base_get_cb_idx(ioc, smid);
935 if (smid && cb_idx != 0xFF) {
936 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
937 reply);
938 if (reply)
939 _base_display_reply_info(ioc, smid, msix_index,
940 reply);
941 if (rc)
942 mpt2sas_base_free_smid(ioc, smid);
943 }
944 if (!smid)
945 _base_async_event(ioc, msix_index, reply);
946
947 /* reply free queue handling */
948 if (reply) {
949 ioc->reply_free_host_index =
950 (ioc->reply_free_host_index ==
951 (ioc->reply_free_queue_depth - 1)) ?
952 0 : ioc->reply_free_host_index + 1;
953 ioc->reply_free[ioc->reply_free_host_index] =
954 cpu_to_le32(reply);
955 wmb();
956 writel(ioc->reply_free_host_index,
957 &ioc->chip->ReplyFreeHostIndex);
958 }
959
960 next:
961
962 rpf->Words = cpu_to_le64(ULLONG_MAX);
963 reply_q->reply_post_host_index =
964 (reply_q->reply_post_host_index ==
965 (ioc->reply_post_queue_depth - 1)) ? 0 :
966 reply_q->reply_post_host_index + 1;
967 request_desript_type =
968 reply_q->reply_post_free[reply_q->reply_post_host_index].
969 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
970 completed_cmds++;
971 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
972 goto out;
973 if (!reply_q->reply_post_host_index)
974 rpf = reply_q->reply_post_free;
975 else
976 rpf++;
977 } while (1);
978
979 out:
980
981 if (!completed_cmds) {
982 atomic_dec(&reply_q->busy);
983 return IRQ_NONE;
984 }
985 wmb();
986 if (ioc->is_warpdrive) {
987 writel(reply_q->reply_post_host_index,
988 ioc->reply_post_host_index[msix_index]);
989 atomic_dec(&reply_q->busy);
990 return IRQ_HANDLED;
991 }
992 writel(reply_q->reply_post_host_index | (msix_index <<
993 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
994 atomic_dec(&reply_q->busy);
995 return IRQ_HANDLED;
996 }
997
998 /**
999 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1000 * @ioc: per adapter object
1001 *
1002 */
1003 static inline int
1004 _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
1005 {
1006 return (ioc->facts.IOCCapabilities &
1007 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1008 }
1009
1010 /**
1011 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
1012 * @ioc: per adapter object
1013 * Context: ISR conext
1014 *
1015 * Called when a Task Management request has completed. We want
1016 * to flush the other reply queues so all the outstanding IO has been
1017 * completed back to OS before we process the TM completetion.
1018 *
1019 * Return nothing.
1020 */
1021 void
1022 mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1023 {
1024 struct adapter_reply_queue *reply_q;
1025
1026 /* If MSIX capability is turned off
1027 * then multi-queues are not enabled
1028 */
1029 if (!_base_is_controller_msix_enabled(ioc))
1030 return;
1031
1032 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1033 if (ioc->shost_recovery)
1034 return;
1035 /* TMs are on msix_index == 0 */
1036 if (reply_q->msix_index == 0)
1037 continue;
1038 _base_interrupt(reply_q->vector, (void *)reply_q);
1039 }
1040 }
1041
1042 /**
1043 * mpt2sas_base_release_callback_handler - clear interrupt callback handler
1044 * @cb_idx: callback index
1045 *
1046 * Return nothing.
1047 */
1048 void
1049 mpt2sas_base_release_callback_handler(u8 cb_idx)
1050 {
1051 mpt_callbacks[cb_idx] = NULL;
1052 }
1053
1054 /**
1055 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
1056 * @cb_func: callback function
1057 *
1058 * Returns cb_func.
1059 */
1060 u8
1061 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1062 {
1063 u8 cb_idx;
1064
1065 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1066 if (mpt_callbacks[cb_idx] == NULL)
1067 break;
1068
1069 mpt_callbacks[cb_idx] = cb_func;
1070 return cb_idx;
1071 }
1072
1073 /**
1074 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
1075 *
1076 * Return nothing.
1077 */
1078 void
1079 mpt2sas_base_initialize_callback_handler(void)
1080 {
1081 u8 cb_idx;
1082
1083 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1084 mpt2sas_base_release_callback_handler(cb_idx);
1085 }
1086
1087 /**
1088 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
1089 * @ioc: per adapter object
1090 * @paddr: virtual address for SGE
1091 *
1092 * Create a zero length scatter gather entry to insure the IOCs hardware has
1093 * something to use if the target device goes brain dead and tries
1094 * to send data even when none is asked for.
1095 *
1096 * Return nothing.
1097 */
1098 void
1099 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
1100 {
1101 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1102 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1103 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1104 MPI2_SGE_FLAGS_SHIFT);
1105 ioc->base_add_sg_single(paddr, flags_length, -1);
1106 }
1107
1108 /**
1109 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1110 * @paddr: virtual address for SGE
1111 * @flags_length: SGE flags and data transfer length
1112 * @dma_addr: Physical address
1113 *
1114 * Return nothing.
1115 */
1116 static void
1117 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1118 {
1119 Mpi2SGESimple32_t *sgel = paddr;
1120
1121 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1122 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1123 sgel->FlagsLength = cpu_to_le32(flags_length);
1124 sgel->Address = cpu_to_le32(dma_addr);
1125 }
1126
1127
1128 /**
1129 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1130 * @paddr: virtual address for SGE
1131 * @flags_length: SGE flags and data transfer length
1132 * @dma_addr: Physical address
1133 *
1134 * Return nothing.
1135 */
1136 static void
1137 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1138 {
1139 Mpi2SGESimple64_t *sgel = paddr;
1140
1141 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1142 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1143 sgel->FlagsLength = cpu_to_le32(flags_length);
1144 sgel->Address = cpu_to_le64(dma_addr);
1145 }
1146
1147 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1148
1149 /**
1150 * _base_config_dma_addressing - set dma addressing
1151 * @ioc: per adapter object
1152 * @pdev: PCI device struct
1153 *
1154 * Returns 0 for success, non-zero for failure.
1155 */
1156 static int
1157 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1158 {
1159 struct sysinfo s;
1160 char *desc = NULL;
1161
1162 if (sizeof(dma_addr_t) > 4) {
1163 const uint64_t required_mask =
1164 dma_get_required_mask(&pdev->dev);
1165 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1166 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1167 DMA_BIT_MASK(64))) {
1168 ioc->base_add_sg_single = &_base_add_sg_single_64;
1169 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1170 desc = "64";
1171 goto out;
1172 }
1173 }
1174
1175 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1176 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1177 ioc->base_add_sg_single = &_base_add_sg_single_32;
1178 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1179 desc = "32";
1180 } else
1181 return -ENODEV;
1182
1183 out:
1184 si_meminfo(&s);
1185 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1186 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1187
1188 return 0;
1189 }
1190
1191 /**
1192 * _base_check_enable_msix - checks MSIX capabable.
1193 * @ioc: per adapter object
1194 *
1195 * Check to see if card is capable of MSIX, and set number
1196 * of available msix vectors
1197 */
1198 static int
1199 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1200 {
1201 int base;
1202 u16 message_control;
1203
1204
1205 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1206 if (!base) {
1207 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1208 "supported\n", ioc->name));
1209 return -EINVAL;
1210 }
1211
1212 /* get msix vector count */
1213 /* NUMA_IO not supported for older controllers */
1214 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1215 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1216 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1217 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1218 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1219 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1220 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1221 ioc->msix_vector_count = 1;
1222 else {
1223 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1224 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1225 }
1226 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1227 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
1228
1229 return 0;
1230 }
1231
1232 /**
1233 * _base_free_irq - free irq
1234 * @ioc: per adapter object
1235 *
1236 * Freeing respective reply_queue from the list.
1237 */
1238 static void
1239 _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
1240 {
1241 struct adapter_reply_queue *reply_q, *next;
1242
1243 if (list_empty(&ioc->reply_queue_list))
1244 return;
1245
1246 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1247 list_del(&reply_q->list);
1248 synchronize_irq(reply_q->vector);
1249 free_irq(reply_q->vector, reply_q);
1250 kfree(reply_q);
1251 }
1252 }
1253
1254 /**
1255 * _base_request_irq - request irq
1256 * @ioc: per adapter object
1257 * @index: msix index into vector table
1258 * @vector: irq vector
1259 *
1260 * Inserting respective reply_queue into the list.
1261 */
1262 static int
1263 _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
1264 {
1265 struct adapter_reply_queue *reply_q;
1266 int r;
1267
1268 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1269 if (!reply_q) {
1270 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
1271 ioc->name, (int)sizeof(struct adapter_reply_queue));
1272 return -ENOMEM;
1273 }
1274 reply_q->ioc = ioc;
1275 reply_q->msix_index = index;
1276 reply_q->vector = vector;
1277 atomic_set(&reply_q->busy, 0);
1278 if (ioc->msix_enable)
1279 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1280 MPT2SAS_DRIVER_NAME, ioc->id, index);
1281 else
1282 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1283 MPT2SAS_DRIVER_NAME, ioc->id);
1284 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1285 reply_q);
1286 if (r) {
1287 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1288 reply_q->name, vector);
1289 kfree(reply_q);
1290 return -EBUSY;
1291 }
1292
1293 INIT_LIST_HEAD(&reply_q->list);
1294 list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1295 return 0;
1296 }
1297
1298 /**
1299 * _base_assign_reply_queues - assigning msix index for each cpu
1300 * @ioc: per adapter object
1301 *
1302 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1303 *
1304 * It would nice if we could call irq_set_affinity, however it is not
1305 * an exported symbol
1306 */
1307 static void
1308 _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1309 {
1310 struct adapter_reply_queue *reply_q;
1311 int cpu_id;
1312 int cpu_grouping, loop, grouping, grouping_mod;
1313
1314 if (!_base_is_controller_msix_enabled(ioc))
1315 return;
1316
1317 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1318 /* when there are more cpus than available msix vectors,
1319 * then group cpus togeather on same irq
1320 */
1321 if (ioc->cpu_count > ioc->msix_vector_count) {
1322 grouping = ioc->cpu_count / ioc->msix_vector_count;
1323 grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
1324 if (grouping < 2 || (grouping == 2 && !grouping_mod))
1325 cpu_grouping = 2;
1326 else if (grouping < 4 || (grouping == 4 && !grouping_mod))
1327 cpu_grouping = 4;
1328 else if (grouping < 8 || (grouping == 8 && !grouping_mod))
1329 cpu_grouping = 8;
1330 else
1331 cpu_grouping = 16;
1332 } else
1333 cpu_grouping = 0;
1334
1335 loop = 0;
1336 reply_q = list_entry(ioc->reply_queue_list.next,
1337 struct adapter_reply_queue, list);
1338 for_each_online_cpu(cpu_id) {
1339 if (!cpu_grouping) {
1340 ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
1341 reply_q = list_entry(reply_q->list.next,
1342 struct adapter_reply_queue, list);
1343 } else {
1344 if (loop < cpu_grouping) {
1345 ioc->cpu_msix_table[cpu_id] =
1346 reply_q->msix_index;
1347 loop++;
1348 } else {
1349 reply_q = list_entry(reply_q->list.next,
1350 struct adapter_reply_queue, list);
1351 ioc->cpu_msix_table[cpu_id] =
1352 reply_q->msix_index;
1353 loop = 1;
1354 }
1355 }
1356 }
1357 }
1358
1359 /**
1360 * _base_disable_msix - disables msix
1361 * @ioc: per adapter object
1362 *
1363 */
1364 static void
1365 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1366 {
1367 if (ioc->msix_enable) {
1368 pci_disable_msix(ioc->pdev);
1369 ioc->msix_enable = 0;
1370 }
1371 }
1372
1373 /**
1374 * _base_enable_msix - enables msix, failback to io_apic
1375 * @ioc: per adapter object
1376 *
1377 */
1378 static int
1379 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1380 {
1381 struct msix_entry *entries, *a;
1382 int r;
1383 int i;
1384 u8 try_msix = 0;
1385
1386 INIT_LIST_HEAD(&ioc->reply_queue_list);
1387
1388 if (msix_disable == -1 || msix_disable == 0)
1389 try_msix = 1;
1390
1391 if (!try_msix)
1392 goto try_ioapic;
1393
1394 if (_base_check_enable_msix(ioc) != 0)
1395 goto try_ioapic;
1396
1397 ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1398 ioc->msix_vector_count);
1399
1400 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1401 GFP_KERNEL);
1402 if (!entries) {
1403 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
1404 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
1405 __LINE__, __func__));
1406 goto try_ioapic;
1407 }
1408
1409 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1410 a->entry = i;
1411
1412 r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
1413 if (r) {
1414 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1415 "failed (r=%d) !!!\n", ioc->name, r));
1416 kfree(entries);
1417 goto try_ioapic;
1418 }
1419
1420 ioc->msix_enable = 1;
1421 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1422 r = _base_request_irq(ioc, i, a->vector);
1423 if (r) {
1424 _base_free_irq(ioc);
1425 _base_disable_msix(ioc);
1426 kfree(entries);
1427 goto try_ioapic;
1428 }
1429 }
1430
1431 kfree(entries);
1432 return 0;
1433
1434 /* failback to io_apic interrupt routing */
1435 try_ioapic:
1436
1437 r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1438
1439 return r;
1440 }
1441
1442 /**
1443 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1444 * @ioc: per adapter object
1445 *
1446 * Returns 0 for success, non-zero for failure.
1447 */
1448 int
1449 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1450 {
1451 struct pci_dev *pdev = ioc->pdev;
1452 u32 memap_sz;
1453 u32 pio_sz;
1454 int i, r = 0;
1455 u64 pio_chip = 0;
1456 u64 chip_phys = 0;
1457 struct adapter_reply_queue *reply_q;
1458
1459 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1460 ioc->name, __func__));
1461
1462 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1463 if (pci_enable_device_mem(pdev)) {
1464 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1465 "failed\n", ioc->name);
1466 return -ENODEV;
1467 }
1468
1469
1470 if (pci_request_selected_regions(pdev, ioc->bars,
1471 MPT2SAS_DRIVER_NAME)) {
1472 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1473 "failed\n", ioc->name);
1474 r = -ENODEV;
1475 goto out_fail;
1476 }
1477
1478 /* AER (Advanced Error Reporting) hooks */
1479 pci_enable_pcie_error_reporting(pdev);
1480
1481 pci_set_master(pdev);
1482
1483 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1484 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1485 ioc->name, pci_name(pdev));
1486 r = -ENODEV;
1487 goto out_fail;
1488 }
1489
1490 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1491 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1492 if (pio_sz)
1493 continue;
1494 pio_chip = (u64)pci_resource_start(pdev, i);
1495 pio_sz = pci_resource_len(pdev, i);
1496 } else {
1497 if (memap_sz)
1498 continue;
1499 /* verify memory resource is valid before using */
1500 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1501 ioc->chip_phys = pci_resource_start(pdev, i);
1502 chip_phys = (u64)ioc->chip_phys;
1503 memap_sz = pci_resource_len(pdev, i);
1504 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1505 if (ioc->chip == NULL) {
1506 printk(MPT2SAS_ERR_FMT "unable to map "
1507 "adapter memory!\n", ioc->name);
1508 r = -EINVAL;
1509 goto out_fail;
1510 }
1511 }
1512 }
1513 }
1514
1515 _base_mask_interrupts(ioc);
1516 r = _base_enable_msix(ioc);
1517 if (r)
1518 goto out_fail;
1519
1520 list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
1521 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1522 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1523 "IO-APIC enabled"), reply_q->vector);
1524
1525 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1526 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1527 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1528 ioc->name, (unsigned long long)pio_chip, pio_sz);
1529
1530 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1531 pci_save_state(pdev);
1532
1533 return 0;
1534
1535 out_fail:
1536 if (ioc->chip_phys)
1537 iounmap(ioc->chip);
1538 ioc->chip_phys = 0;
1539 pci_release_selected_regions(ioc->pdev, ioc->bars);
1540 pci_disable_pcie_error_reporting(pdev);
1541 pci_disable_device(pdev);
1542 return r;
1543 }
1544
1545 /**
1546 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1547 * @ioc: per adapter object
1548 * @smid: system request message index(smid zero is invalid)
1549 *
1550 * Returns virt pointer to message frame.
1551 */
1552 void *
1553 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1554 {
1555 return (void *)(ioc->request + (smid * ioc->request_sz));
1556 }
1557
1558 /**
1559 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1560 * @ioc: per adapter object
1561 * @smid: system request message index
1562 *
1563 * Returns virt pointer to sense buffer.
1564 */
1565 void *
1566 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1567 {
1568 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1569 }
1570
1571 /**
1572 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1573 * @ioc: per adapter object
1574 * @smid: system request message index
1575 *
1576 * Returns phys pointer to the low 32bit address of the sense buffer.
1577 */
1578 __le32
1579 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1580 {
1581 return cpu_to_le32(ioc->sense_dma +
1582 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1583 }
1584
1585 /**
1586 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1587 * @ioc: per adapter object
1588 * @phys_addr: lower 32 physical addr of the reply
1589 *
1590 * Converts 32bit lower physical addr into a virt address.
1591 */
1592 void *
1593 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1594 {
1595 if (!phys_addr)
1596 return NULL;
1597 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1598 }
1599
1600 /**
1601 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1602 * @ioc: per adapter object
1603 * @cb_idx: callback index
1604 *
1605 * Returns smid (zero is invalid)
1606 */
1607 u16
1608 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1609 {
1610 unsigned long flags;
1611 struct request_tracker *request;
1612 u16 smid;
1613
1614 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1615 if (list_empty(&ioc->internal_free_list)) {
1616 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1617 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1618 ioc->name, __func__);
1619 return 0;
1620 }
1621
1622 request = list_entry(ioc->internal_free_list.next,
1623 struct request_tracker, tracker_list);
1624 request->cb_idx = cb_idx;
1625 smid = request->smid;
1626 list_del(&request->tracker_list);
1627 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1628 return smid;
1629 }
1630
1631 /**
1632 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1633 * @ioc: per adapter object
1634 * @cb_idx: callback index
1635 * @scmd: pointer to scsi command object
1636 *
1637 * Returns smid (zero is invalid)
1638 */
1639 u16
1640 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1641 struct scsi_cmnd *scmd)
1642 {
1643 unsigned long flags;
1644 struct scsiio_tracker *request;
1645 u16 smid;
1646
1647 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1648 if (list_empty(&ioc->free_list)) {
1649 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1650 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1651 ioc->name, __func__);
1652 return 0;
1653 }
1654
1655 request = list_entry(ioc->free_list.next,
1656 struct scsiio_tracker, tracker_list);
1657 request->scmd = scmd;
1658 request->cb_idx = cb_idx;
1659 smid = request->smid;
1660 list_del(&request->tracker_list);
1661 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1662 return smid;
1663 }
1664
1665 /**
1666 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1667 * @ioc: per adapter object
1668 * @cb_idx: callback index
1669 *
1670 * Returns smid (zero is invalid)
1671 */
1672 u16
1673 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1674 {
1675 unsigned long flags;
1676 struct request_tracker *request;
1677 u16 smid;
1678
1679 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1680 if (list_empty(&ioc->hpr_free_list)) {
1681 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1682 return 0;
1683 }
1684
1685 request = list_entry(ioc->hpr_free_list.next,
1686 struct request_tracker, tracker_list);
1687 request->cb_idx = cb_idx;
1688 smid = request->smid;
1689 list_del(&request->tracker_list);
1690 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1691 return smid;
1692 }
1693
1694
1695 /**
1696 * mpt2sas_base_free_smid - put smid back on free_list
1697 * @ioc: per adapter object
1698 * @smid: system request message index
1699 *
1700 * Return nothing.
1701 */
1702 void
1703 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1704 {
1705 unsigned long flags;
1706 int i;
1707 struct chain_tracker *chain_req, *next;
1708
1709 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1710 if (smid < ioc->hi_priority_smid) {
1711 /* scsiio queue */
1712 i = smid - 1;
1713 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1714 list_for_each_entry_safe(chain_req, next,
1715 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1716 list_del_init(&chain_req->tracker_list);
1717 list_add_tail(&chain_req->tracker_list,
1718 &ioc->free_chain_list);
1719 }
1720 }
1721 ioc->scsi_lookup[i].cb_idx = 0xFF;
1722 ioc->scsi_lookup[i].scmd = NULL;
1723 ioc->scsi_lookup[i].direct_io = 0;
1724 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1725 &ioc->free_list);
1726 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1727
1728 /*
1729 * See _wait_for_commands_to_complete() call with regards
1730 * to this code.
1731 */
1732 if (ioc->shost_recovery && ioc->pending_io_count) {
1733 if (ioc->pending_io_count == 1)
1734 wake_up(&ioc->reset_wq);
1735 ioc->pending_io_count--;
1736 }
1737 return;
1738 } else if (smid < ioc->internal_smid) {
1739 /* hi-priority */
1740 i = smid - ioc->hi_priority_smid;
1741 ioc->hpr_lookup[i].cb_idx = 0xFF;
1742 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1743 &ioc->hpr_free_list);
1744 } else if (smid <= ioc->hba_queue_depth) {
1745 /* internal queue */
1746 i = smid - ioc->internal_smid;
1747 ioc->internal_lookup[i].cb_idx = 0xFF;
1748 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1749 &ioc->internal_free_list);
1750 }
1751 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1752 }
1753
1754 /**
1755 * _base_writeq - 64 bit write to MMIO
1756 * @ioc: per adapter object
1757 * @b: data payload
1758 * @addr: address in MMIO space
1759 * @writeq_lock: spin lock
1760 *
1761 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1762 * care of 32 bit environment where its not quarenteed to send the entire word
1763 * in one transfer.
1764 */
1765 #ifndef writeq
1766 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1767 spinlock_t *writeq_lock)
1768 {
1769 unsigned long flags;
1770 __u64 data_out = cpu_to_le64(b);
1771
1772 spin_lock_irqsave(writeq_lock, flags);
1773 writel((u32)(data_out), addr);
1774 writel((u32)(data_out >> 32), (addr + 4));
1775 spin_unlock_irqrestore(writeq_lock, flags);
1776 }
1777 #else
1778 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1779 spinlock_t *writeq_lock)
1780 {
1781 writeq(cpu_to_le64(b), addr);
1782 }
1783 #endif
1784
1785 static inline u8
1786 _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
1787 {
1788 return ioc->cpu_msix_table[smp_processor_id()];
1789 }
1790
1791 /**
1792 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1793 * @ioc: per adapter object
1794 * @smid: system request message index
1795 * @handle: device handle
1796 *
1797 * Return nothing.
1798 */
1799 void
1800 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1801 {
1802 Mpi2RequestDescriptorUnion_t descriptor;
1803 u64 *request = (u64 *)&descriptor;
1804
1805
1806 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1807 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
1808 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1809 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1810 descriptor.SCSIIO.LMID = 0;
1811 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1812 &ioc->scsi_lookup_lock);
1813 }
1814
1815
1816 /**
1817 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1818 * @ioc: per adapter object
1819 * @smid: system request message index
1820 *
1821 * Return nothing.
1822 */
1823 void
1824 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1825 {
1826 Mpi2RequestDescriptorUnion_t descriptor;
1827 u64 *request = (u64 *)&descriptor;
1828
1829 descriptor.HighPriority.RequestFlags =
1830 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1831 descriptor.HighPriority.MSIxIndex = 0;
1832 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1833 descriptor.HighPriority.LMID = 0;
1834 descriptor.HighPriority.Reserved1 = 0;
1835 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1836 &ioc->scsi_lookup_lock);
1837 }
1838
1839 /**
1840 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1841 * @ioc: per adapter object
1842 * @smid: system request message index
1843 *
1844 * Return nothing.
1845 */
1846 void
1847 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1848 {
1849 Mpi2RequestDescriptorUnion_t descriptor;
1850 u64 *request = (u64 *)&descriptor;
1851
1852 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1853 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
1854 descriptor.Default.SMID = cpu_to_le16(smid);
1855 descriptor.Default.LMID = 0;
1856 descriptor.Default.DescriptorTypeDependent = 0;
1857 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1858 &ioc->scsi_lookup_lock);
1859 }
1860
1861 /**
1862 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1863 * @ioc: per adapter object
1864 * @smid: system request message index
1865 * @io_index: value used to track the IO
1866 *
1867 * Return nothing.
1868 */
1869 void
1870 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1871 u16 io_index)
1872 {
1873 Mpi2RequestDescriptorUnion_t descriptor;
1874 u64 *request = (u64 *)&descriptor;
1875
1876 descriptor.SCSITarget.RequestFlags =
1877 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1878 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
1879 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1880 descriptor.SCSITarget.LMID = 0;
1881 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1882 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1883 &ioc->scsi_lookup_lock);
1884 }
1885
1886 /**
1887 * _base_display_dell_branding - Disply branding string
1888 * @ioc: per adapter object
1889 *
1890 * Return nothing.
1891 */
1892 static void
1893 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1894 {
1895 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1896
1897 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1898 return;
1899
1900 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1901 switch (ioc->pdev->subsystem_device) {
1902 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1903 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1904 MPT2SAS_DELL_BRANDING_SIZE - 1);
1905 break;
1906 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1907 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1908 MPT2SAS_DELL_BRANDING_SIZE - 1);
1909 break;
1910 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1911 strncpy(dell_branding,
1912 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1913 MPT2SAS_DELL_BRANDING_SIZE - 1);
1914 break;
1915 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1916 strncpy(dell_branding,
1917 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1918 MPT2SAS_DELL_BRANDING_SIZE - 1);
1919 break;
1920 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1921 strncpy(dell_branding,
1922 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1923 MPT2SAS_DELL_BRANDING_SIZE - 1);
1924 break;
1925 case MPT2SAS_DELL_PERC_H200_SSDID:
1926 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1927 MPT2SAS_DELL_BRANDING_SIZE - 1);
1928 break;
1929 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1930 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1931 MPT2SAS_DELL_BRANDING_SIZE - 1);
1932 break;
1933 default:
1934 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1935 break;
1936 }
1937
1938 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1939 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1940 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1941 ioc->pdev->subsystem_device);
1942 }
1943
1944 /**
1945 * _base_display_intel_branding - Display branding string
1946 * @ioc: per adapter object
1947 *
1948 * Return nothing.
1949 */
1950 static void
1951 _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1952 {
1953 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
1954 return;
1955
1956 switch (ioc->pdev->device) {
1957 case MPI2_MFGPAGE_DEVID_SAS2008:
1958 switch (ioc->pdev->subsystem_device) {
1959 case MPT2SAS_INTEL_RMS2LL080_SSDID:
1960 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1961 MPT2SAS_INTEL_RMS2LL080_BRANDING);
1962 break;
1963 case MPT2SAS_INTEL_RMS2LL040_SSDID:
1964 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1965 MPT2SAS_INTEL_RMS2LL040_BRANDING);
1966 break;
1967 case MPT2SAS_INTEL_RAMSDALE_SSDID:
1968 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1969 MPT2SAS_INTEL_RAMSDALE_BRANDING);
1970 break;
1971 default:
1972 break;
1973 }
1974 case MPI2_MFGPAGE_DEVID_SAS2308_2:
1975 switch (ioc->pdev->subsystem_device) {
1976 case MPT2SAS_INTEL_RS25GB008_SSDID:
1977 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1978 MPT2SAS_INTEL_RS25GB008_BRANDING);
1979 break;
1980 case MPT2SAS_INTEL_RMS25JB080_SSDID:
1981 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1982 MPT2SAS_INTEL_RMS25JB080_BRANDING);
1983 break;
1984 case MPT2SAS_INTEL_RMS25JB040_SSDID:
1985 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1986 MPT2SAS_INTEL_RMS25JB040_BRANDING);
1987 break;
1988 case MPT2SAS_INTEL_RMS25KB080_SSDID:
1989 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1990 MPT2SAS_INTEL_RMS25KB080_BRANDING);
1991 break;
1992 case MPT2SAS_INTEL_RMS25KB040_SSDID:
1993 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1994 MPT2SAS_INTEL_RMS25KB040_BRANDING);
1995 break;
1996 default:
1997 break;
1998 }
1999 default:
2000 break;
2001 }
2002 }
2003
2004 /**
2005 * _base_display_hp_branding - Display branding string
2006 * @ioc: per adapter object
2007 *
2008 * Return nothing.
2009 */
2010 static void
2011 _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
2012 {
2013 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
2014 return;
2015
2016 switch (ioc->pdev->device) {
2017 case MPI2_MFGPAGE_DEVID_SAS2004:
2018 switch (ioc->pdev->subsystem_device) {
2019 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2020 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2021 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2022 break;
2023 default:
2024 break;
2025 }
2026 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2027 switch (ioc->pdev->subsystem_device) {
2028 case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2029 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2030 MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2031 break;
2032 case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2033 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2034 MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2035 break;
2036 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2037 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2038 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2039 break;
2040 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2041 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2042 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2043 break;
2044 default:
2045 break;
2046 }
2047 default:
2048 break;
2049 }
2050 }
2051
2052 /**
2053 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2054 * @ioc: per adapter object
2055 *
2056 * Return nothing.
2057 */
2058 static void
2059 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
2060 {
2061 int i = 0;
2062 char desc[16];
2063 u8 revision;
2064 u32 iounit_pg1_flags;
2065 u32 bios_version;
2066
2067 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2068 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
2069 strncpy(desc, ioc->manu_pg0.ChipName, 16);
2070 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
2071 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2072 ioc->name, desc,
2073 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2074 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2075 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2076 ioc->facts.FWVersion.Word & 0x000000FF,
2077 revision,
2078 (bios_version & 0xFF000000) >> 24,
2079 (bios_version & 0x00FF0000) >> 16,
2080 (bios_version & 0x0000FF00) >> 8,
2081 bios_version & 0x000000FF);
2082
2083 _base_display_dell_branding(ioc);
2084 _base_display_intel_branding(ioc);
2085 _base_display_hp_branding(ioc);
2086
2087 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
2088
2089 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2090 printk("Initiator");
2091 i++;
2092 }
2093
2094 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2095 printk("%sTarget", i ? "," : "");
2096 i++;
2097 }
2098
2099 i = 0;
2100 printk("), ");
2101 printk("Capabilities=(");
2102
2103 if (!ioc->hide_ir_msg) {
2104 if (ioc->facts.IOCCapabilities &
2105 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2106 printk("Raid");
2107 i++;
2108 }
2109 }
2110
2111 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2112 printk("%sTLR", i ? "," : "");
2113 i++;
2114 }
2115
2116 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2117 printk("%sMulticast", i ? "," : "");
2118 i++;
2119 }
2120
2121 if (ioc->facts.IOCCapabilities &
2122 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2123 printk("%sBIDI Target", i ? "," : "");
2124 i++;
2125 }
2126
2127 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2128 printk("%sEEDP", i ? "," : "");
2129 i++;
2130 }
2131
2132 if (ioc->facts.IOCCapabilities &
2133 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2134 printk("%sSnapshot Buffer", i ? "," : "");
2135 i++;
2136 }
2137
2138 if (ioc->facts.IOCCapabilities &
2139 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2140 printk("%sDiag Trace Buffer", i ? "," : "");
2141 i++;
2142 }
2143
2144 if (ioc->facts.IOCCapabilities &
2145 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2146 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
2147 i++;
2148 }
2149
2150 if (ioc->facts.IOCCapabilities &
2151 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2152 printk("%sTask Set Full", i ? "," : "");
2153 i++;
2154 }
2155
2156 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2157 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2158 printk("%sNCQ", i ? "," : "");
2159 i++;
2160 }
2161
2162 printk(")\n");
2163 }
2164
2165 /**
2166 * _base_update_missing_delay - change the missing delay timers
2167 * @ioc: per adapter object
2168 * @device_missing_delay: amount of time till device is reported missing
2169 * @io_missing_delay: interval IO is returned when there is a missing device
2170 *
2171 * Return nothing.
2172 *
2173 * Passed on the command line, this function will modify the device missing
2174 * delay, as well as the io missing delay. This should be called at driver
2175 * load time.
2176 */
2177 static void
2178 _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
2179 u16 device_missing_delay, u8 io_missing_delay)
2180 {
2181 u16 dmd, dmd_new, dmd_orignal;
2182 u8 io_missing_delay_original;
2183 u16 sz;
2184 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2185 Mpi2ConfigReply_t mpi_reply;
2186 u8 num_phys = 0;
2187 u16 ioc_status;
2188
2189 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
2190 if (!num_phys)
2191 return;
2192
2193 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2194 sizeof(Mpi2SasIOUnit1PhyData_t));
2195 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2196 if (!sas_iounit_pg1) {
2197 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2198 ioc->name, __FILE__, __LINE__, __func__);
2199 goto out;
2200 }
2201 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2202 sas_iounit_pg1, sz))) {
2203 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2204 ioc->name, __FILE__, __LINE__, __func__);
2205 goto out;
2206 }
2207 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2208 MPI2_IOCSTATUS_MASK;
2209 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2210 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2211 ioc->name, __FILE__, __LINE__, __func__);
2212 goto out;
2213 }
2214
2215 /* device missing delay */
2216 dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2217 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2218 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2219 else
2220 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2221 dmd_orignal = dmd;
2222 if (device_missing_delay > 0x7F) {
2223 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2224 device_missing_delay;
2225 dmd = dmd / 16;
2226 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2227 } else
2228 dmd = device_missing_delay;
2229 sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2230
2231 /* io missing delay */
2232 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2233 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2234
2235 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2236 sz)) {
2237 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2238 dmd_new = (dmd &
2239 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2240 else
2241 dmd_new =
2242 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2243 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
2244 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2245 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
2246 "new(%d)\n", ioc->name, io_missing_delay_original,
2247 io_missing_delay);
2248 ioc->device_missing_delay = dmd_new;
2249 ioc->io_missing_delay = io_missing_delay;
2250 }
2251
2252 out:
2253 kfree(sas_iounit_pg1);
2254 }
2255
2256 /**
2257 * _base_static_config_pages - static start of day config pages
2258 * @ioc: per adapter object
2259 *
2260 * Return nothing.
2261 */
2262 static void
2263 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2264 {
2265 Mpi2ConfigReply_t mpi_reply;
2266 u32 iounit_pg1_flags;
2267
2268 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2269 if (ioc->ir_firmware)
2270 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2271 &ioc->manu_pg10);
2272 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2273 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2274 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2275 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2276 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2277 _base_display_ioc_capabilities(ioc);
2278
2279 /*
2280 * Enable task_set_full handling in iounit_pg1 when the
2281 * facts capabilities indicate that its supported.
2282 */
2283 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2284 if ((ioc->facts.IOCCapabilities &
2285 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2286 iounit_pg1_flags &=
2287 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2288 else
2289 iounit_pg1_flags |=
2290 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2291 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2292 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2293
2294 }
2295
2296 /**
2297 * _base_release_memory_pools - release memory
2298 * @ioc: per adapter object
2299 *
2300 * Free memory allocated from _base_allocate_memory_pools.
2301 *
2302 * Return nothing.
2303 */
2304 static void
2305 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2306 {
2307 int i;
2308
2309 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2310 __func__));
2311
2312 if (ioc->request) {
2313 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2314 ioc->request, ioc->request_dma);
2315 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2316 ": free\n", ioc->name, ioc->request));
2317 ioc->request = NULL;
2318 }
2319
2320 if (ioc->sense) {
2321 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2322 if (ioc->sense_dma_pool)
2323 pci_pool_destroy(ioc->sense_dma_pool);
2324 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2325 ": free\n", ioc->name, ioc->sense));
2326 ioc->sense = NULL;
2327 }
2328
2329 if (ioc->reply) {
2330 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2331 if (ioc->reply_dma_pool)
2332 pci_pool_destroy(ioc->reply_dma_pool);
2333 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2334 ": free\n", ioc->name, ioc->reply));
2335 ioc->reply = NULL;
2336 }
2337
2338 if (ioc->reply_free) {
2339 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2340 ioc->reply_free_dma);
2341 if (ioc->reply_free_dma_pool)
2342 pci_pool_destroy(ioc->reply_free_dma_pool);
2343 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2344 "(0x%p): free\n", ioc->name, ioc->reply_free));
2345 ioc->reply_free = NULL;
2346 }
2347
2348 if (ioc->reply_post_free) {
2349 pci_pool_free(ioc->reply_post_free_dma_pool,
2350 ioc->reply_post_free, ioc->reply_post_free_dma);
2351 if (ioc->reply_post_free_dma_pool)
2352 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2353 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2354 "reply_post_free_pool(0x%p): free\n", ioc->name,
2355 ioc->reply_post_free));
2356 ioc->reply_post_free = NULL;
2357 }
2358
2359 if (ioc->config_page) {
2360 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2361 "config_page(0x%p): free\n", ioc->name,
2362 ioc->config_page));
2363 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2364 ioc->config_page, ioc->config_page_dma);
2365 }
2366
2367 if (ioc->scsi_lookup) {
2368 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2369 ioc->scsi_lookup = NULL;
2370 }
2371 kfree(ioc->hpr_lookup);
2372 kfree(ioc->internal_lookup);
2373 if (ioc->chain_lookup) {
2374 for (i = 0; i < ioc->chain_depth; i++) {
2375 if (ioc->chain_lookup[i].chain_buffer)
2376 pci_pool_free(ioc->chain_dma_pool,
2377 ioc->chain_lookup[i].chain_buffer,
2378 ioc->chain_lookup[i].chain_buffer_dma);
2379 }
2380 if (ioc->chain_dma_pool)
2381 pci_pool_destroy(ioc->chain_dma_pool);
2382 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2383 ioc->chain_lookup = NULL;
2384 }
2385 }
2386
2387
2388 /**
2389 * _base_allocate_memory_pools - allocate start of day memory pools
2390 * @ioc: per adapter object
2391 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2392 *
2393 * Returns 0 success, anything else error
2394 */
2395 static int
2396 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2397 {
2398 struct mpt2sas_facts *facts;
2399 u16 max_sge_elements;
2400 u16 chains_needed_per_io;
2401 u32 sz, total_sz, reply_post_free_sz;
2402 u32 retry_sz;
2403 u16 max_request_credit;
2404 int i;
2405
2406 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2407 __func__));
2408
2409 retry_sz = 0;
2410 facts = &ioc->facts;
2411
2412 /* command line tunables for max sgl entries */
2413 if (max_sgl_entries != -1) {
2414 ioc->shost->sg_tablesize = (max_sgl_entries <
2415 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
2416 MPT2SAS_SG_DEPTH;
2417 } else {
2418 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2419 }
2420
2421 /* command line tunables for max controller queue depth */
2422 if (max_queue_depth != -1)
2423 max_request_credit = (max_queue_depth < facts->RequestCredit)
2424 ? max_queue_depth : facts->RequestCredit;
2425 else
2426 max_request_credit = min_t(u16, facts->RequestCredit,
2427 MAX_HBA_QUEUE_DEPTH);
2428
2429 ioc->hba_queue_depth = max_request_credit;
2430 ioc->hi_priority_depth = facts->HighPriorityCredit;
2431 ioc->internal_depth = ioc->hi_priority_depth + 5;
2432
2433 /* request frame size */
2434 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2435
2436 /* reply frame size */
2437 ioc->reply_sz = facts->ReplyFrameSize * 4;
2438
2439 retry_allocation:
2440 total_sz = 0;
2441 /* calculate number of sg elements left over in the 1st frame */
2442 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2443 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2444 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2445
2446 /* now do the same for a chain buffer */
2447 max_sge_elements = ioc->request_sz - ioc->sge_size;
2448 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2449
2450 ioc->chain_offset_value_for_main_message =
2451 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2452 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2453
2454 /*
2455 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2456 */
2457 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2458 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2459 + 1;
2460 if (chains_needed_per_io > facts->MaxChainDepth) {
2461 chains_needed_per_io = facts->MaxChainDepth;
2462 ioc->shost->sg_tablesize = min_t(u16,
2463 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2464 * chains_needed_per_io), ioc->shost->sg_tablesize);
2465 }
2466 ioc->chains_needed_per_io = chains_needed_per_io;
2467
2468 /* reply free queue sizing - taking into account for 64 FW events */
2469 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2470
2471 /* align the reply post queue on the next 16 count boundary */
2472 if (!ioc->reply_free_queue_depth % 16)
2473 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
2474 else
2475 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
2476 32 - (ioc->reply_free_queue_depth % 16);
2477 if (ioc->reply_post_queue_depth >
2478 facts->MaxReplyDescriptorPostQueueDepth) {
2479 ioc->reply_post_queue_depth = min_t(u16,
2480 (facts->MaxReplyDescriptorPostQueueDepth -
2481 (facts->MaxReplyDescriptorPostQueueDepth % 16)),
2482 (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
2483 ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
2484 ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
2485 }
2486
2487
2488 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2489 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2490 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2491 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2492 ioc->chains_needed_per_io));
2493
2494 ioc->scsiio_depth = ioc->hba_queue_depth -
2495 ioc->hi_priority_depth - ioc->internal_depth;
2496
2497 /* set the scsi host can_queue depth
2498 * with some internal commands that could be outstanding
2499 */
2500 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2501 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2502 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2503
2504 /* contiguous pool for request and chains, 16 byte align, one extra "
2505 * "frame for smid=0
2506 */
2507 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2508 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2509
2510 /* hi-priority queue */
2511 sz += (ioc->hi_priority_depth * ioc->request_sz);
2512
2513 /* internal queue */
2514 sz += (ioc->internal_depth * ioc->request_sz);
2515
2516 ioc->request_dma_sz = sz;
2517 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2518 if (!ioc->request) {
2519 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2520 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2521 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2522 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2523 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2524 goto out;
2525 retry_sz += 64;
2526 ioc->hba_queue_depth = max_request_credit - retry_sz;
2527 goto retry_allocation;
2528 }
2529
2530 if (retry_sz)
2531 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2532 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2533 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2534 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2535
2536
2537 /* hi-priority queue */
2538 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2539 ioc->request_sz);
2540 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2541 ioc->request_sz);
2542
2543 /* internal queue */
2544 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2545 ioc->request_sz);
2546 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2547 ioc->request_sz);
2548
2549
2550 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2551 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2552 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2553 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2554 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2555 ioc->name, (unsigned long long) ioc->request_dma));
2556 total_sz += sz;
2557
2558 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2559 ioc->scsi_lookup_pages = get_order(sz);
2560 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2561 GFP_KERNEL, ioc->scsi_lookup_pages);
2562 if (!ioc->scsi_lookup) {
2563 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2564 "sz(%d)\n", ioc->name, (int)sz);
2565 goto out;
2566 }
2567
2568 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2569 "depth(%d)\n", ioc->name, ioc->request,
2570 ioc->scsiio_depth));
2571
2572 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
2573 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2574 ioc->chain_pages = get_order(sz);
2575
2576 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2577 GFP_KERNEL, ioc->chain_pages);
2578 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2579 ioc->request_sz, 16, 0);
2580 if (!ioc->chain_dma_pool) {
2581 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2582 "failed\n", ioc->name);
2583 goto out;
2584 }
2585 for (i = 0; i < ioc->chain_depth; i++) {
2586 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2587 ioc->chain_dma_pool , GFP_KERNEL,
2588 &ioc->chain_lookup[i].chain_buffer_dma);
2589 if (!ioc->chain_lookup[i].chain_buffer) {
2590 ioc->chain_depth = i;
2591 goto chain_done;
2592 }
2593 total_sz += ioc->request_sz;
2594 }
2595 chain_done:
2596 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2597 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2598 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2599 ioc->request_sz))/1024));
2600
2601 /* initialize hi-priority queue smid's */
2602 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2603 sizeof(struct request_tracker), GFP_KERNEL);
2604 if (!ioc->hpr_lookup) {
2605 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2606 ioc->name);
2607 goto out;
2608 }
2609 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2610 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2611 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2612 ioc->hi_priority_depth, ioc->hi_priority_smid));
2613
2614 /* initialize internal queue smid's */
2615 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2616 sizeof(struct request_tracker), GFP_KERNEL);
2617 if (!ioc->internal_lookup) {
2618 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2619 ioc->name);
2620 goto out;
2621 }
2622 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2623 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2624 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2625 ioc->internal_depth, ioc->internal_smid));
2626
2627 /* sense buffers, 4 byte align */
2628 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2629 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2630 0);
2631 if (!ioc->sense_dma_pool) {
2632 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2633 ioc->name);
2634 goto out;
2635 }
2636 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2637 &ioc->sense_dma);
2638 if (!ioc->sense) {
2639 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2640 ioc->name);
2641 goto out;
2642 }
2643 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2644 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2645 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2646 SCSI_SENSE_BUFFERSIZE, sz/1024));
2647 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2648 ioc->name, (unsigned long long)ioc->sense_dma));
2649 total_sz += sz;
2650
2651 /* reply pool, 4 byte align */
2652 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2653 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2654 0);
2655 if (!ioc->reply_dma_pool) {
2656 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2657 ioc->name);
2658 goto out;
2659 }
2660 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2661 &ioc->reply_dma);
2662 if (!ioc->reply) {
2663 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2664 ioc->name);
2665 goto out;
2666 }
2667 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2668 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2669 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2670 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2671 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2672 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2673 ioc->name, (unsigned long long)ioc->reply_dma));
2674 total_sz += sz;
2675
2676 /* reply free queue, 16 byte align */
2677 sz = ioc->reply_free_queue_depth * 4;
2678 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2679 ioc->pdev, sz, 16, 0);
2680 if (!ioc->reply_free_dma_pool) {
2681 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2682 "failed\n", ioc->name);
2683 goto out;
2684 }
2685 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2686 &ioc->reply_free_dma);
2687 if (!ioc->reply_free) {
2688 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2689 "failed\n", ioc->name);
2690 goto out;
2691 }
2692 memset(ioc->reply_free, 0, sz);
2693 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2694 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2695 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2696 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2697 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2698 total_sz += sz;
2699
2700 /* reply post queue, 16 byte align */
2701 reply_post_free_sz = ioc->reply_post_queue_depth *
2702 sizeof(Mpi2DefaultReplyDescriptor_t);
2703 if (_base_is_controller_msix_enabled(ioc))
2704 sz = reply_post_free_sz * ioc->reply_queue_count;
2705 else
2706 sz = reply_post_free_sz;
2707 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2708 ioc->pdev, sz, 16, 0);
2709 if (!ioc->reply_post_free_dma_pool) {
2710 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2711 "failed\n", ioc->name);
2712 goto out;
2713 }
2714 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2715 GFP_KERNEL, &ioc->reply_post_free_dma);
2716 if (!ioc->reply_post_free) {
2717 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2718 "failed\n", ioc->name);
2719 goto out;
2720 }
2721 memset(ioc->reply_post_free, 0, sz);
2722 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2723 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2724 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2725 sz/1024));
2726 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2727 "(0x%llx)\n", ioc->name, (unsigned long long)
2728 ioc->reply_post_free_dma));
2729 total_sz += sz;
2730
2731 ioc->config_page_sz = 512;
2732 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2733 ioc->config_page_sz, &ioc->config_page_dma);
2734 if (!ioc->config_page) {
2735 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2736 "failed\n", ioc->name);
2737 goto out;
2738 }
2739 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2740 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2741 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2742 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2743 total_sz += ioc->config_page_sz;
2744
2745 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2746 ioc->name, total_sz/1024);
2747 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2748 "Max Controller Queue Depth(%d)\n",
2749 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2750 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2751 ioc->name, ioc->shost->sg_tablesize);
2752 return 0;
2753
2754 out:
2755 return -ENOMEM;
2756 }
2757
2758
2759 /**
2760 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2761 * @ioc: Pointer to MPT_ADAPTER structure
2762 * @cooked: Request raw or cooked IOC state
2763 *
2764 * Returns all IOC Doorbell register bits if cooked==0, else just the
2765 * Doorbell bits in MPI_IOC_STATE_MASK.
2766 */
2767 u32
2768 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2769 {
2770 u32 s, sc;
2771
2772 s = readl(&ioc->chip->Doorbell);
2773 sc = s & MPI2_IOC_STATE_MASK;
2774 return cooked ? sc : s;
2775 }
2776
2777 /**
2778 * _base_wait_on_iocstate - waiting on a particular ioc state
2779 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2780 * @timeout: timeout in second
2781 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2782 *
2783 * Returns 0 for success, non-zero for failure.
2784 */
2785 static int
2786 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2787 int sleep_flag)
2788 {
2789 u32 count, cntdn;
2790 u32 current_state;
2791
2792 count = 0;
2793 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2794 do {
2795 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2796 if (current_state == ioc_state)
2797 return 0;
2798 if (count && current_state == MPI2_IOC_STATE_FAULT)
2799 break;
2800 if (sleep_flag == CAN_SLEEP)
2801 msleep(1);
2802 else
2803 udelay(500);
2804 count++;
2805 } while (--cntdn);
2806
2807 return current_state;
2808 }
2809
2810 /**
2811 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2812 * a write to the doorbell)
2813 * @ioc: per adapter object
2814 * @timeout: timeout in second
2815 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2816 *
2817 * Returns 0 for success, non-zero for failure.
2818 *
2819 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2820 */
2821 static int
2822 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2823 int sleep_flag)
2824 {
2825 u32 cntdn, count;
2826 u32 int_status;
2827
2828 count = 0;
2829 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2830 do {
2831 int_status = readl(&ioc->chip->HostInterruptStatus);
2832 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2833 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2834 "successful count(%d), timeout(%d)\n", ioc->name,
2835 __func__, count, timeout));
2836 return 0;
2837 }
2838 if (sleep_flag == CAN_SLEEP)
2839 msleep(1);
2840 else
2841 udelay(500);
2842 count++;
2843 } while (--cntdn);
2844
2845 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2846 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2847 return -EFAULT;
2848 }
2849
2850 /**
2851 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2852 * @ioc: per adapter object
2853 * @timeout: timeout in second
2854 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2855 *
2856 * Returns 0 for success, non-zero for failure.
2857 *
2858 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2859 * doorbell.
2860 */
2861 static int
2862 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2863 int sleep_flag)
2864 {
2865 u32 cntdn, count;
2866 u32 int_status;
2867 u32 doorbell;
2868
2869 count = 0;
2870 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2871 do {
2872 int_status = readl(&ioc->chip->HostInterruptStatus);
2873 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2874 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2875 "successful count(%d), timeout(%d)\n", ioc->name,
2876 __func__, count, timeout));
2877 return 0;
2878 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2879 doorbell = readl(&ioc->chip->Doorbell);
2880 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2881 MPI2_IOC_STATE_FAULT) {
2882 mpt2sas_base_fault_info(ioc , doorbell);
2883 return -EFAULT;
2884 }
2885 } else if (int_status == 0xFFFFFFFF)
2886 goto out;
2887
2888 if (sleep_flag == CAN_SLEEP)
2889 msleep(1);
2890 else
2891 udelay(500);
2892 count++;
2893 } while (--cntdn);
2894
2895 out:
2896 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2897 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2898 return -EFAULT;
2899 }
2900
2901 /**
2902 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2903 * @ioc: per adapter object
2904 * @timeout: timeout in second
2905 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2906 *
2907 * Returns 0 for success, non-zero for failure.
2908 *
2909 */
2910 static int
2911 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2912 int sleep_flag)
2913 {
2914 u32 cntdn, count;
2915 u32 doorbell_reg;
2916
2917 count = 0;
2918 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2919 do {
2920 doorbell_reg = readl(&ioc->chip->Doorbell);
2921 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2922 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2923 "successful count(%d), timeout(%d)\n", ioc->name,
2924 __func__, count, timeout));
2925 return 0;
2926 }
2927 if (sleep_flag == CAN_SLEEP)
2928 msleep(1);
2929 else
2930 udelay(500);
2931 count++;
2932 } while (--cntdn);
2933
2934 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2935 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2936 return -EFAULT;
2937 }
2938
2939 /**
2940 * _base_send_ioc_reset - send doorbell reset
2941 * @ioc: per adapter object
2942 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2943 * @timeout: timeout in second
2944 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2945 *
2946 * Returns 0 for success, non-zero for failure.
2947 */
2948 static int
2949 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2950 int sleep_flag)
2951 {
2952 u32 ioc_state;
2953 int r = 0;
2954
2955 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2956 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2957 ioc->name, __func__);
2958 return -EFAULT;
2959 }
2960
2961 if (!(ioc->facts.IOCCapabilities &
2962 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2963 return -EFAULT;
2964
2965 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2966
2967 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2968 &ioc->chip->Doorbell);
2969 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2970 r = -EFAULT;
2971 goto out;
2972 }
2973 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2974 timeout, sleep_flag);
2975 if (ioc_state) {
2976 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2977 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2978 r = -EFAULT;
2979 goto out;
2980 }
2981 out:
2982 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2983 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2984 return r;
2985 }
2986
2987 /**
2988 * _base_handshake_req_reply_wait - send request thru doorbell interface
2989 * @ioc: per adapter object
2990 * @request_bytes: request length
2991 * @request: pointer having request payload
2992 * @reply_bytes: reply length
2993 * @reply: pointer to reply payload
2994 * @timeout: timeout in second
2995 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2996 *
2997 * Returns 0 for success, non-zero for failure.
2998 */
2999 static int
3000 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
3001 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3002 {
3003 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3004 int i;
3005 u8 failed;
3006 u16 dummy;
3007 __le32 *mfp;
3008
3009 /* make sure doorbell is not in use */
3010 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3011 printk(MPT2SAS_ERR_FMT "doorbell is in use "
3012 " (line=%d)\n", ioc->name, __LINE__);
3013 return -EFAULT;
3014 }
3015
3016 /* clear pending doorbell interrupts from previous state changes */
3017 if (readl(&ioc->chip->HostInterruptStatus) &
3018 MPI2_HIS_IOC2SYS_DB_STATUS)
3019 writel(0, &ioc->chip->HostInterruptStatus);
3020
3021 /* send message to ioc */
3022 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3023 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3024 &ioc->chip->Doorbell);
3025
3026 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3027 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3028 "int failed (line=%d)\n", ioc->name, __LINE__);
3029 return -EFAULT;
3030 }
3031 writel(0, &ioc->chip->HostInterruptStatus);
3032
3033 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3034 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3035 "ack failed (line=%d)\n", ioc->name, __LINE__);
3036 return -EFAULT;
3037 }
3038
3039 /* send message 32-bits at a time */
3040 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3041 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3042 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3043 failed = 1;
3044 }
3045
3046 if (failed) {
3047 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3048 "sending request failed (line=%d)\n", ioc->name, __LINE__);
3049 return -EFAULT;
3050 }
3051
3052 /* now wait for the reply */
3053 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3054 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3055 "int failed (line=%d)\n", ioc->name, __LINE__);
3056 return -EFAULT;
3057 }
3058
3059 /* read the first two 16-bits, it gives the total length of the reply */
3060 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3061 & MPI2_DOORBELL_DATA_MASK);
3062 writel(0, &ioc->chip->HostInterruptStatus);
3063 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3064 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3065 "int failed (line=%d)\n", ioc->name, __LINE__);
3066 return -EFAULT;
3067 }
3068 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3069 & MPI2_DOORBELL_DATA_MASK);
3070 writel(0, &ioc->chip->HostInterruptStatus);
3071
3072 for (i = 2; i < default_reply->MsgLength * 2; i++) {
3073 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3074 printk(MPT2SAS_ERR_FMT "doorbell "
3075 "handshake int failed (line=%d)\n", ioc->name,
3076 __LINE__);
3077 return -EFAULT;
3078 }
3079 if (i >= reply_bytes/2) /* overflow case */
3080 dummy = readl(&ioc->chip->Doorbell);
3081 else
3082 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3083 & MPI2_DOORBELL_DATA_MASK);
3084 writel(0, &ioc->chip->HostInterruptStatus);
3085 }
3086
3087 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3088 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3089 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
3090 " (line=%d)\n", ioc->name, __LINE__));
3091 }
3092 writel(0, &ioc->chip->HostInterruptStatus);
3093
3094 if (ioc->logging_level & MPT_DEBUG_INIT) {
3095 mfp = (__le32 *)reply;
3096 printk(KERN_INFO "\toffset:data\n");
3097 for (i = 0; i < reply_bytes/4; i++)
3098 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3099 le32_to_cpu(mfp[i]));
3100 }
3101 return 0;
3102 }
3103
3104 /**
3105 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
3106 * @ioc: per adapter object
3107 * @mpi_reply: the reply payload from FW
3108 * @mpi_request: the request payload sent to FW
3109 *
3110 * The SAS IO Unit Control Request message allows the host to perform low-level
3111 * operations, such as resets on the PHYs of the IO Unit, also allows the host
3112 * to obtain the IOC assigned device handles for a device if it has other
3113 * identifying information about the device, in addition allows the host to
3114 * remove IOC resources associated with the device.
3115 *
3116 * Returns 0 for success, non-zero for failure.
3117 */
3118 int
3119 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
3120 Mpi2SasIoUnitControlReply_t *mpi_reply,
3121 Mpi2SasIoUnitControlRequest_t *mpi_request)
3122 {
3123 u16 smid;
3124 u32 ioc_state;
3125 unsigned long timeleft;
3126 u8 issue_reset;
3127 int rc;
3128 void *request;
3129 u16 wait_state_count;
3130
3131 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3132 __func__));
3133
3134 mutex_lock(&ioc->base_cmds.mutex);
3135
3136 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3137 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3138 ioc->name, __func__);
3139 rc = -EAGAIN;
3140 goto out;
3141 }
3142
3143 wait_state_count = 0;
3144 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3145 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3146 if (wait_state_count++ == 10) {
3147 printk(MPT2SAS_ERR_FMT
3148 "%s: failed due to ioc not operational\n",
3149 ioc->name, __func__);
3150 rc = -EFAULT;
3151 goto out;
3152 }
3153 ssleep(1);
3154 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3155 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3156 "operational state(count=%d)\n", ioc->name,
3157 __func__, wait_state_count);
3158 }
3159
3160 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3161 if (!smid) {
3162 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3163 ioc->name, __func__);
3164 rc = -EAGAIN;
3165 goto out;
3166 }
3167
3168 rc = 0;
3169 ioc->base_cmds.status = MPT2_CMD_PENDING;
3170 request = mpt2sas_base_get_msg_frame(ioc, smid);
3171 ioc->base_cmds.smid = smid;
3172 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3173 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3174 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
3175 ioc->ioc_link_reset_in_progress = 1;
3176 init_completion(&ioc->base_cmds.done);
3177 mpt2sas_base_put_smid_default(ioc, smid);
3178 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3179 msecs_to_jiffies(10000));
3180 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3181 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
3182 ioc->ioc_link_reset_in_progress)
3183 ioc->ioc_link_reset_in_progress = 0;
3184 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3185 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3186 ioc->name, __func__);
3187 _debug_dump_mf(mpi_request,
3188 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
3189 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3190 issue_reset = 1;
3191 goto issue_host_reset;
3192 }
3193 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3194 memcpy(mpi_reply, ioc->base_cmds.reply,
3195 sizeof(Mpi2SasIoUnitControlReply_t));
3196 else
3197 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
3198 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3199 goto out;
3200
3201 issue_host_reset:
3202 if (issue_reset)
3203 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3204 FORCE_BIG_HAMMER);
3205 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3206 rc = -EFAULT;
3207 out:
3208 mutex_unlock(&ioc->base_cmds.mutex);
3209 return rc;
3210 }
3211
3212
3213 /**
3214 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
3215 * @ioc: per adapter object
3216 * @mpi_reply: the reply payload from FW
3217 * @mpi_request: the request payload sent to FW
3218 *
3219 * The SCSI Enclosure Processor request message causes the IOC to
3220 * communicate with SES devices to control LED status signals.
3221 *
3222 * Returns 0 for success, non-zero for failure.
3223 */
3224 int
3225 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3226 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3227 {
3228 u16 smid;
3229 u32 ioc_state;
3230 unsigned long timeleft;
3231 u8 issue_reset;
3232 int rc;
3233 void *request;
3234 u16 wait_state_count;
3235
3236 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3237 __func__));
3238
3239 mutex_lock(&ioc->base_cmds.mutex);
3240
3241 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3242 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3243 ioc->name, __func__);
3244 rc = -EAGAIN;
3245 goto out;
3246 }
3247
3248 wait_state_count = 0;
3249 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3250 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3251 if (wait_state_count++ == 10) {
3252 printk(MPT2SAS_ERR_FMT
3253 "%s: failed due to ioc not operational\n",
3254 ioc->name, __func__);
3255 rc = -EFAULT;
3256 goto out;
3257 }
3258 ssleep(1);
3259 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3260 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3261 "operational state(count=%d)\n", ioc->name,
3262 __func__, wait_state_count);
3263 }
3264
3265 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3266 if (!smid) {
3267 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3268 ioc->name, __func__);
3269 rc = -EAGAIN;
3270 goto out;
3271 }
3272
3273 rc = 0;
3274 ioc->base_cmds.status = MPT2_CMD_PENDING;
3275 request = mpt2sas_base_get_msg_frame(ioc, smid);
3276 ioc->base_cmds.smid = smid;
3277 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3278 init_completion(&ioc->base_cmds.done);
3279 mpt2sas_base_put_smid_default(ioc, smid);
3280 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3281 msecs_to_jiffies(10000));
3282 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3283 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3284 ioc->name, __func__);
3285 _debug_dump_mf(mpi_request,
3286 sizeof(Mpi2SepRequest_t)/4);
3287 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3288 issue_reset = 1;
3289 goto issue_host_reset;
3290 }
3291 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3292 memcpy(mpi_reply, ioc->base_cmds.reply,
3293 sizeof(Mpi2SepReply_t));
3294 else
3295 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3296 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3297 goto out;
3298
3299 issue_host_reset:
3300 if (issue_reset)
3301 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3302 FORCE_BIG_HAMMER);
3303 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3304 rc = -EFAULT;
3305 out:
3306 mutex_unlock(&ioc->base_cmds.mutex);
3307 return rc;
3308 }
3309
3310 /**
3311 * _base_get_port_facts - obtain port facts reply and save in ioc
3312 * @ioc: per adapter object
3313 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3314 *
3315 * Returns 0 for success, non-zero for failure.
3316 */
3317 static int
3318 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3319 {
3320 Mpi2PortFactsRequest_t mpi_request;
3321 Mpi2PortFactsReply_t mpi_reply;
3322 struct mpt2sas_port_facts *pfacts;
3323 int mpi_reply_sz, mpi_request_sz, r;
3324
3325 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3326 __func__));
3327
3328 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3329 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3330 memset(&mpi_request, 0, mpi_request_sz);
3331 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3332 mpi_request.PortNumber = port;
3333 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3334 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3335
3336 if (r != 0) {
3337 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3338 ioc->name, __func__, r);
3339 return r;
3340 }
3341
3342 pfacts = &ioc->pfacts[port];
3343 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
3344 pfacts->PortNumber = mpi_reply.PortNumber;
3345 pfacts->VP_ID = mpi_reply.VP_ID;
3346 pfacts->VF_ID = mpi_reply.VF_ID;
3347 pfacts->MaxPostedCmdBuffers =
3348 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3349
3350 return 0;
3351 }
3352
3353 /**
3354 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3355 * @ioc: per adapter object
3356 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3357 *
3358 * Returns 0 for success, non-zero for failure.
3359 */
3360 static int
3361 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3362 {
3363 Mpi2IOCFactsRequest_t mpi_request;
3364 Mpi2IOCFactsReply_t mpi_reply;
3365 struct mpt2sas_facts *facts;
3366 int mpi_reply_sz, mpi_request_sz, r;
3367
3368 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3369 __func__));
3370
3371 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3372 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3373 memset(&mpi_request, 0, mpi_request_sz);
3374 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3375 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3376 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3377
3378 if (r != 0) {
3379 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3380 ioc->name, __func__, r);
3381 return r;
3382 }
3383
3384 facts = &ioc->facts;
3385 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
3386 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3387 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3388 facts->VP_ID = mpi_reply.VP_ID;
3389 facts->VF_ID = mpi_reply.VF_ID;
3390 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3391 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3392 facts->WhoInit = mpi_reply.WhoInit;
3393 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3394 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
3395 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3396 facts->MaxReplyDescriptorPostQueueDepth =
3397 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3398 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3399 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3400 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3401 ioc->ir_firmware = 1;
3402 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3403 facts->IOCRequestFrameSize =
3404 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3405 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3406 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3407 ioc->shost->max_id = -1;
3408 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3409 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3410 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3411 facts->HighPriorityCredit =
3412 le16_to_cpu(mpi_reply.HighPriorityCredit);
3413 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3414 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3415
3416 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3417 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3418 facts->MaxChainDepth));
3419 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3420 "reply frame size(%d)\n", ioc->name,
3421 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3422 return 0;
3423 }
3424
3425 /**
3426 * _base_send_ioc_init - send ioc_init to firmware
3427 * @ioc: per adapter object
3428 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3429 *
3430 * Returns 0 for success, non-zero for failure.
3431 */
3432 static int
3433 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3434 {
3435 Mpi2IOCInitRequest_t mpi_request;
3436 Mpi2IOCInitReply_t mpi_reply;
3437 int r;
3438 struct timeval current_time;
3439 u16 ioc_status;
3440
3441 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3442 __func__));
3443
3444 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3445 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3446 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3447 mpi_request.VF_ID = 0; /* TODO */
3448 mpi_request.VP_ID = 0;
3449 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3450 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3451
3452 if (_base_is_controller_msix_enabled(ioc))
3453 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
3454 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3455 mpi_request.ReplyDescriptorPostQueueDepth =
3456 cpu_to_le16(ioc->reply_post_queue_depth);
3457 mpi_request.ReplyFreeQueueDepth =
3458 cpu_to_le16(ioc->reply_free_queue_depth);
3459
3460 mpi_request.SenseBufferAddressHigh =
3461 cpu_to_le32((u64)ioc->sense_dma >> 32);
3462 mpi_request.SystemReplyAddressHigh =
3463 cpu_to_le32((u64)ioc->reply_dma >> 32);
3464 mpi_request.SystemRequestFrameBaseAddress =
3465 cpu_to_le64((u64)ioc->request_dma);
3466 mpi_request.ReplyFreeQueueAddress =
3467 cpu_to_le64((u64)ioc->reply_free_dma);
3468 mpi_request.ReplyDescriptorPostQueueAddress =
3469 cpu_to_le64((u64)ioc->reply_post_free_dma);
3470
3471
3472 /* This time stamp specifies number of milliseconds
3473 * since epoch ~ midnight January 1, 1970.
3474 */
3475 do_gettimeofday(&current_time);
3476 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3477 (current_time.tv_usec / 1000));
3478
3479 if (ioc->logging_level & MPT_DEBUG_INIT) {
3480 __le32 *mfp;
3481 int i;
3482
3483 mfp = (__le32 *)&mpi_request;
3484 printk(KERN_INFO "\toffset:data\n");
3485 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3486 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3487 le32_to_cpu(mfp[i]));
3488 }
3489
3490 r = _base_handshake_req_reply_wait(ioc,
3491 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3492 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3493 sleep_flag);
3494
3495 if (r != 0) {
3496 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3497 ioc->name, __func__, r);
3498 return r;
3499 }
3500
3501 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3502 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3503 mpi_reply.IOCLogInfo) {
3504 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3505 r = -EIO;
3506 }
3507
3508 return 0;
3509 }
3510
3511 /**
3512 * mpt2sas_port_enable_done - command completion routine for port enable
3513 * @ioc: per adapter object
3514 * @smid: system request message index
3515 * @msix_index: MSIX table index supplied by the OS
3516 * @reply: reply message frame(lower 32bit addr)
3517 *
3518 * Return 1 meaning mf should be freed from _base_interrupt
3519 * 0 means the mf is freed from this function.
3520 */
3521 u8
3522 mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
3523 u32 reply)
3524 {
3525 MPI2DefaultReply_t *mpi_reply;
3526 u16 ioc_status;
3527
3528 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
3529 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
3530 return 1;
3531
3532 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
3533 return 1;
3534
3535 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
3536 if (mpi_reply) {
3537 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
3538 memcpy(ioc->port_enable_cmds.reply, mpi_reply,
3539 mpi_reply->MsgLength*4);
3540 }
3541 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
3542
3543 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3544
3545 if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
3546 ioc->port_enable_failed = 1;
3547
3548 if (ioc->is_driver_loading) {
3549 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
3550 mpt2sas_port_enable_complete(ioc);
3551 return 1;
3552 } else {
3553 ioc->start_scan_failed = ioc_status;
3554 ioc->start_scan = 0;
3555 return 1;
3556 }
3557 }
3558 complete(&ioc->port_enable_cmds.done);
3559 return 1;
3560 }
3561
3562
3563 /**
3564 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3565 * @ioc: per adapter object
3566 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3567 *
3568 * Returns 0 for success, non-zero for failure.
3569 */
3570 static int
3571 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3572 {
3573 Mpi2PortEnableRequest_t *mpi_request;
3574 Mpi2PortEnableReply_t *mpi_reply;
3575 unsigned long timeleft;
3576 int r = 0;
3577 u16 smid;
3578 u16 ioc_status;
3579
3580 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3581
3582 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3583 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3584 ioc->name, __func__);
3585 return -EAGAIN;
3586 }
3587
3588 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3589 if (!smid) {
3590 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3591 ioc->name, __func__);
3592 return -EAGAIN;
3593 }
3594
3595 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3596 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3597 ioc->port_enable_cmds.smid = smid;
3598 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3599 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3600
3601 init_completion(&ioc->port_enable_cmds.done);
3602 mpt2sas_base_put_smid_default(ioc, smid);
3603 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
3604 300*HZ);
3605 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
3606 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3607 ioc->name, __func__);
3608 _debug_dump_mf(mpi_request,
3609 sizeof(Mpi2PortEnableRequest_t)/4);
3610 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
3611 r = -EFAULT;
3612 else
3613 r = -ETIME;
3614 goto out;
3615 }
3616 mpi_reply = ioc->port_enable_cmds.reply;
3617
3618 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3619 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3620 printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
3621 ioc->name, __func__, ioc_status);
3622 r = -EFAULT;
3623 goto out;
3624 }
3625 out:
3626 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
3627 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
3628 "SUCCESS" : "FAILED"));
3629 return r;
3630 }
3631
3632 /**
3633 * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
3634 * @ioc: per adapter object
3635 *
3636 * Returns 0 for success, non-zero for failure.
3637 */
3638 int
3639 mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
3640 {
3641 Mpi2PortEnableRequest_t *mpi_request;
3642 u16 smid;
3643
3644 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3645
3646 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3647 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3648 ioc->name, __func__);
3649 return -EAGAIN;
3650 }
3651
3652 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3653 if (!smid) {
3654 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3655 ioc->name, __func__);
3656 return -EAGAIN;
3657 }
3658
3659 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3660 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3661 ioc->port_enable_cmds.smid = smid;
3662 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3663 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3664
3665 mpt2sas_base_put_smid_default(ioc, smid);
3666 return 0;
3667 }
3668
3669 /**
3670 * _base_determine_wait_on_discovery - desposition
3671 * @ioc: per adapter object
3672 *
3673 * Decide whether to wait on discovery to complete. Used to either
3674 * locate boot device, or report volumes ahead of physical devices.
3675 *
3676 * Returns 1 for wait, 0 for don't wait
3677 */
3678 static int
3679 _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
3680 {
3681 /* We wait for discovery to complete if IR firmware is loaded.
3682 * The sas topology events arrive before PD events, so we need time to
3683 * turn on the bit in ioc->pd_handles to indicate PD
3684 * Also, it maybe required to report Volumes ahead of physical
3685 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
3686 */
3687 if (ioc->ir_firmware)
3688 return 1;
3689
3690 /* if no Bios, then we don't need to wait */
3691 if (!ioc->bios_pg3.BiosVersion)
3692 return 0;
3693
3694 /* Bios is present, then we drop down here.
3695 *
3696 * If there any entries in the Bios Page 2, then we wait
3697 * for discovery to complete.
3698 */
3699
3700 /* Current Boot Device */
3701 if ((ioc->bios_pg2.CurrentBootDeviceForm &
3702 MPI2_BIOSPAGE2_FORM_MASK) ==
3703 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3704 /* Request Boot Device */
3705 (ioc->bios_pg2.ReqBootDeviceForm &
3706 MPI2_BIOSPAGE2_FORM_MASK) ==
3707 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3708 /* Alternate Request Boot Device */
3709 (ioc->bios_pg2.ReqAltBootDeviceForm &
3710 MPI2_BIOSPAGE2_FORM_MASK) ==
3711 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
3712 return 0;
3713
3714 return 1;
3715 }
3716
3717
3718 /**
3719 * _base_unmask_events - turn on notification for this event
3720 * @ioc: per adapter object
3721 * @event: firmware event
3722 *
3723 * The mask is stored in ioc->event_masks.
3724 */
3725 static void
3726 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3727 {
3728 u32 desired_event;
3729
3730 if (event >= 128)
3731 return;
3732
3733 desired_event = (1 << (event % 32));
3734
3735 if (event < 32)
3736 ioc->event_masks[0] &= ~desired_event;
3737 else if (event < 64)
3738 ioc->event_masks[1] &= ~desired_event;
3739 else if (event < 96)
3740 ioc->event_masks[2] &= ~desired_event;
3741 else if (event < 128)
3742 ioc->event_masks[3] &= ~desired_event;
3743 }
3744
3745 /**
3746 * _base_event_notification - send event notification
3747 * @ioc: per adapter object
3748 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3749 *
3750 * Returns 0 for success, non-zero for failure.
3751 */
3752 static int
3753 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3754 {
3755 Mpi2EventNotificationRequest_t *mpi_request;
3756 unsigned long timeleft;
3757 u16 smid;
3758 int r = 0;
3759 int i;
3760
3761 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3762 __func__));
3763
3764 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3765 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3766 ioc->name, __func__);
3767 return -EAGAIN;
3768 }
3769
3770 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3771 if (!smid) {
3772 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3773 ioc->name, __func__);
3774 return -EAGAIN;
3775 }
3776 ioc->base_cmds.status = MPT2_CMD_PENDING;
3777 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3778 ioc->base_cmds.smid = smid;
3779 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3780 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3781 mpi_request->VF_ID = 0; /* TODO */
3782 mpi_request->VP_ID = 0;
3783 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3784 mpi_request->EventMasks[i] =
3785 cpu_to_le32(ioc->event_masks[i]);
3786 init_completion(&ioc->base_cmds.done);
3787 mpt2sas_base_put_smid_default(ioc, smid);
3788 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3789 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3790 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3791 ioc->name, __func__);
3792 _debug_dump_mf(mpi_request,
3793 sizeof(Mpi2EventNotificationRequest_t)/4);
3794 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3795 r = -EFAULT;
3796 else
3797 r = -ETIME;
3798 } else
3799 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3800 ioc->name, __func__));
3801 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3802 return r;
3803 }
3804
3805 /**
3806 * mpt2sas_base_validate_event_type - validating event types
3807 * @ioc: per adapter object
3808 * @event: firmware event
3809 *
3810 * This will turn on firmware event notification when application
3811 * ask for that event. We don't mask events that are already enabled.
3812 */
3813 void
3814 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3815 {
3816 int i, j;
3817 u32 event_mask, desired_event;
3818 u8 send_update_to_fw;
3819
3820 for (i = 0, send_update_to_fw = 0; i <
3821 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3822 event_mask = ~event_type[i];
3823 desired_event = 1;
3824 for (j = 0; j < 32; j++) {
3825 if (!(event_mask & desired_event) &&
3826 (ioc->event_masks[i] & desired_event)) {
3827 ioc->event_masks[i] &= ~desired_event;
3828 send_update_to_fw = 1;
3829 }
3830 desired_event = (desired_event << 1);
3831 }
3832 }
3833
3834 if (!send_update_to_fw)
3835 return;
3836
3837 mutex_lock(&ioc->base_cmds.mutex);
3838 _base_event_notification(ioc, CAN_SLEEP);
3839 mutex_unlock(&ioc->base_cmds.mutex);
3840 }
3841
3842 /**
3843 * _base_diag_reset - the "big hammer" start of day reset
3844 * @ioc: per adapter object
3845 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3846 *
3847 * Returns 0 for success, non-zero for failure.
3848 */
3849 static int
3850 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3851 {
3852 u32 host_diagnostic;
3853 u32 ioc_state;
3854 u32 count;
3855 u32 hcb_size;
3856
3857 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3858 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3859 ioc->name));
3860
3861 count = 0;
3862 do {
3863 /* Write magic sequence to WriteSequence register
3864 * Loop until in diagnostic mode
3865 */
3866 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3867 "sequence\n", ioc->name));
3868 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3869 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3870 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3871 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3872 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3873 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3874 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3875
3876 /* wait 100 msec */
3877 if (sleep_flag == CAN_SLEEP)
3878 msleep(100);
3879 else
3880 mdelay(100);
3881
3882 if (count++ > 20)
3883 goto out;
3884
3885 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3886 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3887 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3888 ioc->name, count, host_diagnostic));
3889
3890 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3891
3892 hcb_size = readl(&ioc->chip->HCBSize);
3893
3894 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3895 ioc->name));
3896 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3897 &ioc->chip->HostDiagnostic);
3898
3899 /* don't access any registers for 50 milliseconds */
3900 msleep(50);
3901
3902 /* 300 second max wait */
3903 for (count = 0; count < 3000000 ; count++) {
3904
3905 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3906
3907 if (host_diagnostic == 0xFFFFFFFF)
3908 goto out;
3909 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3910 break;
3911
3912 /* wait 100 msec */
3913 if (sleep_flag == CAN_SLEEP)
3914 msleep(1);
3915 else
3916 mdelay(1);
3917 }
3918
3919 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3920
3921 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3922 "assuming the HCB Address points to good F/W\n",
3923 ioc->name));
3924 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3925 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3926 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3927
3928 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3929 "re-enable the HCDW\n", ioc->name));
3930 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3931 &ioc->chip->HCBSize);
3932 }
3933
3934 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3935 ioc->name));
3936 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3937 &ioc->chip->HostDiagnostic);
3938
3939 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3940 "diagnostic register\n", ioc->name));
3941 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3942
3943 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3944 "READY state\n", ioc->name));
3945 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3946 sleep_flag);
3947 if (ioc_state) {
3948 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3949 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3950 goto out;
3951 }
3952
3953 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3954 return 0;
3955
3956 out:
3957 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3958 return -EFAULT;
3959 }
3960
3961 /**
3962 * _base_make_ioc_ready - put controller in READY state
3963 * @ioc: per adapter object
3964 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3965 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3966 *
3967 * Returns 0 for success, non-zero for failure.
3968 */
3969 static int
3970 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3971 enum reset_type type)
3972 {
3973 u32 ioc_state;
3974 int rc;
3975
3976 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3977 __func__));
3978
3979 if (ioc->pci_error_recovery)
3980 return 0;
3981
3982 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3983 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3984 ioc->name, __func__, ioc_state));
3985
3986 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3987 return 0;
3988
3989 if (ioc_state & MPI2_DOORBELL_USED) {
3990 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
3991 "active!\n", ioc->name));
3992 goto issue_diag_reset;
3993 }
3994
3995 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3996 mpt2sas_base_fault_info(ioc, ioc_state &
3997 MPI2_DOORBELL_DATA_MASK);
3998 goto issue_diag_reset;
3999 }
4000
4001 if (type == FORCE_BIG_HAMMER)
4002 goto issue_diag_reset;
4003
4004 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4005 if (!(_base_send_ioc_reset(ioc,
4006 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4007 ioc->ioc_reset_count++;
4008 return 0;
4009 }
4010
4011 issue_diag_reset:
4012 rc = _base_diag_reset(ioc, CAN_SLEEP);
4013 ioc->ioc_reset_count++;
4014 return rc;
4015 }
4016
4017 /**
4018 * _base_make_ioc_operational - put controller in OPERATIONAL state
4019 * @ioc: per adapter object
4020 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4021 *
4022 * Returns 0 for success, non-zero for failure.
4023 */
4024 static int
4025 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4026 {
4027 int r, i;
4028 unsigned long flags;
4029 u32 reply_address;
4030 u16 smid;
4031 struct _tr_list *delayed_tr, *delayed_tr_next;
4032 u8 hide_flag;
4033 struct adapter_reply_queue *reply_q;
4034 long reply_post_free;
4035 u32 reply_post_free_sz;
4036
4037 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4038 __func__));
4039
4040 /* clean the delayed target reset list */
4041 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4042 &ioc->delayed_tr_list, list) {
4043 list_del(&delayed_tr->list);
4044 kfree(delayed_tr);
4045 }
4046
4047 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4048 &ioc->delayed_tr_volume_list, list) {
4049 list_del(&delayed_tr->list);
4050 kfree(delayed_tr);
4051 }
4052
4053 /* initialize the scsi lookup free list */
4054 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4055 INIT_LIST_HEAD(&ioc->free_list);
4056 smid = 1;
4057 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
4058 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
4059 ioc->scsi_lookup[i].cb_idx = 0xFF;
4060 ioc->scsi_lookup[i].smid = smid;
4061 ioc->scsi_lookup[i].scmd = NULL;
4062 ioc->scsi_lookup[i].direct_io = 0;
4063 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
4064 &ioc->free_list);
4065 }
4066
4067 /* hi-priority queue */
4068 INIT_LIST_HEAD(&ioc->hpr_free_list);
4069 smid = ioc->hi_priority_smid;
4070 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
4071 ioc->hpr_lookup[i].cb_idx = 0xFF;
4072 ioc->hpr_lookup[i].smid = smid;
4073 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
4074 &ioc->hpr_free_list);
4075 }
4076
4077 /* internal queue */
4078 INIT_LIST_HEAD(&ioc->internal_free_list);
4079 smid = ioc->internal_smid;
4080 for (i = 0; i < ioc->internal_depth; i++, smid++) {
4081 ioc->internal_lookup[i].cb_idx = 0xFF;
4082 ioc->internal_lookup[i].smid = smid;
4083 list_add_tail(&ioc->internal_lookup[i].tracker_list,
4084 &ioc->internal_free_list);
4085 }
4086
4087 /* chain pool */
4088 INIT_LIST_HEAD(&ioc->free_chain_list);
4089 for (i = 0; i < ioc->chain_depth; i++)
4090 list_add_tail(&ioc->chain_lookup[i].tracker_list,
4091 &ioc->free_chain_list);
4092
4093 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4094
4095 /* initialize Reply Free Queue */
4096 for (i = 0, reply_address = (u32)ioc->reply_dma ;
4097 i < ioc->reply_free_queue_depth ; i++, reply_address +=
4098 ioc->reply_sz)
4099 ioc->reply_free[i] = cpu_to_le32(reply_address);
4100
4101 /* initialize reply queues */
4102 if (ioc->is_driver_loading)
4103 _base_assign_reply_queues(ioc);
4104
4105 /* initialize Reply Post Free Queue */
4106 reply_post_free = (long)ioc->reply_post_free;
4107 reply_post_free_sz = ioc->reply_post_queue_depth *
4108 sizeof(Mpi2DefaultReplyDescriptor_t);
4109 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4110 reply_q->reply_post_host_index = 0;
4111 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
4112 reply_post_free;
4113 for (i = 0; i < ioc->reply_post_queue_depth; i++)
4114 reply_q->reply_post_free[i].Words =
4115 cpu_to_le64(ULLONG_MAX);
4116 if (!_base_is_controller_msix_enabled(ioc))
4117 goto skip_init_reply_post_free_queue;
4118 reply_post_free += reply_post_free_sz;
4119 }
4120 skip_init_reply_post_free_queue:
4121
4122 r = _base_send_ioc_init(ioc, sleep_flag);
4123 if (r)
4124 return r;
4125
4126 /* initialize reply free host index */
4127 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
4128 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
4129
4130 /* initialize reply post host index */
4131 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4132 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
4133 &ioc->chip->ReplyPostHostIndex);
4134 if (!_base_is_controller_msix_enabled(ioc))
4135 goto skip_init_reply_post_host_index;
4136 }
4137
4138 skip_init_reply_post_host_index:
4139
4140 _base_unmask_interrupts(ioc);
4141
4142 r = _base_event_notification(ioc, sleep_flag);
4143 if (r)
4144 return r;
4145
4146 if (sleep_flag == CAN_SLEEP)
4147 _base_static_config_pages(ioc);
4148
4149
4150 if (ioc->is_driver_loading) {
4151 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
4152 == 0x80) {
4153 hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
4154 MFG_PAGE10_HIDE_SSDS_MASK);
4155 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
4156 ioc->mfg_pg10_hide_flag = hide_flag;
4157 }
4158 ioc->wait_for_discovery_to_complete =
4159 _base_determine_wait_on_discovery(ioc);
4160 return r; /* scan_start and scan_finished support */
4161 }
4162 r = _base_send_port_enable(ioc, sleep_flag);
4163 if (r)
4164 return r;
4165
4166 return r;
4167 }
4168
4169 /**
4170 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
4171 * @ioc: per adapter object
4172 *
4173 * Return nothing.
4174 */
4175 void
4176 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
4177 {
4178 struct pci_dev *pdev = ioc->pdev;
4179
4180 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4181 __func__));
4182
4183 _base_mask_interrupts(ioc);
4184 ioc->shost_recovery = 1;
4185 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4186 ioc->shost_recovery = 0;
4187 _base_free_irq(ioc);
4188 _base_disable_msix(ioc);
4189 if (ioc->chip_phys)
4190 iounmap(ioc->chip);
4191 ioc->chip_phys = 0;
4192 pci_release_selected_regions(ioc->pdev, ioc->bars);
4193 pci_disable_pcie_error_reporting(pdev);
4194 pci_disable_device(pdev);
4195 return;
4196 }
4197
4198 /**
4199 * mpt2sas_base_attach - attach controller instance
4200 * @ioc: per adapter object
4201 *
4202 * Returns 0 for success, non-zero for failure.
4203 */
4204 int
4205 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
4206 {
4207 int r, i;
4208 int cpu_id, last_cpu_id = 0;
4209
4210 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4211 __func__));
4212
4213 /* setup cpu_msix_table */
4214 ioc->cpu_count = num_online_cpus();
4215 for_each_online_cpu(cpu_id)
4216 last_cpu_id = cpu_id;
4217 ioc->cpu_msix_table_sz = last_cpu_id + 1;
4218 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
4219 ioc->reply_queue_count = 1;
4220 if (!ioc->cpu_msix_table) {
4221 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
4222 "cpu_msix_table failed!!!\n", ioc->name));
4223 r = -ENOMEM;
4224 goto out_free_resources;
4225 }
4226
4227 if (ioc->is_warpdrive) {
4228 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
4229 sizeof(resource_size_t *), GFP_KERNEL);
4230 if (!ioc->reply_post_host_index) {
4231 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
4232 "for cpu_msix_table failed!!!\n", ioc->name));
4233 r = -ENOMEM;
4234 goto out_free_resources;
4235 }
4236 }
4237
4238 r = mpt2sas_base_map_resources(ioc);
4239 if (r)
4240 goto out_free_resources;
4241
4242 if (ioc->is_warpdrive) {
4243 ioc->reply_post_host_index[0] =
4244 (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
4245
4246 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
4247 ioc->reply_post_host_index[i] = (resource_size_t *)
4248 ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
4249 * 4)));
4250 }
4251
4252 pci_set_drvdata(ioc->pdev, ioc->shost);
4253 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4254 if (r)
4255 goto out_free_resources;
4256
4257 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4258 if (r)
4259 goto out_free_resources;
4260
4261 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
4262 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
4263 if (!ioc->pfacts) {
4264 r = -ENOMEM;
4265 goto out_free_resources;
4266 }
4267
4268 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
4269 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
4270 if (r)
4271 goto out_free_resources;
4272 }
4273
4274 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
4275 if (r)
4276 goto out_free_resources;
4277
4278 init_waitqueue_head(&ioc->reset_wq);
4279
4280 /* allocate memory pd handle bitmask list */
4281 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
4282 if (ioc->facts.MaxDevHandle % 8)
4283 ioc->pd_handles_sz++;
4284 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
4285 GFP_KERNEL);
4286 if (!ioc->pd_handles) {
4287 r = -ENOMEM;
4288 goto out_free_resources;
4289 }
4290
4291 ioc->fwfault_debug = mpt2sas_fwfault_debug;
4292
4293 /* base internal command bits */
4294 mutex_init(&ioc->base_cmds.mutex);
4295 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4296 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4297
4298 /* port_enable command bits */
4299 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4300 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
4301
4302 /* transport internal command bits */
4303 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4304 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
4305 mutex_init(&ioc->transport_cmds.mutex);
4306
4307 /* scsih internal command bits */
4308 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4309 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
4310 mutex_init(&ioc->scsih_cmds.mutex);
4311
4312 /* task management internal command bits */
4313 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4314 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
4315 mutex_init(&ioc->tm_cmds.mutex);
4316
4317 /* config page internal command bits */
4318 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4319 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
4320 mutex_init(&ioc->config_cmds.mutex);
4321
4322 /* ctl module internal command bits */
4323 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4324 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4325 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
4326 mutex_init(&ioc->ctl_cmds.mutex);
4327
4328 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4329 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4330 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
4331 !ioc->ctl_cmds.sense) {
4332 r = -ENOMEM;
4333 goto out_free_resources;
4334 }
4335
4336 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4337 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4338 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
4339 r = -ENOMEM;
4340 goto out_free_resources;
4341 }
4342
4343 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4344 ioc->event_masks[i] = -1;
4345
4346 /* here we enable the events we care about */
4347 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
4348 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
4349 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
4350 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
4351 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
4352 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
4353 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
4354 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
4355 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
4356 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
4357 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
4358 if (r)
4359 goto out_free_resources;
4360
4361 if (missing_delay[0] != -1 && missing_delay[1] != -1)
4362 _base_update_missing_delay(ioc, missing_delay[0],
4363 missing_delay[1]);
4364
4365 return 0;
4366
4367 out_free_resources:
4368
4369 ioc->remove_host = 1;
4370 mpt2sas_base_free_resources(ioc);
4371 _base_release_memory_pools(ioc);
4372 pci_set_drvdata(ioc->pdev, NULL);
4373 kfree(ioc->cpu_msix_table);
4374 if (ioc->is_warpdrive)
4375 kfree(ioc->reply_post_host_index);
4376 kfree(ioc->pd_handles);
4377 kfree(ioc->tm_cmds.reply);
4378 kfree(ioc->transport_cmds.reply);
4379 kfree(ioc->scsih_cmds.reply);
4380 kfree(ioc->config_cmds.reply);
4381 kfree(ioc->base_cmds.reply);
4382 kfree(ioc->port_enable_cmds.reply);
4383 kfree(ioc->ctl_cmds.reply);
4384 kfree(ioc->ctl_cmds.sense);
4385 kfree(ioc->pfacts);
4386 ioc->ctl_cmds.reply = NULL;
4387 ioc->base_cmds.reply = NULL;
4388 ioc->tm_cmds.reply = NULL;
4389 ioc->scsih_cmds.reply = NULL;
4390 ioc->transport_cmds.reply = NULL;
4391 ioc->config_cmds.reply = NULL;
4392 ioc->pfacts = NULL;
4393 return r;
4394 }
4395
4396
4397 /**
4398 * mpt2sas_base_detach - remove controller instance
4399 * @ioc: per adapter object
4400 *
4401 * Return nothing.
4402 */
4403 void
4404 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4405 {
4406
4407 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4408 __func__));
4409
4410 mpt2sas_base_stop_watchdog(ioc);
4411 mpt2sas_base_free_resources(ioc);
4412 _base_release_memory_pools(ioc);
4413 pci_set_drvdata(ioc->pdev, NULL);
4414 kfree(ioc->cpu_msix_table);
4415 if (ioc->is_warpdrive)
4416 kfree(ioc->reply_post_host_index);
4417 kfree(ioc->pd_handles);
4418 kfree(ioc->pfacts);
4419 kfree(ioc->ctl_cmds.reply);
4420 kfree(ioc->ctl_cmds.sense);
4421 kfree(ioc->base_cmds.reply);
4422 kfree(ioc->port_enable_cmds.reply);
4423 kfree(ioc->tm_cmds.reply);
4424 kfree(ioc->transport_cmds.reply);
4425 kfree(ioc->scsih_cmds.reply);
4426 kfree(ioc->config_cmds.reply);
4427 }
4428
4429 /**
4430 * _base_reset_handler - reset callback handler (for base)
4431 * @ioc: per adapter object
4432 * @reset_phase: phase
4433 *
4434 * The handler for doing any required cleanup or initialization.
4435 *
4436 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4437 * MPT2_IOC_DONE_RESET
4438 *
4439 * Return nothing.
4440 */
4441 static void
4442 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4443 {
4444 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4445 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4446 switch (reset_phase) {
4447 case MPT2_IOC_PRE_RESET:
4448 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4449 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4450 break;
4451 case MPT2_IOC_AFTER_RESET:
4452 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4453 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4454 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4455 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4456 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4457 complete(&ioc->transport_cmds.done);
4458 }
4459 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4460 ioc->base_cmds.status |= MPT2_CMD_RESET;
4461 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4462 complete(&ioc->base_cmds.done);
4463 }
4464 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
4465 ioc->port_enable_failed = 1;
4466 ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
4467 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
4468 if (ioc->is_driver_loading) {
4469 ioc->start_scan_failed =
4470 MPI2_IOCSTATUS_INTERNAL_ERROR;
4471 ioc->start_scan = 0;
4472 ioc->port_enable_cmds.status =
4473 MPT2_CMD_NOT_USED;
4474 } else
4475 complete(&ioc->port_enable_cmds.done);
4476
4477 }
4478 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4479 ioc->config_cmds.status |= MPT2_CMD_RESET;
4480 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4481 ioc->config_cmds.smid = USHRT_MAX;
4482 complete(&ioc->config_cmds.done);
4483 }
4484 break;
4485 case MPT2_IOC_DONE_RESET:
4486 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4487 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4488 break;
4489 }
4490 }
4491
4492 /**
4493 * _wait_for_commands_to_complete - reset controller
4494 * @ioc: Pointer to MPT_ADAPTER structure
4495 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4496 *
4497 * This function waiting(3s) for all pending commands to complete
4498 * prior to putting controller in reset.
4499 */
4500 static void
4501 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4502 {
4503 u32 ioc_state;
4504 unsigned long flags;
4505 u16 i;
4506
4507 ioc->pending_io_count = 0;
4508 if (sleep_flag != CAN_SLEEP)
4509 return;
4510
4511 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4512 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4513 return;
4514
4515 /* pending command count */
4516 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4517 for (i = 0; i < ioc->scsiio_depth; i++)
4518 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4519 ioc->pending_io_count++;
4520 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4521
4522 if (!ioc->pending_io_count)
4523 return;
4524
4525 /* wait for pending commands to complete */
4526 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4527 }
4528
4529 /**
4530 * mpt2sas_base_hard_reset_handler - reset controller
4531 * @ioc: Pointer to MPT_ADAPTER structure
4532 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4533 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4534 *
4535 * Returns 0 for success, non-zero for failure.
4536 */
4537 int
4538 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4539 enum reset_type type)
4540 {
4541 int r;
4542 unsigned long flags;
4543
4544 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4545 __func__));
4546
4547 if (ioc->pci_error_recovery) {
4548 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4549 ioc->name, __func__);
4550 r = 0;
4551 goto out;
4552 }
4553
4554 if (mpt2sas_fwfault_debug)
4555 mpt2sas_halt_firmware(ioc);
4556
4557 /* TODO - What we really should be doing is pulling
4558 * out all the code associated with NO_SLEEP; its never used.
4559 * That is legacy code from mpt fusion driver, ported over.
4560 * I will leave this BUG_ON here for now till its been resolved.
4561 */
4562 BUG_ON(sleep_flag == NO_SLEEP);
4563
4564 /* wait for an active reset in progress to complete */
4565 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4566 do {
4567 ssleep(1);
4568 } while (ioc->shost_recovery == 1);
4569 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4570 __func__));
4571 return ioc->ioc_reset_in_progress_status;
4572 }
4573
4574 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4575 ioc->shost_recovery = 1;
4576 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4577
4578 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4579 _wait_for_commands_to_complete(ioc, sleep_flag);
4580 _base_mask_interrupts(ioc);
4581 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4582 if (r)
4583 goto out;
4584 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4585
4586 /* If this hard reset is called while port enable is active, then
4587 * there is no reason to call make_ioc_operational
4588 */
4589 if (ioc->is_driver_loading && ioc->port_enable_failed) {
4590 ioc->remove_host = 1;
4591 r = -EFAULT;
4592 goto out;
4593 }
4594 r = _base_make_ioc_operational(ioc, sleep_flag);
4595 if (!r)
4596 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4597 out:
4598 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4599 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4600
4601 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4602 ioc->ioc_reset_in_progress_status = r;
4603 ioc->shost_recovery = 0;
4604 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4605 mutex_unlock(&ioc->reset_in_progress_mutex);
4606
4607 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4608 __func__));
4609 return r;
4610 }
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