2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <linux/blk-mq-pci.h>
17 #include <linux/refcount.h>
19 #include <scsi/scsi_tcq.h>
20 #include <scsi/scsicam.h>
21 #include <scsi/scsi_transport.h>
22 #include <scsi/scsi_transport_fc.h>
24 #include "qla_target.h"
29 char qla2x00_version_str
[40];
31 static int apidev_major
;
34 * SRB allocation cache
36 struct kmem_cache
*srb_cachep
;
38 int ql2xfulldump_on_mpifail
;
39 module_param(ql2xfulldump_on_mpifail
, int, S_IRUGO
| S_IWUSR
);
40 MODULE_PARM_DESC(ql2xfulldump_on_mpifail
,
41 "Set this to take full dump on MPI hang.");
44 * CT6 CTX allocation cache
46 static struct kmem_cache
*ctx_cachep
;
48 * error level for logging
50 uint ql_errlev
= 0x8001;
52 static int ql2xenableclass2
;
53 module_param(ql2xenableclass2
, int, S_IRUGO
|S_IRUSR
);
54 MODULE_PARM_DESC(ql2xenableclass2
,
55 "Specify if Class 2 operations are supported from the very "
56 "beginning. Default is 0 - class 2 not supported.");
59 int ql2xlogintimeout
= 20;
60 module_param(ql2xlogintimeout
, int, S_IRUGO
);
61 MODULE_PARM_DESC(ql2xlogintimeout
,
62 "Login timeout value in seconds.");
64 int qlport_down_retry
;
65 module_param(qlport_down_retry
, int, S_IRUGO
);
66 MODULE_PARM_DESC(qlport_down_retry
,
67 "Maximum number of command retries to a port that returns "
68 "a PORT-DOWN status.");
70 int ql2xplogiabsentdevice
;
71 module_param(ql2xplogiabsentdevice
, int, S_IRUGO
|S_IWUSR
);
72 MODULE_PARM_DESC(ql2xplogiabsentdevice
,
73 "Option to enable PLOGI to devices that are not present after "
74 "a Fabric scan. This is needed for several broken switches. "
75 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
77 int ql2xloginretrycount
;
78 module_param(ql2xloginretrycount
, int, S_IRUGO
);
79 MODULE_PARM_DESC(ql2xloginretrycount
,
80 "Specify an alternate value for the NVRAM login retry count.");
82 int ql2xallocfwdump
= 1;
83 module_param(ql2xallocfwdump
, int, S_IRUGO
);
84 MODULE_PARM_DESC(ql2xallocfwdump
,
85 "Option to enable allocation of memory for a firmware dump "
86 "during HBA initialization. Memory allocation requirements "
87 "vary by ISP type. Default is 1 - allocate memory.");
89 int ql2xextended_error_logging
;
90 module_param(ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
91 module_param_named(logging
, ql2xextended_error_logging
, int, S_IRUGO
|S_IWUSR
);
92 MODULE_PARM_DESC(ql2xextended_error_logging
,
93 "Option to enable extended error logging,\n"
94 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
95 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
96 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
97 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
98 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
99 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
100 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
101 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
102 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
103 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
104 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
105 "\t\t0x1e400000 - Preferred value for capturing essential "
106 "debug information (equivalent to old "
107 "ql2xextended_error_logging=1).\n"
108 "\t\tDo LOGICAL OR of the value to enable more than one level");
110 int ql2xshiftctondsd
= 6;
111 module_param(ql2xshiftctondsd
, int, S_IRUGO
);
112 MODULE_PARM_DESC(ql2xshiftctondsd
,
113 "Set to control shifting of command type processing "
114 "based on total number of SG elements.");
116 int ql2xfdmienable
= 1;
117 module_param(ql2xfdmienable
, int, S_IRUGO
|S_IWUSR
);
118 module_param_named(fdmi
, ql2xfdmienable
, int, S_IRUGO
|S_IWUSR
);
119 MODULE_PARM_DESC(ql2xfdmienable
,
120 "Enables FDMI registrations. "
121 "0 - no FDMI registrations. "
122 "1 - provide FDMI registrations (default).");
124 #define MAX_Q_DEPTH 64
125 static int ql2xmaxqdepth
= MAX_Q_DEPTH
;
126 module_param(ql2xmaxqdepth
, int, S_IRUGO
|S_IWUSR
);
127 MODULE_PARM_DESC(ql2xmaxqdepth
,
128 "Maximum queue depth to set for each LUN. "
131 int ql2xenabledif
= 2;
132 module_param(ql2xenabledif
, int, S_IRUGO
);
133 MODULE_PARM_DESC(ql2xenabledif
,
134 " Enable T10-CRC-DIF:\n"
136 " 0 -- No DIF Support\n"
137 " 1 -- Enable DIF for all types\n"
138 " 2 -- Enable DIF for all types, except Type 0.\n");
140 #if (IS_ENABLED(CONFIG_NVME_FC))
141 int ql2xnvmeenable
= 1;
145 module_param(ql2xnvmeenable
, int, 0644);
146 MODULE_PARM_DESC(ql2xnvmeenable
,
147 "Enables NVME support. "
148 "0 - no NVMe. Default is Y");
150 int ql2xenablehba_err_chk
= 2;
151 module_param(ql2xenablehba_err_chk
, int, S_IRUGO
|S_IWUSR
);
152 MODULE_PARM_DESC(ql2xenablehba_err_chk
,
153 " Enable T10-CRC-DIF Error isolation by HBA:\n"
155 " 0 -- Error isolation disabled\n"
156 " 1 -- Error isolation enabled only for DIX Type 0\n"
157 " 2 -- Error isolation enabled for all Types\n");
159 int ql2xiidmaenable
= 1;
160 module_param(ql2xiidmaenable
, int, S_IRUGO
);
161 MODULE_PARM_DESC(ql2xiidmaenable
,
162 "Enables iIDMA settings "
163 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
165 int ql2xmqsupport
= 1;
166 module_param(ql2xmqsupport
, int, S_IRUGO
);
167 MODULE_PARM_DESC(ql2xmqsupport
,
168 "Enable on demand multiple queue pairs support "
169 "Default is 1 for supported. "
170 "Set it to 0 to turn off mq qpair support.");
173 module_param(ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
174 module_param_named(fwload
, ql2xfwloadbin
, int, S_IRUGO
|S_IWUSR
);
175 MODULE_PARM_DESC(ql2xfwloadbin
,
176 "Option to specify location from which to load ISP firmware:.\n"
177 " 2 -- load firmware via the request_firmware() (hotplug).\n"
179 " 1 -- load firmware from flash.\n"
180 " 0 -- use default semantics.\n");
183 module_param(ql2xetsenable
, int, S_IRUGO
);
184 MODULE_PARM_DESC(ql2xetsenable
,
185 "Enables firmware ETS burst."
186 "Default is 0 - skip ETS enablement.");
189 module_param(ql2xdbwr
, int, S_IRUGO
|S_IWUSR
);
190 MODULE_PARM_DESC(ql2xdbwr
,
191 "Option to specify scheme for request queue posting.\n"
192 " 0 -- Regular doorbell.\n"
193 " 1 -- CAMRAM doorbell (faster).\n");
195 int ql2xtargetreset
= 1;
196 module_param(ql2xtargetreset
, int, S_IRUGO
);
197 MODULE_PARM_DESC(ql2xtargetreset
,
198 "Enable target reset."
199 "Default is 1 - use hw defaults.");
202 module_param(ql2xgffidenable
, int, S_IRUGO
);
203 MODULE_PARM_DESC(ql2xgffidenable
,
204 "Enables GFF_ID checks of port type. "
205 "Default is 0 - Do not use GFF_ID information.");
207 int ql2xasynctmfenable
= 1;
208 module_param(ql2xasynctmfenable
, int, S_IRUGO
);
209 MODULE_PARM_DESC(ql2xasynctmfenable
,
210 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
211 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
213 int ql2xdontresethba
;
214 module_param(ql2xdontresethba
, int, S_IRUGO
|S_IWUSR
);
215 MODULE_PARM_DESC(ql2xdontresethba
,
216 "Option to specify reset behaviour.\n"
217 " 0 (Default) -- Reset on failure.\n"
218 " 1 -- Do not reset on failure.\n");
220 uint64_t ql2xmaxlun
= MAX_LUNS
;
221 module_param(ql2xmaxlun
, ullong
, S_IRUGO
);
222 MODULE_PARM_DESC(ql2xmaxlun
,
223 "Defines the maximum LU number to register with the SCSI "
224 "midlayer. Default is 65535.");
226 int ql2xmdcapmask
= 0x1F;
227 module_param(ql2xmdcapmask
, int, S_IRUGO
);
228 MODULE_PARM_DESC(ql2xmdcapmask
,
229 "Set the Minidump driver capture mask level. "
230 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
232 int ql2xmdenable
= 1;
233 module_param(ql2xmdenable
, int, S_IRUGO
);
234 MODULE_PARM_DESC(ql2xmdenable
,
235 "Enable/disable MiniDump. "
236 "0 - MiniDump disabled. "
237 "1 (Default) - MiniDump enabled.");
240 module_param(ql2xexlogins
, uint
, S_IRUGO
|S_IWUSR
);
241 MODULE_PARM_DESC(ql2xexlogins
,
242 "Number of extended Logins. "
243 "0 (Default)- Disabled.");
245 int ql2xexchoffld
= 1024;
246 module_param(ql2xexchoffld
, uint
, 0644);
247 MODULE_PARM_DESC(ql2xexchoffld
,
248 "Number of target exchanges.");
250 int ql2xiniexchg
= 1024;
251 module_param(ql2xiniexchg
, uint
, 0644);
252 MODULE_PARM_DESC(ql2xiniexchg
,
253 "Number of initiator exchanges.");
256 module_param(ql2xfwholdabts
, int, S_IRUGO
);
257 MODULE_PARM_DESC(ql2xfwholdabts
,
258 "Allow FW to hold status IOCB until ABTS rsp received. "
259 "0 (Default) Do not set fw option. "
260 "1 - Set fw option to hold ABTS.");
262 int ql2xmvasynctoatio
= 1;
263 module_param(ql2xmvasynctoatio
, int, S_IRUGO
|S_IWUSR
);
264 MODULE_PARM_DESC(ql2xmvasynctoatio
,
265 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
266 "0 (Default). Do not move IOCBs"
269 int ql2xautodetectsfp
= 1;
270 module_param(ql2xautodetectsfp
, int, 0444);
271 MODULE_PARM_DESC(ql2xautodetectsfp
,
272 "Detect SFP range and set appropriate distance.\n"
273 "1 (Default): Enable\n");
275 int ql2xenablemsix
= 1;
276 module_param(ql2xenablemsix
, int, 0444);
277 MODULE_PARM_DESC(ql2xenablemsix
,
278 "Set to enable MSI or MSI-X interrupt mechanism.\n"
279 " Default is 1, enable MSI-X interrupt mechanism.\n"
280 " 0 -- enable traditional pin-based mechanism.\n"
281 " 1 -- enable MSI-X interrupt mechanism.\n"
282 " 2 -- enable MSI interrupt mechanism.\n");
284 int qla2xuseresexchforels
;
285 module_param(qla2xuseresexchforels
, int, 0444);
286 MODULE_PARM_DESC(qla2xuseresexchforels
,
287 "Reserve 1/2 of emergency exchanges for ELS.\n"
288 " 0 (default): disabled");
290 static int ql2xprotmask
;
291 module_param(ql2xprotmask
, int, 0644);
292 MODULE_PARM_DESC(ql2xprotmask
,
293 "Override DIF/DIX protection capabilities mask\n"
294 "Default is 0 which sets protection mask based on "
295 "capabilities reported by HBA firmware.\n");
297 static int ql2xprotguard
;
298 module_param(ql2xprotguard
, int, 0644);
299 MODULE_PARM_DESC(ql2xprotguard
, "Override choice of DIX checksum\n"
300 " 0 -- Let HBA firmware decide\n"
301 " 1 -- Force T10 CRC\n"
302 " 2 -- Force IP checksum\n");
304 int ql2xdifbundlinginternalbuffers
;
305 module_param(ql2xdifbundlinginternalbuffers
, int, 0644);
306 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers
,
307 "Force using internal buffers for DIF information\n"
308 "0 (Default). Based on check.\n"
309 "1 Force using internal buffers\n");
312 module_param(ql2xsmartsan
, int, 0444);
313 module_param_named(smartsan
, ql2xsmartsan
, int, 0444);
314 MODULE_PARM_DESC(ql2xsmartsan
,
315 "Send SmartSAN Management Attributes for FDMI Registration."
316 " Default is 0 - No SmartSAN registration,"
317 " 1 - Register SmartSAN Management Attributes.");
320 module_param(ql2xrdpenable
, int, 0444);
321 module_param_named(rdpenable
, ql2xrdpenable
, int, 0444);
322 MODULE_PARM_DESC(ql2xrdpenable
,
323 "Enables RDP responses. "
324 "0 - no RDP responses (default). "
325 "1 - provide RDP responses.");
327 static void qla2x00_clear_drv_active(struct qla_hw_data
*);
328 static void qla2x00_free_device(scsi_qla_host_t
*);
329 static int qla2xxx_map_queues(struct Scsi_Host
*shost
);
330 static void qla2x00_destroy_deferred_work(struct qla_hw_data
*);
333 static struct scsi_transport_template
*qla2xxx_transport_template
= NULL
;
334 struct scsi_transport_template
*qla2xxx_transport_vport_template
= NULL
;
336 /* TODO Convert to inlines
342 qla2x00_start_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
344 timer_setup(&vha
->timer
, qla2x00_timer
, 0);
345 vha
->timer
.expires
= jiffies
+ interval
* HZ
;
346 add_timer(&vha
->timer
);
347 vha
->timer_active
= 1;
351 qla2x00_restart_timer(scsi_qla_host_t
*vha
, unsigned long interval
)
353 /* Currently used for 82XX only. */
354 if (vha
->device_flags
& DFLG_DEV_FAILED
) {
355 ql_dbg(ql_dbg_timer
, vha
, 0x600d,
356 "Device in a failed state, returning.\n");
360 mod_timer(&vha
->timer
, jiffies
+ interval
* HZ
);
363 static __inline__
void
364 qla2x00_stop_timer(scsi_qla_host_t
*vha
)
366 del_timer_sync(&vha
->timer
);
367 vha
->timer_active
= 0;
370 static int qla2x00_do_dpc(void *data
);
372 static void qla2x00_rst_aen(scsi_qla_host_t
*);
374 static int qla2x00_mem_alloc(struct qla_hw_data
*, uint16_t, uint16_t,
375 struct req_que
**, struct rsp_que
**);
376 static void qla2x00_free_fw_dump(struct qla_hw_data
*);
377 static void qla2x00_mem_free(struct qla_hw_data
*);
378 int qla2xxx_mqueuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
,
379 struct qla_qpair
*qpair
);
381 /* -------------------------------------------------------------------------- */
382 static void qla_init_base_qpair(struct scsi_qla_host
*vha
, struct req_que
*req
,
385 struct qla_hw_data
*ha
= vha
->hw
;
387 rsp
->qpair
= ha
->base_qpair
;
389 ha
->base_qpair
->hw
= ha
;
390 ha
->base_qpair
->req
= req
;
391 ha
->base_qpair
->rsp
= rsp
;
392 ha
->base_qpair
->vha
= vha
;
393 ha
->base_qpair
->qp_lock_ptr
= &ha
->hardware_lock
;
394 ha
->base_qpair
->use_shadow_reg
= IS_SHADOW_REG_CAPABLE(ha
) ? 1 : 0;
395 ha
->base_qpair
->msix
= &ha
->msix_entries
[QLA_MSIX_RSP_Q
];
396 ha
->base_qpair
->srb_mempool
= ha
->srb_mempool
;
397 INIT_LIST_HEAD(&ha
->base_qpair
->hints_list
);
398 ha
->base_qpair
->enable_class_2
= ql2xenableclass2
;
399 /* init qpair to this cpu. Will adjust at run time. */
400 qla_cpu_update(rsp
->qpair
, raw_smp_processor_id());
401 ha
->base_qpair
->pdev
= ha
->pdev
;
403 if (IS_QLA27XX(ha
) || IS_QLA83XX(ha
) || IS_QLA28XX(ha
))
404 ha
->base_qpair
->reqq_start_iocbs
= qla_83xx_start_iocbs
;
407 static int qla2x00_alloc_queues(struct qla_hw_data
*ha
, struct req_que
*req
,
410 scsi_qla_host_t
*vha
= pci_get_drvdata(ha
->pdev
);
412 ha
->req_q_map
= kcalloc(ha
->max_req_queues
, sizeof(struct req_que
*),
414 if (!ha
->req_q_map
) {
415 ql_log(ql_log_fatal
, vha
, 0x003b,
416 "Unable to allocate memory for request queue ptrs.\n");
420 ha
->rsp_q_map
= kcalloc(ha
->max_rsp_queues
, sizeof(struct rsp_que
*),
422 if (!ha
->rsp_q_map
) {
423 ql_log(ql_log_fatal
, vha
, 0x003c,
424 "Unable to allocate memory for response queue ptrs.\n");
428 ha
->base_qpair
= kzalloc(sizeof(struct qla_qpair
), GFP_KERNEL
);
429 if (ha
->base_qpair
== NULL
) {
430 ql_log(ql_log_warn
, vha
, 0x00e0,
431 "Failed to allocate base queue pair memory.\n");
432 goto fail_base_qpair
;
435 qla_init_base_qpair(vha
, req
, rsp
);
437 if ((ql2xmqsupport
|| ql2xnvmeenable
) && ha
->max_qpairs
) {
438 ha
->queue_pair_map
= kcalloc(ha
->max_qpairs
, sizeof(struct qla_qpair
*),
440 if (!ha
->queue_pair_map
) {
441 ql_log(ql_log_fatal
, vha
, 0x0180,
442 "Unable to allocate memory for queue pair ptrs.\n");
448 * Make sure we record at least the request and response queue zero in
449 * case we need to free them if part of the probe fails.
451 ha
->rsp_q_map
[0] = rsp
;
452 ha
->req_q_map
[0] = req
;
453 set_bit(0, ha
->rsp_qid_map
);
454 set_bit(0, ha
->req_qid_map
);
458 kfree(ha
->base_qpair
);
459 ha
->base_qpair
= NULL
;
461 kfree(ha
->rsp_q_map
);
462 ha
->rsp_q_map
= NULL
;
464 kfree(ha
->req_q_map
);
465 ha
->req_q_map
= NULL
;
470 static void qla2x00_free_req_que(struct qla_hw_data
*ha
, struct req_que
*req
)
472 if (IS_QLAFX00(ha
)) {
473 if (req
&& req
->ring_fx00
)
474 dma_free_coherent(&ha
->pdev
->dev
,
475 (req
->length_fx00
+ 1) * sizeof(request_t
),
476 req
->ring_fx00
, req
->dma_fx00
);
477 } else if (req
&& req
->ring
)
478 dma_free_coherent(&ha
->pdev
->dev
,
479 (req
->length
+ 1) * sizeof(request_t
),
480 req
->ring
, req
->dma
);
483 kfree(req
->outstanding_cmds
);
488 static void qla2x00_free_rsp_que(struct qla_hw_data
*ha
, struct rsp_que
*rsp
)
490 if (IS_QLAFX00(ha
)) {
491 if (rsp
&& rsp
->ring_fx00
)
492 dma_free_coherent(&ha
->pdev
->dev
,
493 (rsp
->length_fx00
+ 1) * sizeof(request_t
),
494 rsp
->ring_fx00
, rsp
->dma_fx00
);
495 } else if (rsp
&& rsp
->ring
) {
496 dma_free_coherent(&ha
->pdev
->dev
,
497 (rsp
->length
+ 1) * sizeof(response_t
),
498 rsp
->ring
, rsp
->dma
);
503 static void qla2x00_free_queues(struct qla_hw_data
*ha
)
510 if (ha
->queue_pair_map
) {
511 kfree(ha
->queue_pair_map
);
512 ha
->queue_pair_map
= NULL
;
514 if (ha
->base_qpair
) {
515 kfree(ha
->base_qpair
);
516 ha
->base_qpair
= NULL
;
519 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
520 for (cnt
= 0; cnt
< ha
->max_req_queues
; cnt
++) {
521 if (!test_bit(cnt
, ha
->req_qid_map
))
524 req
= ha
->req_q_map
[cnt
];
525 clear_bit(cnt
, ha
->req_qid_map
);
526 ha
->req_q_map
[cnt
] = NULL
;
528 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
529 qla2x00_free_req_que(ha
, req
);
530 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
532 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
534 kfree(ha
->req_q_map
);
535 ha
->req_q_map
= NULL
;
538 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
539 for (cnt
= 0; cnt
< ha
->max_rsp_queues
; cnt
++) {
540 if (!test_bit(cnt
, ha
->rsp_qid_map
))
543 rsp
= ha
->rsp_q_map
[cnt
];
544 clear_bit(cnt
, ha
->rsp_qid_map
);
545 ha
->rsp_q_map
[cnt
] = NULL
;
546 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
547 qla2x00_free_rsp_que(ha
, rsp
);
548 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
550 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
552 kfree(ha
->rsp_q_map
);
553 ha
->rsp_q_map
= NULL
;
557 qla2x00_pci_info_str(struct scsi_qla_host
*vha
, char *str
, size_t str_len
)
559 struct qla_hw_data
*ha
= vha
->hw
;
560 static const char *const pci_bus_modes
[] = {
561 "33", "66", "100", "133",
565 pci_bus
= (ha
->pci_attr
& (BIT_9
| BIT_10
)) >> 9;
567 snprintf(str
, str_len
, "PCI-X (%s MHz)",
568 pci_bus_modes
[pci_bus
]);
570 pci_bus
= (ha
->pci_attr
& BIT_8
) >> 8;
571 snprintf(str
, str_len
, "PCI (%s MHz)", pci_bus_modes
[pci_bus
]);
578 qla24xx_pci_info_str(struct scsi_qla_host
*vha
, char *str
, size_t str_len
)
580 static const char *const pci_bus_modes
[] = {
581 "33", "66", "100", "133",
583 struct qla_hw_data
*ha
= vha
->hw
;
586 if (pci_is_pcie(ha
->pdev
)) {
587 uint32_t lstat
, lspeed
, lwidth
;
588 const char *speed_str
;
590 pcie_capability_read_dword(ha
->pdev
, PCI_EXP_LNKCAP
, &lstat
);
591 lspeed
= lstat
& PCI_EXP_LNKCAP_SLS
;
592 lwidth
= (lstat
& PCI_EXP_LNKCAP_MLW
) >> 4;
596 speed_str
= "2.5GT/s";
599 speed_str
= "5.0GT/s";
602 speed_str
= "8.0GT/s";
605 speed_str
= "16.0GT/s";
608 speed_str
= "<unknown>";
611 snprintf(str
, str_len
, "PCIe (%s x%d)", speed_str
, lwidth
);
616 pci_bus
= (ha
->pci_attr
& CSRX_PCIX_BUS_MODE_MASK
) >> 8;
617 if (pci_bus
== 0 || pci_bus
== 8)
618 snprintf(str
, str_len
, "PCI (%s MHz)",
619 pci_bus_modes
[pci_bus
>> 3]);
621 snprintf(str
, str_len
, "PCI-X Mode %d (%s MHz)",
623 pci_bus_modes
[pci_bus
& 3]);
629 qla2x00_fw_version_str(struct scsi_qla_host
*vha
, char *str
, size_t size
)
632 struct qla_hw_data
*ha
= vha
->hw
;
634 snprintf(str
, size
, "%d.%02d.%02d ", ha
->fw_major_version
,
635 ha
->fw_minor_version
, ha
->fw_subminor_version
);
637 if (ha
->fw_attributes
& BIT_9
) {
642 switch (ha
->fw_attributes
& 0xFF) {
656 sprintf(un_str
, "(%x)", ha
->fw_attributes
);
660 if (ha
->fw_attributes
& 0x100)
667 qla24xx_fw_version_str(struct scsi_qla_host
*vha
, char *str
, size_t size
)
669 struct qla_hw_data
*ha
= vha
->hw
;
671 snprintf(str
, size
, "%d.%02d.%02d (%x)", ha
->fw_major_version
,
672 ha
->fw_minor_version
, ha
->fw_subminor_version
, ha
->fw_attributes
);
676 void qla2x00_sp_free_dma(srb_t
*sp
)
678 struct qla_hw_data
*ha
= sp
->vha
->hw
;
679 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
681 if (sp
->flags
& SRB_DMA_VALID
) {
683 sp
->flags
&= ~SRB_DMA_VALID
;
686 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
687 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
688 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
689 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
692 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
693 /* List assured to be having elements */
694 qla2x00_clean_dsd_pool(ha
, sp
->u
.scmd
.crc_ctx
);
695 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
698 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
699 struct crc_context
*ctx0
= sp
->u
.scmd
.crc_ctx
;
701 dma_pool_free(ha
->dl_dma_pool
, ctx0
, ctx0
->crc_ctx_dma
);
702 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
705 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
706 struct ct6_dsd
*ctx1
= sp
->u
.scmd
.ct6_ctx
;
708 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
710 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
711 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
712 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
713 mempool_free(ctx1
, ha
->ctx_mempool
);
717 void qla2x00_sp_compl(srb_t
*sp
, int res
)
719 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
720 struct completion
*comp
= sp
->comp
;
730 void qla2xxx_qpair_sp_free_dma(srb_t
*sp
)
732 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
733 struct qla_hw_data
*ha
= sp
->fcport
->vha
->hw
;
735 if (sp
->flags
& SRB_DMA_VALID
) {
737 sp
->flags
&= ~SRB_DMA_VALID
;
740 if (sp
->flags
& SRB_CRC_PROT_DMA_VALID
) {
741 dma_unmap_sg(&ha
->pdev
->dev
, scsi_prot_sglist(cmd
),
742 scsi_prot_sg_count(cmd
), cmd
->sc_data_direction
);
743 sp
->flags
&= ~SRB_CRC_PROT_DMA_VALID
;
746 if (sp
->flags
& SRB_CRC_CTX_DSD_VALID
) {
747 /* List assured to be having elements */
748 qla2x00_clean_dsd_pool(ha
, sp
->u
.scmd
.crc_ctx
);
749 sp
->flags
&= ~SRB_CRC_CTX_DSD_VALID
;
752 if (sp
->flags
& SRB_DIF_BUNDL_DMA_VALID
) {
753 struct crc_context
*difctx
= sp
->u
.scmd
.crc_ctx
;
754 struct dsd_dma
*dif_dsd
, *nxt_dsd
;
756 list_for_each_entry_safe(dif_dsd
, nxt_dsd
,
757 &difctx
->ldif_dma_hndl_list
, list
) {
758 list_del(&dif_dsd
->list
);
759 dma_pool_free(ha
->dif_bundl_pool
, dif_dsd
->dsd_addr
,
760 dif_dsd
->dsd_list_dma
);
762 difctx
->no_dif_bundl
--;
765 list_for_each_entry_safe(dif_dsd
, nxt_dsd
,
766 &difctx
->ldif_dsd_list
, list
) {
767 list_del(&dif_dsd
->list
);
768 dma_pool_free(ha
->dl_dma_pool
, dif_dsd
->dsd_addr
,
769 dif_dsd
->dsd_list_dma
);
771 difctx
->no_ldif_dsd
--;
774 if (difctx
->no_ldif_dsd
) {
775 ql_dbg(ql_dbg_tgt
+ql_dbg_verbose
, sp
->vha
, 0xe022,
776 "%s: difctx->no_ldif_dsd=%x\n",
777 __func__
, difctx
->no_ldif_dsd
);
780 if (difctx
->no_dif_bundl
) {
781 ql_dbg(ql_dbg_tgt
+ql_dbg_verbose
, sp
->vha
, 0xe022,
782 "%s: difctx->no_dif_bundl=%x\n",
783 __func__
, difctx
->no_dif_bundl
);
785 sp
->flags
&= ~SRB_DIF_BUNDL_DMA_VALID
;
788 if (sp
->flags
& SRB_FCP_CMND_DMA_VALID
) {
789 struct ct6_dsd
*ctx1
= sp
->u
.scmd
.ct6_ctx
;
791 dma_pool_free(ha
->fcp_cmnd_dma_pool
, ctx1
->fcp_cmnd
,
793 list_splice(&ctx1
->dsd_list
, &ha
->gbl_dsd_list
);
794 ha
->gbl_dsd_inuse
-= ctx1
->dsd_use_cnt
;
795 ha
->gbl_dsd_avail
+= ctx1
->dsd_use_cnt
;
796 mempool_free(ctx1
, ha
->ctx_mempool
);
797 sp
->flags
&= ~SRB_FCP_CMND_DMA_VALID
;
800 if (sp
->flags
& SRB_CRC_CTX_DMA_VALID
) {
801 struct crc_context
*ctx0
= sp
->u
.scmd
.crc_ctx
;
803 dma_pool_free(ha
->dl_dma_pool
, ctx0
, ctx0
->crc_ctx_dma
);
804 sp
->flags
&= ~SRB_CRC_CTX_DMA_VALID
;
808 void qla2xxx_qpair_sp_compl(srb_t
*sp
, int res
)
810 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
811 struct completion
*comp
= sp
->comp
;
822 qla2xxx_queuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
)
824 scsi_qla_host_t
*vha
= shost_priv(host
);
825 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
826 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
827 struct qla_hw_data
*ha
= vha
->hw
;
828 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
832 if (unlikely(test_bit(UNLOADING
, &base_vha
->dpc_flags
)) ||
833 WARN_ON_ONCE(!rport
)) {
834 cmd
->result
= DID_NO_CONNECT
<< 16;
835 goto qc24_fail_command
;
841 struct qla_qpair
*qpair
= NULL
;
843 tag
= blk_mq_unique_tag(cmd
->request
);
844 hwq
= blk_mq_unique_tag_to_hwq(tag
);
845 qpair
= ha
->queue_pair_map
[hwq
];
848 return qla2xxx_mqueuecommand(host
, cmd
, qpair
);
851 if (ha
->flags
.eeh_busy
) {
852 if (ha
->flags
.pci_channel_io_perm_failure
) {
853 ql_dbg(ql_dbg_aer
, vha
, 0x9010,
854 "PCI Channel IO permanent failure, exiting "
856 cmd
->result
= DID_NO_CONNECT
<< 16;
858 ql_dbg(ql_dbg_aer
, vha
, 0x9011,
859 "EEH_Busy, Requeuing the cmd=%p.\n", cmd
);
860 cmd
->result
= DID_REQUEUE
<< 16;
862 goto qc24_fail_command
;
865 rval
= fc_remote_port_chkready(rport
);
868 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3003,
869 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
871 goto qc24_fail_command
;
874 if (!vha
->flags
.difdix_supported
&&
875 scsi_get_prot_op(cmd
) != SCSI_PROT_NORMAL
) {
876 ql_dbg(ql_dbg_io
, vha
, 0x3004,
877 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
879 cmd
->result
= DID_NO_CONNECT
<< 16;
880 goto qc24_fail_command
;
884 cmd
->result
= DID_NO_CONNECT
<< 16;
885 goto qc24_fail_command
;
888 if (atomic_read(&fcport
->state
) != FCS_ONLINE
|| fcport
->deleted
) {
889 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
890 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
891 ql_dbg(ql_dbg_io
, vha
, 0x3005,
892 "Returning DNC, fcport_state=%d loop_state=%d.\n",
893 atomic_read(&fcport
->state
),
894 atomic_read(&base_vha
->loop_state
));
895 cmd
->result
= DID_NO_CONNECT
<< 16;
896 goto qc24_fail_command
;
898 goto qc24_target_busy
;
902 * Return target busy if we've received a non-zero retry_delay_timer
905 if (fcport
->retry_delay_timestamp
== 0) {
906 /* retry delay not set */
907 } else if (time_after(jiffies
, fcport
->retry_delay_timestamp
))
908 fcport
->retry_delay_timestamp
= 0;
910 goto qc24_target_busy
;
912 sp
= scsi_cmd_priv(cmd
);
913 qla2xxx_init_sp(sp
, vha
, vha
->hw
->base_qpair
, fcport
);
915 sp
->u
.scmd
.cmd
= cmd
;
916 sp
->type
= SRB_SCSI_CMD
;
918 CMD_SP(cmd
) = (void *)sp
;
919 sp
->free
= qla2x00_sp_free_dma
;
920 sp
->done
= qla2x00_sp_compl
;
922 rval
= ha
->isp_ops
->start_scsi(sp
);
923 if (rval
!= QLA_SUCCESS
) {
924 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3013,
925 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
926 goto qc24_host_busy_free_sp
;
931 qc24_host_busy_free_sp
:
935 return SCSI_MLQUEUE_TARGET_BUSY
;
943 /* For MQ supported I/O */
945 qla2xxx_mqueuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
,
946 struct qla_qpair
*qpair
)
948 scsi_qla_host_t
*vha
= shost_priv(host
);
949 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
950 struct fc_rport
*rport
= starget_to_rport(scsi_target(cmd
->device
));
951 struct qla_hw_data
*ha
= vha
->hw
;
952 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
956 rval
= rport
? fc_remote_port_chkready(rport
) : FC_PORTSTATE_OFFLINE
;
959 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3076,
960 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
962 goto qc24_fail_command
;
966 cmd
->result
= DID_NO_CONNECT
<< 16;
967 goto qc24_fail_command
;
970 if (atomic_read(&fcport
->state
) != FCS_ONLINE
|| fcport
->deleted
) {
971 if (atomic_read(&fcport
->state
) == FCS_DEVICE_DEAD
||
972 atomic_read(&base_vha
->loop_state
) == LOOP_DEAD
) {
973 ql_dbg(ql_dbg_io
, vha
, 0x3077,
974 "Returning DNC, fcport_state=%d loop_state=%d.\n",
975 atomic_read(&fcport
->state
),
976 atomic_read(&base_vha
->loop_state
));
977 cmd
->result
= DID_NO_CONNECT
<< 16;
978 goto qc24_fail_command
;
980 goto qc24_target_busy
;
984 * Return target busy if we've received a non-zero retry_delay_timer
987 if (fcport
->retry_delay_timestamp
== 0) {
988 /* retry delay not set */
989 } else if (time_after(jiffies
, fcport
->retry_delay_timestamp
))
990 fcport
->retry_delay_timestamp
= 0;
992 goto qc24_target_busy
;
994 sp
= scsi_cmd_priv(cmd
);
995 qla2xxx_init_sp(sp
, vha
, qpair
, fcport
);
997 sp
->u
.scmd
.cmd
= cmd
;
998 sp
->type
= SRB_SCSI_CMD
;
999 CMD_SP(cmd
) = (void *)sp
;
1000 sp
->free
= qla2xxx_qpair_sp_free_dma
;
1001 sp
->done
= qla2xxx_qpair_sp_compl
;
1003 rval
= ha
->isp_ops
->start_scsi_mq(sp
);
1004 if (rval
!= QLA_SUCCESS
) {
1005 ql_dbg(ql_dbg_io
+ ql_dbg_verbose
, vha
, 0x3078,
1006 "Start scsi failed rval=%d for cmd=%p.\n", rval
, cmd
);
1007 if (rval
== QLA_INTERFACE_ERROR
)
1008 goto qc24_free_sp_fail_command
;
1009 goto qc24_host_busy_free_sp
;
1014 qc24_host_busy_free_sp
:
1018 return SCSI_MLQUEUE_TARGET_BUSY
;
1020 qc24_free_sp_fail_command
:
1023 qla2xxx_rel_qpair_sp(sp
->qpair
, sp
);
1026 cmd
->scsi_done(cmd
);
1032 * qla2x00_eh_wait_on_command
1033 * Waits for the command to be returned by the Firmware for some
1037 * cmd = Scsi Command to wait on.
1040 * Completed in time : QLA_SUCCESS
1041 * Did not complete in time : QLA_FUNCTION_FAILED
1044 qla2x00_eh_wait_on_command(struct scsi_cmnd
*cmd
)
1046 #define ABORT_POLLING_PERIOD 1000
1047 #define ABORT_WAIT_ITER ((2 * 1000) / (ABORT_POLLING_PERIOD))
1048 unsigned long wait_iter
= ABORT_WAIT_ITER
;
1049 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1050 struct qla_hw_data
*ha
= vha
->hw
;
1051 int ret
= QLA_SUCCESS
;
1053 if (unlikely(pci_channel_offline(ha
->pdev
)) || ha
->flags
.eeh_busy
) {
1054 ql_dbg(ql_dbg_taskm
, vha
, 0x8005,
1055 "Return:eh_wait.\n");
1059 while (CMD_SP(cmd
) && wait_iter
--) {
1060 msleep(ABORT_POLLING_PERIOD
);
1063 ret
= QLA_FUNCTION_FAILED
;
1069 * qla2x00_wait_for_hba_online
1070 * Wait till the HBA is online after going through
1071 * <= MAX_RETRIES_OF_ISP_ABORT or
1072 * finally HBA is disabled ie marked offline
1075 * ha - pointer to host adapter structure
1078 * Does context switching-Release SPIN_LOCK
1079 * (if any) before calling this routine.
1082 * Success (Adapter is online) : 0
1083 * Failed (Adapter is offline/disabled) : 1
1086 qla2x00_wait_for_hba_online(scsi_qla_host_t
*vha
)
1089 unsigned long wait_online
;
1090 struct qla_hw_data
*ha
= vha
->hw
;
1091 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1093 wait_online
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
1094 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
1095 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
1096 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
1097 ha
->dpc_active
) && time_before(jiffies
, wait_online
)) {
1101 if (base_vha
->flags
.online
)
1102 return_status
= QLA_SUCCESS
;
1104 return_status
= QLA_FUNCTION_FAILED
;
1106 return (return_status
);
1109 static inline int test_fcport_count(scsi_qla_host_t
*vha
)
1111 struct qla_hw_data
*ha
= vha
->hw
;
1112 unsigned long flags
;
1115 spin_lock_irqsave(&ha
->tgt
.sess_lock
, flags
);
1116 ql_dbg(ql_dbg_init
, vha
, 0x00ec,
1117 "tgt %p, fcport_count=%d\n",
1118 vha
, vha
->fcport_count
);
1119 res
= (vha
->fcport_count
== 0);
1120 spin_unlock_irqrestore(&ha
->tgt
.sess_lock
, flags
);
1126 * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1127 * it has dependency on UNLOADING flag to stop device discovery
1130 qla2x00_wait_for_sess_deletion(scsi_qla_host_t
*vha
)
1134 qla2x00_mark_all_devices_lost(vha
);
1136 for (i
= 0; i
< 10; i
++) {
1137 if (wait_event_timeout(vha
->fcport_waitQ
,
1138 test_fcport_count(vha
), HZ
) > 0)
1142 flush_workqueue(vha
->hw
->wq
);
1146 * qla2x00_wait_for_hba_ready
1147 * Wait till the HBA is ready before doing driver unload
1150 * ha - pointer to host adapter structure
1153 * Does context switching-Release SPIN_LOCK
1154 * (if any) before calling this routine.
1158 qla2x00_wait_for_hba_ready(scsi_qla_host_t
*vha
)
1160 struct qla_hw_data
*ha
= vha
->hw
;
1161 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1163 while ((qla2x00_reset_active(vha
) || ha
->dpc_active
||
1164 ha
->flags
.mbox_busy
) ||
1165 test_bit(FX00_RESET_RECOVERY
, &vha
->dpc_flags
) ||
1166 test_bit(FX00_TARGET_SCAN
, &vha
->dpc_flags
)) {
1167 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
1174 qla2x00_wait_for_chip_reset(scsi_qla_host_t
*vha
)
1177 unsigned long wait_reset
;
1178 struct qla_hw_data
*ha
= vha
->hw
;
1179 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1181 wait_reset
= jiffies
+ (MAX_LOOP_TIMEOUT
* HZ
);
1182 while (((test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
)) ||
1183 test_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
) ||
1184 test_bit(ISP_ABORT_RETRY
, &base_vha
->dpc_flags
) ||
1185 ha
->dpc_active
) && time_before(jiffies
, wait_reset
)) {
1189 if (!test_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
1190 ha
->flags
.chip_reset_done
)
1193 if (ha
->flags
.chip_reset_done
)
1194 return_status
= QLA_SUCCESS
;
1196 return_status
= QLA_FUNCTION_FAILED
;
1198 return return_status
;
1201 #define ISP_REG_DISCONNECT 0xffffffffU
1202 /**************************************************************************
1203 * qla2x00_isp_reg_stat
1206 * Read the host status register of ISP before aborting the command.
1209 * ha = pointer to host adapter structure.
1213 * Either true or false.
1215 * Note: Return true if there is register disconnect.
1216 **************************************************************************/
1218 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data
*ha
)
1220 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1221 struct device_reg_82xx __iomem
*reg82
= &ha
->iobase
->isp82
;
1223 if (IS_P3P_TYPE(ha
))
1224 return ((RD_REG_DWORD(®82
->host_int
)) == ISP_REG_DISCONNECT
);
1226 return ((RD_REG_DWORD(®
->host_status
)) ==
1227 ISP_REG_DISCONNECT
);
1230 /**************************************************************************
1234 * The abort function will abort the specified command.
1237 * cmd = Linux SCSI command packet to be aborted.
1240 * Either SUCCESS or FAILED.
1243 * Only return FAILED if command not returned by firmware.
1244 **************************************************************************/
1246 qla2xxx_eh_abort(struct scsi_cmnd
*cmd
)
1248 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1249 DECLARE_COMPLETION_ONSTACK(comp
);
1255 struct qla_hw_data
*ha
= vha
->hw
;
1257 struct qla_qpair
*qpair
;
1258 unsigned long flags
;
1260 if (qla2x00_isp_reg_stat(ha
)) {
1261 ql_log(ql_log_info
, vha
, 0x8042,
1262 "PCI/Register disconnect, exiting.\n");
1266 ret
= fc_block_scsi_eh(cmd
);
1270 sp
= scsi_cmd_priv(cmd
);
1273 if ((sp
->fcport
&& sp
->fcport
->deleted
) || !qpair
)
1276 spin_lock_irqsave(qpair
->qp_lock_ptr
, flags
);
1278 spin_unlock_irqrestore(qpair
->qp_lock_ptr
, flags
);
1281 id
= cmd
->device
->id
;
1282 lun
= cmd
->device
->lun
;
1284 ql_dbg(ql_dbg_taskm
, vha
, 0x8002,
1285 "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1286 vha
->host_no
, id
, lun
, sp
, cmd
, sp
->handle
);
1289 * Abort will release the original Command/sp from FW. Let the
1290 * original command call scsi_done. In return, he will wakeup
1291 * this sleeping thread.
1293 rval
= ha
->isp_ops
->abort_command(sp
);
1295 ql_dbg(ql_dbg_taskm
, vha
, 0x8003,
1296 "Abort command mbx cmd=%p, rval=%x.\n", cmd
, rval
);
1298 /* Wait for the command completion. */
1299 ratov_j
= ha
->r_a_tov
/10 * 4 * 1000;
1300 ratov_j
= msecs_to_jiffies(ratov_j
);
1303 if (!wait_for_completion_timeout(&comp
, ratov_j
)) {
1304 ql_dbg(ql_dbg_taskm
, vha
, 0xffff,
1305 "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1306 __func__
, ha
->r_a_tov
/10);
1319 ql_log(ql_log_info
, vha
, 0x801c,
1320 "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1321 vha
->host_no
, id
, lun
, ret
);
1327 * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1330 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t
*vha
, unsigned int t
,
1331 uint64_t l
, enum nexus_wait_type type
)
1333 int cnt
, match
, status
;
1334 unsigned long flags
;
1335 struct qla_hw_data
*ha
= vha
->hw
;
1336 struct req_que
*req
;
1338 struct scsi_cmnd
*cmd
;
1340 status
= QLA_SUCCESS
;
1342 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1344 for (cnt
= 1; status
== QLA_SUCCESS
&&
1345 cnt
< req
->num_outstanding_cmds
; cnt
++) {
1346 sp
= req
->outstanding_cmds
[cnt
];
1349 if (sp
->type
!= SRB_SCSI_CMD
)
1351 if (vha
->vp_idx
!= sp
->vha
->vp_idx
)
1354 cmd
= GET_CMD_SP(sp
);
1360 match
= cmd
->device
->id
== t
;
1363 match
= (cmd
->device
->id
== t
&&
1364 cmd
->device
->lun
== l
);
1370 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1371 status
= qla2x00_eh_wait_on_command(cmd
);
1372 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1374 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1379 static char *reset_errors
[] = {
1382 "Task management failed",
1383 "Waiting for command completions",
1387 __qla2xxx_eh_generic_reset(char *name
, enum nexus_wait_type type
,
1388 struct scsi_cmnd
*cmd
, int (*do_reset
)(struct fc_port
*, uint64_t, int))
1390 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1391 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1398 err
= fc_block_scsi_eh(cmd
);
1402 if (fcport
->deleted
)
1405 ql_log(ql_log_info
, vha
, 0x8009,
1406 "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name
, vha
->host_no
,
1407 cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1410 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1411 ql_log(ql_log_warn
, vha
, 0x800a,
1412 "Wait for hba online failed for cmd=%p.\n", cmd
);
1413 goto eh_reset_failed
;
1416 if (do_reset(fcport
, cmd
->device
->lun
, 1)
1418 ql_log(ql_log_warn
, vha
, 0x800c,
1419 "do_reset failed for cmd=%p.\n", cmd
);
1420 goto eh_reset_failed
;
1423 if (qla2x00_eh_wait_for_pending_commands(vha
, cmd
->device
->id
,
1424 cmd
->device
->lun
, type
) != QLA_SUCCESS
) {
1425 ql_log(ql_log_warn
, vha
, 0x800d,
1426 "wait for pending cmds failed for cmd=%p.\n", cmd
);
1427 goto eh_reset_failed
;
1430 ql_log(ql_log_info
, vha
, 0x800e,
1431 "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name
,
1432 vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
, cmd
);
1437 ql_log(ql_log_info
, vha
, 0x800f,
1438 "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name
,
1439 reset_errors
[err
], vha
->host_no
, cmd
->device
->id
, cmd
->device
->lun
,
1445 qla2xxx_eh_device_reset(struct scsi_cmnd
*cmd
)
1447 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1448 struct qla_hw_data
*ha
= vha
->hw
;
1450 if (qla2x00_isp_reg_stat(ha
)) {
1451 ql_log(ql_log_info
, vha
, 0x803e,
1452 "PCI/Register disconnect, exiting.\n");
1456 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN
, cmd
,
1457 ha
->isp_ops
->lun_reset
);
1461 qla2xxx_eh_target_reset(struct scsi_cmnd
*cmd
)
1463 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1464 struct qla_hw_data
*ha
= vha
->hw
;
1466 if (qla2x00_isp_reg_stat(ha
)) {
1467 ql_log(ql_log_info
, vha
, 0x803f,
1468 "PCI/Register disconnect, exiting.\n");
1472 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET
, cmd
,
1473 ha
->isp_ops
->target_reset
);
1476 /**************************************************************************
1477 * qla2xxx_eh_bus_reset
1480 * The bus reset function will reset the bus and abort any executing
1484 * cmd = Linux SCSI command packet of the command that cause the
1488 * SUCCESS/FAILURE (defined as macro in scsi.h).
1490 **************************************************************************/
1492 qla2xxx_eh_bus_reset(struct scsi_cmnd
*cmd
)
1494 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1495 fc_port_t
*fcport
= (struct fc_port
*) cmd
->device
->hostdata
;
1499 struct qla_hw_data
*ha
= vha
->hw
;
1501 if (qla2x00_isp_reg_stat(ha
)) {
1502 ql_log(ql_log_info
, vha
, 0x8040,
1503 "PCI/Register disconnect, exiting.\n");
1507 id
= cmd
->device
->id
;
1508 lun
= cmd
->device
->lun
;
1514 ret
= fc_block_scsi_eh(cmd
);
1519 if (qla2x00_chip_is_down(vha
))
1522 ql_log(ql_log_info
, vha
, 0x8012,
1523 "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha
->host_no
, id
, lun
);
1525 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1526 ql_log(ql_log_fatal
, vha
, 0x8013,
1527 "Wait for hba online failed board disabled.\n");
1528 goto eh_bus_reset_done
;
1531 if (qla2x00_loop_reset(vha
) == QLA_SUCCESS
)
1535 goto eh_bus_reset_done
;
1537 /* Flush outstanding commands. */
1538 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) !=
1540 ql_log(ql_log_warn
, vha
, 0x8014,
1541 "Wait for pending commands failed.\n");
1546 ql_log(ql_log_warn
, vha
, 0x802b,
1547 "BUS RESET %s nexus=%ld:%d:%llu.\n",
1548 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1553 /**************************************************************************
1554 * qla2xxx_eh_host_reset
1557 * The reset function will reset the Adapter.
1560 * cmd = Linux SCSI command packet of the command that cause the
1564 * Either SUCCESS or FAILED.
1567 **************************************************************************/
1569 qla2xxx_eh_host_reset(struct scsi_cmnd
*cmd
)
1571 scsi_qla_host_t
*vha
= shost_priv(cmd
->device
->host
);
1572 struct qla_hw_data
*ha
= vha
->hw
;
1576 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
1578 if (qla2x00_isp_reg_stat(ha
)) {
1579 ql_log(ql_log_info
, vha
, 0x8041,
1580 "PCI/Register disconnect, exiting.\n");
1581 schedule_work(&ha
->board_disable
);
1585 id
= cmd
->device
->id
;
1586 lun
= cmd
->device
->lun
;
1588 ql_log(ql_log_info
, vha
, 0x8018,
1589 "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha
->host_no
, id
, lun
);
1592 * No point in issuing another reset if one is active. Also do not
1593 * attempt a reset if we are updating flash.
1595 if (qla2x00_reset_active(vha
) || ha
->optrom_state
!= QLA_SWAITING
)
1596 goto eh_host_reset_lock
;
1598 if (vha
!= base_vha
) {
1599 if (qla2x00_vp_abort_isp(vha
))
1600 goto eh_host_reset_lock
;
1602 if (IS_P3P_TYPE(vha
->hw
)) {
1603 if (!qla82xx_fcoe_ctx_reset(vha
)) {
1604 /* Ctx reset success */
1606 goto eh_host_reset_lock
;
1608 /* fall thru if ctx reset failed */
1611 flush_workqueue(ha
->wq
);
1613 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1614 if (ha
->isp_ops
->abort_isp(base_vha
)) {
1615 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1616 /* failed. schedule dpc to try */
1617 set_bit(ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
);
1619 if (qla2x00_wait_for_hba_online(vha
) != QLA_SUCCESS
) {
1620 ql_log(ql_log_warn
, vha
, 0x802a,
1621 "wait for hba online failed.\n");
1622 goto eh_host_reset_lock
;
1625 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
1628 /* Waiting for command to be returned to OS.*/
1629 if (qla2x00_eh_wait_for_pending_commands(vha
, 0, 0, WAIT_HOST
) ==
1634 ql_log(ql_log_info
, vha
, 0x8017,
1635 "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1636 (ret
== FAILED
) ? "FAILED" : "SUCCEEDED", vha
->host_no
, id
, lun
);
1642 * qla2x00_loop_reset
1646 * ha = adapter block pointer.
1652 qla2x00_loop_reset(scsi_qla_host_t
*vha
)
1655 struct fc_port
*fcport
;
1656 struct qla_hw_data
*ha
= vha
->hw
;
1658 if (IS_QLAFX00(ha
)) {
1659 return qlafx00_loop_reset(vha
);
1662 if (ql2xtargetreset
== 1 && ha
->flags
.enable_target_reset
) {
1663 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
1664 if (fcport
->port_type
!= FCT_TARGET
)
1667 ret
= ha
->isp_ops
->target_reset(fcport
, 0, 0);
1668 if (ret
!= QLA_SUCCESS
) {
1669 ql_dbg(ql_dbg_taskm
, vha
, 0x802c,
1670 "Bus Reset failed: Reset=%d "
1671 "d_id=%x.\n", ret
, fcport
->d_id
.b24
);
1677 if (ha
->flags
.enable_lip_full_login
&& !IS_CNA_CAPABLE(ha
)) {
1678 atomic_set(&vha
->loop_state
, LOOP_DOWN
);
1679 atomic_set(&vha
->loop_down_timer
, LOOP_DOWN_TIME
);
1680 qla2x00_mark_all_devices_lost(vha
);
1681 ret
= qla2x00_full_login_lip(vha
);
1682 if (ret
!= QLA_SUCCESS
) {
1683 ql_dbg(ql_dbg_taskm
, vha
, 0x802d,
1684 "full_login_lip=%d.\n", ret
);
1688 if (ha
->flags
.enable_lip_reset
) {
1689 ret
= qla2x00_lip_reset(vha
);
1690 if (ret
!= QLA_SUCCESS
)
1691 ql_dbg(ql_dbg_taskm
, vha
, 0x802e,
1692 "lip_reset failed (%d).\n", ret
);
1695 /* Issue marker command only when we are going to start the I/O */
1696 vha
->marker_needed
= 1;
1702 * The caller must ensure that no completion interrupts will happen
1703 * while this function is in progress.
1705 static void qla2x00_abort_srb(struct qla_qpair
*qp
, srb_t
*sp
, const int res
,
1706 unsigned long *flags
)
1707 __releases(qp
->qp_lock_ptr
)
1708 __acquires(qp
->qp_lock_ptr
)
1710 DECLARE_COMPLETION_ONSTACK(comp
);
1711 scsi_qla_host_t
*vha
= qp
->vha
;
1712 struct qla_hw_data
*ha
= vha
->hw
;
1713 struct scsi_cmnd
*cmd
= GET_CMD_SP(sp
);
1718 lockdep_assert_held(qp
->qp_lock_ptr
);
1720 if (qla2x00_chip_is_down(vha
)) {
1725 if (sp
->type
== SRB_NVME_CMD
|| sp
->type
== SRB_NVME_LS
||
1726 (sp
->type
== SRB_SCSI_CMD
&& !ha
->flags
.eeh_busy
&&
1727 !test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
) &&
1728 !qla2x00_isp_reg_stat(ha
))) {
1735 spin_unlock_irqrestore(qp
->qp_lock_ptr
, *flags
);
1737 rval
= ha
->isp_ops
->abort_command(sp
);
1738 /* Wait for command completion. */
1740 ratov_j
= ha
->r_a_tov
/10 * 4 * 1000;
1741 ratov_j
= msecs_to_jiffies(ratov_j
);
1744 if (wait_for_completion_timeout(&comp
, ratov_j
)) {
1745 ql_dbg(ql_dbg_taskm
, vha
, 0xffff,
1746 "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1747 __func__
, ha
->r_a_tov
/10);
1750 /* else FW return SP to driver */
1757 spin_lock_irqsave(qp
->qp_lock_ptr
, *flags
);
1758 if (ret_cmd
&& blk_mq_request_started(cmd
->request
))
1766 * The caller must ensure that no completion interrupts will happen
1767 * while this function is in progress.
1770 __qla2x00_abort_all_cmds(struct qla_qpair
*qp
, int res
)
1773 unsigned long flags
;
1775 scsi_qla_host_t
*vha
= qp
->vha
;
1776 struct qla_hw_data
*ha
= vha
->hw
;
1777 struct req_que
*req
;
1778 struct qla_tgt
*tgt
= vha
->vha_tgt
.qla_tgt
;
1779 struct qla_tgt_cmd
*cmd
;
1783 spin_lock_irqsave(qp
->qp_lock_ptr
, flags
);
1785 for (cnt
= 1; cnt
< req
->num_outstanding_cmds
; cnt
++) {
1786 sp
= req
->outstanding_cmds
[cnt
];
1788 switch (sp
->cmd_type
) {
1790 qla2x00_abort_srb(qp
, sp
, res
, &flags
);
1793 if (!vha
->hw
->tgt
.tgt_ops
|| !tgt
||
1794 qla_ini_mode_enabled(vha
)) {
1795 ql_dbg(ql_dbg_tgt_mgt
, vha
, 0xf003,
1796 "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1800 cmd
= (struct qla_tgt_cmd
*)sp
;
1803 case TYPE_TGT_TMCMD
:
1804 /* Skip task management functions. */
1809 req
->outstanding_cmds
[cnt
] = NULL
;
1812 spin_unlock_irqrestore(qp
->qp_lock_ptr
, flags
);
1816 * The caller must ensure that no completion interrupts will happen
1817 * while this function is in progress.
1820 qla2x00_abort_all_cmds(scsi_qla_host_t
*vha
, int res
)
1823 struct qla_hw_data
*ha
= vha
->hw
;
1825 /* Continue only if initialization complete. */
1826 if (!ha
->base_qpair
)
1828 __qla2x00_abort_all_cmds(ha
->base_qpair
, res
);
1830 if (!ha
->queue_pair_map
)
1832 for (que
= 0; que
< ha
->max_qpairs
; que
++) {
1833 if (!ha
->queue_pair_map
[que
])
1836 __qla2x00_abort_all_cmds(ha
->queue_pair_map
[que
], res
);
1841 qla2xxx_slave_alloc(struct scsi_device
*sdev
)
1843 struct fc_rport
*rport
= starget_to_rport(scsi_target(sdev
));
1845 if (!rport
|| fc_remote_port_chkready(rport
))
1848 sdev
->hostdata
= *(fc_port_t
**)rport
->dd_data
;
1854 qla2xxx_slave_configure(struct scsi_device
*sdev
)
1856 scsi_qla_host_t
*vha
= shost_priv(sdev
->host
);
1857 struct req_que
*req
= vha
->req
;
1859 if (IS_T10_PI_CAPABLE(vha
->hw
))
1860 blk_queue_update_dma_alignment(sdev
->request_queue
, 0x7);
1862 scsi_change_queue_depth(sdev
, req
->max_q_depth
);
1867 qla2xxx_slave_destroy(struct scsi_device
*sdev
)
1869 sdev
->hostdata
= NULL
;
1873 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1876 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1877 * supported addressing method.
1880 qla2x00_config_dma_addressing(struct qla_hw_data
*ha
)
1882 /* Assume a 32bit DMA mask. */
1883 ha
->flags
.enable_64bit_addressing
= 0;
1885 if (!dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(64))) {
1886 /* Any upper-dword bits set? */
1887 if (MSD(dma_get_required_mask(&ha
->pdev
->dev
)) &&
1888 !pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(64))) {
1889 /* Ok, a 64bit DMA mask is applicable. */
1890 ha
->flags
.enable_64bit_addressing
= 1;
1891 ha
->isp_ops
->calc_req_entries
= qla2x00_calc_iocbs_64
;
1892 ha
->isp_ops
->build_iocbs
= qla2x00_build_scsi_iocbs_64
;
1897 dma_set_mask(&ha
->pdev
->dev
, DMA_BIT_MASK(32));
1898 pci_set_consistent_dma_mask(ha
->pdev
, DMA_BIT_MASK(32));
1902 qla2x00_enable_intrs(struct qla_hw_data
*ha
)
1904 unsigned long flags
= 0;
1905 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1907 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1908 ha
->interrupts_on
= 1;
1909 /* enable risc and host interrupts */
1910 WRT_REG_WORD(®
->ictrl
, ICR_EN_INT
| ICR_EN_RISC
);
1911 RD_REG_WORD(®
->ictrl
);
1912 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1917 qla2x00_disable_intrs(struct qla_hw_data
*ha
)
1919 unsigned long flags
= 0;
1920 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
1922 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1923 ha
->interrupts_on
= 0;
1924 /* disable risc and host interrupts */
1925 WRT_REG_WORD(®
->ictrl
, 0);
1926 RD_REG_WORD(®
->ictrl
);
1927 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1931 qla24xx_enable_intrs(struct qla_hw_data
*ha
)
1933 unsigned long flags
= 0;
1934 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1936 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1937 ha
->interrupts_on
= 1;
1938 WRT_REG_DWORD(®
->ictrl
, ICRX_EN_RISC_INT
);
1939 RD_REG_DWORD(®
->ictrl
);
1940 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1944 qla24xx_disable_intrs(struct qla_hw_data
*ha
)
1946 unsigned long flags
= 0;
1947 struct device_reg_24xx __iomem
*reg
= &ha
->iobase
->isp24
;
1949 if (IS_NOPOLLING_TYPE(ha
))
1951 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
1952 ha
->interrupts_on
= 0;
1953 WRT_REG_DWORD(®
->ictrl
, 0);
1954 RD_REG_DWORD(®
->ictrl
);
1955 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
1959 qla2x00_iospace_config(struct qla_hw_data
*ha
)
1961 resource_size_t pio
;
1964 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
1965 QLA2XXX_DRIVER_NAME
)) {
1966 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0011,
1967 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1968 pci_name(ha
->pdev
));
1969 goto iospace_error_exit
;
1971 if (!(ha
->bars
& 1))
1974 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1975 pio
= pci_resource_start(ha
->pdev
, 0);
1976 if (pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_IO
) {
1977 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
1978 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0012,
1979 "Invalid pci I/O region size (%s).\n",
1980 pci_name(ha
->pdev
));
1984 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0013,
1985 "Region #0 no a PIO resource (%s).\n",
1986 pci_name(ha
->pdev
));
1989 ha
->pio_address
= pio
;
1990 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0014,
1991 "PIO address=%llu.\n",
1992 (unsigned long long)ha
->pio_address
);
1995 /* Use MMIO operations for all accesses. */
1996 if (!(pci_resource_flags(ha
->pdev
, 1) & IORESOURCE_MEM
)) {
1997 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0015,
1998 "Region #1 not an MMIO resource (%s), aborting.\n",
1999 pci_name(ha
->pdev
));
2000 goto iospace_error_exit
;
2002 if (pci_resource_len(ha
->pdev
, 1) < MIN_IOBASE_LEN
) {
2003 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0016,
2004 "Invalid PCI mem region size (%s), aborting.\n",
2005 pci_name(ha
->pdev
));
2006 goto iospace_error_exit
;
2009 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 1), MIN_IOBASE_LEN
);
2011 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0017,
2012 "Cannot remap MMIO (%s), aborting.\n",
2013 pci_name(ha
->pdev
));
2014 goto iospace_error_exit
;
2017 /* Determine queue resources */
2018 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
2019 ha
->msix_count
= QLA_BASE_VECTORS
;
2020 if (!ql2xmqsupport
|| !ql2xnvmeenable
||
2021 (!IS_QLA25XX(ha
) && !IS_QLA81XX(ha
)))
2024 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 3),
2025 pci_resource_len(ha
->pdev
, 3));
2027 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0018,
2028 "MQIO Base=%p.\n", ha
->mqiobase
);
2029 /* Read MSIX vector size of the board */
2030 pci_read_config_word(ha
->pdev
, QLA_PCI_MSIX_CONTROL
, &msix
);
2031 ha
->msix_count
= msix
+ 1;
2032 /* Max queues are bounded by available msix vectors */
2033 /* MB interrupt uses 1 vector */
2034 ha
->max_req_queues
= ha
->msix_count
- 1;
2035 ha
->max_rsp_queues
= ha
->max_req_queues
;
2036 /* Queue pairs is the max value minus the base queue pair */
2037 ha
->max_qpairs
= ha
->max_rsp_queues
- 1;
2038 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0188,
2039 "Max no of queues pairs: %d.\n", ha
->max_qpairs
);
2041 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001a,
2042 "MSI-X vector count: %d.\n", ha
->msix_count
);
2044 ql_log_pci(ql_log_info
, ha
->pdev
, 0x001b,
2045 "BAR 3 not enabled.\n");
2048 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x001c,
2049 "MSIX Count: %d.\n", ha
->msix_count
);
2058 qla83xx_iospace_config(struct qla_hw_data
*ha
)
2062 if (pci_request_selected_regions(ha
->pdev
, ha
->bars
,
2063 QLA2XXX_DRIVER_NAME
)) {
2064 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0117,
2065 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2066 pci_name(ha
->pdev
));
2068 goto iospace_error_exit
;
2071 /* Use MMIO operations for all accesses. */
2072 if (!(pci_resource_flags(ha
->pdev
, 0) & IORESOURCE_MEM
)) {
2073 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0118,
2074 "Invalid pci I/O region size (%s).\n",
2075 pci_name(ha
->pdev
));
2076 goto iospace_error_exit
;
2078 if (pci_resource_len(ha
->pdev
, 0) < MIN_IOBASE_LEN
) {
2079 ql_log_pci(ql_log_warn
, ha
->pdev
, 0x0119,
2080 "Invalid PCI mem region size (%s), aborting\n",
2081 pci_name(ha
->pdev
));
2082 goto iospace_error_exit
;
2085 ha
->iobase
= ioremap(pci_resource_start(ha
->pdev
, 0), MIN_IOBASE_LEN
);
2087 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011a,
2088 "Cannot remap MMIO (%s), aborting.\n",
2089 pci_name(ha
->pdev
));
2090 goto iospace_error_exit
;
2093 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2094 /* 83XX 26XX always use MQ type access for queues
2095 * - mbar 2, a.k.a region 4 */
2096 ha
->max_req_queues
= ha
->max_rsp_queues
= 1;
2097 ha
->msix_count
= QLA_BASE_VECTORS
;
2098 ha
->mqiobase
= ioremap(pci_resource_start(ha
->pdev
, 4),
2099 pci_resource_len(ha
->pdev
, 4));
2101 if (!ha
->mqiobase
) {
2102 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x011d,
2103 "BAR2/region4 not enabled\n");
2107 ha
->msixbase
= ioremap(pci_resource_start(ha
->pdev
, 2),
2108 pci_resource_len(ha
->pdev
, 2));
2110 /* Read MSIX vector size of the board */
2111 pci_read_config_word(ha
->pdev
,
2112 QLA_83XX_PCI_MSIX_CONTROL
, &msix
);
2113 ha
->msix_count
= (msix
& PCI_MSIX_FLAGS_QSIZE
) + 1;
2115 * By default, driver uses at least two msix vectors
2118 if (ql2xmqsupport
|| ql2xnvmeenable
) {
2119 /* MB interrupt uses 1 vector */
2120 ha
->max_req_queues
= ha
->msix_count
- 1;
2122 /* ATIOQ needs 1 vector. That's 1 less QPair */
2123 if (QLA_TGT_MODE_ENABLED())
2124 ha
->max_req_queues
--;
2126 ha
->max_rsp_queues
= ha
->max_req_queues
;
2128 /* Queue pairs is the max value minus
2129 * the base queue pair */
2130 ha
->max_qpairs
= ha
->max_req_queues
- 1;
2131 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x00e3,
2132 "Max no of queues pairs: %d.\n", ha
->max_qpairs
);
2134 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011c,
2135 "MSI-X vector count: %d.\n", ha
->msix_count
);
2137 ql_log_pci(ql_log_info
, ha
->pdev
, 0x011e,
2138 "BAR 1 not enabled.\n");
2141 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011f,
2142 "MSIX Count: %d.\n", ha
->msix_count
);
2149 static struct isp_operations qla2100_isp_ops
= {
2150 .pci_config
= qla2100_pci_config
,
2151 .reset_chip
= qla2x00_reset_chip
,
2152 .chip_diag
= qla2x00_chip_diag
,
2153 .config_rings
= qla2x00_config_rings
,
2154 .reset_adapter
= qla2x00_reset_adapter
,
2155 .nvram_config
= qla2x00_nvram_config
,
2156 .update_fw_options
= qla2x00_update_fw_options
,
2157 .load_risc
= qla2x00_load_risc
,
2158 .pci_info_str
= qla2x00_pci_info_str
,
2159 .fw_version_str
= qla2x00_fw_version_str
,
2160 .intr_handler
= qla2100_intr_handler
,
2161 .enable_intrs
= qla2x00_enable_intrs
,
2162 .disable_intrs
= qla2x00_disable_intrs
,
2163 .abort_command
= qla2x00_abort_command
,
2164 .target_reset
= qla2x00_abort_target
,
2165 .lun_reset
= qla2x00_lun_reset
,
2166 .fabric_login
= qla2x00_login_fabric
,
2167 .fabric_logout
= qla2x00_fabric_logout
,
2168 .calc_req_entries
= qla2x00_calc_iocbs_32
,
2169 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
2170 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
2171 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
2172 .read_nvram
= qla2x00_read_nvram_data
,
2173 .write_nvram
= qla2x00_write_nvram_data
,
2174 .fw_dump
= qla2100_fw_dump
,
2177 .beacon_blink
= NULL
,
2178 .read_optrom
= qla2x00_read_optrom_data
,
2179 .write_optrom
= qla2x00_write_optrom_data
,
2180 .get_flash_version
= qla2x00_get_flash_version
,
2181 .start_scsi
= qla2x00_start_scsi
,
2182 .start_scsi_mq
= NULL
,
2183 .abort_isp
= qla2x00_abort_isp
,
2184 .iospace_config
= qla2x00_iospace_config
,
2185 .initialize_adapter
= qla2x00_initialize_adapter
,
2188 static struct isp_operations qla2300_isp_ops
= {
2189 .pci_config
= qla2300_pci_config
,
2190 .reset_chip
= qla2x00_reset_chip
,
2191 .chip_diag
= qla2x00_chip_diag
,
2192 .config_rings
= qla2x00_config_rings
,
2193 .reset_adapter
= qla2x00_reset_adapter
,
2194 .nvram_config
= qla2x00_nvram_config
,
2195 .update_fw_options
= qla2x00_update_fw_options
,
2196 .load_risc
= qla2x00_load_risc
,
2197 .pci_info_str
= qla2x00_pci_info_str
,
2198 .fw_version_str
= qla2x00_fw_version_str
,
2199 .intr_handler
= qla2300_intr_handler
,
2200 .enable_intrs
= qla2x00_enable_intrs
,
2201 .disable_intrs
= qla2x00_disable_intrs
,
2202 .abort_command
= qla2x00_abort_command
,
2203 .target_reset
= qla2x00_abort_target
,
2204 .lun_reset
= qla2x00_lun_reset
,
2205 .fabric_login
= qla2x00_login_fabric
,
2206 .fabric_logout
= qla2x00_fabric_logout
,
2207 .calc_req_entries
= qla2x00_calc_iocbs_32
,
2208 .build_iocbs
= qla2x00_build_scsi_iocbs_32
,
2209 .prep_ms_iocb
= qla2x00_prep_ms_iocb
,
2210 .prep_ms_fdmi_iocb
= qla2x00_prep_ms_fdmi_iocb
,
2211 .read_nvram
= qla2x00_read_nvram_data
,
2212 .write_nvram
= qla2x00_write_nvram_data
,
2213 .fw_dump
= qla2300_fw_dump
,
2214 .beacon_on
= qla2x00_beacon_on
,
2215 .beacon_off
= qla2x00_beacon_off
,
2216 .beacon_blink
= qla2x00_beacon_blink
,
2217 .read_optrom
= qla2x00_read_optrom_data
,
2218 .write_optrom
= qla2x00_write_optrom_data
,
2219 .get_flash_version
= qla2x00_get_flash_version
,
2220 .start_scsi
= qla2x00_start_scsi
,
2221 .start_scsi_mq
= NULL
,
2222 .abort_isp
= qla2x00_abort_isp
,
2223 .iospace_config
= qla2x00_iospace_config
,
2224 .initialize_adapter
= qla2x00_initialize_adapter
,
2227 static struct isp_operations qla24xx_isp_ops
= {
2228 .pci_config
= qla24xx_pci_config
,
2229 .reset_chip
= qla24xx_reset_chip
,
2230 .chip_diag
= qla24xx_chip_diag
,
2231 .config_rings
= qla24xx_config_rings
,
2232 .reset_adapter
= qla24xx_reset_adapter
,
2233 .nvram_config
= qla24xx_nvram_config
,
2234 .update_fw_options
= qla24xx_update_fw_options
,
2235 .load_risc
= qla24xx_load_risc
,
2236 .pci_info_str
= qla24xx_pci_info_str
,
2237 .fw_version_str
= qla24xx_fw_version_str
,
2238 .intr_handler
= qla24xx_intr_handler
,
2239 .enable_intrs
= qla24xx_enable_intrs
,
2240 .disable_intrs
= qla24xx_disable_intrs
,
2241 .abort_command
= qla24xx_abort_command
,
2242 .target_reset
= qla24xx_abort_target
,
2243 .lun_reset
= qla24xx_lun_reset
,
2244 .fabric_login
= qla24xx_login_fabric
,
2245 .fabric_logout
= qla24xx_fabric_logout
,
2246 .calc_req_entries
= NULL
,
2247 .build_iocbs
= NULL
,
2248 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2249 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2250 .read_nvram
= qla24xx_read_nvram_data
,
2251 .write_nvram
= qla24xx_write_nvram_data
,
2252 .fw_dump
= qla24xx_fw_dump
,
2253 .beacon_on
= qla24xx_beacon_on
,
2254 .beacon_off
= qla24xx_beacon_off
,
2255 .beacon_blink
= qla24xx_beacon_blink
,
2256 .read_optrom
= qla24xx_read_optrom_data
,
2257 .write_optrom
= qla24xx_write_optrom_data
,
2258 .get_flash_version
= qla24xx_get_flash_version
,
2259 .start_scsi
= qla24xx_start_scsi
,
2260 .start_scsi_mq
= NULL
,
2261 .abort_isp
= qla2x00_abort_isp
,
2262 .iospace_config
= qla2x00_iospace_config
,
2263 .initialize_adapter
= qla2x00_initialize_adapter
,
2266 static struct isp_operations qla25xx_isp_ops
= {
2267 .pci_config
= qla25xx_pci_config
,
2268 .reset_chip
= qla24xx_reset_chip
,
2269 .chip_diag
= qla24xx_chip_diag
,
2270 .config_rings
= qla24xx_config_rings
,
2271 .reset_adapter
= qla24xx_reset_adapter
,
2272 .nvram_config
= qla24xx_nvram_config
,
2273 .update_fw_options
= qla24xx_update_fw_options
,
2274 .load_risc
= qla24xx_load_risc
,
2275 .pci_info_str
= qla24xx_pci_info_str
,
2276 .fw_version_str
= qla24xx_fw_version_str
,
2277 .intr_handler
= qla24xx_intr_handler
,
2278 .enable_intrs
= qla24xx_enable_intrs
,
2279 .disable_intrs
= qla24xx_disable_intrs
,
2280 .abort_command
= qla24xx_abort_command
,
2281 .target_reset
= qla24xx_abort_target
,
2282 .lun_reset
= qla24xx_lun_reset
,
2283 .fabric_login
= qla24xx_login_fabric
,
2284 .fabric_logout
= qla24xx_fabric_logout
,
2285 .calc_req_entries
= NULL
,
2286 .build_iocbs
= NULL
,
2287 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2288 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2289 .read_nvram
= qla25xx_read_nvram_data
,
2290 .write_nvram
= qla25xx_write_nvram_data
,
2291 .fw_dump
= qla25xx_fw_dump
,
2292 .beacon_on
= qla24xx_beacon_on
,
2293 .beacon_off
= qla24xx_beacon_off
,
2294 .beacon_blink
= qla24xx_beacon_blink
,
2295 .read_optrom
= qla25xx_read_optrom_data
,
2296 .write_optrom
= qla24xx_write_optrom_data
,
2297 .get_flash_version
= qla24xx_get_flash_version
,
2298 .start_scsi
= qla24xx_dif_start_scsi
,
2299 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2300 .abort_isp
= qla2x00_abort_isp
,
2301 .iospace_config
= qla2x00_iospace_config
,
2302 .initialize_adapter
= qla2x00_initialize_adapter
,
2305 static struct isp_operations qla81xx_isp_ops
= {
2306 .pci_config
= qla25xx_pci_config
,
2307 .reset_chip
= qla24xx_reset_chip
,
2308 .chip_diag
= qla24xx_chip_diag
,
2309 .config_rings
= qla24xx_config_rings
,
2310 .reset_adapter
= qla24xx_reset_adapter
,
2311 .nvram_config
= qla81xx_nvram_config
,
2312 .update_fw_options
= qla24xx_update_fw_options
,
2313 .load_risc
= qla81xx_load_risc
,
2314 .pci_info_str
= qla24xx_pci_info_str
,
2315 .fw_version_str
= qla24xx_fw_version_str
,
2316 .intr_handler
= qla24xx_intr_handler
,
2317 .enable_intrs
= qla24xx_enable_intrs
,
2318 .disable_intrs
= qla24xx_disable_intrs
,
2319 .abort_command
= qla24xx_abort_command
,
2320 .target_reset
= qla24xx_abort_target
,
2321 .lun_reset
= qla24xx_lun_reset
,
2322 .fabric_login
= qla24xx_login_fabric
,
2323 .fabric_logout
= qla24xx_fabric_logout
,
2324 .calc_req_entries
= NULL
,
2325 .build_iocbs
= NULL
,
2326 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2327 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2329 .write_nvram
= NULL
,
2330 .fw_dump
= qla81xx_fw_dump
,
2331 .beacon_on
= qla24xx_beacon_on
,
2332 .beacon_off
= qla24xx_beacon_off
,
2333 .beacon_blink
= qla83xx_beacon_blink
,
2334 .read_optrom
= qla25xx_read_optrom_data
,
2335 .write_optrom
= qla24xx_write_optrom_data
,
2336 .get_flash_version
= qla24xx_get_flash_version
,
2337 .start_scsi
= qla24xx_dif_start_scsi
,
2338 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2339 .abort_isp
= qla2x00_abort_isp
,
2340 .iospace_config
= qla2x00_iospace_config
,
2341 .initialize_adapter
= qla2x00_initialize_adapter
,
2344 static struct isp_operations qla82xx_isp_ops
= {
2345 .pci_config
= qla82xx_pci_config
,
2346 .reset_chip
= qla82xx_reset_chip
,
2347 .chip_diag
= qla24xx_chip_diag
,
2348 .config_rings
= qla82xx_config_rings
,
2349 .reset_adapter
= qla24xx_reset_adapter
,
2350 .nvram_config
= qla81xx_nvram_config
,
2351 .update_fw_options
= qla24xx_update_fw_options
,
2352 .load_risc
= qla82xx_load_risc
,
2353 .pci_info_str
= qla24xx_pci_info_str
,
2354 .fw_version_str
= qla24xx_fw_version_str
,
2355 .intr_handler
= qla82xx_intr_handler
,
2356 .enable_intrs
= qla82xx_enable_intrs
,
2357 .disable_intrs
= qla82xx_disable_intrs
,
2358 .abort_command
= qla24xx_abort_command
,
2359 .target_reset
= qla24xx_abort_target
,
2360 .lun_reset
= qla24xx_lun_reset
,
2361 .fabric_login
= qla24xx_login_fabric
,
2362 .fabric_logout
= qla24xx_fabric_logout
,
2363 .calc_req_entries
= NULL
,
2364 .build_iocbs
= NULL
,
2365 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2366 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2367 .read_nvram
= qla24xx_read_nvram_data
,
2368 .write_nvram
= qla24xx_write_nvram_data
,
2369 .fw_dump
= qla82xx_fw_dump
,
2370 .beacon_on
= qla82xx_beacon_on
,
2371 .beacon_off
= qla82xx_beacon_off
,
2372 .beacon_blink
= NULL
,
2373 .read_optrom
= qla82xx_read_optrom_data
,
2374 .write_optrom
= qla82xx_write_optrom_data
,
2375 .get_flash_version
= qla82xx_get_flash_version
,
2376 .start_scsi
= qla82xx_start_scsi
,
2377 .start_scsi_mq
= NULL
,
2378 .abort_isp
= qla82xx_abort_isp
,
2379 .iospace_config
= qla82xx_iospace_config
,
2380 .initialize_adapter
= qla2x00_initialize_adapter
,
2383 static struct isp_operations qla8044_isp_ops
= {
2384 .pci_config
= qla82xx_pci_config
,
2385 .reset_chip
= qla82xx_reset_chip
,
2386 .chip_diag
= qla24xx_chip_diag
,
2387 .config_rings
= qla82xx_config_rings
,
2388 .reset_adapter
= qla24xx_reset_adapter
,
2389 .nvram_config
= qla81xx_nvram_config
,
2390 .update_fw_options
= qla24xx_update_fw_options
,
2391 .load_risc
= qla82xx_load_risc
,
2392 .pci_info_str
= qla24xx_pci_info_str
,
2393 .fw_version_str
= qla24xx_fw_version_str
,
2394 .intr_handler
= qla8044_intr_handler
,
2395 .enable_intrs
= qla82xx_enable_intrs
,
2396 .disable_intrs
= qla82xx_disable_intrs
,
2397 .abort_command
= qla24xx_abort_command
,
2398 .target_reset
= qla24xx_abort_target
,
2399 .lun_reset
= qla24xx_lun_reset
,
2400 .fabric_login
= qla24xx_login_fabric
,
2401 .fabric_logout
= qla24xx_fabric_logout
,
2402 .calc_req_entries
= NULL
,
2403 .build_iocbs
= NULL
,
2404 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2405 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2407 .write_nvram
= NULL
,
2408 .fw_dump
= qla8044_fw_dump
,
2409 .beacon_on
= qla82xx_beacon_on
,
2410 .beacon_off
= qla82xx_beacon_off
,
2411 .beacon_blink
= NULL
,
2412 .read_optrom
= qla8044_read_optrom_data
,
2413 .write_optrom
= qla8044_write_optrom_data
,
2414 .get_flash_version
= qla82xx_get_flash_version
,
2415 .start_scsi
= qla82xx_start_scsi
,
2416 .start_scsi_mq
= NULL
,
2417 .abort_isp
= qla8044_abort_isp
,
2418 .iospace_config
= qla82xx_iospace_config
,
2419 .initialize_adapter
= qla2x00_initialize_adapter
,
2422 static struct isp_operations qla83xx_isp_ops
= {
2423 .pci_config
= qla25xx_pci_config
,
2424 .reset_chip
= qla24xx_reset_chip
,
2425 .chip_diag
= qla24xx_chip_diag
,
2426 .config_rings
= qla24xx_config_rings
,
2427 .reset_adapter
= qla24xx_reset_adapter
,
2428 .nvram_config
= qla81xx_nvram_config
,
2429 .update_fw_options
= qla24xx_update_fw_options
,
2430 .load_risc
= qla81xx_load_risc
,
2431 .pci_info_str
= qla24xx_pci_info_str
,
2432 .fw_version_str
= qla24xx_fw_version_str
,
2433 .intr_handler
= qla24xx_intr_handler
,
2434 .enable_intrs
= qla24xx_enable_intrs
,
2435 .disable_intrs
= qla24xx_disable_intrs
,
2436 .abort_command
= qla24xx_abort_command
,
2437 .target_reset
= qla24xx_abort_target
,
2438 .lun_reset
= qla24xx_lun_reset
,
2439 .fabric_login
= qla24xx_login_fabric
,
2440 .fabric_logout
= qla24xx_fabric_logout
,
2441 .calc_req_entries
= NULL
,
2442 .build_iocbs
= NULL
,
2443 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2444 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2446 .write_nvram
= NULL
,
2447 .fw_dump
= qla83xx_fw_dump
,
2448 .beacon_on
= qla24xx_beacon_on
,
2449 .beacon_off
= qla24xx_beacon_off
,
2450 .beacon_blink
= qla83xx_beacon_blink
,
2451 .read_optrom
= qla25xx_read_optrom_data
,
2452 .write_optrom
= qla24xx_write_optrom_data
,
2453 .get_flash_version
= qla24xx_get_flash_version
,
2454 .start_scsi
= qla24xx_dif_start_scsi
,
2455 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2456 .abort_isp
= qla2x00_abort_isp
,
2457 .iospace_config
= qla83xx_iospace_config
,
2458 .initialize_adapter
= qla2x00_initialize_adapter
,
2461 static struct isp_operations qlafx00_isp_ops
= {
2462 .pci_config
= qlafx00_pci_config
,
2463 .reset_chip
= qlafx00_soft_reset
,
2464 .chip_diag
= qlafx00_chip_diag
,
2465 .config_rings
= qlafx00_config_rings
,
2466 .reset_adapter
= qlafx00_soft_reset
,
2467 .nvram_config
= NULL
,
2468 .update_fw_options
= NULL
,
2470 .pci_info_str
= qlafx00_pci_info_str
,
2471 .fw_version_str
= qlafx00_fw_version_str
,
2472 .intr_handler
= qlafx00_intr_handler
,
2473 .enable_intrs
= qlafx00_enable_intrs
,
2474 .disable_intrs
= qlafx00_disable_intrs
,
2475 .abort_command
= qla24xx_async_abort_command
,
2476 .target_reset
= qlafx00_abort_target
,
2477 .lun_reset
= qlafx00_lun_reset
,
2478 .fabric_login
= NULL
,
2479 .fabric_logout
= NULL
,
2480 .calc_req_entries
= NULL
,
2481 .build_iocbs
= NULL
,
2482 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2483 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2484 .read_nvram
= qla24xx_read_nvram_data
,
2485 .write_nvram
= qla24xx_write_nvram_data
,
2487 .beacon_on
= qla24xx_beacon_on
,
2488 .beacon_off
= qla24xx_beacon_off
,
2489 .beacon_blink
= NULL
,
2490 .read_optrom
= qla24xx_read_optrom_data
,
2491 .write_optrom
= qla24xx_write_optrom_data
,
2492 .get_flash_version
= qla24xx_get_flash_version
,
2493 .start_scsi
= qlafx00_start_scsi
,
2494 .start_scsi_mq
= NULL
,
2495 .abort_isp
= qlafx00_abort_isp
,
2496 .iospace_config
= qlafx00_iospace_config
,
2497 .initialize_adapter
= qlafx00_initialize_adapter
,
2500 static struct isp_operations qla27xx_isp_ops
= {
2501 .pci_config
= qla25xx_pci_config
,
2502 .reset_chip
= qla24xx_reset_chip
,
2503 .chip_diag
= qla24xx_chip_diag
,
2504 .config_rings
= qla24xx_config_rings
,
2505 .reset_adapter
= qla24xx_reset_adapter
,
2506 .nvram_config
= qla81xx_nvram_config
,
2507 .update_fw_options
= qla24xx_update_fw_options
,
2508 .load_risc
= qla81xx_load_risc
,
2509 .pci_info_str
= qla24xx_pci_info_str
,
2510 .fw_version_str
= qla24xx_fw_version_str
,
2511 .intr_handler
= qla24xx_intr_handler
,
2512 .enable_intrs
= qla24xx_enable_intrs
,
2513 .disable_intrs
= qla24xx_disable_intrs
,
2514 .abort_command
= qla24xx_abort_command
,
2515 .target_reset
= qla24xx_abort_target
,
2516 .lun_reset
= qla24xx_lun_reset
,
2517 .fabric_login
= qla24xx_login_fabric
,
2518 .fabric_logout
= qla24xx_fabric_logout
,
2519 .calc_req_entries
= NULL
,
2520 .build_iocbs
= NULL
,
2521 .prep_ms_iocb
= qla24xx_prep_ms_iocb
,
2522 .prep_ms_fdmi_iocb
= qla24xx_prep_ms_fdmi_iocb
,
2524 .write_nvram
= NULL
,
2525 .fw_dump
= qla27xx_fwdump
,
2526 .mpi_fw_dump
= qla27xx_mpi_fwdump
,
2527 .beacon_on
= qla24xx_beacon_on
,
2528 .beacon_off
= qla24xx_beacon_off
,
2529 .beacon_blink
= qla83xx_beacon_blink
,
2530 .read_optrom
= qla25xx_read_optrom_data
,
2531 .write_optrom
= qla24xx_write_optrom_data
,
2532 .get_flash_version
= qla24xx_get_flash_version
,
2533 .start_scsi
= qla24xx_dif_start_scsi
,
2534 .start_scsi_mq
= qla2xxx_dif_start_scsi_mq
,
2535 .abort_isp
= qla2x00_abort_isp
,
2536 .iospace_config
= qla83xx_iospace_config
,
2537 .initialize_adapter
= qla2x00_initialize_adapter
,
2541 qla2x00_set_isp_flags(struct qla_hw_data
*ha
)
2543 ha
->device_type
= DT_EXTENDED_IDS
;
2544 switch (ha
->pdev
->device
) {
2545 case PCI_DEVICE_ID_QLOGIC_ISP2100
:
2546 ha
->isp_type
|= DT_ISP2100
;
2547 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2548 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2550 case PCI_DEVICE_ID_QLOGIC_ISP2200
:
2551 ha
->isp_type
|= DT_ISP2200
;
2552 ha
->device_type
&= ~DT_EXTENDED_IDS
;
2553 ha
->fw_srisc_address
= RISC_START_ADDRESS_2100
;
2555 case PCI_DEVICE_ID_QLOGIC_ISP2300
:
2556 ha
->isp_type
|= DT_ISP2300
;
2557 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2558 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2560 case PCI_DEVICE_ID_QLOGIC_ISP2312
:
2561 ha
->isp_type
|= DT_ISP2312
;
2562 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2563 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2565 case PCI_DEVICE_ID_QLOGIC_ISP2322
:
2566 ha
->isp_type
|= DT_ISP2322
;
2567 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2568 if (ha
->pdev
->subsystem_vendor
== 0x1028 &&
2569 ha
->pdev
->subsystem_device
== 0x0170)
2570 ha
->device_type
|= DT_OEM_001
;
2571 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2573 case PCI_DEVICE_ID_QLOGIC_ISP6312
:
2574 ha
->isp_type
|= DT_ISP6312
;
2575 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2577 case PCI_DEVICE_ID_QLOGIC_ISP6322
:
2578 ha
->isp_type
|= DT_ISP6322
;
2579 ha
->fw_srisc_address
= RISC_START_ADDRESS_2300
;
2581 case PCI_DEVICE_ID_QLOGIC_ISP2422
:
2582 ha
->isp_type
|= DT_ISP2422
;
2583 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2584 ha
->device_type
|= DT_FWI2
;
2585 ha
->device_type
|= DT_IIDMA
;
2586 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2588 case PCI_DEVICE_ID_QLOGIC_ISP2432
:
2589 ha
->isp_type
|= DT_ISP2432
;
2590 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2591 ha
->device_type
|= DT_FWI2
;
2592 ha
->device_type
|= DT_IIDMA
;
2593 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2595 case PCI_DEVICE_ID_QLOGIC_ISP8432
:
2596 ha
->isp_type
|= DT_ISP8432
;
2597 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2598 ha
->device_type
|= DT_FWI2
;
2599 ha
->device_type
|= DT_IIDMA
;
2600 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2602 case PCI_DEVICE_ID_QLOGIC_ISP5422
:
2603 ha
->isp_type
|= DT_ISP5422
;
2604 ha
->device_type
|= DT_FWI2
;
2605 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2607 case PCI_DEVICE_ID_QLOGIC_ISP5432
:
2608 ha
->isp_type
|= DT_ISP5432
;
2609 ha
->device_type
|= DT_FWI2
;
2610 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2612 case PCI_DEVICE_ID_QLOGIC_ISP2532
:
2613 ha
->isp_type
|= DT_ISP2532
;
2614 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2615 ha
->device_type
|= DT_FWI2
;
2616 ha
->device_type
|= DT_IIDMA
;
2617 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2619 case PCI_DEVICE_ID_QLOGIC_ISP8001
:
2620 ha
->isp_type
|= DT_ISP8001
;
2621 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2622 ha
->device_type
|= DT_FWI2
;
2623 ha
->device_type
|= DT_IIDMA
;
2624 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2626 case PCI_DEVICE_ID_QLOGIC_ISP8021
:
2627 ha
->isp_type
|= DT_ISP8021
;
2628 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2629 ha
->device_type
|= DT_FWI2
;
2630 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2631 /* Initialize 82XX ISP flags */
2632 qla82xx_init_flags(ha
);
2634 case PCI_DEVICE_ID_QLOGIC_ISP8044
:
2635 ha
->isp_type
|= DT_ISP8044
;
2636 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2637 ha
->device_type
|= DT_FWI2
;
2638 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2639 /* Initialize 82XX ISP flags */
2640 qla82xx_init_flags(ha
);
2642 case PCI_DEVICE_ID_QLOGIC_ISP2031
:
2643 ha
->isp_type
|= DT_ISP2031
;
2644 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2645 ha
->device_type
|= DT_FWI2
;
2646 ha
->device_type
|= DT_IIDMA
;
2647 ha
->device_type
|= DT_T10_PI
;
2648 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2650 case PCI_DEVICE_ID_QLOGIC_ISP8031
:
2651 ha
->isp_type
|= DT_ISP8031
;
2652 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2653 ha
->device_type
|= DT_FWI2
;
2654 ha
->device_type
|= DT_IIDMA
;
2655 ha
->device_type
|= DT_T10_PI
;
2656 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2658 case PCI_DEVICE_ID_QLOGIC_ISPF001
:
2659 ha
->isp_type
|= DT_ISPFX00
;
2661 case PCI_DEVICE_ID_QLOGIC_ISP2071
:
2662 ha
->isp_type
|= DT_ISP2071
;
2663 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2664 ha
->device_type
|= DT_FWI2
;
2665 ha
->device_type
|= DT_IIDMA
;
2666 ha
->device_type
|= DT_T10_PI
;
2667 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2669 case PCI_DEVICE_ID_QLOGIC_ISP2271
:
2670 ha
->isp_type
|= DT_ISP2271
;
2671 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2672 ha
->device_type
|= DT_FWI2
;
2673 ha
->device_type
|= DT_IIDMA
;
2674 ha
->device_type
|= DT_T10_PI
;
2675 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2677 case PCI_DEVICE_ID_QLOGIC_ISP2261
:
2678 ha
->isp_type
|= DT_ISP2261
;
2679 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2680 ha
->device_type
|= DT_FWI2
;
2681 ha
->device_type
|= DT_IIDMA
;
2682 ha
->device_type
|= DT_T10_PI
;
2683 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2685 case PCI_DEVICE_ID_QLOGIC_ISP2081
:
2686 case PCI_DEVICE_ID_QLOGIC_ISP2089
:
2687 ha
->isp_type
|= DT_ISP2081
;
2688 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2689 ha
->device_type
|= DT_FWI2
;
2690 ha
->device_type
|= DT_IIDMA
;
2691 ha
->device_type
|= DT_T10_PI
;
2692 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2694 case PCI_DEVICE_ID_QLOGIC_ISP2281
:
2695 case PCI_DEVICE_ID_QLOGIC_ISP2289
:
2696 ha
->isp_type
|= DT_ISP2281
;
2697 ha
->device_type
|= DT_ZIO_SUPPORTED
;
2698 ha
->device_type
|= DT_FWI2
;
2699 ha
->device_type
|= DT_IIDMA
;
2700 ha
->device_type
|= DT_T10_PI
;
2701 ha
->fw_srisc_address
= RISC_START_ADDRESS_2400
;
2706 ha
->port_no
= ha
->portnum
& 1;
2708 /* Get adapter physical port no from interrupt pin register. */
2709 pci_read_config_byte(ha
->pdev
, PCI_INTERRUPT_PIN
, &ha
->port_no
);
2710 if (IS_QLA25XX(ha
) || IS_QLA2031(ha
) ||
2711 IS_QLA27XX(ha
) || IS_QLA28XX(ha
))
2714 ha
->port_no
= !(ha
->port_no
& 1);
2717 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x000b,
2718 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2719 ha
->device_type
, ha
->port_no
, ha
->fw_srisc_address
);
2723 qla2xxx_scan_start(struct Scsi_Host
*shost
)
2725 scsi_qla_host_t
*vha
= shost_priv(shost
);
2727 if (vha
->hw
->flags
.running_gold_fw
)
2730 set_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
);
2731 set_bit(LOCAL_LOOP_UPDATE
, &vha
->dpc_flags
);
2732 set_bit(RSCN_UPDATE
, &vha
->dpc_flags
);
2733 set_bit(NPIV_CONFIG_NEEDED
, &vha
->dpc_flags
);
2737 qla2xxx_scan_finished(struct Scsi_Host
*shost
, unsigned long time
)
2739 scsi_qla_host_t
*vha
= shost_priv(shost
);
2741 if (test_bit(UNLOADING
, &vha
->dpc_flags
))
2745 if (time
> vha
->hw
->loop_reset_delay
* HZ
)
2748 return atomic_read(&vha
->loop_state
) == LOOP_READY
;
2751 static void qla2x00_iocb_work_fn(struct work_struct
*work
)
2753 struct scsi_qla_host
*vha
= container_of(work
,
2754 struct scsi_qla_host
, iocb_work
);
2755 struct qla_hw_data
*ha
= vha
->hw
;
2756 struct scsi_qla_host
*base_vha
= pci_get_drvdata(ha
->pdev
);
2758 unsigned long flags
;
2760 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
2763 while (!list_empty(&vha
->work_list
) && i
> 0) {
2764 qla2x00_do_work(vha
);
2768 spin_lock_irqsave(&vha
->work_lock
, flags
);
2769 clear_bit(IOCB_WORK_ACTIVE
, &vha
->dpc_flags
);
2770 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
2774 * PCI driver interface
2777 qla2x00_probe_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2780 struct Scsi_Host
*host
;
2781 scsi_qla_host_t
*base_vha
= NULL
;
2782 struct qla_hw_data
*ha
;
2784 char fw_str
[30], wq_name
[30];
2785 struct scsi_host_template
*sht
;
2786 int bars
, mem_only
= 0;
2787 uint16_t req_length
= 0, rsp_length
= 0;
2788 struct req_que
*req
= NULL
;
2789 struct rsp_que
*rsp
= NULL
;
2792 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
2793 sht
= &qla2xxx_driver_template
;
2794 if (pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2422
||
2795 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2432
||
2796 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8432
||
2797 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5422
||
2798 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP5432
||
2799 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2532
||
2800 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8001
||
2801 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8021
||
2802 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2031
||
2803 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8031
||
2804 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISPF001
||
2805 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP8044
||
2806 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2071
||
2807 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2271
||
2808 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2261
||
2809 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2081
||
2810 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2281
||
2811 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2089
||
2812 pdev
->device
== PCI_DEVICE_ID_QLOGIC_ISP2289
) {
2813 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2815 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0007,
2816 "Mem only adapter.\n");
2818 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0008,
2819 "Bars=%d.\n", bars
);
2822 if (pci_enable_device_mem(pdev
))
2825 if (pci_enable_device(pdev
))
2829 /* This may fail but that's ok */
2830 pci_enable_pcie_error_reporting(pdev
);
2832 /* Turn off T10-DIF when FC-NVMe is enabled */
2836 ha
= kzalloc(sizeof(struct qla_hw_data
), GFP_KERNEL
);
2838 ql_log_pci(ql_log_fatal
, pdev
, 0x0009,
2839 "Unable to allocate memory for ha.\n");
2840 goto disable_device
;
2842 ql_dbg_pci(ql_dbg_init
, pdev
, 0x000a,
2843 "Memory allocated for ha=%p.\n", ha
);
2845 INIT_LIST_HEAD(&ha
->tgt
.q_full_list
);
2846 spin_lock_init(&ha
->tgt
.q_full_lock
);
2847 spin_lock_init(&ha
->tgt
.sess_lock
);
2848 spin_lock_init(&ha
->tgt
.atio_lock
);
2850 atomic_set(&ha
->nvme_active_aen_cnt
, 0);
2852 /* Clear our data area */
2854 ha
->mem_only
= mem_only
;
2855 spin_lock_init(&ha
->hardware_lock
);
2856 spin_lock_init(&ha
->vport_slock
);
2857 mutex_init(&ha
->selflogin_lock
);
2858 mutex_init(&ha
->optrom_mutex
);
2860 /* Set ISP-type information. */
2861 qla2x00_set_isp_flags(ha
);
2863 /* Set EEH reset type to fundamental if required by hba */
2864 if (IS_QLA24XX(ha
) || IS_QLA25XX(ha
) || IS_QLA81XX(ha
) ||
2865 IS_QLA83XX(ha
) || IS_QLA27XX(ha
) || IS_QLA28XX(ha
))
2866 pdev
->needs_freset
= 1;
2868 ha
->prev_topology
= 0;
2869 ha
->init_cb_size
= sizeof(init_cb_t
);
2870 ha
->link_data_rate
= PORT_SPEED_UNKNOWN
;
2871 ha
->optrom_size
= OPTROM_SIZE_2300
;
2872 ha
->max_exchg
= FW_MAX_EXCHANGES_CNT
;
2873 atomic_set(&ha
->num_pend_mbx_stage1
, 0);
2874 atomic_set(&ha
->num_pend_mbx_stage2
, 0);
2875 atomic_set(&ha
->num_pend_mbx_stage3
, 0);
2876 atomic_set(&ha
->zio_threshold
, DEFAULT_ZIO_THRESHOLD
);
2877 ha
->last_zio_threshold
= DEFAULT_ZIO_THRESHOLD
;
2879 /* Assign ISP specific operations. */
2880 if (IS_QLA2100(ha
)) {
2881 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2882 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2100
;
2883 req_length
= REQUEST_ENTRY_CNT_2100
;
2884 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2885 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2886 ha
->gid_list_info_size
= 4;
2887 ha
->flash_conf_off
= ~0;
2888 ha
->flash_data_off
= ~0;
2889 ha
->nvram_conf_off
= ~0;
2890 ha
->nvram_data_off
= ~0;
2891 ha
->isp_ops
= &qla2100_isp_ops
;
2892 } else if (IS_QLA2200(ha
)) {
2893 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2894 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_2200
;
2895 req_length
= REQUEST_ENTRY_CNT_2200
;
2896 rsp_length
= RESPONSE_ENTRY_CNT_2100
;
2897 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2100
;
2898 ha
->gid_list_info_size
= 4;
2899 ha
->flash_conf_off
= ~0;
2900 ha
->flash_data_off
= ~0;
2901 ha
->nvram_conf_off
= ~0;
2902 ha
->nvram_data_off
= ~0;
2903 ha
->isp_ops
= &qla2100_isp_ops
;
2904 } else if (IS_QLA23XX(ha
)) {
2905 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2100
;
2906 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2907 req_length
= REQUEST_ENTRY_CNT_2200
;
2908 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2909 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2910 ha
->gid_list_info_size
= 6;
2911 if (IS_QLA2322(ha
) || IS_QLA6322(ha
))
2912 ha
->optrom_size
= OPTROM_SIZE_2322
;
2913 ha
->flash_conf_off
= ~0;
2914 ha
->flash_data_off
= ~0;
2915 ha
->nvram_conf_off
= ~0;
2916 ha
->nvram_data_off
= ~0;
2917 ha
->isp_ops
= &qla2300_isp_ops
;
2918 } else if (IS_QLA24XX_TYPE(ha
)) {
2919 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2920 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2921 req_length
= REQUEST_ENTRY_CNT_24XX
;
2922 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2923 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2924 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2925 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2926 ha
->gid_list_info_size
= 8;
2927 ha
->optrom_size
= OPTROM_SIZE_24XX
;
2928 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA24XX
;
2929 ha
->isp_ops
= &qla24xx_isp_ops
;
2930 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2931 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2932 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2933 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2934 } else if (IS_QLA25XX(ha
)) {
2935 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2936 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2937 req_length
= REQUEST_ENTRY_CNT_24XX
;
2938 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2939 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2940 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2941 ha
->init_cb_size
= sizeof(struct mid_init_cb_24xx
);
2942 ha
->gid_list_info_size
= 8;
2943 ha
->optrom_size
= OPTROM_SIZE_25XX
;
2944 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2945 ha
->isp_ops
= &qla25xx_isp_ops
;
2946 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2947 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2948 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2949 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2950 } else if (IS_QLA81XX(ha
)) {
2951 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2952 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2953 req_length
= REQUEST_ENTRY_CNT_24XX
;
2954 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
2955 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
2956 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2957 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2958 ha
->gid_list_info_size
= 8;
2959 ha
->optrom_size
= OPTROM_SIZE_81XX
;
2960 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2961 ha
->isp_ops
= &qla81xx_isp_ops
;
2962 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
2963 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
2964 ha
->nvram_conf_off
= ~0;
2965 ha
->nvram_data_off
= ~0;
2966 } else if (IS_QLA82XX(ha
)) {
2967 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2968 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2969 req_length
= REQUEST_ENTRY_CNT_82XX
;
2970 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2971 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2972 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2973 ha
->gid_list_info_size
= 8;
2974 ha
->optrom_size
= OPTROM_SIZE_82XX
;
2975 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2976 ha
->isp_ops
= &qla82xx_isp_ops
;
2977 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2978 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2979 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2980 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2981 } else if (IS_QLA8044(ha
)) {
2982 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2983 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
2984 req_length
= REQUEST_ENTRY_CNT_82XX
;
2985 rsp_length
= RESPONSE_ENTRY_CNT_82XX
;
2986 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
2987 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
2988 ha
->gid_list_info_size
= 8;
2989 ha
->optrom_size
= OPTROM_SIZE_83XX
;
2990 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
2991 ha
->isp_ops
= &qla8044_isp_ops
;
2992 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF
;
2993 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA
;
2994 ha
->nvram_conf_off
= FARX_ACCESS_NVRAM_CONF
;
2995 ha
->nvram_data_off
= FARX_ACCESS_NVRAM_DATA
;
2996 } else if (IS_QLA83XX(ha
)) {
2997 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
2998 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
2999 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
3000 req_length
= REQUEST_ENTRY_CNT_83XX
;
3001 rsp_length
= RESPONSE_ENTRY_CNT_83XX
;
3002 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
3003 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
3004 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
3005 ha
->gid_list_info_size
= 8;
3006 ha
->optrom_size
= OPTROM_SIZE_83XX
;
3007 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
3008 ha
->isp_ops
= &qla83xx_isp_ops
;
3009 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
3010 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
3011 ha
->nvram_conf_off
= ~0;
3012 ha
->nvram_data_off
= ~0;
3013 } else if (IS_QLAFX00(ha
)) {
3014 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_FX00
;
3015 ha
->mbx_count
= MAILBOX_REGISTER_COUNT_FX00
;
3016 ha
->aen_mbx_count
= AEN_MAILBOX_REGISTER_COUNT_FX00
;
3017 req_length
= REQUEST_ENTRY_CNT_FX00
;
3018 rsp_length
= RESPONSE_ENTRY_CNT_FX00
;
3019 ha
->isp_ops
= &qlafx00_isp_ops
;
3020 ha
->port_down_retry_count
= 30; /* default value */
3021 ha
->mr
.fw_hbt_cnt
= QLAFX00_HEARTBEAT_INTERVAL
;
3022 ha
->mr
.fw_reset_timer_tick
= QLAFX00_RESET_INTERVAL
;
3023 ha
->mr
.fw_critemp_timer_tick
= QLAFX00_CRITEMP_INTERVAL
;
3024 ha
->mr
.fw_hbt_en
= 1;
3025 ha
->mr
.host_info_resend
= false;
3026 ha
->mr
.hinfo_resend_timer_tick
= QLAFX00_HINFO_RESEND_INTERVAL
;
3027 } else if (IS_QLA27XX(ha
)) {
3028 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
3029 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
3030 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
3031 req_length
= REQUEST_ENTRY_CNT_83XX
;
3032 rsp_length
= RESPONSE_ENTRY_CNT_83XX
;
3033 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
3034 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
3035 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
3036 ha
->gid_list_info_size
= 8;
3037 ha
->optrom_size
= OPTROM_SIZE_83XX
;
3038 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
3039 ha
->isp_ops
= &qla27xx_isp_ops
;
3040 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_81XX
;
3041 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_81XX
;
3042 ha
->nvram_conf_off
= ~0;
3043 ha
->nvram_data_off
= ~0;
3044 } else if (IS_QLA28XX(ha
)) {
3045 ha
->portnum
= PCI_FUNC(ha
->pdev
->devfn
);
3046 ha
->max_fibre_devices
= MAX_FIBRE_DEVICES_2400
;
3047 ha
->mbx_count
= MAILBOX_REGISTER_COUNT
;
3048 req_length
= REQUEST_ENTRY_CNT_24XX
;
3049 rsp_length
= RESPONSE_ENTRY_CNT_2300
;
3050 ha
->tgt
.atio_q_length
= ATIO_ENTRY_CNT_24XX
;
3051 ha
->max_loop_id
= SNS_LAST_LOOP_ID_2300
;
3052 ha
->init_cb_size
= sizeof(struct mid_init_cb_81xx
);
3053 ha
->gid_list_info_size
= 8;
3054 ha
->optrom_size
= OPTROM_SIZE_28XX
;
3055 ha
->nvram_npiv_size
= QLA_MAX_VPORTS_QLA25XX
;
3056 ha
->isp_ops
= &qla27xx_isp_ops
;
3057 ha
->flash_conf_off
= FARX_ACCESS_FLASH_CONF_28XX
;
3058 ha
->flash_data_off
= FARX_ACCESS_FLASH_DATA_28XX
;
3059 ha
->nvram_conf_off
= ~0;
3060 ha
->nvram_data_off
= ~0;
3063 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001e,
3064 "mbx_count=%d, req_length=%d, "
3065 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3066 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3067 "max_fibre_devices=%d.\n",
3068 ha
->mbx_count
, req_length
, rsp_length
, ha
->max_loop_id
,
3069 ha
->init_cb_size
, ha
->gid_list_info_size
, ha
->optrom_size
,
3070 ha
->nvram_npiv_size
, ha
->max_fibre_devices
);
3071 ql_dbg_pci(ql_dbg_init
, pdev
, 0x001f,
3072 "isp_ops=%p, flash_conf_off=%d, "
3073 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3074 ha
->isp_ops
, ha
->flash_conf_off
, ha
->flash_data_off
,
3075 ha
->nvram_conf_off
, ha
->nvram_data_off
);
3077 /* Configure PCI I/O space */
3078 ret
= ha
->isp_ops
->iospace_config(ha
);
3080 goto iospace_config_failed
;
3082 ql_log_pci(ql_log_info
, pdev
, 0x001d,
3083 "Found an ISP%04X irq %d iobase 0x%p.\n",
3084 pdev
->device
, pdev
->irq
, ha
->iobase
);
3085 mutex_init(&ha
->vport_lock
);
3086 mutex_init(&ha
->mq_lock
);
3087 init_completion(&ha
->mbx_cmd_comp
);
3088 complete(&ha
->mbx_cmd_comp
);
3089 init_completion(&ha
->mbx_intr_comp
);
3090 init_completion(&ha
->dcbx_comp
);
3091 init_completion(&ha
->lb_portup_comp
);
3093 set_bit(0, (unsigned long *) ha
->vp_idx_map
);
3095 qla2x00_config_dma_addressing(ha
);
3096 ql_dbg_pci(ql_dbg_init
, pdev
, 0x0020,
3097 "64 Bit addressing is %s.\n",
3098 ha
->flags
.enable_64bit_addressing
? "enable" :
3100 ret
= qla2x00_mem_alloc(ha
, req_length
, rsp_length
, &req
, &rsp
);
3102 ql_log_pci(ql_log_fatal
, pdev
, 0x0031,
3103 "Failed to allocate memory for adapter, aborting.\n");
3105 goto probe_hw_failed
;
3108 req
->max_q_depth
= MAX_Q_DEPTH
;
3109 if (ql2xmaxqdepth
!= 0 && ql2xmaxqdepth
<= 0xffffU
)
3110 req
->max_q_depth
= ql2xmaxqdepth
;
3113 base_vha
= qla2x00_create_host(sht
, ha
);
3116 goto probe_hw_failed
;
3119 pci_set_drvdata(pdev
, base_vha
);
3120 set_bit(PFLG_DRIVER_PROBING
, &base_vha
->pci_flags
);
3122 host
= base_vha
->host
;
3123 base_vha
->req
= req
;
3124 if (IS_QLA2XXX_MIDTYPE(ha
))
3125 base_vha
->mgmt_svr_loop_id
=
3126 qla2x00_reserve_mgmt_server_loop_id(base_vha
);
3128 base_vha
->mgmt_svr_loop_id
= MANAGEMENT_SERVER
+
3131 /* Setup fcport template structure. */
3132 ha
->mr
.fcport
.vha
= base_vha
;
3133 ha
->mr
.fcport
.port_type
= FCT_UNKNOWN
;
3134 ha
->mr
.fcport
.loop_id
= FC_NO_LOOP_ID
;
3135 qla2x00_set_fcport_state(&ha
->mr
.fcport
, FCS_UNCONFIGURED
);
3136 ha
->mr
.fcport
.supported_classes
= FC_COS_UNSPECIFIED
;
3137 ha
->mr
.fcport
.scan_state
= 1;
3139 /* Set the SG table size based on ISP type */
3140 if (!IS_FWI2_CAPABLE(ha
)) {
3142 host
->sg_tablesize
= 32;
3144 if (!IS_QLA82XX(ha
))
3145 host
->sg_tablesize
= QLA_SG_ALL
;
3147 host
->max_id
= ha
->max_fibre_devices
;
3148 host
->cmd_per_lun
= 3;
3149 host
->unique_id
= host
->host_no
;
3150 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
)
3151 host
->max_cmd_len
= 32;
3153 host
->max_cmd_len
= MAX_CMDSZ
;
3154 host
->max_channel
= MAX_BUSES
- 1;
3155 /* Older HBAs support only 16-bit LUNs */
3156 if (!IS_QLAFX00(ha
) && !IS_FWI2_CAPABLE(ha
) &&
3157 ql2xmaxlun
> 0xffff)
3158 host
->max_lun
= 0xffff;
3160 host
->max_lun
= ql2xmaxlun
;
3161 host
->transportt
= qla2xxx_transport_template
;
3162 sht
->vendor_id
= (SCSI_NL_VID_TYPE_PCI
| PCI_VENDOR_ID_QLOGIC
);
3164 ql_dbg(ql_dbg_init
, base_vha
, 0x0033,
3165 "max_id=%d this_id=%d "
3166 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3167 "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host
->max_id
,
3168 host
->this_id
, host
->cmd_per_lun
, host
->unique_id
,
3169 host
->max_cmd_len
, host
->max_channel
, host
->max_lun
,
3170 host
->transportt
, sht
->vendor_id
);
3172 INIT_WORK(&base_vha
->iocb_work
, qla2x00_iocb_work_fn
);
3174 /* Set up the irqs */
3175 ret
= qla2x00_request_irqs(ha
, rsp
);
3179 /* Alloc arrays of request and response ring ptrs */
3180 ret
= qla2x00_alloc_queues(ha
, req
, rsp
);
3182 ql_log(ql_log_fatal
, base_vha
, 0x003d,
3183 "Failed to allocate memory for queue pointers..."
3190 /* number of hardware queues supported by blk/scsi-mq*/
3191 host
->nr_hw_queues
= ha
->max_qpairs
;
3193 ql_dbg(ql_dbg_init
, base_vha
, 0x0192,
3194 "blk/scsi-mq enabled, HW queues = %d.\n", host
->nr_hw_queues
);
3196 if (ql2xnvmeenable
) {
3197 host
->nr_hw_queues
= ha
->max_qpairs
;
3198 ql_dbg(ql_dbg_init
, base_vha
, 0x0194,
3199 "FC-NVMe support is enabled, HW queues=%d\n",
3200 host
->nr_hw_queues
);
3202 ql_dbg(ql_dbg_init
, base_vha
, 0x0193,
3203 "blk/scsi-mq disabled.\n");
3207 qlt_probe_one_stage1(base_vha
, ha
);
3209 pci_save_state(pdev
);
3211 /* Assign back pointers */
3215 if (IS_QLAFX00(ha
)) {
3216 ha
->rsp_q_map
[0] = rsp
;
3217 ha
->req_q_map
[0] = req
;
3218 set_bit(0, ha
->req_qid_map
);
3219 set_bit(0, ha
->rsp_qid_map
);
3222 /* FWI2-capable only. */
3223 req
->req_q_in
= &ha
->iobase
->isp24
.req_q_in
;
3224 req
->req_q_out
= &ha
->iobase
->isp24
.req_q_out
;
3225 rsp
->rsp_q_in
= &ha
->iobase
->isp24
.rsp_q_in
;
3226 rsp
->rsp_q_out
= &ha
->iobase
->isp24
.rsp_q_out
;
3227 if (ha
->mqenable
|| IS_QLA83XX(ha
) || IS_QLA27XX(ha
) ||
3229 req
->req_q_in
= &ha
->mqiobase
->isp25mq
.req_q_in
;
3230 req
->req_q_out
= &ha
->mqiobase
->isp25mq
.req_q_out
;
3231 rsp
->rsp_q_in
= &ha
->mqiobase
->isp25mq
.rsp_q_in
;
3232 rsp
->rsp_q_out
= &ha
->mqiobase
->isp25mq
.rsp_q_out
;
3235 if (IS_QLAFX00(ha
)) {
3236 req
->req_q_in
= &ha
->iobase
->ispfx00
.req_q_in
;
3237 req
->req_q_out
= &ha
->iobase
->ispfx00
.req_q_out
;
3238 rsp
->rsp_q_in
= &ha
->iobase
->ispfx00
.rsp_q_in
;
3239 rsp
->rsp_q_out
= &ha
->iobase
->ispfx00
.rsp_q_out
;
3242 if (IS_P3P_TYPE(ha
)) {
3243 req
->req_q_out
= &ha
->iobase
->isp82
.req_q_out
[0];
3244 rsp
->rsp_q_in
= &ha
->iobase
->isp82
.rsp_q_in
[0];
3245 rsp
->rsp_q_out
= &ha
->iobase
->isp82
.rsp_q_out
[0];
3248 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc009,
3249 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3250 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
3251 ql_dbg(ql_dbg_multiq
, base_vha
, 0xc00a,
3252 "req->req_q_in=%p req->req_q_out=%p "
3253 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3254 req
->req_q_in
, req
->req_q_out
,
3255 rsp
->rsp_q_in
, rsp
->rsp_q_out
);
3256 ql_dbg(ql_dbg_init
, base_vha
, 0x003e,
3257 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3258 ha
->rsp_q_map
, ha
->req_q_map
, rsp
->req
, req
->rsp
);
3259 ql_dbg(ql_dbg_init
, base_vha
, 0x003f,
3260 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3261 req
->req_q_in
, req
->req_q_out
, rsp
->rsp_q_in
, rsp
->rsp_q_out
);
3263 ha
->wq
= alloc_workqueue("qla2xxx_wq", 0, 0);
3264 if (unlikely(!ha
->wq
)) {
3269 if (ha
->isp_ops
->initialize_adapter(base_vha
)) {
3270 ql_log(ql_log_fatal
, base_vha
, 0x00d6,
3271 "Failed to initialize adapter - Adapter flags %x.\n",
3272 base_vha
->device_flags
);
3274 if (IS_QLA82XX(ha
)) {
3275 qla82xx_idc_lock(ha
);
3276 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
3277 QLA8XXX_DEV_FAILED
);
3278 qla82xx_idc_unlock(ha
);
3279 ql_log(ql_log_fatal
, base_vha
, 0x00d7,
3280 "HW State: FAILED.\n");
3281 } else if (IS_QLA8044(ha
)) {
3282 qla8044_idc_lock(ha
);
3283 qla8044_wr_direct(base_vha
,
3284 QLA8044_CRB_DEV_STATE_INDEX
,
3285 QLA8XXX_DEV_FAILED
);
3286 qla8044_idc_unlock(ha
);
3287 ql_log(ql_log_fatal
, base_vha
, 0x0150,
3288 "HW State: FAILED.\n");
3296 host
->can_queue
= QLAFX00_MAX_CANQUEUE
;
3298 host
->can_queue
= req
->num_outstanding_cmds
- 10;
3300 ql_dbg(ql_dbg_init
, base_vha
, 0x0032,
3301 "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3302 host
->can_queue
, base_vha
->req
,
3303 base_vha
->mgmt_svr_loop_id
, host
->sg_tablesize
);
3306 bool startit
= false;
3308 if (QLA_TGT_MODE_ENABLED())
3311 if (ql2x_ini_mode
== QLA2XXX_INI_MODE_ENABLED
)
3314 /* Create start of day qpairs for Block MQ */
3315 for (i
= 0; i
< ha
->max_qpairs
; i
++)
3316 qla2xxx_create_qpair(base_vha
, 5, 0, startit
);
3319 if (ha
->flags
.running_gold_fw
)
3323 * Startup the kernel thread for this host adapter
3325 ha
->dpc_thread
= kthread_create(qla2x00_do_dpc
, ha
,
3326 "%s_dpc", base_vha
->host_str
);
3327 if (IS_ERR(ha
->dpc_thread
)) {
3328 ql_log(ql_log_fatal
, base_vha
, 0x00ed,
3329 "Failed to start DPC thread.\n");
3330 ret
= PTR_ERR(ha
->dpc_thread
);
3331 ha
->dpc_thread
= NULL
;
3334 ql_dbg(ql_dbg_init
, base_vha
, 0x00ee,
3335 "DPC thread started successfully.\n");
3338 * If we're not coming up in initiator mode, we might sit for
3339 * a while without waking up the dpc thread, which leads to a
3340 * stuck process warning. So just kick the dpc once here and
3341 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3343 qla2xxx_wake_dpc(base_vha
);
3345 INIT_WORK(&ha
->board_disable
, qla2x00_disable_board_on_pci_error
);
3347 if (IS_QLA8031(ha
) || IS_MCTP_CAPABLE(ha
)) {
3348 sprintf(wq_name
, "qla2xxx_%lu_dpc_lp_wq", base_vha
->host_no
);
3349 ha
->dpc_lp_wq
= create_singlethread_workqueue(wq_name
);
3350 INIT_WORK(&ha
->idc_aen
, qla83xx_service_idc_aen
);
3352 sprintf(wq_name
, "qla2xxx_%lu_dpc_hp_wq", base_vha
->host_no
);
3353 ha
->dpc_hp_wq
= create_singlethread_workqueue(wq_name
);
3354 INIT_WORK(&ha
->nic_core_reset
, qla83xx_nic_core_reset_work
);
3355 INIT_WORK(&ha
->idc_state_handler
,
3356 qla83xx_idc_state_handler_work
);
3357 INIT_WORK(&ha
->nic_core_unrecoverable
,
3358 qla83xx_nic_core_unrecoverable_work
);
3362 list_add_tail(&base_vha
->list
, &ha
->vp_list
);
3363 base_vha
->host
->irq
= ha
->pdev
->irq
;
3365 /* Initialized the timer */
3366 qla2x00_start_timer(base_vha
, WATCH_INTERVAL
);
3367 ql_dbg(ql_dbg_init
, base_vha
, 0x00ef,
3368 "Started qla2x00_timer with "
3369 "interval=%d.\n", WATCH_INTERVAL
);
3370 ql_dbg(ql_dbg_init
, base_vha
, 0x00f0,
3371 "Detected hba at address=%p.\n",
3374 if (IS_T10_PI_CAPABLE(ha
) && ql2xenabledif
) {
3375 if (ha
->fw_attributes
& BIT_4
) {
3376 int prot
= 0, guard
;
3378 base_vha
->flags
.difdix_supported
= 1;
3379 ql_dbg(ql_dbg_init
, base_vha
, 0x00f1,
3380 "Registering for DIF/DIX type 1 and 3 protection.\n");
3381 if (ql2xenabledif
== 1)
3382 prot
= SHOST_DIX_TYPE0_PROTECTION
;
3384 scsi_host_set_prot(host
, ql2xprotmask
);
3386 scsi_host_set_prot(host
,
3387 prot
| SHOST_DIF_TYPE1_PROTECTION
3388 | SHOST_DIF_TYPE2_PROTECTION
3389 | SHOST_DIF_TYPE3_PROTECTION
3390 | SHOST_DIX_TYPE1_PROTECTION
3391 | SHOST_DIX_TYPE2_PROTECTION
3392 | SHOST_DIX_TYPE3_PROTECTION
);
3394 guard
= SHOST_DIX_GUARD_CRC
;
3396 if (IS_PI_IPGUARD_CAPABLE(ha
) &&
3397 (ql2xenabledif
> 1 || IS_PI_DIFB_DIX0_CAPABLE(ha
)))
3398 guard
|= SHOST_DIX_GUARD_IP
;
3401 scsi_host_set_guard(host
, ql2xprotguard
);
3403 scsi_host_set_guard(host
, guard
);
3405 base_vha
->flags
.difdix_supported
= 0;
3408 ha
->isp_ops
->enable_intrs(ha
);
3410 if (IS_QLAFX00(ha
)) {
3411 ret
= qlafx00_fx_disc(base_vha
,
3412 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_CONFIG_INFO
);
3413 host
->sg_tablesize
= (ha
->mr
.extended_io_enabled
) ?
3417 ret
= scsi_add_host(host
, &pdev
->dev
);
3421 base_vha
->flags
.init_done
= 1;
3422 base_vha
->flags
.online
= 1;
3423 ha
->prev_minidump_failed
= 0;
3425 ql_dbg(ql_dbg_init
, base_vha
, 0x00f2,
3426 "Init done and hba is online.\n");
3428 if (qla_ini_mode_enabled(base_vha
) ||
3429 qla_dual_mode_enabled(base_vha
))
3430 scsi_scan_host(host
);
3432 ql_dbg(ql_dbg_init
, base_vha
, 0x0122,
3433 "skipping scsi_scan_host() for non-initiator port\n");
3435 qla2x00_alloc_sysfs_attr(base_vha
);
3437 if (IS_QLAFX00(ha
)) {
3438 ret
= qlafx00_fx_disc(base_vha
,
3439 &base_vha
->hw
->mr
.fcport
, FXDISC_GET_PORT_INFO
);
3441 /* Register system information */
3442 ret
= qlafx00_fx_disc(base_vha
,
3443 &base_vha
->hw
->mr
.fcport
, FXDISC_REG_HOST_INFO
);
3446 qla2x00_init_host_attr(base_vha
);
3448 qla2x00_dfs_setup(base_vha
);
3450 ql_log(ql_log_info
, base_vha
, 0x00fb,
3451 "QLogic %s - %s.\n", ha
->model_number
, ha
->model_desc
);
3452 ql_log(ql_log_info
, base_vha
, 0x00fc,
3453 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3454 pdev
->device
, ha
->isp_ops
->pci_info_str(base_vha
, pci_info
,
3456 pci_name(pdev
), ha
->flags
.enable_64bit_addressing
? '+' : '-',
3458 ha
->isp_ops
->fw_version_str(base_vha
, fw_str
, sizeof(fw_str
)));
3460 qlt_add_target(ha
, base_vha
);
3462 clear_bit(PFLG_DRIVER_PROBING
, &base_vha
->pci_flags
);
3464 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
3470 if (base_vha
->gnl
.l
) {
3471 dma_free_coherent(&ha
->pdev
->dev
, base_vha
->gnl
.size
,
3472 base_vha
->gnl
.l
, base_vha
->gnl
.ldma
);
3473 base_vha
->gnl
.l
= NULL
;
3476 if (base_vha
->timer_active
)
3477 qla2x00_stop_timer(base_vha
);
3478 base_vha
->flags
.online
= 0;
3479 if (ha
->dpc_thread
) {
3480 struct task_struct
*t
= ha
->dpc_thread
;
3482 ha
->dpc_thread
= NULL
;
3486 qla2x00_free_device(base_vha
);
3487 scsi_host_put(base_vha
->host
);
3489 * Need to NULL out local req/rsp after
3490 * qla2x00_free_device => qla2x00_free_queues frees
3491 * what these are pointing to. Or else we'll
3492 * fall over below in qla2x00_free_req/rsp_que.
3498 qla2x00_mem_free(ha
);
3499 qla2x00_free_req_que(ha
, req
);
3500 qla2x00_free_rsp_que(ha
, rsp
);
3501 qla2x00_clear_drv_active(ha
);
3503 iospace_config_failed
:
3504 if (IS_P3P_TYPE(ha
)) {
3505 if (!ha
->nx_pcibase
)
3506 iounmap((device_reg_t
*)ha
->nx_pcibase
);
3508 iounmap((device_reg_t
*)ha
->nxdb_wr_ptr
);
3511 iounmap(ha
->iobase
);
3513 iounmap(ha
->cregbase
);
3515 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
3519 pci_disable_device(pdev
);
3523 static void __qla_set_remove_flag(scsi_qla_host_t
*base_vha
)
3525 scsi_qla_host_t
*vp
;
3526 unsigned long flags
;
3527 struct qla_hw_data
*ha
;
3534 spin_lock_irqsave(&ha
->vport_slock
, flags
);
3535 list_for_each_entry(vp
, &ha
->vp_list
, list
)
3536 set_bit(PFLG_DRIVER_REMOVING
, &vp
->pci_flags
);
3539 * Indicate device removal to prevent future board_disable
3540 * and wait until any pending board_disable has completed.
3542 set_bit(PFLG_DRIVER_REMOVING
, &base_vha
->pci_flags
);
3543 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
3547 qla2x00_shutdown(struct pci_dev
*pdev
)
3549 scsi_qla_host_t
*vha
;
3550 struct qla_hw_data
*ha
;
3552 vha
= pci_get_drvdata(pdev
);
3555 ql_log(ql_log_info
, vha
, 0xfffa,
3556 "Adapter shutdown\n");
3559 * Prevent future board_disable and wait
3560 * until any pending board_disable has completed.
3562 __qla_set_remove_flag(vha
);
3563 cancel_work_sync(&ha
->board_disable
);
3565 if (!atomic_read(&pdev
->enable_cnt
))
3568 /* Notify ISPFX00 firmware */
3570 qlafx00_driver_shutdown(vha
, 20);
3572 /* Turn-off FCE trace */
3573 if (ha
->flags
.fce_enabled
) {
3574 qla2x00_disable_fce_trace(vha
, NULL
, NULL
);
3575 ha
->flags
.fce_enabled
= 0;
3578 /* Turn-off EFT trace */
3580 qla2x00_disable_eft_trace(vha
);
3582 if (IS_QLA25XX(ha
) || IS_QLA2031(ha
) || IS_QLA27XX(ha
) ||
3584 if (ha
->flags
.fw_started
)
3585 qla2x00_abort_isp_cleanup(vha
);
3587 /* Stop currently executing firmware. */
3588 qla2x00_try_to_stop_firmware(vha
);
3592 if (vha
->timer_active
)
3593 qla2x00_stop_timer(vha
);
3595 /* Turn adapter off line */
3596 vha
->flags
.online
= 0;
3598 /* turn-off interrupts on the card */
3599 if (ha
->interrupts_on
) {
3600 vha
->flags
.init_done
= 0;
3601 ha
->isp_ops
->disable_intrs(ha
);
3604 qla2x00_free_irqs(vha
);
3606 qla2x00_free_fw_dump(ha
);
3608 pci_disable_device(pdev
);
3609 ql_log(ql_log_info
, vha
, 0xfffe,
3610 "Adapter shutdown successfully.\n");
3613 /* Deletes all the virtual ports for a given ha */
3615 qla2x00_delete_all_vps(struct qla_hw_data
*ha
, scsi_qla_host_t
*base_vha
)
3617 scsi_qla_host_t
*vha
;
3618 unsigned long flags
;
3620 mutex_lock(&ha
->vport_lock
);
3621 while (ha
->cur_vport_count
) {
3622 spin_lock_irqsave(&ha
->vport_slock
, flags
);
3624 BUG_ON(base_vha
->list
.next
== &ha
->vp_list
);
3625 /* This assumes first entry in ha->vp_list is always base vha */
3626 vha
= list_first_entry(&base_vha
->list
, scsi_qla_host_t
, list
);
3627 scsi_host_get(vha
->host
);
3629 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
3630 mutex_unlock(&ha
->vport_lock
);
3632 qla_nvme_delete(vha
);
3634 fc_vport_terminate(vha
->fc_vport
);
3635 scsi_host_put(vha
->host
);
3637 mutex_lock(&ha
->vport_lock
);
3639 mutex_unlock(&ha
->vport_lock
);
3642 /* Stops all deferred work threads */
3644 qla2x00_destroy_deferred_work(struct qla_hw_data
*ha
)
3646 /* Cancel all work and destroy DPC workqueues */
3647 if (ha
->dpc_lp_wq
) {
3648 cancel_work_sync(&ha
->idc_aen
);
3649 destroy_workqueue(ha
->dpc_lp_wq
);
3650 ha
->dpc_lp_wq
= NULL
;
3653 if (ha
->dpc_hp_wq
) {
3654 cancel_work_sync(&ha
->nic_core_reset
);
3655 cancel_work_sync(&ha
->idc_state_handler
);
3656 cancel_work_sync(&ha
->nic_core_unrecoverable
);
3657 destroy_workqueue(ha
->dpc_hp_wq
);
3658 ha
->dpc_hp_wq
= NULL
;
3661 /* Kill the kernel thread for this host */
3662 if (ha
->dpc_thread
) {
3663 struct task_struct
*t
= ha
->dpc_thread
;
3666 * qla2xxx_wake_dpc checks for ->dpc_thread
3667 * so we need to zero it out.
3669 ha
->dpc_thread
= NULL
;
3675 qla2x00_unmap_iobases(struct qla_hw_data
*ha
)
3677 if (IS_QLA82XX(ha
)) {
3679 iounmap((device_reg_t
*)ha
->nx_pcibase
);
3681 iounmap((device_reg_t
*)ha
->nxdb_wr_ptr
);
3684 iounmap(ha
->iobase
);
3687 iounmap(ha
->cregbase
);
3690 iounmap(ha
->mqiobase
);
3692 if ((IS_QLA83XX(ha
) || IS_QLA27XX(ha
) || IS_QLA28XX(ha
)) &&
3694 iounmap(ha
->msixbase
);
3699 qla2x00_clear_drv_active(struct qla_hw_data
*ha
)
3701 if (IS_QLA8044(ha
)) {
3702 qla8044_idc_lock(ha
);
3703 qla8044_clear_drv_active(ha
);
3704 qla8044_idc_unlock(ha
);
3705 } else if (IS_QLA82XX(ha
)) {
3706 qla82xx_idc_lock(ha
);
3707 qla82xx_clear_drv_active(ha
);
3708 qla82xx_idc_unlock(ha
);
3713 qla2x00_remove_one(struct pci_dev
*pdev
)
3715 scsi_qla_host_t
*base_vha
;
3716 struct qla_hw_data
*ha
;
3718 base_vha
= pci_get_drvdata(pdev
);
3720 ql_log(ql_log_info
, base_vha
, 0xb079,
3721 "Removing driver\n");
3722 __qla_set_remove_flag(base_vha
);
3723 cancel_work_sync(&ha
->board_disable
);
3726 * If the PCI device is disabled then there was a PCI-disconnect and
3727 * qla2x00_disable_board_on_pci_error has taken care of most of the
3730 if (!atomic_read(&pdev
->enable_cnt
)) {
3731 dma_free_coherent(&ha
->pdev
->dev
, base_vha
->gnl
.size
,
3732 base_vha
->gnl
.l
, base_vha
->gnl
.ldma
);
3733 base_vha
->gnl
.l
= NULL
;
3734 scsi_host_put(base_vha
->host
);
3736 pci_set_drvdata(pdev
, NULL
);
3739 qla2x00_wait_for_hba_ready(base_vha
);
3741 if (IS_QLA25XX(ha
) || IS_QLA2031(ha
) || IS_QLA27XX(ha
) ||
3743 if (ha
->flags
.fw_started
)
3744 qla2x00_abort_isp_cleanup(base_vha
);
3745 } else if (!IS_QLAFX00(ha
)) {
3746 if (IS_QLA8031(ha
)) {
3747 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07e,
3748 "Clearing fcoe driver presence.\n");
3749 if (qla83xx_clear_drv_presence(base_vha
) != QLA_SUCCESS
)
3750 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb079,
3751 "Error while clearing DRV-Presence.\n");
3754 qla2x00_try_to_stop_firmware(base_vha
);
3757 qla2x00_wait_for_sess_deletion(base_vha
);
3760 * if UNLOAD flag is already set, then continue unload,
3761 * where it was set first.
3763 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
3766 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
3768 qla_nvme_delete(base_vha
);
3770 dma_free_coherent(&ha
->pdev
->dev
,
3771 base_vha
->gnl
.size
, base_vha
->gnl
.l
, base_vha
->gnl
.ldma
);
3773 base_vha
->gnl
.l
= NULL
;
3775 vfree(base_vha
->scan
.l
);
3778 qlafx00_driver_shutdown(base_vha
, 20);
3780 qla2x00_delete_all_vps(ha
, base_vha
);
3782 qla2x00_dfs_remove(base_vha
);
3784 qla84xx_put_chip(base_vha
);
3787 if (base_vha
->timer_active
)
3788 qla2x00_stop_timer(base_vha
);
3790 base_vha
->flags
.online
= 0;
3792 /* free DMA memory */
3793 if (ha
->exlogin_buf
)
3794 qla2x00_free_exlogin_buffer(ha
);
3796 /* free DMA memory */
3797 if (ha
->exchoffld_buf
)
3798 qla2x00_free_exchoffld_buffer(ha
);
3800 qla2x00_destroy_deferred_work(ha
);
3802 qlt_remove_target(ha
, base_vha
);
3804 qla2x00_free_sysfs_attr(base_vha
, true);
3806 fc_remove_host(base_vha
->host
);
3807 qlt_remove_target_resources(ha
);
3809 scsi_remove_host(base_vha
->host
);
3811 qla2x00_free_device(base_vha
);
3813 qla2x00_clear_drv_active(ha
);
3815 scsi_host_put(base_vha
->host
);
3817 qla2x00_unmap_iobases(ha
);
3819 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
3822 pci_disable_pcie_error_reporting(pdev
);
3824 pci_disable_device(pdev
);
3828 qla24xx_free_purex_list(struct purex_list
*list
)
3830 struct list_head
*item
, *next
;
3833 spin_lock_irqsave(&list
->lock
, flags
);
3834 list_for_each_safe(item
, next
, &list
->head
) {
3836 kfree(list_entry(item
, struct purex_item
, list
));
3838 spin_unlock_irqrestore(&list
->lock
, flags
);
3842 qla2x00_free_device(scsi_qla_host_t
*vha
)
3844 struct qla_hw_data
*ha
= vha
->hw
;
3846 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
3849 if (vha
->timer_active
)
3850 qla2x00_stop_timer(vha
);
3852 qla25xx_delete_queues(vha
);
3853 vha
->flags
.online
= 0;
3855 /* turn-off interrupts on the card */
3856 if (ha
->interrupts_on
) {
3857 vha
->flags
.init_done
= 0;
3858 ha
->isp_ops
->disable_intrs(ha
);
3861 qla2x00_free_fcports(vha
);
3863 qla2x00_free_irqs(vha
);
3865 /* Flush the work queue and remove it */
3867 flush_workqueue(ha
->wq
);
3868 destroy_workqueue(ha
->wq
);
3873 qla24xx_free_purex_list(&vha
->purex_list
);
3875 qla2x00_mem_free(ha
);
3877 qla82xx_md_free(vha
);
3879 qla2x00_free_queues(ha
);
3882 void qla2x00_free_fcports(struct scsi_qla_host
*vha
)
3884 fc_port_t
*fcport
, *tfcport
;
3886 list_for_each_entry_safe(fcport
, tfcport
, &vha
->vp_fcports
, list
)
3887 qla2x00_free_fcport(fcport
);
3891 qla2x00_schedule_rport_del(struct scsi_qla_host
*vha
, fc_port_t
*fcport
)
3898 if (fcport
->rport
) {
3899 ql_dbg(ql_dbg_disc
, fcport
->vha
, 0x2109,
3900 "%s %8phN. rport %p roles %x\n",
3901 __func__
, fcport
->port_name
, fcport
->rport
,
3902 fcport
->rport
->roles
);
3903 fc_remote_port_delete(fcport
->rport
);
3905 qlt_do_generation_tick(vha
, &now
);
3909 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3911 * Input: ha = adapter block pointer. fcport = port structure pointer.
3917 void qla2x00_mark_device_lost(scsi_qla_host_t
*vha
, fc_port_t
*fcport
,
3920 if (IS_QLAFX00(vha
->hw
)) {
3921 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3922 qla2x00_schedule_rport_del(vha
, fcport
);
3926 if (atomic_read(&fcport
->state
) == FCS_ONLINE
&&
3927 vha
->vp_idx
== fcport
->vha
->vp_idx
) {
3928 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3929 qla2x00_schedule_rport_del(vha
, fcport
);
3932 * We may need to retry the login, so don't change the state of the
3933 * port but do the retries.
3935 if (atomic_read(&fcport
->state
) != FCS_DEVICE_DEAD
)
3936 qla2x00_set_fcport_state(fcport
, FCS_DEVICE_LOST
);
3941 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
3945 qla2x00_mark_all_devices_lost(scsi_qla_host_t
*vha
)
3949 ql_dbg(ql_dbg_disc
, vha
, 0x20f1,
3950 "Mark all dev lost\n");
3952 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
3953 fcport
->scan_state
= 0;
3954 qlt_schedule_sess_for_deletion(fcport
);
3958 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data
*ha
)
3962 if (IS_FWI2_CAPABLE(ha
))
3965 for (i
= 0; i
< SNS_FIRST_LOOP_ID
; i
++)
3966 set_bit(i
, ha
->loop_id_map
);
3967 set_bit(MANAGEMENT_SERVER
, ha
->loop_id_map
);
3968 set_bit(BROADCAST
, ha
->loop_id_map
);
3973 * Allocates adapter memory.
3980 qla2x00_mem_alloc(struct qla_hw_data
*ha
, uint16_t req_len
, uint16_t rsp_len
,
3981 struct req_que
**req
, struct rsp_que
**rsp
)
3985 ha
->init_cb
= dma_alloc_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
3986 &ha
->init_cb_dma
, GFP_KERNEL
);
3990 if (qlt_mem_alloc(ha
) < 0)
3991 goto fail_free_init_cb
;
3993 ha
->gid_list
= dma_alloc_coherent(&ha
->pdev
->dev
,
3994 qla2x00_gid_list_size(ha
), &ha
->gid_list_dma
, GFP_KERNEL
);
3996 goto fail_free_tgt_mem
;
3998 ha
->srb_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
, srb_cachep
);
3999 if (!ha
->srb_mempool
)
4000 goto fail_free_gid_list
;
4002 if (IS_P3P_TYPE(ha
)) {
4003 /* Allocate cache for CT6 Ctx. */
4005 ctx_cachep
= kmem_cache_create("qla2xxx_ctx",
4006 sizeof(struct ct6_dsd
), 0,
4007 SLAB_HWCACHE_ALIGN
, NULL
);
4009 goto fail_free_srb_mempool
;
4011 ha
->ctx_mempool
= mempool_create_slab_pool(SRB_MIN_REQ
,
4013 if (!ha
->ctx_mempool
)
4014 goto fail_free_srb_mempool
;
4015 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0021,
4016 "ctx_cachep=%p ctx_mempool=%p.\n",
4017 ctx_cachep
, ha
->ctx_mempool
);
4020 /* Get memory for cached NVRAM */
4021 ha
->nvram
= kzalloc(MAX_NVRAM_SIZE
, GFP_KERNEL
);
4023 goto fail_free_ctx_mempool
;
4025 snprintf(name
, sizeof(name
), "%s_%d", QLA2XXX_DRIVER_NAME
,
4027 ha
->s_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
4028 DMA_POOL_SIZE
, 8, 0);
4029 if (!ha
->s_dma_pool
)
4030 goto fail_free_nvram
;
4032 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0022,
4033 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4034 ha
->init_cb
, ha
->gid_list
, ha
->srb_mempool
, ha
->s_dma_pool
);
4036 if (IS_P3P_TYPE(ha
) || ql2xenabledif
) {
4037 ha
->dl_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
4038 DSD_LIST_DMA_POOL_SIZE
, 8, 0);
4039 if (!ha
->dl_dma_pool
) {
4040 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0023,
4041 "Failed to allocate memory for dl_dma_pool.\n");
4042 goto fail_s_dma_pool
;
4045 ha
->fcp_cmnd_dma_pool
= dma_pool_create(name
, &ha
->pdev
->dev
,
4046 FCP_CMND_DMA_POOL_SIZE
, 8, 0);
4047 if (!ha
->fcp_cmnd_dma_pool
) {
4048 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0024,
4049 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4050 goto fail_dl_dma_pool
;
4053 if (ql2xenabledif
) {
4054 u64 bufsize
= DIF_BUNDLING_DMA_POOL_SIZE
;
4055 struct dsd_dma
*dsd
, *nxt
;
4057 /* Creata a DMA pool of buffers for DIF bundling */
4058 ha
->dif_bundl_pool
= dma_pool_create(name
,
4059 &ha
->pdev
->dev
, DIF_BUNDLING_DMA_POOL_SIZE
, 8, 0);
4060 if (!ha
->dif_bundl_pool
) {
4061 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0024,
4062 "%s: failed create dif_bundl_pool\n",
4064 goto fail_dif_bundl_dma_pool
;
4067 INIT_LIST_HEAD(&ha
->pool
.good
.head
);
4068 INIT_LIST_HEAD(&ha
->pool
.unusable
.head
);
4069 ha
->pool
.good
.count
= 0;
4070 ha
->pool
.unusable
.count
= 0;
4071 for (i
= 0; i
< 128; i
++) {
4072 dsd
= kzalloc(sizeof(*dsd
), GFP_ATOMIC
);
4074 ql_dbg_pci(ql_dbg_init
, ha
->pdev
,
4075 0xe0ee, "%s: failed alloc dsd\n",
4079 ha
->dif_bundle_kallocs
++;
4081 dsd
->dsd_addr
= dma_pool_alloc(
4082 ha
->dif_bundl_pool
, GFP_ATOMIC
,
4083 &dsd
->dsd_list_dma
);
4084 if (!dsd
->dsd_addr
) {
4085 ql_dbg_pci(ql_dbg_init
, ha
->pdev
,
4087 "%s: failed alloc ->dsd_addr\n",
4090 ha
->dif_bundle_kallocs
--;
4093 ha
->dif_bundle_dma_allocs
++;
4096 * if DMA buffer crosses 4G boundary,
4097 * put it on bad list
4099 if (MSD(dsd
->dsd_list_dma
) ^
4100 MSD(dsd
->dsd_list_dma
+ bufsize
)) {
4101 list_add_tail(&dsd
->list
,
4102 &ha
->pool
.unusable
.head
);
4103 ha
->pool
.unusable
.count
++;
4105 list_add_tail(&dsd
->list
,
4106 &ha
->pool
.good
.head
);
4107 ha
->pool
.good
.count
++;
4111 /* return the good ones back to the pool */
4112 list_for_each_entry_safe(dsd
, nxt
,
4113 &ha
->pool
.good
.head
, list
) {
4114 list_del(&dsd
->list
);
4115 dma_pool_free(ha
->dif_bundl_pool
,
4116 dsd
->dsd_addr
, dsd
->dsd_list_dma
);
4117 ha
->dif_bundle_dma_allocs
--;
4119 ha
->dif_bundle_kallocs
--;
4122 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0024,
4123 "%s: dif dma pool (good=%u unusable=%u)\n",
4124 __func__
, ha
->pool
.good
.count
,
4125 ha
->pool
.unusable
.count
);
4128 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0025,
4129 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4130 ha
->dl_dma_pool
, ha
->fcp_cmnd_dma_pool
,
4131 ha
->dif_bundl_pool
);
4134 /* Allocate memory for SNS commands */
4135 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)) {
4136 /* Get consistent memory allocated for SNS commands */
4137 ha
->sns_cmd
= dma_alloc_coherent(&ha
->pdev
->dev
,
4138 sizeof(struct sns_cmd_pkt
), &ha
->sns_cmd_dma
, GFP_KERNEL
);
4141 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0026,
4142 "sns_cmd: %p.\n", ha
->sns_cmd
);
4144 /* Get consistent memory allocated for MS IOCB */
4145 ha
->ms_iocb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
4149 /* Get consistent memory allocated for CT SNS commands */
4150 ha
->ct_sns
= dma_alloc_coherent(&ha
->pdev
->dev
,
4151 sizeof(struct ct_sns_pkt
), &ha
->ct_sns_dma
, GFP_KERNEL
);
4153 goto fail_free_ms_iocb
;
4154 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0027,
4155 "ms_iocb=%p ct_sns=%p.\n",
4156 ha
->ms_iocb
, ha
->ct_sns
);
4159 /* Allocate memory for request ring */
4160 *req
= kzalloc(sizeof(struct req_que
), GFP_KERNEL
);
4162 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0028,
4163 "Failed to allocate memory for req.\n");
4166 (*req
)->length
= req_len
;
4167 (*req
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
4168 ((*req
)->length
+ 1) * sizeof(request_t
),
4169 &(*req
)->dma
, GFP_KERNEL
);
4170 if (!(*req
)->ring
) {
4171 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0029,
4172 "Failed to allocate memory for req_ring.\n");
4175 /* Allocate memory for response ring */
4176 *rsp
= kzalloc(sizeof(struct rsp_que
), GFP_KERNEL
);
4178 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002a,
4179 "Failed to allocate memory for rsp.\n");
4183 (*rsp
)->length
= rsp_len
;
4184 (*rsp
)->ring
= dma_alloc_coherent(&ha
->pdev
->dev
,
4185 ((*rsp
)->length
+ 1) * sizeof(response_t
),
4186 &(*rsp
)->dma
, GFP_KERNEL
);
4187 if (!(*rsp
)->ring
) {
4188 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002b,
4189 "Failed to allocate memory for rsp_ring.\n");
4194 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002c,
4195 "req=%p req->length=%d req->ring=%p rsp=%p "
4196 "rsp->length=%d rsp->ring=%p.\n",
4197 *req
, (*req
)->length
, (*req
)->ring
, *rsp
, (*rsp
)->length
,
4199 /* Allocate memory for NVRAM data for vports */
4200 if (ha
->nvram_npiv_size
) {
4201 ha
->npiv_info
= kcalloc(ha
->nvram_npiv_size
,
4202 sizeof(struct qla_npiv_entry
),
4204 if (!ha
->npiv_info
) {
4205 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x002d,
4206 "Failed to allocate memory for npiv_info.\n");
4207 goto fail_npiv_info
;
4210 ha
->npiv_info
= NULL
;
4212 /* Get consistent memory allocated for EX-INIT-CB. */
4213 if (IS_CNA_CAPABLE(ha
) || IS_QLA2031(ha
) || IS_QLA27XX(ha
) ||
4215 ha
->ex_init_cb
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
4216 &ha
->ex_init_cb_dma
);
4217 if (!ha
->ex_init_cb
)
4218 goto fail_ex_init_cb
;
4219 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002e,
4220 "ex_init_cb=%p.\n", ha
->ex_init_cb
);
4223 INIT_LIST_HEAD(&ha
->gbl_dsd_list
);
4225 /* Get consistent memory allocated for Async Port-Database. */
4226 if (!IS_FWI2_CAPABLE(ha
)) {
4227 ha
->async_pd
= dma_pool_alloc(ha
->s_dma_pool
, GFP_KERNEL
,
4231 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x002f,
4232 "async_pd=%p.\n", ha
->async_pd
);
4235 INIT_LIST_HEAD(&ha
->vp_list
);
4237 /* Allocate memory for our loop_id bitmap */
4238 ha
->loop_id_map
= kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE
),
4241 if (!ha
->loop_id_map
)
4242 goto fail_loop_id_map
;
4244 qla2x00_set_reserved_loop_ids(ha
);
4245 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x0123,
4246 "loop_id_map=%p.\n", ha
->loop_id_map
);
4249 ha
->sfp_data
= dma_alloc_coherent(&ha
->pdev
->dev
,
4250 SFP_DEV_SIZE
, &ha
->sfp_data_dma
, GFP_KERNEL
);
4251 if (!ha
->sfp_data
) {
4252 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
4253 "Unable to allocate memory for SFP read-data.\n");
4257 ha
->flt
= dma_alloc_coherent(&ha
->pdev
->dev
,
4258 sizeof(struct qla_flt_header
) + FLT_REGIONS_SIZE
, &ha
->flt_dma
,
4261 ql_dbg_pci(ql_dbg_init
, ha
->pdev
, 0x011b,
4262 "Unable to allocate memory for FLT.\n");
4263 goto fail_flt_buffer
;
4269 dma_free_coherent(&ha
->pdev
->dev
, SFP_DEV_SIZE
,
4270 ha
->sfp_data
, ha
->sfp_data_dma
);
4272 kfree(ha
->loop_id_map
);
4274 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
4276 dma_pool_free(ha
->s_dma_pool
, ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
4278 kfree(ha
->npiv_info
);
4280 dma_free_coherent(&ha
->pdev
->dev
, ((*rsp
)->length
+ 1) *
4281 sizeof(response_t
), (*rsp
)->ring
, (*rsp
)->dma
);
4282 (*rsp
)->ring
= NULL
;
4288 dma_free_coherent(&ha
->pdev
->dev
, ((*req
)->length
+ 1) *
4289 sizeof(request_t
), (*req
)->ring
, (*req
)->dma
);
4290 (*req
)->ring
= NULL
;
4296 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
4297 ha
->ct_sns
, ha
->ct_sns_dma
);
4301 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
4303 ha
->ms_iocb_dma
= 0;
4306 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
4307 ha
->sns_cmd
, ha
->sns_cmd_dma
);
4309 if (ql2xenabledif
) {
4310 struct dsd_dma
*dsd
, *nxt
;
4312 list_for_each_entry_safe(dsd
, nxt
, &ha
->pool
.unusable
.head
,
4314 list_del(&dsd
->list
);
4315 dma_pool_free(ha
->dif_bundl_pool
, dsd
->dsd_addr
,
4317 ha
->dif_bundle_dma_allocs
--;
4319 ha
->dif_bundle_kallocs
--;
4320 ha
->pool
.unusable
.count
--;
4322 dma_pool_destroy(ha
->dif_bundl_pool
);
4323 ha
->dif_bundl_pool
= NULL
;
4326 fail_dif_bundl_dma_pool
:
4327 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
4328 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
4329 ha
->fcp_cmnd_dma_pool
= NULL
;
4332 if (IS_QLA82XX(ha
) || ql2xenabledif
) {
4333 dma_pool_destroy(ha
->dl_dma_pool
);
4334 ha
->dl_dma_pool
= NULL
;
4337 dma_pool_destroy(ha
->s_dma_pool
);
4338 ha
->s_dma_pool
= NULL
;
4342 fail_free_ctx_mempool
:
4343 mempool_destroy(ha
->ctx_mempool
);
4344 ha
->ctx_mempool
= NULL
;
4345 fail_free_srb_mempool
:
4346 mempool_destroy(ha
->srb_mempool
);
4347 ha
->srb_mempool
= NULL
;
4349 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
4352 ha
->gid_list
= NULL
;
4353 ha
->gid_list_dma
= 0;
4357 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
, ha
->init_cb
,
4360 ha
->init_cb_dma
= 0;
4362 ql_log(ql_log_fatal
, NULL
, 0x0030,
4363 "Memory allocation failure.\n");
4368 qla2x00_set_exlogins_buffer(scsi_qla_host_t
*vha
)
4371 uint16_t size
, max_cnt
, temp
;
4372 struct qla_hw_data
*ha
= vha
->hw
;
4374 /* Return if we don't need to alloacate any extended logins */
4378 if (!IS_EXLOGIN_OFFLD_CAPABLE(ha
))
4381 ql_log(ql_log_info
, vha
, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins
);
4383 rval
= qla_get_exlogin_status(vha
, &size
, &max_cnt
);
4384 if (rval
!= QLA_SUCCESS
) {
4385 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd029,
4386 "Failed to get exlogin status.\n");
4390 temp
= (ql2xexlogins
> max_cnt
) ? max_cnt
: ql2xexlogins
;
4393 if (temp
!= ha
->exlogin_size
) {
4394 qla2x00_free_exlogin_buffer(ha
);
4395 ha
->exlogin_size
= temp
;
4397 ql_log(ql_log_info
, vha
, 0xd024,
4398 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4399 max_cnt
, size
, temp
);
4401 ql_log(ql_log_info
, vha
, 0xd025,
4402 "EXLOGIN: requested size=0x%x\n", ha
->exlogin_size
);
4404 /* Get consistent memory for extended logins */
4405 ha
->exlogin_buf
= dma_alloc_coherent(&ha
->pdev
->dev
,
4406 ha
->exlogin_size
, &ha
->exlogin_buf_dma
, GFP_KERNEL
);
4407 if (!ha
->exlogin_buf
) {
4408 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd02a,
4409 "Failed to allocate memory for exlogin_buf_dma.\n");
4414 /* Now configure the dma buffer */
4415 rval
= qla_set_exlogin_mem_cfg(vha
, ha
->exlogin_buf_dma
);
4417 ql_log(ql_log_fatal
, vha
, 0xd033,
4418 "Setup extended login buffer ****FAILED****.\n");
4419 qla2x00_free_exlogin_buffer(ha
);
4426 * qla2x00_free_exlogin_buffer
4429 * ha = adapter block pointer
4432 qla2x00_free_exlogin_buffer(struct qla_hw_data
*ha
)
4434 if (ha
->exlogin_buf
) {
4435 dma_free_coherent(&ha
->pdev
->dev
, ha
->exlogin_size
,
4436 ha
->exlogin_buf
, ha
->exlogin_buf_dma
);
4437 ha
->exlogin_buf
= NULL
;
4438 ha
->exlogin_size
= 0;
4443 qla2x00_number_of_exch(scsi_qla_host_t
*vha
, u32
*ret_cnt
, u16 max_cnt
)
4446 struct init_cb_81xx
*icb
= (struct init_cb_81xx
*)&vha
->hw
->init_cb
;
4447 *ret_cnt
= FW_DEF_EXCHANGES_CNT
;
4449 if (max_cnt
> vha
->hw
->max_exchg
)
4450 max_cnt
= vha
->hw
->max_exchg
;
4452 if (qla_ini_mode_enabled(vha
)) {
4453 if (vha
->ql2xiniexchg
> max_cnt
)
4454 vha
->ql2xiniexchg
= max_cnt
;
4456 if (vha
->ql2xiniexchg
> FW_DEF_EXCHANGES_CNT
)
4457 *ret_cnt
= vha
->ql2xiniexchg
;
4459 } else if (qla_tgt_mode_enabled(vha
)) {
4460 if (vha
->ql2xexchoffld
> max_cnt
) {
4461 vha
->ql2xexchoffld
= max_cnt
;
4462 icb
->exchange_count
= cpu_to_le16(vha
->ql2xexchoffld
);
4465 if (vha
->ql2xexchoffld
> FW_DEF_EXCHANGES_CNT
)
4466 *ret_cnt
= vha
->ql2xexchoffld
;
4467 } else if (qla_dual_mode_enabled(vha
)) {
4468 temp
= vha
->ql2xiniexchg
+ vha
->ql2xexchoffld
;
4469 if (temp
> max_cnt
) {
4470 vha
->ql2xiniexchg
-= (temp
- max_cnt
)/2;
4471 vha
->ql2xexchoffld
-= (((temp
- max_cnt
)/2) + 1);
4473 icb
->exchange_count
= cpu_to_le16(vha
->ql2xexchoffld
);
4476 if (temp
> FW_DEF_EXCHANGES_CNT
)
4482 qla2x00_set_exchoffld_buffer(scsi_qla_host_t
*vha
)
4486 u32 actual_cnt
, totsz
;
4487 struct qla_hw_data
*ha
= vha
->hw
;
4489 if (!ha
->flags
.exchoffld_enabled
)
4492 if (!IS_EXCHG_OFFLD_CAPABLE(ha
))
4496 rval
= qla_get_exchoffld_status(vha
, &size
, &max_cnt
);
4497 if (rval
!= QLA_SUCCESS
) {
4498 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd012,
4499 "Failed to get exlogin status.\n");
4503 qla2x00_number_of_exch(vha
, &actual_cnt
, max_cnt
);
4504 ql_log(ql_log_info
, vha
, 0xd014,
4505 "Actual exchange offload count: %d.\n", actual_cnt
);
4507 totsz
= actual_cnt
* size
;
4509 if (totsz
!= ha
->exchoffld_size
) {
4510 qla2x00_free_exchoffld_buffer(ha
);
4511 if (actual_cnt
<= FW_DEF_EXCHANGES_CNT
) {
4512 ha
->exchoffld_size
= 0;
4513 ha
->flags
.exchoffld_enabled
= 0;
4517 ha
->exchoffld_size
= totsz
;
4519 ql_log(ql_log_info
, vha
, 0xd016,
4520 "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4521 max_cnt
, actual_cnt
, size
, totsz
);
4523 ql_log(ql_log_info
, vha
, 0xd017,
4524 "Exchange Buffers requested size = 0x%x\n",
4525 ha
->exchoffld_size
);
4527 /* Get consistent memory for extended logins */
4528 ha
->exchoffld_buf
= dma_alloc_coherent(&ha
->pdev
->dev
,
4529 ha
->exchoffld_size
, &ha
->exchoffld_buf_dma
, GFP_KERNEL
);
4530 if (!ha
->exchoffld_buf
) {
4531 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd013,
4532 "Failed to allocate memory for Exchange Offload.\n");
4535 (FW_DEF_EXCHANGES_CNT
+ REDUCE_EXCHANGES_CNT
)) {
4536 ha
->max_exchg
-= REDUCE_EXCHANGES_CNT
;
4537 } else if (ha
->max_exchg
>
4538 (FW_DEF_EXCHANGES_CNT
+ 512)) {
4539 ha
->max_exchg
-= 512;
4541 ha
->flags
.exchoffld_enabled
= 0;
4542 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0xd013,
4543 "Disabling Exchange offload due to lack of memory\n");
4545 ha
->exchoffld_size
= 0;
4549 } else if (!ha
->exchoffld_buf
|| (actual_cnt
<= FW_DEF_EXCHANGES_CNT
)) {
4550 /* pathological case */
4551 qla2x00_free_exchoffld_buffer(ha
);
4552 ha
->exchoffld_size
= 0;
4553 ha
->flags
.exchoffld_enabled
= 0;
4554 ql_log(ql_log_info
, vha
, 0xd016,
4555 "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4556 ha
->exchoffld_size
, actual_cnt
, size
, totsz
);
4560 /* Now configure the dma buffer */
4561 rval
= qla_set_exchoffld_mem_cfg(vha
);
4563 ql_log(ql_log_fatal
, vha
, 0xd02e,
4564 "Setup exchange offload buffer ****FAILED****.\n");
4565 qla2x00_free_exchoffld_buffer(ha
);
4567 /* re-adjust number of target exchange */
4568 struct init_cb_81xx
*icb
= (struct init_cb_81xx
*)ha
->init_cb
;
4570 if (qla_ini_mode_enabled(vha
))
4571 icb
->exchange_count
= 0;
4573 icb
->exchange_count
= cpu_to_le16(vha
->ql2xexchoffld
);
4580 * qla2x00_free_exchoffld_buffer
4583 * ha = adapter block pointer
4586 qla2x00_free_exchoffld_buffer(struct qla_hw_data
*ha
)
4588 if (ha
->exchoffld_buf
) {
4589 dma_free_coherent(&ha
->pdev
->dev
, ha
->exchoffld_size
,
4590 ha
->exchoffld_buf
, ha
->exchoffld_buf_dma
);
4591 ha
->exchoffld_buf
= NULL
;
4592 ha
->exchoffld_size
= 0;
4597 * qla2x00_free_fw_dump
4598 * Frees fw dump stuff.
4601 * ha = adapter block pointer
4604 qla2x00_free_fw_dump(struct qla_hw_data
*ha
)
4606 struct fwdt
*fwdt
= ha
->fwdt
;
4610 dma_free_coherent(&ha
->pdev
->dev
,
4611 FCE_SIZE
, ha
->fce
, ha
->fce_dma
);
4614 dma_free_coherent(&ha
->pdev
->dev
,
4615 EFT_SIZE
, ha
->eft
, ha
->eft_dma
);
4622 ha
->flags
.fce_enabled
= 0;
4625 ha
->fw_dumped
= false;
4626 ha
->fw_dump_cap_flags
= 0;
4627 ha
->fw_dump_reading
= 0;
4629 ha
->fw_dump_len
= 0;
4631 for (j
= 0; j
< 2; j
++, fwdt
++) {
4633 vfree(fwdt
->template);
4634 fwdt
->template = NULL
;
4641 * Frees all adapter allocated memory.
4644 * ha = adapter block pointer.
4647 qla2x00_mem_free(struct qla_hw_data
*ha
)
4649 qla2x00_free_fw_dump(ha
);
4652 dma_free_coherent(&ha
->pdev
->dev
, MCTP_DUMP_SIZE
, ha
->mctp_dump
,
4654 ha
->mctp_dump
= NULL
;
4656 mempool_destroy(ha
->srb_mempool
);
4657 ha
->srb_mempool
= NULL
;
4660 dma_free_coherent(&ha
->pdev
->dev
, DCBX_TLV_DATA_SIZE
,
4661 ha
->dcbx_tlv
, ha
->dcbx_tlv_dma
);
4662 ha
->dcbx_tlv
= NULL
;
4665 dma_free_coherent(&ha
->pdev
->dev
, XGMAC_DATA_SIZE
,
4666 ha
->xgmac_data
, ha
->xgmac_data_dma
);
4667 ha
->xgmac_data
= NULL
;
4670 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct sns_cmd_pkt
),
4671 ha
->sns_cmd
, ha
->sns_cmd_dma
);
4673 ha
->sns_cmd_dma
= 0;
4676 dma_free_coherent(&ha
->pdev
->dev
, sizeof(struct ct_sns_pkt
),
4677 ha
->ct_sns
, ha
->ct_sns_dma
);
4682 dma_free_coherent(&ha
->pdev
->dev
, SFP_DEV_SIZE
, ha
->sfp_data
,
4684 ha
->sfp_data
= NULL
;
4687 dma_free_coherent(&ha
->pdev
->dev
,
4688 sizeof(struct qla_flt_header
) + FLT_REGIONS_SIZE
,
4689 ha
->flt
, ha
->flt_dma
);
4694 dma_pool_free(ha
->s_dma_pool
, ha
->ms_iocb
, ha
->ms_iocb_dma
);
4696 ha
->ms_iocb_dma
= 0;
4699 dma_pool_free(ha
->s_dma_pool
,
4700 ha
->ex_init_cb
, ha
->ex_init_cb_dma
);
4701 ha
->ex_init_cb
= NULL
;
4702 ha
->ex_init_cb_dma
= 0;
4705 dma_pool_free(ha
->s_dma_pool
, ha
->async_pd
, ha
->async_pd_dma
);
4706 ha
->async_pd
= NULL
;
4707 ha
->async_pd_dma
= 0;
4709 dma_pool_destroy(ha
->s_dma_pool
);
4710 ha
->s_dma_pool
= NULL
;
4713 dma_free_coherent(&ha
->pdev
->dev
, qla2x00_gid_list_size(ha
),
4714 ha
->gid_list
, ha
->gid_list_dma
);
4715 ha
->gid_list
= NULL
;
4716 ha
->gid_list_dma
= 0;
4718 if (IS_QLA82XX(ha
)) {
4719 if (!list_empty(&ha
->gbl_dsd_list
)) {
4720 struct dsd_dma
*dsd_ptr
, *tdsd_ptr
;
4722 /* clean up allocated prev pool */
4723 list_for_each_entry_safe(dsd_ptr
,
4724 tdsd_ptr
, &ha
->gbl_dsd_list
, list
) {
4725 dma_pool_free(ha
->dl_dma_pool
,
4726 dsd_ptr
->dsd_addr
, dsd_ptr
->dsd_list_dma
);
4727 list_del(&dsd_ptr
->list
);
4733 dma_pool_destroy(ha
->dl_dma_pool
);
4734 ha
->dl_dma_pool
= NULL
;
4736 dma_pool_destroy(ha
->fcp_cmnd_dma_pool
);
4737 ha
->fcp_cmnd_dma_pool
= NULL
;
4739 mempool_destroy(ha
->ctx_mempool
);
4740 ha
->ctx_mempool
= NULL
;
4742 if (ql2xenabledif
&& ha
->dif_bundl_pool
) {
4743 struct dsd_dma
*dsd
, *nxt
;
4745 list_for_each_entry_safe(dsd
, nxt
, &ha
->pool
.unusable
.head
,
4747 list_del(&dsd
->list
);
4748 dma_pool_free(ha
->dif_bundl_pool
, dsd
->dsd_addr
,
4750 ha
->dif_bundle_dma_allocs
--;
4752 ha
->dif_bundle_kallocs
--;
4753 ha
->pool
.unusable
.count
--;
4755 list_for_each_entry_safe(dsd
, nxt
, &ha
->pool
.good
.head
, list
) {
4756 list_del(&dsd
->list
);
4757 dma_pool_free(ha
->dif_bundl_pool
, dsd
->dsd_addr
,
4759 ha
->dif_bundle_dma_allocs
--;
4761 ha
->dif_bundle_kallocs
--;
4765 dma_pool_destroy(ha
->dif_bundl_pool
);
4766 ha
->dif_bundl_pool
= NULL
;
4771 dma_free_coherent(&ha
->pdev
->dev
, ha
->init_cb_size
,
4772 ha
->init_cb
, ha
->init_cb_dma
);
4774 ha
->init_cb_dma
= 0;
4776 vfree(ha
->optrom_buffer
);
4777 ha
->optrom_buffer
= NULL
;
4780 kfree(ha
->npiv_info
);
4781 ha
->npiv_info
= NULL
;
4784 kfree(ha
->loop_id_map
);
4785 ha
->loop_id_map
= NULL
;
4788 struct scsi_qla_host
*qla2x00_create_host(struct scsi_host_template
*sht
,
4789 struct qla_hw_data
*ha
)
4791 struct Scsi_Host
*host
;
4792 struct scsi_qla_host
*vha
= NULL
;
4794 host
= scsi_host_alloc(sht
, sizeof(scsi_qla_host_t
));
4796 ql_log_pci(ql_log_fatal
, ha
->pdev
, 0x0107,
4797 "Failed to allocate host from the scsi layer, aborting.\n");
4801 /* Clear our data area */
4802 vha
= shost_priv(host
);
4803 memset(vha
, 0, sizeof(scsi_qla_host_t
));
4806 vha
->host_no
= host
->host_no
;
4809 vha
->qlini_mode
= ql2x_ini_mode
;
4810 vha
->ql2xexchoffld
= ql2xexchoffld
;
4811 vha
->ql2xiniexchg
= ql2xiniexchg
;
4813 INIT_LIST_HEAD(&vha
->vp_fcports
);
4814 INIT_LIST_HEAD(&vha
->work_list
);
4815 INIT_LIST_HEAD(&vha
->list
);
4816 INIT_LIST_HEAD(&vha
->qla_cmd_list
);
4817 INIT_LIST_HEAD(&vha
->qla_sess_op_cmd_list
);
4818 INIT_LIST_HEAD(&vha
->logo_list
);
4819 INIT_LIST_HEAD(&vha
->plogi_ack_list
);
4820 INIT_LIST_HEAD(&vha
->qp_list
);
4821 INIT_LIST_HEAD(&vha
->gnl
.fcports
);
4822 INIT_LIST_HEAD(&vha
->gpnid_list
);
4823 INIT_WORK(&vha
->iocb_work
, qla2x00_iocb_work_fn
);
4825 INIT_LIST_HEAD(&vha
->purex_list
.head
);
4826 spin_lock_init(&vha
->purex_list
.lock
);
4828 spin_lock_init(&vha
->work_lock
);
4829 spin_lock_init(&vha
->cmd_list_lock
);
4830 init_waitqueue_head(&vha
->fcport_waitQ
);
4831 init_waitqueue_head(&vha
->vref_waitq
);
4833 vha
->gnl
.size
= sizeof(struct get_name_list_extended
) *
4834 (ha
->max_loop_id
+ 1);
4835 vha
->gnl
.l
= dma_alloc_coherent(&ha
->pdev
->dev
,
4836 vha
->gnl
.size
, &vha
->gnl
.ldma
, GFP_KERNEL
);
4838 ql_log(ql_log_fatal
, vha
, 0xd04a,
4839 "Alloc failed for name list.\n");
4840 scsi_host_put(vha
->host
);
4844 /* todo: what about ext login? */
4845 vha
->scan
.size
= ha
->max_fibre_devices
* sizeof(struct fab_scan_rp
);
4846 vha
->scan
.l
= vmalloc(vha
->scan
.size
);
4848 ql_log(ql_log_fatal
, vha
, 0xd04a,
4849 "Alloc failed for scan database.\n");
4850 dma_free_coherent(&ha
->pdev
->dev
, vha
->gnl
.size
,
4851 vha
->gnl
.l
, vha
->gnl
.ldma
);
4853 scsi_host_put(vha
->host
);
4856 INIT_DELAYED_WORK(&vha
->scan
.scan_work
, qla_scan_work_fn
);
4858 sprintf(vha
->host_str
, "%s_%ld", QLA2XXX_DRIVER_NAME
, vha
->host_no
);
4859 ql_dbg(ql_dbg_init
, vha
, 0x0041,
4860 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4861 vha
->host
, vha
->hw
, vha
,
4862 dev_name(&(ha
->pdev
->dev
)));
4867 struct qla_work_evt
*
4868 qla2x00_alloc_work(struct scsi_qla_host
*vha
, enum qla_work_type type
)
4870 struct qla_work_evt
*e
;
4873 QLA_VHA_MARK_BUSY(vha
, bail
);
4877 e
= kzalloc(sizeof(struct qla_work_evt
), GFP_ATOMIC
);
4879 QLA_VHA_MARK_NOT_BUSY(vha
);
4883 INIT_LIST_HEAD(&e
->list
);
4885 e
->flags
= QLA_EVT_FLAG_FREE
;
4890 qla2x00_post_work(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
4892 unsigned long flags
;
4895 spin_lock_irqsave(&vha
->work_lock
, flags
);
4896 list_add_tail(&e
->list
, &vha
->work_list
);
4898 if (!test_and_set_bit(IOCB_WORK_ACTIVE
, &vha
->dpc_flags
))
4901 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
4904 queue_work(vha
->hw
->wq
, &vha
->iocb_work
);
4910 qla2x00_post_aen_work(struct scsi_qla_host
*vha
, enum fc_host_event_code code
,
4913 struct qla_work_evt
*e
;
4915 e
= qla2x00_alloc_work(vha
, QLA_EVT_AEN
);
4917 return QLA_FUNCTION_FAILED
;
4919 e
->u
.aen
.code
= code
;
4920 e
->u
.aen
.data
= data
;
4921 return qla2x00_post_work(vha
, e
);
4925 qla2x00_post_idc_ack_work(struct scsi_qla_host
*vha
, uint16_t *mb
)
4927 struct qla_work_evt
*e
;
4929 e
= qla2x00_alloc_work(vha
, QLA_EVT_IDC_ACK
);
4931 return QLA_FUNCTION_FAILED
;
4933 memcpy(e
->u
.idc_ack
.mb
, mb
, QLA_IDC_ACK_REGS
* sizeof(uint16_t));
4934 return qla2x00_post_work(vha
, e
);
4937 #define qla2x00_post_async_work(name, type) \
4938 int qla2x00_post_async_##name##_work( \
4939 struct scsi_qla_host *vha, \
4940 fc_port_t *fcport, uint16_t *data) \
4942 struct qla_work_evt *e; \
4944 e = qla2x00_alloc_work(vha, type); \
4946 return QLA_FUNCTION_FAILED; \
4948 e->u.logio.fcport = fcport; \
4950 e->u.logio.data[0] = data[0]; \
4951 e->u.logio.data[1] = data[1]; \
4953 fcport->flags |= FCF_ASYNC_ACTIVE; \
4954 return qla2x00_post_work(vha, e); \
4957 qla2x00_post_async_work(login
, QLA_EVT_ASYNC_LOGIN
);
4958 qla2x00_post_async_work(logout
, QLA_EVT_ASYNC_LOGOUT
);
4959 qla2x00_post_async_work(adisc
, QLA_EVT_ASYNC_ADISC
);
4960 qla2x00_post_async_work(prlo
, QLA_EVT_ASYNC_PRLO
);
4961 qla2x00_post_async_work(prlo_done
, QLA_EVT_ASYNC_PRLO_DONE
);
4964 qla2x00_post_uevent_work(struct scsi_qla_host
*vha
, u32 code
)
4966 struct qla_work_evt
*e
;
4968 e
= qla2x00_alloc_work(vha
, QLA_EVT_UEVENT
);
4970 return QLA_FUNCTION_FAILED
;
4972 e
->u
.uevent
.code
= code
;
4973 return qla2x00_post_work(vha
, e
);
4977 qla2x00_uevent_emit(struct scsi_qla_host
*vha
, u32 code
)
4979 char event_string
[40];
4980 char *envp
[] = { event_string
, NULL
};
4983 case QLA_UEVENT_CODE_FW_DUMP
:
4984 snprintf(event_string
, sizeof(event_string
), "FW_DUMP=%ld",
4991 kobject_uevent_env(&vha
->hw
->pdev
->dev
.kobj
, KOBJ_CHANGE
, envp
);
4995 qlafx00_post_aenfx_work(struct scsi_qla_host
*vha
, uint32_t evtcode
,
4996 uint32_t *data
, int cnt
)
4998 struct qla_work_evt
*e
;
5000 e
= qla2x00_alloc_work(vha
, QLA_EVT_AENFX
);
5002 return QLA_FUNCTION_FAILED
;
5004 e
->u
.aenfx
.evtcode
= evtcode
;
5005 e
->u
.aenfx
.count
= cnt
;
5006 memcpy(e
->u
.aenfx
.mbx
, data
, sizeof(*data
) * cnt
);
5007 return qla2x00_post_work(vha
, e
);
5010 void qla24xx_sched_upd_fcport(fc_port_t
*fcport
)
5012 unsigned long flags
;
5014 if (IS_SW_RESV_ADDR(fcport
->d_id
))
5017 spin_lock_irqsave(&fcport
->vha
->work_lock
, flags
);
5018 if (fcport
->disc_state
== DSC_UPD_FCPORT
) {
5019 spin_unlock_irqrestore(&fcport
->vha
->work_lock
, flags
);
5022 fcport
->jiffies_at_registration
= jiffies
;
5023 fcport
->sec_since_registration
= 0;
5024 fcport
->next_disc_state
= DSC_DELETED
;
5025 qla2x00_set_fcport_disc_state(fcport
, DSC_UPD_FCPORT
);
5026 spin_unlock_irqrestore(&fcport
->vha
->work_lock
, flags
);
5028 queue_work(system_unbound_wq
, &fcport
->reg_work
);
5032 void qla24xx_create_new_sess(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
5034 unsigned long flags
;
5035 fc_port_t
*fcport
= NULL
, *tfcp
;
5036 struct qlt_plogi_ack_t
*pla
=
5037 (struct qlt_plogi_ack_t
*)e
->u
.new_sess
.pla
;
5038 uint8_t free_fcport
= 0;
5040 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5041 "%s %d %8phC enter\n",
5042 __func__
, __LINE__
, e
->u
.new_sess
.port_name
);
5044 spin_lock_irqsave(&vha
->hw
->tgt
.sess_lock
, flags
);
5045 fcport
= qla2x00_find_fcport_by_wwpn(vha
, e
->u
.new_sess
.port_name
, 1);
5047 fcport
->d_id
= e
->u
.new_sess
.id
;
5049 fcport
->fw_login_state
= DSC_LS_PLOGI_PEND
;
5050 memcpy(fcport
->node_name
,
5051 pla
->iocb
.u
.isp24
.u
.plogi
.node_name
,
5053 qlt_plogi_ack_link(vha
, pla
, fcport
, QLT_PLOGI_LINK_SAME_WWN
);
5054 /* we took an extra ref_count to prevent PLOGI ACK when
5055 * fcport/sess has not been created.
5060 spin_unlock_irqrestore(&vha
->hw
->tgt
.sess_lock
, flags
);
5061 fcport
= qla2x00_alloc_fcport(vha
, GFP_KERNEL
);
5063 fcport
->d_id
= e
->u
.new_sess
.id
;
5064 fcport
->flags
|= FCF_FABRIC_DEVICE
;
5065 fcport
->fw_login_state
= DSC_LS_PLOGI_PEND
;
5067 memcpy(fcport
->port_name
, e
->u
.new_sess
.port_name
,
5070 fcport
->fc4_type
= e
->u
.new_sess
.fc4_type
;
5071 if (e
->u
.new_sess
.fc4_type
& FS_FCP_IS_N2N
) {
5072 fcport
->fc4_type
= FS_FC4TYPE_FCP
;
5073 fcport
->n2n_flag
= 1;
5074 if (vha
->flags
.nvme_enabled
)
5075 fcport
->fc4_type
|= FS_FC4TYPE_NVME
;
5079 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5080 "%s %8phC mem alloc fail.\n",
5081 __func__
, e
->u
.new_sess
.port_name
);
5084 list_del(&pla
->list
);
5085 kmem_cache_free(qla_tgt_plogi_cachep
, pla
);
5090 spin_lock_irqsave(&vha
->hw
->tgt
.sess_lock
, flags
);
5091 /* search again to make sure no one else got ahead */
5092 tfcp
= qla2x00_find_fcport_by_wwpn(vha
,
5093 e
->u
.new_sess
.port_name
, 1);
5095 /* should rarily happen */
5096 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5097 "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5098 __func__
, tfcp
->port_name
, tfcp
->disc_state
,
5099 tfcp
->fw_login_state
);
5103 list_add_tail(&fcport
->list
, &vha
->vp_fcports
);
5107 qlt_plogi_ack_link(vha
, pla
, fcport
,
5108 QLT_PLOGI_LINK_SAME_WWN
);
5112 spin_unlock_irqrestore(&vha
->hw
->tgt
.sess_lock
, flags
);
5115 fcport
->id_changed
= 1;
5116 fcport
->scan_state
= QLA_FCPORT_FOUND
;
5117 fcport
->chip_reset
= vha
->hw
->base_qpair
->chip_reset
;
5118 memcpy(fcport
->node_name
, e
->u
.new_sess
.node_name
, WWN_SIZE
);
5121 if (pla
->iocb
.u
.isp24
.status_subcode
== ELS_PRLI
) {
5124 fcport
->fw_login_state
= DSC_LS_PRLI_PEND
;
5128 pla
->iocb
.u
.isp24
.nport_handle
);
5129 fcport
->fw_login_state
= DSC_LS_PRLI_PEND
;
5132 pla
->iocb
.u
.isp24
.u
.prli
.wd3_lo
);
5135 fcport
->conf_compl_supported
= 1;
5137 if ((wd3_lo
& BIT_4
) == 0)
5138 fcport
->port_type
= FCT_INITIATOR
;
5140 fcport
->port_type
= FCT_TARGET
;
5142 qlt_plogi_ack_unref(vha
, pla
);
5144 fc_port_t
*dfcp
= NULL
;
5146 spin_lock_irqsave(&vha
->hw
->tgt
.sess_lock
, flags
);
5147 tfcp
= qla2x00_find_fcport_by_nportid(vha
,
5148 &e
->u
.new_sess
.id
, 1);
5149 if (tfcp
&& (tfcp
!= fcport
)) {
5151 * We have a conflict fcport with same NportID.
5153 ql_dbg(ql_dbg_disc
, vha
, 0xffff,
5154 "%s %8phC found conflict b4 add. DS %d LS %d\n",
5155 __func__
, tfcp
->port_name
, tfcp
->disc_state
,
5156 tfcp
->fw_login_state
);
5158 switch (tfcp
->disc_state
) {
5161 case DSC_DELETE_PEND
:
5162 fcport
->login_pause
= 1;
5163 tfcp
->conflict
= fcport
;
5166 fcport
->login_pause
= 1;
5167 tfcp
->conflict
= fcport
;
5172 spin_unlock_irqrestore(&vha
->hw
->tgt
.sess_lock
, flags
);
5174 qlt_schedule_sess_for_deletion(tfcp
);
5176 if (N2N_TOPO(vha
->hw
)) {
5177 fcport
->flags
&= ~FCF_FABRIC_DEVICE
;
5178 fcport
->keep_nport_handle
= 1;
5179 if (vha
->flags
.nvme_enabled
) {
5181 (FS_FC4TYPE_NVME
| FS_FC4TYPE_FCP
);
5182 fcport
->n2n_flag
= 1;
5184 fcport
->fw_login_state
= 0;
5186 schedule_delayed_work(&vha
->scan
.scan_work
, 5);
5188 qla24xx_fcport_handle_login(vha
, fcport
);
5194 qla2x00_free_fcport(fcport
);
5196 list_del(&pla
->list
);
5197 kmem_cache_free(qla_tgt_plogi_cachep
, pla
);
5202 static void qla_sp_retry(struct scsi_qla_host
*vha
, struct qla_work_evt
*e
)
5204 struct srb
*sp
= e
->u
.iosb
.sp
;
5207 rval
= qla2x00_start_sp(sp
);
5208 if (rval
!= QLA_SUCCESS
) {
5209 ql_dbg(ql_dbg_disc
, vha
, 0x2043,
5210 "%s: %s: Re-issue IOCB failed (%d).\n",
5211 __func__
, sp
->name
, rval
);
5212 qla24xx_sp_unmap(vha
, sp
);
5217 qla2x00_do_work(struct scsi_qla_host
*vha
)
5219 struct qla_work_evt
*e
, *tmp
;
5220 unsigned long flags
;
5224 spin_lock_irqsave(&vha
->work_lock
, flags
);
5225 list_splice_init(&vha
->work_list
, &work
);
5226 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
5228 list_for_each_entry_safe(e
, tmp
, &work
, list
) {
5232 fc_host_post_event(vha
->host
, fc_get_event_number(),
5233 e
->u
.aen
.code
, e
->u
.aen
.data
);
5235 case QLA_EVT_IDC_ACK
:
5236 qla81xx_idc_ack(vha
, e
->u
.idc_ack
.mb
);
5238 case QLA_EVT_ASYNC_LOGIN
:
5239 qla2x00_async_login(vha
, e
->u
.logio
.fcport
,
5242 case QLA_EVT_ASYNC_LOGOUT
:
5243 rc
= qla2x00_async_logout(vha
, e
->u
.logio
.fcport
);
5245 case QLA_EVT_ASYNC_ADISC
:
5246 qla2x00_async_adisc(vha
, e
->u
.logio
.fcport
,
5249 case QLA_EVT_UEVENT
:
5250 qla2x00_uevent_emit(vha
, e
->u
.uevent
.code
);
5253 qlafx00_process_aen(vha
, e
);
5256 qla24xx_async_gpnid(vha
, &e
->u
.gpnid
.id
);
5259 qla24xx_sp_unmap(vha
, e
->u
.iosb
.sp
);
5261 case QLA_EVT_RELOGIN
:
5262 qla2x00_relogin(vha
);
5264 case QLA_EVT_NEW_SESS
:
5265 qla24xx_create_new_sess(vha
, e
);
5268 qla24xx_async_gpdb(vha
, e
->u
.fcport
.fcport
,
5272 qla24xx_async_prli(vha
, e
->u
.fcport
.fcport
);
5275 qla24xx_async_gpsc(vha
, e
->u
.fcport
.fcport
);
5278 qla24xx_async_gnl(vha
, e
->u
.fcport
.fcport
);
5281 qla24xx_do_nack_work(vha
, e
);
5283 case QLA_EVT_ASYNC_PRLO
:
5284 rc
= qla2x00_async_prlo(vha
, e
->u
.logio
.fcport
);
5286 case QLA_EVT_ASYNC_PRLO_DONE
:
5287 qla2x00_async_prlo_done(vha
, e
->u
.logio
.fcport
,
5291 qla24xx_async_gpnft(vha
, e
->u
.gpnft
.fc4_type
,
5294 case QLA_EVT_GPNFT_DONE
:
5295 qla24xx_async_gpnft_done(vha
, e
->u
.iosb
.sp
);
5297 case QLA_EVT_GNNFT_DONE
:
5298 qla24xx_async_gnnft_done(vha
, e
->u
.iosb
.sp
);
5301 qla24xx_async_gnnid(vha
, e
->u
.fcport
.fcport
);
5303 case QLA_EVT_GFPNID
:
5304 qla24xx_async_gfpnid(vha
, e
->u
.fcport
.fcport
);
5306 case QLA_EVT_SP_RETRY
:
5307 qla_sp_retry(vha
, e
);
5310 qla_do_iidma_work(vha
, e
->u
.fcport
.fcport
);
5312 case QLA_EVT_ELS_PLOGI
:
5313 qla24xx_els_dcmd2_iocb(vha
, ELS_DCMD_PLOGI
,
5314 e
->u
.fcport
.fcport
, false);
5319 /* put 'work' at head of 'vha->work_list' */
5320 spin_lock_irqsave(&vha
->work_lock
, flags
);
5321 list_splice(&work
, &vha
->work_list
);
5322 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
5325 list_del_init(&e
->list
);
5326 if (e
->flags
& QLA_EVT_FLAG_FREE
)
5329 /* For each work completed decrement vha ref count */
5330 QLA_VHA_MARK_NOT_BUSY(vha
);
5334 int qla24xx_post_relogin_work(struct scsi_qla_host
*vha
)
5336 struct qla_work_evt
*e
;
5338 e
= qla2x00_alloc_work(vha
, QLA_EVT_RELOGIN
);
5341 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
5342 return QLA_FUNCTION_FAILED
;
5345 return qla2x00_post_work(vha
, e
);
5348 /* Relogins all the fcports of a vport
5349 * Context: dpc thread
5351 void qla2x00_relogin(struct scsi_qla_host
*vha
)
5354 int status
, relogin_needed
= 0;
5355 struct event_arg ea
;
5357 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
) {
5359 * If the port is not ONLINE then try to login
5360 * to it if we haven't run out of retries.
5362 if (atomic_read(&fcport
->state
) != FCS_ONLINE
&&
5363 fcport
->login_retry
) {
5364 if (fcport
->scan_state
!= QLA_FCPORT_FOUND
||
5365 fcport
->disc_state
== DSC_LOGIN_COMPLETE
)
5368 if (fcport
->flags
& (FCF_ASYNC_SENT
|FCF_ASYNC_ACTIVE
) ||
5369 fcport
->disc_state
== DSC_DELETE_PEND
) {
5372 if (vha
->hw
->current_topology
!= ISP_CFG_NL
) {
5373 memset(&ea
, 0, sizeof(ea
));
5375 qla24xx_handle_relogin_event(vha
, &ea
);
5376 } else if (vha
->hw
->current_topology
==
5378 fcport
->login_retry
--;
5380 qla2x00_local_device_login(vha
,
5382 if (status
== QLA_SUCCESS
) {
5383 fcport
->old_loop_id
=
5385 ql_dbg(ql_dbg_disc
, vha
, 0x2003,
5386 "Port login OK: logged in ID 0x%x.\n",
5388 qla2x00_update_fcport
5390 } else if (status
== 1) {
5391 set_bit(RELOGIN_NEEDED
,
5393 /* retry the login again */
5394 ql_dbg(ql_dbg_disc
, vha
, 0x2007,
5395 "Retrying %d login again loop_id 0x%x.\n",
5396 fcport
->login_retry
,
5399 fcport
->login_retry
= 0;
5402 if (fcport
->login_retry
== 0 &&
5403 status
!= QLA_SUCCESS
)
5404 qla2x00_clear_loop_id(fcport
);
5408 if (test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
))
5413 set_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
);
5415 ql_dbg(ql_dbg_disc
, vha
, 0x400e,
5419 /* Schedule work on any of the dpc-workqueues */
5421 qla83xx_schedule_work(scsi_qla_host_t
*base_vha
, int work_code
)
5423 struct qla_hw_data
*ha
= base_vha
->hw
;
5425 switch (work_code
) {
5426 case MBA_IDC_AEN
: /* 0x8200 */
5428 queue_work(ha
->dpc_lp_wq
, &ha
->idc_aen
);
5431 case QLA83XX_NIC_CORE_RESET
: /* 0x1 */
5432 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
5434 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_reset
);
5436 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb05e,
5437 "NIC Core reset is already active. Skip "
5438 "scheduling it again.\n");
5440 case QLA83XX_IDC_STATE_HANDLER
: /* 0x2 */
5442 queue_work(ha
->dpc_hp_wq
, &ha
->idc_state_handler
);
5444 case QLA83XX_NIC_CORE_UNRECOVERABLE
: /* 0x3 */
5446 queue_work(ha
->dpc_hp_wq
, &ha
->nic_core_unrecoverable
);
5449 ql_log(ql_log_warn
, base_vha
, 0xb05f,
5450 "Unknown work-code=0x%x.\n", work_code
);
5456 /* Work: Perform NIC Core Unrecoverable state handling */
5458 qla83xx_nic_core_unrecoverable_work(struct work_struct
*work
)
5460 struct qla_hw_data
*ha
=
5461 container_of(work
, struct qla_hw_data
, nic_core_unrecoverable
);
5462 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5463 uint32_t dev_state
= 0;
5465 qla83xx_idc_lock(base_vha
, 0);
5466 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
5467 qla83xx_reset_ownership(base_vha
);
5468 if (ha
->flags
.nic_core_reset_owner
) {
5469 ha
->flags
.nic_core_reset_owner
= 0;
5470 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
5471 QLA8XXX_DEV_FAILED
);
5472 ql_log(ql_log_info
, base_vha
, 0xb060, "HW State: FAILED.\n");
5473 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
5475 qla83xx_idc_unlock(base_vha
, 0);
5478 /* Work: Execute IDC state handler */
5480 qla83xx_idc_state_handler_work(struct work_struct
*work
)
5482 struct qla_hw_data
*ha
=
5483 container_of(work
, struct qla_hw_data
, idc_state_handler
);
5484 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5485 uint32_t dev_state
= 0;
5487 qla83xx_idc_lock(base_vha
, 0);
5488 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
5489 if (dev_state
== QLA8XXX_DEV_FAILED
||
5490 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
)
5491 qla83xx_idc_state_handler(base_vha
);
5492 qla83xx_idc_unlock(base_vha
, 0);
5496 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t
*base_vha
)
5498 int rval
= QLA_SUCCESS
;
5499 unsigned long heart_beat_wait
= jiffies
+ (1 * HZ
);
5500 uint32_t heart_beat_counter1
, heart_beat_counter2
;
5503 if (time_after(jiffies
, heart_beat_wait
)) {
5504 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07c,
5505 "Nic Core f/w is not alive.\n");
5506 rval
= QLA_FUNCTION_FAILED
;
5510 qla83xx_idc_lock(base_vha
, 0);
5511 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
5512 &heart_beat_counter1
);
5513 qla83xx_idc_unlock(base_vha
, 0);
5515 qla83xx_idc_lock(base_vha
, 0);
5516 qla83xx_rd_reg(base_vha
, QLA83XX_FW_HEARTBEAT
,
5517 &heart_beat_counter2
);
5518 qla83xx_idc_unlock(base_vha
, 0);
5519 } while (heart_beat_counter1
== heart_beat_counter2
);
5524 /* Work: Perform NIC Core Reset handling */
5526 qla83xx_nic_core_reset_work(struct work_struct
*work
)
5528 struct qla_hw_data
*ha
=
5529 container_of(work
, struct qla_hw_data
, nic_core_reset
);
5530 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5531 uint32_t dev_state
= 0;
5533 if (IS_QLA2031(ha
)) {
5534 if (qla2xxx_mctp_dump(base_vha
) != QLA_SUCCESS
)
5535 ql_log(ql_log_warn
, base_vha
, 0xb081,
5536 "Failed to dump mctp\n");
5540 if (!ha
->flags
.nic_core_reset_hdlr_active
) {
5541 if (qla83xx_check_nic_core_fw_alive(base_vha
) == QLA_SUCCESS
) {
5542 qla83xx_idc_lock(base_vha
, 0);
5543 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
5545 qla83xx_idc_unlock(base_vha
, 0);
5546 if (dev_state
!= QLA8XXX_DEV_NEED_RESET
) {
5547 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07a,
5548 "Nic Core f/w is alive.\n");
5553 ha
->flags
.nic_core_reset_hdlr_active
= 1;
5554 if (qla83xx_nic_core_reset(base_vha
)) {
5555 /* NIC Core reset failed. */
5556 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb061,
5557 "NIC Core reset failed.\n");
5559 ha
->flags
.nic_core_reset_hdlr_active
= 0;
5563 /* Work: Handle 8200 IDC aens */
5565 qla83xx_service_idc_aen(struct work_struct
*work
)
5567 struct qla_hw_data
*ha
=
5568 container_of(work
, struct qla_hw_data
, idc_aen
);
5569 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
5570 uint32_t dev_state
, idc_control
;
5572 qla83xx_idc_lock(base_vha
, 0);
5573 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
5574 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_CONTROL
, &idc_control
);
5575 qla83xx_idc_unlock(base_vha
, 0);
5576 if (dev_state
== QLA8XXX_DEV_NEED_RESET
) {
5577 if (idc_control
& QLA83XX_IDC_GRACEFUL_RESET
) {
5578 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb062,
5579 "Application requested NIC Core Reset.\n");
5580 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
5581 } else if (qla83xx_check_nic_core_fw_alive(base_vha
) ==
5583 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb07b,
5584 "Other protocol driver requested NIC Core Reset.\n");
5585 qla83xx_schedule_work(base_vha
, QLA83XX_NIC_CORE_RESET
);
5587 } else if (dev_state
== QLA8XXX_DEV_FAILED
||
5588 dev_state
== QLA8XXX_DEV_NEED_QUIESCENT
) {
5589 qla83xx_schedule_work(base_vha
, QLA83XX_IDC_STATE_HANDLER
);
5594 qla83xx_wait_logic(void)
5599 if (!in_interrupt()) {
5601 * Wait about 200ms before retrying again.
5602 * This controls the number of retries for single
5608 for (i
= 0; i
< 20; i
++)
5609 cpu_relax(); /* This a nop instr on i386 */
5614 qla83xx_force_lock_recovery(scsi_qla_host_t
*base_vha
)
5618 uint32_t idc_lck_rcvry_stage_mask
= 0x3;
5619 uint32_t idc_lck_rcvry_owner_mask
= 0x3c;
5620 struct qla_hw_data
*ha
= base_vha
->hw
;
5622 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb086,
5623 "Trying force recovery of the IDC lock.\n");
5625 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
, &data
);
5629 if ((data
& idc_lck_rcvry_stage_mask
) > 0) {
5632 data
= (IDC_LOCK_RECOVERY_STAGE1
) | (ha
->portnum
<< 2);
5633 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
5640 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_IDC_LOCK_RECOVERY
,
5645 if (((data
& idc_lck_rcvry_owner_mask
) >> 2) == ha
->portnum
) {
5646 data
&= (IDC_LOCK_RECOVERY_STAGE2
|
5647 ~(idc_lck_rcvry_stage_mask
));
5648 rval
= qla83xx_wr_reg(base_vha
,
5649 QLA83XX_IDC_LOCK_RECOVERY
, data
);
5653 /* Forcefully perform IDC UnLock */
5654 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
,
5658 /* Clear lock-id by setting 0xff */
5659 rval
= qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
5663 /* Clear lock-recovery by setting 0x0 */
5664 rval
= qla83xx_wr_reg(base_vha
,
5665 QLA83XX_IDC_LOCK_RECOVERY
, 0x0);
5676 qla83xx_idc_lock_recovery(scsi_qla_host_t
*base_vha
)
5678 int rval
= QLA_SUCCESS
;
5679 uint32_t o_drv_lockid
, n_drv_lockid
;
5680 unsigned long lock_recovery_timeout
;
5682 lock_recovery_timeout
= jiffies
+ QLA83XX_MAX_LOCK_RECOVERY_WAIT
;
5684 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &o_drv_lockid
);
5688 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5689 if (time_after_eq(jiffies
, lock_recovery_timeout
)) {
5690 if (qla83xx_force_lock_recovery(base_vha
) == QLA_SUCCESS
)
5693 return QLA_FUNCTION_FAILED
;
5696 rval
= qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &n_drv_lockid
);
5700 if (o_drv_lockid
== n_drv_lockid
) {
5701 qla83xx_wait_logic();
5711 qla83xx_idc_lock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
5714 uint32_t lock_owner
;
5715 struct qla_hw_data
*ha
= base_vha
->hw
;
5717 /* IDC-lock implementation using driver-lock/lock-id remote registers */
5719 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCK
, &data
)
5722 /* Setting lock-id to our function-number */
5723 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
5726 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
,
5728 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb063,
5729 "Failed to acquire IDC lock, acquired by %d, "
5730 "retrying...\n", lock_owner
);
5732 /* Retry/Perform IDC-Lock recovery */
5733 if (qla83xx_idc_lock_recovery(base_vha
)
5735 qla83xx_wait_logic();
5738 ql_log(ql_log_warn
, base_vha
, 0xb075,
5739 "IDC Lock recovery FAILED.\n");
5748 qla25xx_rdp_rsp_reduce_size(struct scsi_qla_host
*vha
,
5749 struct purex_entry_24xx
*purex
)
5752 u32 sid
= purex
->s_id
[2] << 16 | purex
->s_id
[1] << 8 | purex
->s_id
[0];
5753 struct port_database_24xx
*pdb
;
5755 /* Domain Controller is always logged-out. */
5756 /* if RDP request is not from Domain Controller: */
5757 if (sid
!= 0xfffc01)
5760 ql_dbg(ql_dbg_init
, vha
, 0x0181, "%s: s_id=%#x\n", __func__
, sid
);
5762 pdb
= kzalloc(sizeof(*pdb
), GFP_KERNEL
);
5764 ql_dbg(ql_dbg_init
, vha
, 0x0181,
5765 "%s: Failed allocate pdb\n", __func__
);
5766 } else if (qla24xx_get_port_database(vha
, purex
->nport_handle
, pdb
)) {
5767 ql_dbg(ql_dbg_init
, vha
, 0x0181,
5768 "%s: Failed get pdb sid=%x\n", __func__
, sid
);
5769 } else if (pdb
->current_login_state
!= PDS_PLOGI_COMPLETE
&&
5770 pdb
->current_login_state
!= PDS_PRLI_COMPLETE
) {
5771 ql_dbg(ql_dbg_init
, vha
, 0x0181,
5772 "%s: Port not logged in sid=%#x\n", __func__
, sid
);
5774 /* RDP request is from logged in port */
5780 vha
->hw
->isp_ops
->fw_version_str(vha
, fwstr
, sizeof(fwstr
));
5781 fwstr
[strcspn(fwstr
, " ")] = 0;
5782 /* if FW version allows RDP response length upto 2048 bytes: */
5783 if (strcmp(fwstr
, "8.09.00") > 0 || strcmp(fwstr
, "8.05.65") == 0)
5786 ql_dbg(ql_dbg_init
, vha
, 0x0181, "%s: fw=%s\n", __func__
, fwstr
);
5788 /* RDP response length is to be reduced to maximum 256 bytes */
5793 qla25xx_rdp_port_speed_capability(struct qla_hw_data
*ha
)
5795 if (IS_CNA_CAPABLE(ha
))
5796 return RDP_PORT_SPEED_10GB
;
5798 if (IS_QLA27XX(ha
) || IS_QLA28XX(ha
)) {
5799 unsigned int speeds
= 0;
5801 if (ha
->max_supported_speed
== 2) {
5802 if (ha
->min_supported_speed
<= 6)
5803 speeds
|= RDP_PORT_SPEED_64GB
;
5806 if (ha
->max_supported_speed
== 2 ||
5807 ha
->max_supported_speed
== 1) {
5808 if (ha
->min_supported_speed
<= 5)
5809 speeds
|= RDP_PORT_SPEED_32GB
;
5812 if (ha
->max_supported_speed
== 2 ||
5813 ha
->max_supported_speed
== 1 ||
5814 ha
->max_supported_speed
== 0) {
5815 if (ha
->min_supported_speed
<= 4)
5816 speeds
|= RDP_PORT_SPEED_16GB
;
5819 if (ha
->max_supported_speed
== 1 ||
5820 ha
->max_supported_speed
== 0) {
5821 if (ha
->min_supported_speed
<= 3)
5822 speeds
|= RDP_PORT_SPEED_8GB
;
5825 if (ha
->max_supported_speed
== 0) {
5826 if (ha
->min_supported_speed
<= 2)
5827 speeds
|= RDP_PORT_SPEED_4GB
;
5834 return RDP_PORT_SPEED_16GB
|RDP_PORT_SPEED_8GB
|
5838 return RDP_PORT_SPEED_8GB
|RDP_PORT_SPEED_4GB
|
5839 RDP_PORT_SPEED_2GB
|RDP_PORT_SPEED_1GB
;
5841 if (IS_QLA24XX_TYPE(ha
))
5842 return RDP_PORT_SPEED_4GB
|RDP_PORT_SPEED_2GB
|
5846 return RDP_PORT_SPEED_2GB
|RDP_PORT_SPEED_1GB
;
5848 return RDP_PORT_SPEED_1GB
;
5852 qla25xx_rdp_port_speed_currently(struct qla_hw_data
*ha
)
5854 switch (ha
->link_data_rate
) {
5855 case PORT_SPEED_1GB
:
5856 return RDP_PORT_SPEED_1GB
;
5858 case PORT_SPEED_2GB
:
5859 return RDP_PORT_SPEED_2GB
;
5861 case PORT_SPEED_4GB
:
5862 return RDP_PORT_SPEED_4GB
;
5864 case PORT_SPEED_8GB
:
5865 return RDP_PORT_SPEED_8GB
;
5867 case PORT_SPEED_10GB
:
5868 return RDP_PORT_SPEED_10GB
;
5870 case PORT_SPEED_16GB
:
5871 return RDP_PORT_SPEED_16GB
;
5873 case PORT_SPEED_32GB
:
5874 return RDP_PORT_SPEED_32GB
;
5876 case PORT_SPEED_64GB
:
5877 return RDP_PORT_SPEED_64GB
;
5880 return RDP_PORT_SPEED_UNKNOWN
;
5885 * Function Name: qla24xx_process_purex_iocb
5888 * Prepare a RDP response and send to Fabric switch
5891 * vha: SCSI qla host
5892 * purex: RDP request received by HBA
5894 void qla24xx_process_purex_rdp(struct scsi_qla_host
*vha
, void *pkt
)
5896 struct qla_hw_data
*ha
= vha
->hw
;
5897 struct purex_entry_24xx
*purex
= pkt
;
5898 dma_addr_t rsp_els_dma
;
5899 dma_addr_t rsp_payload_dma
;
5900 dma_addr_t stat_dma
;
5903 struct els_entry_24xx
*rsp_els
= NULL
;
5904 struct rdp_rsp_payload
*rsp_payload
= NULL
;
5905 struct link_statistics
*stat
= NULL
;
5906 struct buffer_credit_24xx
*bbc
= NULL
;
5907 uint8_t *sfp
= NULL
;
5908 uint16_t sfp_flags
= 0;
5909 uint rsp_payload_length
= sizeof(*rsp_payload
);
5912 ql_dbg(ql_dbg_init
+ ql_dbg_verbose
, vha
, 0x0180,
5913 "%s: Enter\n", __func__
);
5915 ql_dbg(ql_dbg_init
+ ql_dbg_verbose
, vha
, 0x0181,
5916 "-------- ELS REQ -------\n");
5917 ql_dump_buffer(ql_dbg_init
+ ql_dbg_verbose
, vha
, 0x0182,
5918 (void *)purex
, sizeof(*purex
));
5920 if (qla25xx_rdp_rsp_reduce_size(vha
, purex
)) {
5921 rsp_payload_length
=
5922 offsetof(typeof(*rsp_payload
), optical_elmt_desc
);
5923 ql_dbg(ql_dbg_init
, vha
, 0x0181,
5924 "Reducing RSP payload length to %u bytes...\n",
5925 rsp_payload_length
);
5928 rsp_els
= dma_alloc_coherent(&ha
->pdev
->dev
, sizeof(*rsp_els
),
5929 &rsp_els_dma
, GFP_KERNEL
);
5931 ql_log(ql_log_warn
, vha
, 0x0183,
5932 "Failed allocate dma buffer ELS RSP.\n");
5936 rsp_payload
= dma_alloc_coherent(&ha
->pdev
->dev
, sizeof(*rsp_payload
),
5937 &rsp_payload_dma
, GFP_KERNEL
);
5939 ql_log(ql_log_warn
, vha
, 0x0184,
5940 "Failed allocate dma buffer ELS RSP payload.\n");
5944 sfp
= dma_alloc_coherent(&ha
->pdev
->dev
, SFP_RTDI_LEN
,
5945 &sfp_dma
, GFP_KERNEL
);
5947 stat
= dma_alloc_coherent(&ha
->pdev
->dev
, sizeof(*stat
),
5948 &stat_dma
, GFP_KERNEL
);
5950 bbc
= dma_alloc_coherent(&ha
->pdev
->dev
, sizeof(*bbc
),
5951 &bbc_dma
, GFP_KERNEL
);
5953 /* Prepare Response IOCB */
5954 rsp_els
->entry_type
= ELS_IOCB_TYPE
;
5955 rsp_els
->entry_count
= 1;
5956 rsp_els
->sys_define
= 0;
5957 rsp_els
->entry_status
= 0;
5958 rsp_els
->handle
= 0;
5959 rsp_els
->nport_handle
= purex
->nport_handle
;
5960 rsp_els
->tx_dsd_count
= 1;
5961 rsp_els
->vp_index
= purex
->vp_idx
;
5962 rsp_els
->sof_type
= EST_SOFI3
;
5963 rsp_els
->rx_xchg_address
= purex
->rx_xchg_addr
;
5964 rsp_els
->rx_dsd_count
= 0;
5965 rsp_els
->opcode
= purex
->els_frame_payload
[0];
5967 rsp_els
->d_id
[0] = purex
->s_id
[0];
5968 rsp_els
->d_id
[1] = purex
->s_id
[1];
5969 rsp_els
->d_id
[2] = purex
->s_id
[2];
5971 rsp_els
->control_flags
= EPD_ELS_ACC
;
5972 rsp_els
->rx_byte_count
= 0;
5973 rsp_els
->tx_byte_count
= cpu_to_le32(rsp_payload_length
);
5975 put_unaligned_le64(rsp_payload_dma
, &rsp_els
->tx_address
);
5976 rsp_els
->tx_len
= rsp_els
->tx_byte_count
;
5978 rsp_els
->rx_address
= 0;
5979 rsp_els
->rx_len
= 0;
5981 /* Prepare Response Payload */
5982 rsp_payload
->hdr
.cmd
= cpu_to_be32(0x2 << 24); /* LS_ACC */
5983 rsp_payload
->hdr
.len
= cpu_to_be32(
5984 rsp_els
->tx_byte_count
- sizeof(rsp_payload
->hdr
));
5986 /* Link service Request Info Descriptor */
5987 rsp_payload
->ls_req_info_desc
.desc_tag
= cpu_to_be32(0x1);
5988 rsp_payload
->ls_req_info_desc
.desc_len
=
5989 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->ls_req_info_desc
));
5990 rsp_payload
->ls_req_info_desc
.req_payload_word_0
=
5991 cpu_to_be32p((uint32_t *)purex
->els_frame_payload
);
5993 /* Link service Request Info Descriptor 2 */
5994 rsp_payload
->ls_req_info_desc2
.desc_tag
= cpu_to_be32(0x1);
5995 rsp_payload
->ls_req_info_desc2
.desc_len
=
5996 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->ls_req_info_desc2
));
5997 rsp_payload
->ls_req_info_desc2
.req_payload_word_0
=
5998 cpu_to_be32p((uint32_t *)purex
->els_frame_payload
);
6001 rsp_payload
->sfp_diag_desc
.desc_tag
= cpu_to_be32(0x10000);
6002 rsp_payload
->sfp_diag_desc
.desc_len
=
6003 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->sfp_diag_desc
));
6007 memset(sfp
, 0, SFP_RTDI_LEN
);
6008 rval
= qla2x00_read_sfp(vha
, sfp_dma
, sfp
, 0xa0, 0x7, 2, 0);
6010 /* SFP Flags bits 3-0: Port Tx Laser Type */
6011 if (sfp
[0] & BIT_2
|| sfp
[1] & (BIT_6
|BIT_5
))
6012 sfp_flags
|= BIT_0
; /* short wave */
6013 else if (sfp
[0] & BIT_1
)
6014 sfp_flags
|= BIT_1
; /* long wave 1310nm */
6015 else if (sfp
[1] & BIT_4
)
6016 sfp_flags
|= BIT_1
|BIT_0
; /* long wave 1550nm */
6020 memset(sfp
, 0, SFP_RTDI_LEN
);
6021 rval
= qla2x00_read_sfp(vha
, sfp_dma
, sfp
, 0xa0, 0x0, 1, 0);
6023 sfp_flags
|= BIT_4
; /* optical */
6025 sfp_flags
|= BIT_6
; /* sfp+ */
6028 rsp_payload
->sfp_diag_desc
.sfp_flags
= cpu_to_be16(sfp_flags
);
6030 /* SFP Diagnostics */
6031 memset(sfp
, 0, SFP_RTDI_LEN
);
6032 rval
= qla2x00_read_sfp(vha
, sfp_dma
, sfp
, 0xa2, 0x60, 10, 0);
6034 uint16_t *trx
= (void *)sfp
; /* already be16 */
6035 rsp_payload
->sfp_diag_desc
.temperature
= trx
[0];
6036 rsp_payload
->sfp_diag_desc
.vcc
= trx
[1];
6037 rsp_payload
->sfp_diag_desc
.tx_bias
= trx
[2];
6038 rsp_payload
->sfp_diag_desc
.tx_power
= trx
[3];
6039 rsp_payload
->sfp_diag_desc
.rx_power
= trx
[4];
6043 /* Port Speed Descriptor */
6044 rsp_payload
->port_speed_desc
.desc_tag
= cpu_to_be32(0x10001);
6045 rsp_payload
->port_speed_desc
.desc_len
=
6046 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->port_speed_desc
));
6047 rsp_payload
->port_speed_desc
.speed_capab
= cpu_to_be16(
6048 qla25xx_rdp_port_speed_capability(ha
));
6049 rsp_payload
->port_speed_desc
.operating_speed
= cpu_to_be16(
6050 qla25xx_rdp_port_speed_currently(ha
));
6052 /* Link Error Status Descriptor */
6053 rsp_payload
->ls_err_desc
.desc_tag
= cpu_to_be32(0x10002);
6054 rsp_payload
->ls_err_desc
.desc_len
=
6055 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->ls_err_desc
));
6058 rval
= qla24xx_get_isp_stats(vha
, stat
, stat_dma
, 0);
6060 rsp_payload
->ls_err_desc
.link_fail_cnt
=
6061 cpu_to_be32(stat
->link_fail_cnt
);
6062 rsp_payload
->ls_err_desc
.loss_sync_cnt
=
6063 cpu_to_be32(stat
->loss_sync_cnt
);
6064 rsp_payload
->ls_err_desc
.loss_sig_cnt
=
6065 cpu_to_be32(stat
->loss_sig_cnt
);
6066 rsp_payload
->ls_err_desc
.prim_seq_err_cnt
=
6067 cpu_to_be32(stat
->prim_seq_err_cnt
);
6068 rsp_payload
->ls_err_desc
.inval_xmit_word_cnt
=
6069 cpu_to_be32(stat
->inval_xmit_word_cnt
);
6070 rsp_payload
->ls_err_desc
.inval_crc_cnt
=
6071 cpu_to_be32(stat
->inval_crc_cnt
);
6072 rsp_payload
->ls_err_desc
.pn_port_phy_type
|= BIT_6
;
6076 /* Portname Descriptor */
6077 rsp_payload
->port_name_diag_desc
.desc_tag
= cpu_to_be32(0x10003);
6078 rsp_payload
->port_name_diag_desc
.desc_len
=
6079 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->port_name_diag_desc
));
6080 memcpy(rsp_payload
->port_name_diag_desc
.WWNN
,
6082 sizeof(rsp_payload
->port_name_diag_desc
.WWNN
));
6083 memcpy(rsp_payload
->port_name_diag_desc
.WWPN
,
6085 sizeof(rsp_payload
->port_name_diag_desc
.WWPN
));
6087 /* F-Port Portname Descriptor */
6088 rsp_payload
->port_name_direct_desc
.desc_tag
= cpu_to_be32(0x10003);
6089 rsp_payload
->port_name_direct_desc
.desc_len
=
6090 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->port_name_direct_desc
));
6091 memcpy(rsp_payload
->port_name_direct_desc
.WWNN
,
6092 vha
->fabric_node_name
,
6093 sizeof(rsp_payload
->port_name_direct_desc
.WWNN
));
6094 memcpy(rsp_payload
->port_name_direct_desc
.WWPN
,
6095 vha
->fabric_port_name
,
6096 sizeof(rsp_payload
->port_name_direct_desc
.WWPN
));
6098 /* Bufer Credit Descriptor */
6099 rsp_payload
->buffer_credit_desc
.desc_tag
= cpu_to_be32(0x10006);
6100 rsp_payload
->buffer_credit_desc
.desc_len
=
6101 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->buffer_credit_desc
));
6102 rsp_payload
->buffer_credit_desc
.fcport_b2b
= 0;
6103 rsp_payload
->buffer_credit_desc
.attached_fcport_b2b
= cpu_to_be32(0);
6104 rsp_payload
->buffer_credit_desc
.fcport_rtt
= cpu_to_be32(0);
6107 memset(bbc
, 0, sizeof(*bbc
));
6108 rval
= qla24xx_get_buffer_credits(vha
, bbc
, bbc_dma
);
6110 rsp_payload
->buffer_credit_desc
.fcport_b2b
=
6111 cpu_to_be32(LSW(bbc
->parameter
[0]));
6115 if (rsp_payload_length
< sizeof(*rsp_payload
))
6118 /* Optical Element Descriptor, Temperature */
6119 rsp_payload
->optical_elmt_desc
[0].desc_tag
= cpu_to_be32(0x10007);
6120 rsp_payload
->optical_elmt_desc
[0].desc_len
=
6121 cpu_to_be32(RDP_DESC_LEN(*rsp_payload
->optical_elmt_desc
));
6122 /* Optical Element Descriptor, Voltage */
6123 rsp_payload
->optical_elmt_desc
[1].desc_tag
= cpu_to_be32(0x10007);
6124 rsp_payload
->optical_elmt_desc
[1].desc_len
=
6125 cpu_to_be32(RDP_DESC_LEN(*rsp_payload
->optical_elmt_desc
));
6126 /* Optical Element Descriptor, Tx Bias Current */
6127 rsp_payload
->optical_elmt_desc
[2].desc_tag
= cpu_to_be32(0x10007);
6128 rsp_payload
->optical_elmt_desc
[2].desc_len
=
6129 cpu_to_be32(RDP_DESC_LEN(*rsp_payload
->optical_elmt_desc
));
6130 /* Optical Element Descriptor, Tx Power */
6131 rsp_payload
->optical_elmt_desc
[3].desc_tag
= cpu_to_be32(0x10007);
6132 rsp_payload
->optical_elmt_desc
[3].desc_len
=
6133 cpu_to_be32(RDP_DESC_LEN(*rsp_payload
->optical_elmt_desc
));
6134 /* Optical Element Descriptor, Rx Power */
6135 rsp_payload
->optical_elmt_desc
[4].desc_tag
= cpu_to_be32(0x10007);
6136 rsp_payload
->optical_elmt_desc
[4].desc_len
=
6137 cpu_to_be32(RDP_DESC_LEN(*rsp_payload
->optical_elmt_desc
));
6140 memset(sfp
, 0, SFP_RTDI_LEN
);
6141 rval
= qla2x00_read_sfp(vha
, sfp_dma
, sfp
, 0xa2, 0, 64, 0);
6143 uint16_t *trx
= (void *)sfp
; /* already be16 */
6145 /* Optical Element Descriptor, Temperature */
6146 rsp_payload
->optical_elmt_desc
[0].high_alarm
= trx
[0];
6147 rsp_payload
->optical_elmt_desc
[0].low_alarm
= trx
[1];
6148 rsp_payload
->optical_elmt_desc
[0].high_warn
= trx
[2];
6149 rsp_payload
->optical_elmt_desc
[0].low_warn
= trx
[3];
6150 rsp_payload
->optical_elmt_desc
[0].element_flags
=
6151 cpu_to_be32(1 << 28);
6153 /* Optical Element Descriptor, Voltage */
6154 rsp_payload
->optical_elmt_desc
[1].high_alarm
= trx
[4];
6155 rsp_payload
->optical_elmt_desc
[1].low_alarm
= trx
[5];
6156 rsp_payload
->optical_elmt_desc
[1].high_warn
= trx
[6];
6157 rsp_payload
->optical_elmt_desc
[1].low_warn
= trx
[7];
6158 rsp_payload
->optical_elmt_desc
[1].element_flags
=
6159 cpu_to_be32(2 << 28);
6161 /* Optical Element Descriptor, Tx Bias Current */
6162 rsp_payload
->optical_elmt_desc
[2].high_alarm
= trx
[8];
6163 rsp_payload
->optical_elmt_desc
[2].low_alarm
= trx
[9];
6164 rsp_payload
->optical_elmt_desc
[2].high_warn
= trx
[10];
6165 rsp_payload
->optical_elmt_desc
[2].low_warn
= trx
[11];
6166 rsp_payload
->optical_elmt_desc
[2].element_flags
=
6167 cpu_to_be32(3 << 28);
6169 /* Optical Element Descriptor, Tx Power */
6170 rsp_payload
->optical_elmt_desc
[3].high_alarm
= trx
[12];
6171 rsp_payload
->optical_elmt_desc
[3].low_alarm
= trx
[13];
6172 rsp_payload
->optical_elmt_desc
[3].high_warn
= trx
[14];
6173 rsp_payload
->optical_elmt_desc
[3].low_warn
= trx
[15];
6174 rsp_payload
->optical_elmt_desc
[3].element_flags
=
6175 cpu_to_be32(4 << 28);
6177 /* Optical Element Descriptor, Rx Power */
6178 rsp_payload
->optical_elmt_desc
[4].high_alarm
= trx
[16];
6179 rsp_payload
->optical_elmt_desc
[4].low_alarm
= trx
[17];
6180 rsp_payload
->optical_elmt_desc
[4].high_warn
= trx
[18];
6181 rsp_payload
->optical_elmt_desc
[4].low_warn
= trx
[19];
6182 rsp_payload
->optical_elmt_desc
[4].element_flags
=
6183 cpu_to_be32(5 << 28);
6186 memset(sfp
, 0, SFP_RTDI_LEN
);
6187 rval
= qla2x00_read_sfp(vha
, sfp_dma
, sfp
, 0xa2, 112, 64, 0);
6189 /* Temperature high/low alarm/warning */
6190 rsp_payload
->optical_elmt_desc
[0].element_flags
|=
6192 (sfp
[0] >> 7 & 1) << 3 |
6193 (sfp
[0] >> 6 & 1) << 2 |
6194 (sfp
[4] >> 7 & 1) << 1 |
6195 (sfp
[4] >> 6 & 1) << 0);
6197 /* Voltage high/low alarm/warning */
6198 rsp_payload
->optical_elmt_desc
[1].element_flags
|=
6200 (sfp
[0] >> 5 & 1) << 3 |
6201 (sfp
[0] >> 4 & 1) << 2 |
6202 (sfp
[4] >> 5 & 1) << 1 |
6203 (sfp
[4] >> 4 & 1) << 0);
6205 /* Tx Bias Current high/low alarm/warning */
6206 rsp_payload
->optical_elmt_desc
[2].element_flags
|=
6208 (sfp
[0] >> 3 & 1) << 3 |
6209 (sfp
[0] >> 2 & 1) << 2 |
6210 (sfp
[4] >> 3 & 1) << 1 |
6211 (sfp
[4] >> 2 & 1) << 0);
6213 /* Tx Power high/low alarm/warning */
6214 rsp_payload
->optical_elmt_desc
[3].element_flags
|=
6216 (sfp
[0] >> 1 & 1) << 3 |
6217 (sfp
[0] >> 0 & 1) << 2 |
6218 (sfp
[4] >> 1 & 1) << 1 |
6219 (sfp
[4] >> 0 & 1) << 0);
6221 /* Rx Power high/low alarm/warning */
6222 rsp_payload
->optical_elmt_desc
[4].element_flags
|=
6224 (sfp
[1] >> 7 & 1) << 3 |
6225 (sfp
[1] >> 6 & 1) << 2 |
6226 (sfp
[5] >> 7 & 1) << 1 |
6227 (sfp
[5] >> 6 & 1) << 0);
6231 /* Optical Product Data Descriptor */
6232 rsp_payload
->optical_prod_desc
.desc_tag
= cpu_to_be32(0x10008);
6233 rsp_payload
->optical_prod_desc
.desc_len
=
6234 cpu_to_be32(RDP_DESC_LEN(rsp_payload
->optical_prod_desc
));
6237 memset(sfp
, 0, SFP_RTDI_LEN
);
6238 rval
= qla2x00_read_sfp(vha
, sfp_dma
, sfp
, 0xa0, 20, 64, 0);
6240 memcpy(rsp_payload
->optical_prod_desc
.vendor_name
,
6242 sizeof(rsp_payload
->optical_prod_desc
.vendor_name
));
6243 memcpy(rsp_payload
->optical_prod_desc
.part_number
,
6245 sizeof(rsp_payload
->optical_prod_desc
.part_number
));
6246 memcpy(rsp_payload
->optical_prod_desc
.revision
,
6248 sizeof(rsp_payload
->optical_prod_desc
.revision
));
6249 memcpy(rsp_payload
->optical_prod_desc
.serial_number
,
6251 sizeof(rsp_payload
->optical_prod_desc
.serial_number
));
6254 memset(sfp
, 0, SFP_RTDI_LEN
);
6255 rval
= qla2x00_read_sfp(vha
, sfp_dma
, sfp
, 0xa0, 84, 8, 0);
6257 memcpy(rsp_payload
->optical_prod_desc
.date
,
6259 sizeof(rsp_payload
->optical_prod_desc
.date
));
6264 ql_dbg(ql_dbg_init
, vha
, 0x0183,
6265 "Sending ELS Response to RDP Request...\n");
6266 ql_dbg(ql_dbg_init
+ ql_dbg_verbose
, vha
, 0x0184,
6267 "-------- ELS RSP -------\n");
6268 ql_dump_buffer(ql_dbg_init
+ ql_dbg_verbose
, vha
, 0x0185,
6269 (void *)rsp_els
, sizeof(*rsp_els
));
6270 ql_dbg(ql_dbg_init
+ ql_dbg_verbose
, vha
, 0x0186,
6271 "-------- ELS RSP PAYLOAD -------\n");
6272 ql_dump_buffer(ql_dbg_init
+ ql_dbg_verbose
, vha
, 0x0187,
6273 (void *)rsp_payload
, rsp_payload_length
);
6275 rval
= qla2x00_issue_iocb(vha
, rsp_els
, rsp_els_dma
, 0);
6278 ql_log(ql_log_warn
, vha
, 0x0188,
6279 "%s: iocb failed to execute -> %x\n", __func__
, rval
);
6280 } else if (rsp_els
->comp_status
) {
6281 ql_log(ql_log_warn
, vha
, 0x0189,
6282 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
6283 __func__
, rsp_els
->comp_status
,
6284 rsp_els
->error_subcode_1
, rsp_els
->error_subcode_2
);
6286 ql_dbg(ql_dbg_init
, vha
, 0x018a, "%s: done.\n", __func__
);
6291 dma_free_coherent(&ha
->pdev
->dev
, sizeof(*bbc
),
6294 dma_free_coherent(&ha
->pdev
->dev
, sizeof(*stat
),
6297 dma_free_coherent(&ha
->pdev
->dev
, SFP_RTDI_LEN
,
6300 dma_free_coherent(&ha
->pdev
->dev
, sizeof(*rsp_payload
),
6301 rsp_payload
, rsp_payload_dma
);
6303 dma_free_coherent(&ha
->pdev
->dev
, sizeof(*rsp_els
),
6304 rsp_els
, rsp_els_dma
);
6307 void qla24xx_process_purex_list(struct purex_list
*list
)
6309 struct list_head head
= LIST_HEAD_INIT(head
);
6310 struct purex_item
*item
, *next
;
6313 spin_lock_irqsave(&list
->lock
, flags
);
6314 list_splice_init(&list
->head
, &head
);
6315 spin_unlock_irqrestore(&list
->lock
, flags
);
6317 list_for_each_entry_safe(item
, next
, &head
, list
) {
6318 list_del(&item
->list
);
6319 item
->process_item(item
->vha
, &item
->iocb
);
6325 qla83xx_idc_unlock(scsi_qla_host_t
*base_vha
, uint16_t requester_id
)
6328 uint16_t options
= (requester_id
<< 15) | BIT_7
;
6332 struct qla_hw_data
*ha
= base_vha
->hw
;
6334 /* IDC-unlock implementation using driver-unlock/lock-id
6339 if (qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, &data
)
6341 if (data
== ha
->portnum
) {
6342 qla83xx_rd_reg(base_vha
, QLA83XX_DRIVER_UNLOCK
, &data
);
6343 /* Clearing lock-id by setting 0xff */
6344 qla83xx_wr_reg(base_vha
, QLA83XX_DRIVER_LOCKID
, 0xff);
6345 } else if (retry
< 10) {
6346 /* SV: XXX: IDC unlock retrying needed here? */
6348 /* Retry for IDC-unlock */
6349 qla83xx_wait_logic();
6351 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb064,
6352 "Failed to release IDC lock, retrying=%d\n", retry
);
6355 } else if (retry
< 10) {
6356 /* Retry for IDC-unlock */
6357 qla83xx_wait_logic();
6359 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb065,
6360 "Failed to read drv-lockid, retrying=%d\n", retry
);
6367 /* XXX: IDC-unlock implementation using access-control mbx */
6370 if (qla83xx_access_control(base_vha
, options
, 0, 0, NULL
)) {
6372 /* Retry for IDC-unlock */
6373 qla83xx_wait_logic();
6375 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb066,
6376 "Failed to release IDC lock, retrying=%d\n", retry
);
6386 __qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
6388 int rval
= QLA_SUCCESS
;
6389 struct qla_hw_data
*ha
= vha
->hw
;
6390 uint32_t drv_presence
;
6392 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
6393 if (rval
== QLA_SUCCESS
) {
6394 drv_presence
|= (1 << ha
->portnum
);
6395 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
6403 qla83xx_set_drv_presence(scsi_qla_host_t
*vha
)
6405 int rval
= QLA_SUCCESS
;
6407 qla83xx_idc_lock(vha
, 0);
6408 rval
= __qla83xx_set_drv_presence(vha
);
6409 qla83xx_idc_unlock(vha
, 0);
6415 __qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
6417 int rval
= QLA_SUCCESS
;
6418 struct qla_hw_data
*ha
= vha
->hw
;
6419 uint32_t drv_presence
;
6421 rval
= qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
6422 if (rval
== QLA_SUCCESS
) {
6423 drv_presence
&= ~(1 << ha
->portnum
);
6424 rval
= qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
6432 qla83xx_clear_drv_presence(scsi_qla_host_t
*vha
)
6434 int rval
= QLA_SUCCESS
;
6436 qla83xx_idc_lock(vha
, 0);
6437 rval
= __qla83xx_clear_drv_presence(vha
);
6438 qla83xx_idc_unlock(vha
, 0);
6444 qla83xx_need_reset_handler(scsi_qla_host_t
*vha
)
6446 struct qla_hw_data
*ha
= vha
->hw
;
6447 uint32_t drv_ack
, drv_presence
;
6448 unsigned long ack_timeout
;
6450 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
6451 ack_timeout
= jiffies
+ (ha
->fcoe_reset_timeout
* HZ
);
6453 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRIVER_ACK
, &drv_ack
);
6454 qla83xx_rd_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
, &drv_presence
);
6455 if ((drv_ack
& drv_presence
) == drv_presence
)
6458 if (time_after_eq(jiffies
, ack_timeout
)) {
6459 ql_log(ql_log_warn
, vha
, 0xb067,
6460 "RESET ACK TIMEOUT! drv_presence=0x%x "
6461 "drv_ack=0x%x\n", drv_presence
, drv_ack
);
6463 * The function(s) which did not ack in time are forced
6464 * to withdraw any further participation in the IDC
6467 if (drv_ack
!= drv_presence
)
6468 qla83xx_wr_reg(vha
, QLA83XX_IDC_DRV_PRESENCE
,
6473 qla83xx_idc_unlock(vha
, 0);
6475 qla83xx_idc_lock(vha
, 0);
6478 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_COLD
);
6479 ql_log(ql_log_info
, vha
, 0xb068, "HW State: COLD/RE-INIT.\n");
6483 qla83xx_device_bootstrap(scsi_qla_host_t
*vha
)
6485 int rval
= QLA_SUCCESS
;
6486 uint32_t idc_control
;
6488 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_INITIALIZING
);
6489 ql_log(ql_log_info
, vha
, 0xb069, "HW State: INITIALIZING.\n");
6491 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
6492 __qla83xx_get_idc_control(vha
, &idc_control
);
6493 idc_control
&= ~QLA83XX_IDC_GRACEFUL_RESET
;
6494 __qla83xx_set_idc_control(vha
, 0);
6496 qla83xx_idc_unlock(vha
, 0);
6497 rval
= qla83xx_restart_nic_firmware(vha
);
6498 qla83xx_idc_lock(vha
, 0);
6500 if (rval
!= QLA_SUCCESS
) {
6501 ql_log(ql_log_fatal
, vha
, 0xb06a,
6502 "Failed to restart NIC f/w.\n");
6503 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_FAILED
);
6504 ql_log(ql_log_info
, vha
, 0xb06b, "HW State: FAILED.\n");
6506 ql_dbg(ql_dbg_p3p
, vha
, 0xb06c,
6507 "Success in restarting nic f/w.\n");
6508 qla83xx_wr_reg(vha
, QLA83XX_IDC_DEV_STATE
, QLA8XXX_DEV_READY
);
6509 ql_log(ql_log_info
, vha
, 0xb06d, "HW State: READY.\n");
6515 /* Assumes idc_lock always held on entry */
6517 qla83xx_idc_state_handler(scsi_qla_host_t
*base_vha
)
6519 struct qla_hw_data
*ha
= base_vha
->hw
;
6520 int rval
= QLA_SUCCESS
;
6521 unsigned long dev_init_timeout
;
6524 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
6525 dev_init_timeout
= jiffies
+ (ha
->fcoe_dev_init_timeout
* HZ
);
6529 if (time_after_eq(jiffies
, dev_init_timeout
)) {
6530 ql_log(ql_log_warn
, base_vha
, 0xb06e,
6531 "Initialization TIMEOUT!\n");
6532 /* Init timeout. Disable further NIC Core
6535 qla83xx_wr_reg(base_vha
, QLA83XX_IDC_DEV_STATE
,
6536 QLA8XXX_DEV_FAILED
);
6537 ql_log(ql_log_info
, base_vha
, 0xb06f,
6538 "HW State: FAILED.\n");
6541 qla83xx_rd_reg(base_vha
, QLA83XX_IDC_DEV_STATE
, &dev_state
);
6542 switch (dev_state
) {
6543 case QLA8XXX_DEV_READY
:
6544 if (ha
->flags
.nic_core_reset_owner
)
6545 qla83xx_idc_audit(base_vha
,
6546 IDC_AUDIT_COMPLETION
);
6547 ha
->flags
.nic_core_reset_owner
= 0;
6548 ql_dbg(ql_dbg_p3p
, base_vha
, 0xb070,
6549 "Reset_owner reset by 0x%x.\n",
6552 case QLA8XXX_DEV_COLD
:
6553 if (ha
->flags
.nic_core_reset_owner
)
6554 rval
= qla83xx_device_bootstrap(base_vha
);
6556 /* Wait for AEN to change device-state */
6557 qla83xx_idc_unlock(base_vha
, 0);
6559 qla83xx_idc_lock(base_vha
, 0);
6562 case QLA8XXX_DEV_INITIALIZING
:
6563 /* Wait for AEN to change device-state */
6564 qla83xx_idc_unlock(base_vha
, 0);
6566 qla83xx_idc_lock(base_vha
, 0);
6568 case QLA8XXX_DEV_NEED_RESET
:
6569 if (!ql2xdontresethba
&& ha
->flags
.nic_core_reset_owner
)
6570 qla83xx_need_reset_handler(base_vha
);
6572 /* Wait for AEN to change device-state */
6573 qla83xx_idc_unlock(base_vha
, 0);
6575 qla83xx_idc_lock(base_vha
, 0);
6577 /* reset timeout value after need reset handler */
6578 dev_init_timeout
= jiffies
+
6579 (ha
->fcoe_dev_init_timeout
* HZ
);
6581 case QLA8XXX_DEV_NEED_QUIESCENT
:
6582 /* XXX: DEBUG for now */
6583 qla83xx_idc_unlock(base_vha
, 0);
6585 qla83xx_idc_lock(base_vha
, 0);
6587 case QLA8XXX_DEV_QUIESCENT
:
6588 /* XXX: DEBUG for now */
6589 if (ha
->flags
.quiesce_owner
)
6592 qla83xx_idc_unlock(base_vha
, 0);
6594 qla83xx_idc_lock(base_vha
, 0);
6595 dev_init_timeout
= jiffies
+
6596 (ha
->fcoe_dev_init_timeout
* HZ
);
6598 case QLA8XXX_DEV_FAILED
:
6599 if (ha
->flags
.nic_core_reset_owner
)
6600 qla83xx_idc_audit(base_vha
,
6601 IDC_AUDIT_COMPLETION
);
6602 ha
->flags
.nic_core_reset_owner
= 0;
6603 __qla83xx_clear_drv_presence(base_vha
);
6604 qla83xx_idc_unlock(base_vha
, 0);
6605 qla8xxx_dev_failed_handler(base_vha
);
6606 rval
= QLA_FUNCTION_FAILED
;
6607 qla83xx_idc_lock(base_vha
, 0);
6609 case QLA8XXX_BAD_VALUE
:
6610 qla83xx_idc_unlock(base_vha
, 0);
6612 qla83xx_idc_lock(base_vha
, 0);
6615 ql_log(ql_log_warn
, base_vha
, 0xb071,
6616 "Unknown Device State: %x.\n", dev_state
);
6617 qla83xx_idc_unlock(base_vha
, 0);
6618 qla8xxx_dev_failed_handler(base_vha
);
6619 rval
= QLA_FUNCTION_FAILED
;
6620 qla83xx_idc_lock(base_vha
, 0);
6630 qla2x00_disable_board_on_pci_error(struct work_struct
*work
)
6632 struct qla_hw_data
*ha
= container_of(work
, struct qla_hw_data
,
6634 struct pci_dev
*pdev
= ha
->pdev
;
6635 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
6638 * if UNLOAD flag is already set, then continue unload,
6639 * where it was set first.
6641 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
6644 ql_log(ql_log_warn
, base_vha
, 0x015b,
6645 "Disabling adapter.\n");
6647 if (!atomic_read(&pdev
->enable_cnt
)) {
6648 ql_log(ql_log_info
, base_vha
, 0xfffc,
6649 "PCI device disabled, no action req for PCI error=%lx\n",
6650 base_vha
->pci_flags
);
6654 qla2x00_wait_for_sess_deletion(base_vha
);
6656 set_bit(UNLOADING
, &base_vha
->dpc_flags
);
6658 qla2x00_delete_all_vps(ha
, base_vha
);
6660 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
6662 qla2x00_dfs_remove(base_vha
);
6664 qla84xx_put_chip(base_vha
);
6666 if (base_vha
->timer_active
)
6667 qla2x00_stop_timer(base_vha
);
6669 base_vha
->flags
.online
= 0;
6671 qla2x00_destroy_deferred_work(ha
);
6674 * Do not try to stop beacon blink as it will issue a mailbox
6677 qla2x00_free_sysfs_attr(base_vha
, false);
6679 fc_remove_host(base_vha
->host
);
6681 scsi_remove_host(base_vha
->host
);
6683 base_vha
->flags
.init_done
= 0;
6684 qla25xx_delete_queues(base_vha
);
6685 qla2x00_free_fcports(base_vha
);
6686 qla2x00_free_irqs(base_vha
);
6687 qla2x00_mem_free(ha
);
6688 qla82xx_md_free(base_vha
);
6689 qla2x00_free_queues(ha
);
6691 qla2x00_unmap_iobases(ha
);
6693 pci_release_selected_regions(ha
->pdev
, ha
->bars
);
6694 pci_disable_pcie_error_reporting(pdev
);
6695 pci_disable_device(pdev
);
6698 * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6702 /**************************************************************************
6704 * This kernel thread is a task that is schedule by the interrupt handler
6705 * to perform the background processing for interrupts.
6708 * This task always run in the context of a kernel thread. It
6709 * is kick-off by the driver's detect code and starts up
6710 * up one per adapter. It immediately goes to sleep and waits for
6711 * some fibre event. When either the interrupt handler or
6712 * the timer routine detects a event it will one of the task
6713 * bits then wake us up.
6714 **************************************************************************/
6716 qla2x00_do_dpc(void *data
)
6718 scsi_qla_host_t
*base_vha
;
6719 struct qla_hw_data
*ha
;
6721 struct qla_qpair
*qpair
;
6723 ha
= (struct qla_hw_data
*)data
;
6724 base_vha
= pci_get_drvdata(ha
->pdev
);
6726 set_user_nice(current
, MIN_NICE
);
6728 set_current_state(TASK_INTERRUPTIBLE
);
6729 while (!kthread_should_stop()) {
6730 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4000,
6731 "DPC handler sleeping.\n");
6735 if (!base_vha
->flags
.init_done
|| ha
->flags
.mbox_busy
)
6738 if (ha
->flags
.eeh_busy
) {
6739 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4003,
6740 "eeh_busy=%d.\n", ha
->flags
.eeh_busy
);
6746 ql_dbg(ql_dbg_dpc
+ ql_dbg_verbose
, base_vha
, 0x4001,
6747 "DPC handler waking up, dpc_flags=0x%lx.\n",
6748 base_vha
->dpc_flags
);
6750 if (test_bit(UNLOADING
, &base_vha
->dpc_flags
))
6753 if (IS_P3P_TYPE(ha
)) {
6754 if (IS_QLA8044(ha
)) {
6755 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
6756 &base_vha
->dpc_flags
)) {
6757 qla8044_idc_lock(ha
);
6758 qla8044_wr_direct(base_vha
,
6759 QLA8044_CRB_DEV_STATE_INDEX
,
6760 QLA8XXX_DEV_FAILED
);
6761 qla8044_idc_unlock(ha
);
6762 ql_log(ql_log_info
, base_vha
, 0x4004,
6763 "HW State: FAILED.\n");
6764 qla8044_device_state_handler(base_vha
);
6769 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
6770 &base_vha
->dpc_flags
)) {
6771 qla82xx_idc_lock(ha
);
6772 qla82xx_wr_32(ha
, QLA82XX_CRB_DEV_STATE
,
6773 QLA8XXX_DEV_FAILED
);
6774 qla82xx_idc_unlock(ha
);
6775 ql_log(ql_log_info
, base_vha
, 0x0151,
6776 "HW State: FAILED.\n");
6777 qla82xx_device_state_handler(base_vha
);
6782 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED
,
6783 &base_vha
->dpc_flags
)) {
6785 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4005,
6786 "FCoE context reset scheduled.\n");
6787 if (!(test_and_set_bit(ABORT_ISP_ACTIVE
,
6788 &base_vha
->dpc_flags
))) {
6789 if (qla82xx_fcoe_ctx_reset(base_vha
)) {
6790 /* FCoE-ctx reset failed.
6791 * Escalate to chip-reset
6793 set_bit(ISP_ABORT_NEEDED
,
6794 &base_vha
->dpc_flags
);
6796 clear_bit(ABORT_ISP_ACTIVE
,
6797 &base_vha
->dpc_flags
);
6800 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4006,
6801 "FCoE context reset end.\n");
6803 } else if (IS_QLAFX00(ha
)) {
6804 if (test_and_clear_bit(ISP_UNRECOVERABLE
,
6805 &base_vha
->dpc_flags
)) {
6806 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4020,
6807 "Firmware Reset Recovery\n");
6808 if (qlafx00_reset_initialize(base_vha
)) {
6809 /* Failed. Abort isp later. */
6810 if (!test_bit(UNLOADING
,
6811 &base_vha
->dpc_flags
)) {
6812 set_bit(ISP_UNRECOVERABLE
,
6813 &base_vha
->dpc_flags
);
6814 ql_dbg(ql_dbg_dpc
, base_vha
,
6816 "Reset Recovery Failed\n");
6821 if (test_and_clear_bit(FX00_TARGET_SCAN
,
6822 &base_vha
->dpc_flags
)) {
6823 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4022,
6824 "ISPFx00 Target Scan scheduled\n");
6825 if (qlafx00_rescan_isp(base_vha
)) {
6826 if (!test_bit(UNLOADING
,
6827 &base_vha
->dpc_flags
))
6828 set_bit(ISP_UNRECOVERABLE
,
6829 &base_vha
->dpc_flags
);
6830 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401e,
6831 "ISPFx00 Target Scan Failed\n");
6833 ql_dbg(ql_dbg_dpc
, base_vha
, 0x401f,
6834 "ISPFx00 Target Scan End\n");
6836 if (test_and_clear_bit(FX00_HOST_INFO_RESEND
,
6837 &base_vha
->dpc_flags
)) {
6838 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4023,
6839 "ISPFx00 Host Info resend scheduled\n");
6840 qlafx00_fx_disc(base_vha
,
6841 &base_vha
->hw
->mr
.fcport
,
6842 FXDISC_REG_HOST_INFO
);
6846 if (test_and_clear_bit(DETECT_SFP_CHANGE
,
6847 &base_vha
->dpc_flags
)) {
6849 * - NO-OP -- await next ISP-ABORT. Preferred method
6850 * to minimize disruptions that will occur
6851 * when a forced chip-reset occurs.
6852 * - Force -- ISP-ABORT scheduled.
6854 /* set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); */
6857 if (test_and_clear_bit
6858 (ISP_ABORT_NEEDED
, &base_vha
->dpc_flags
) &&
6859 !test_bit(UNLOADING
, &base_vha
->dpc_flags
)) {
6860 bool do_reset
= true;
6862 switch (base_vha
->qlini_mode
) {
6863 case QLA2XXX_INI_MODE_ENABLED
:
6865 case QLA2XXX_INI_MODE_DISABLED
:
6866 if (!qla_tgt_mode_enabled(base_vha
) &&
6867 !ha
->flags
.fw_started
)
6870 case QLA2XXX_INI_MODE_DUAL
:
6871 if (!qla_dual_mode_enabled(base_vha
) &&
6872 !ha
->flags
.fw_started
)
6879 if (do_reset
&& !(test_and_set_bit(ABORT_ISP_ACTIVE
,
6880 &base_vha
->dpc_flags
))) {
6881 base_vha
->flags
.online
= 1;
6882 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4007,
6883 "ISP abort scheduled.\n");
6884 if (ha
->isp_ops
->abort_isp(base_vha
)) {
6885 /* failed. retry later */
6886 set_bit(ISP_ABORT_NEEDED
,
6887 &base_vha
->dpc_flags
);
6889 clear_bit(ABORT_ISP_ACTIVE
,
6890 &base_vha
->dpc_flags
);
6891 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4008,
6892 "ISP abort end.\n");
6896 if (test_bit(PROCESS_PUREX_IOCB
, &base_vha
->dpc_flags
)) {
6897 if (atomic_read(&base_vha
->loop_state
) == LOOP_READY
) {
6898 qla24xx_process_purex_list
6899 (&base_vha
->purex_list
);
6900 clear_bit(PROCESS_PUREX_IOCB
,
6901 &base_vha
->dpc_flags
);
6905 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED
,
6906 &base_vha
->dpc_flags
)) {
6907 qla2x00_update_fcports(base_vha
);
6911 goto loop_resync_check
;
6913 if (test_bit(ISP_QUIESCE_NEEDED
, &base_vha
->dpc_flags
)) {
6914 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4009,
6915 "Quiescence mode scheduled.\n");
6916 if (IS_P3P_TYPE(ha
)) {
6918 qla82xx_device_state_handler(base_vha
);
6920 qla8044_device_state_handler(base_vha
);
6921 clear_bit(ISP_QUIESCE_NEEDED
,
6922 &base_vha
->dpc_flags
);
6923 if (!ha
->flags
.quiesce_owner
) {
6924 qla2x00_perform_loop_resync(base_vha
);
6925 if (IS_QLA82XX(ha
)) {
6926 qla82xx_idc_lock(ha
);
6927 qla82xx_clear_qsnt_ready(
6929 qla82xx_idc_unlock(ha
);
6930 } else if (IS_QLA8044(ha
)) {
6931 qla8044_idc_lock(ha
);
6932 qla8044_clear_qsnt_ready(
6934 qla8044_idc_unlock(ha
);
6938 clear_bit(ISP_QUIESCE_NEEDED
,
6939 &base_vha
->dpc_flags
);
6940 qla2x00_quiesce_io(base_vha
);
6942 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400a,
6943 "Quiescence mode end.\n");
6946 if (test_and_clear_bit(RESET_MARKER_NEEDED
,
6947 &base_vha
->dpc_flags
) &&
6948 (!(test_and_set_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
)))) {
6950 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400b,
6951 "Reset marker scheduled.\n");
6952 qla2x00_rst_aen(base_vha
);
6953 clear_bit(RESET_ACTIVE
, &base_vha
->dpc_flags
);
6954 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400c,
6955 "Reset marker end.\n");
6958 /* Retry each device up to login retry count */
6959 if (test_bit(RELOGIN_NEEDED
, &base_vha
->dpc_flags
) &&
6960 !test_bit(LOOP_RESYNC_NEEDED
, &base_vha
->dpc_flags
) &&
6961 atomic_read(&base_vha
->loop_state
) != LOOP_DOWN
) {
6963 if (!base_vha
->relogin_jif
||
6964 time_after_eq(jiffies
, base_vha
->relogin_jif
)) {
6965 base_vha
->relogin_jif
= jiffies
+ HZ
;
6966 clear_bit(RELOGIN_NEEDED
, &base_vha
->dpc_flags
);
6968 ql_dbg(ql_dbg_disc
, base_vha
, 0x400d,
6969 "Relogin scheduled.\n");
6970 qla24xx_post_relogin_work(base_vha
);
6974 if (test_and_clear_bit(LOOP_RESYNC_NEEDED
,
6975 &base_vha
->dpc_flags
)) {
6977 ql_dbg(ql_dbg_dpc
, base_vha
, 0x400f,
6978 "Loop resync scheduled.\n");
6980 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE
,
6981 &base_vha
->dpc_flags
))) {
6983 qla2x00_loop_resync(base_vha
);
6985 clear_bit(LOOP_RESYNC_ACTIVE
,
6986 &base_vha
->dpc_flags
);
6989 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4010,
6990 "Loop resync end.\n");
6996 if (test_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
) &&
6997 atomic_read(&base_vha
->loop_state
) == LOOP_READY
) {
6998 clear_bit(NPIV_CONFIG_NEEDED
, &base_vha
->dpc_flags
);
6999 qla2xxx_flash_npiv_conf(base_vha
);
7003 if (!ha
->interrupts_on
)
7004 ha
->isp_ops
->enable_intrs(ha
);
7006 if (test_and_clear_bit(BEACON_BLINK_NEEDED
,
7007 &base_vha
->dpc_flags
)) {
7008 if (ha
->beacon_blink_led
== 1)
7009 ha
->isp_ops
->beacon_blink(base_vha
);
7012 /* qpair online check */
7013 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED
,
7014 &base_vha
->dpc_flags
)) {
7015 if (ha
->flags
.eeh_busy
||
7016 ha
->flags
.pci_channel_io_perm_failure
)
7021 mutex_lock(&ha
->mq_lock
);
7022 list_for_each_entry(qpair
, &base_vha
->qp_list
,
7024 qpair
->online
= online
;
7025 mutex_unlock(&ha
->mq_lock
);
7028 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED
,
7029 &base_vha
->dpc_flags
)) {
7030 ql_log(ql_log_info
, base_vha
, 0xffffff,
7031 "nvme: SET ZIO Activity exchange threshold to %d.\n",
7032 ha
->nvme_last_rptd_aen
);
7033 if (qla27xx_set_zio_threshold(base_vha
,
7034 ha
->nvme_last_rptd_aen
)) {
7035 ql_log(ql_log_info
, base_vha
, 0xffffff,
7036 "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
7037 ha
->nvme_last_rptd_aen
);
7041 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED
,
7042 &base_vha
->dpc_flags
)) {
7043 ql_log(ql_log_info
, base_vha
, 0xffffff,
7044 "SET ZIO Activity exchange threshold to %d.\n",
7045 ha
->last_zio_threshold
);
7046 qla27xx_set_zio_threshold(base_vha
,
7047 ha
->last_zio_threshold
);
7050 if (!IS_QLAFX00(ha
))
7051 qla2x00_do_dpc_all_vps(base_vha
);
7053 if (test_and_clear_bit(N2N_LINK_RESET
,
7054 &base_vha
->dpc_flags
)) {
7055 qla2x00_lip_reset(base_vha
);
7060 set_current_state(TASK_INTERRUPTIBLE
);
7061 } /* End of while(1) */
7062 __set_current_state(TASK_RUNNING
);
7064 ql_dbg(ql_dbg_dpc
, base_vha
, 0x4011,
7065 "DPC handler exiting.\n");
7068 * Make sure that nobody tries to wake us up again.
7072 /* Cleanup any residual CTX SRBs. */
7073 qla2x00_abort_all_cmds(base_vha
, DID_NO_CONNECT
<< 16);
7079 qla2xxx_wake_dpc(struct scsi_qla_host
*vha
)
7081 struct qla_hw_data
*ha
= vha
->hw
;
7082 struct task_struct
*t
= ha
->dpc_thread
;
7084 if (!test_bit(UNLOADING
, &vha
->dpc_flags
) && t
)
7090 * Processes asynchronous reset.
7093 * ha = adapter block pointer.
7096 qla2x00_rst_aen(scsi_qla_host_t
*vha
)
7098 if (vha
->flags
.online
&& !vha
->flags
.reset_active
&&
7099 !atomic_read(&vha
->loop_down_timer
) &&
7100 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
))) {
7102 clear_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
);
7105 * Issue marker command only when we are going to start
7108 vha
->marker_needed
= 1;
7109 } while (!atomic_read(&vha
->loop_down_timer
) &&
7110 (test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
)));
7114 /**************************************************************************
7120 * Context: Interrupt
7121 ***************************************************************************/
7123 qla2x00_timer(struct timer_list
*t
)
7125 scsi_qla_host_t
*vha
= from_timer(vha
, t
, timer
);
7126 unsigned long cpu_flags
= 0;
7131 struct qla_hw_data
*ha
= vha
->hw
;
7132 struct req_que
*req
;
7134 if (ha
->flags
.eeh_busy
) {
7135 ql_dbg(ql_dbg_timer
, vha
, 0x6000,
7136 "EEH = %d, restarting timer.\n",
7137 ha
->flags
.eeh_busy
);
7138 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
7143 * Hardware read to raise pending EEH errors during mailbox waits. If
7144 * the read returns -1 then disable the board.
7146 if (!pci_channel_offline(ha
->pdev
)) {
7147 pci_read_config_word(ha
->pdev
, PCI_VENDOR_ID
, &w
);
7148 qla2x00_check_reg16_for_disconnect(vha
, w
);
7151 /* Make sure qla82xx_watchdog is run only for physical port */
7152 if (!vha
->vp_idx
&& IS_P3P_TYPE(ha
)) {
7153 if (test_bit(ISP_QUIESCE_NEEDED
, &vha
->dpc_flags
))
7156 qla82xx_watchdog(vha
);
7157 else if (IS_QLA8044(ha
))
7158 qla8044_watchdog(vha
);
7161 if (!vha
->vp_idx
&& IS_QLAFX00(ha
))
7162 qlafx00_timer_routine(vha
);
7164 /* Loop down handler. */
7165 if (atomic_read(&vha
->loop_down_timer
) > 0 &&
7166 !(test_bit(ABORT_ISP_ACTIVE
, &vha
->dpc_flags
)) &&
7167 !(test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
))
7168 && vha
->flags
.online
) {
7170 if (atomic_read(&vha
->loop_down_timer
) ==
7171 vha
->loop_down_abort_time
) {
7173 ql_log(ql_log_info
, vha
, 0x6008,
7174 "Loop down - aborting the queues before time expires.\n");
7176 if (!IS_QLA2100(ha
) && vha
->link_down_timeout
)
7177 atomic_set(&vha
->loop_state
, LOOP_DEAD
);
7180 * Schedule an ISP abort to return any FCP2-device
7183 /* NPIV - scan physical port only */
7185 spin_lock_irqsave(&ha
->hardware_lock
,
7187 req
= ha
->req_q_map
[0];
7189 index
< req
->num_outstanding_cmds
;
7193 sp
= req
->outstanding_cmds
[index
];
7196 if (sp
->cmd_type
!= TYPE_SRB
)
7198 if (sp
->type
!= SRB_SCSI_CMD
)
7201 if (!(sfcp
->flags
& FCF_FCP2_DEVICE
))
7205 set_bit(FCOE_CTX_RESET_NEEDED
,
7208 set_bit(ISP_ABORT_NEEDED
,
7212 spin_unlock_irqrestore(&ha
->hardware_lock
,
7218 /* if the loop has been down for 4 minutes, reinit adapter */
7219 if (atomic_dec_and_test(&vha
->loop_down_timer
) != 0) {
7220 if (!(vha
->device_flags
& DFLG_NO_CABLE
)) {
7221 ql_log(ql_log_warn
, vha
, 0x6009,
7222 "Loop down - aborting ISP.\n");
7225 set_bit(FCOE_CTX_RESET_NEEDED
,
7228 set_bit(ISP_ABORT_NEEDED
,
7232 ql_dbg(ql_dbg_timer
, vha
, 0x600a,
7233 "Loop down - seconds remaining %d.\n",
7234 atomic_read(&vha
->loop_down_timer
));
7236 /* Check if beacon LED needs to be blinked for physical host only */
7237 if (!vha
->vp_idx
&& (ha
->beacon_blink_led
== 1)) {
7238 /* There is no beacon_blink function for ISP82xx */
7239 if (!IS_P3P_TYPE(ha
)) {
7240 set_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
);
7245 /* Process any deferred work. */
7246 if (!list_empty(&vha
->work_list
)) {
7247 unsigned long flags
;
7250 spin_lock_irqsave(&vha
->work_lock
, flags
);
7251 if (!test_and_set_bit(IOCB_WORK_ACTIVE
, &vha
->dpc_flags
))
7253 spin_unlock_irqrestore(&vha
->work_lock
, flags
);
7255 queue_work(vha
->hw
->wq
, &vha
->iocb_work
);
7260 * see if the active AEN count has changed from what was last reported.
7263 (atomic_read(&ha
->nvme_active_aen_cnt
) != ha
->nvme_last_rptd_aen
) &&
7264 ha
->zio_mode
== QLA_ZIO_MODE_6
&&
7265 !ha
->flags
.host_shutting_down
) {
7266 ql_log(ql_log_info
, vha
, 0x3002,
7267 "nvme: Sched: Set ZIO exchange threshold to %d.\n",
7268 ha
->nvme_last_rptd_aen
);
7269 ha
->nvme_last_rptd_aen
= atomic_read(&ha
->nvme_active_aen_cnt
);
7270 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED
, &vha
->dpc_flags
);
7275 (atomic_read(&ha
->zio_threshold
) != ha
->last_zio_threshold
) &&
7276 (ha
->zio_mode
== QLA_ZIO_MODE_6
) &&
7277 (IS_QLA83XX(ha
) || IS_QLA27XX(ha
) || IS_QLA28XX(ha
))) {
7278 ql_log(ql_log_info
, vha
, 0x3002,
7279 "Sched: Set ZIO exchange threshold to %d.\n",
7280 ha
->last_zio_threshold
);
7281 ha
->last_zio_threshold
= atomic_read(&ha
->zio_threshold
);
7282 set_bit(SET_ZIO_THRESHOLD_NEEDED
, &vha
->dpc_flags
);
7286 /* Schedule the DPC routine if needed */
7287 if ((test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
) ||
7288 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
) ||
7289 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
) ||
7291 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
) ||
7292 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
) ||
7293 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
) ||
7294 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
) ||
7295 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
) ||
7296 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
) ||
7297 test_bit(PROCESS_PUREX_IOCB
, &vha
->dpc_flags
))) {
7298 ql_dbg(ql_dbg_timer
, vha
, 0x600b,
7299 "isp_abort_needed=%d loop_resync_needed=%d "
7300 "fcport_update_needed=%d start_dpc=%d "
7301 "reset_marker_needed=%d",
7302 test_bit(ISP_ABORT_NEEDED
, &vha
->dpc_flags
),
7303 test_bit(LOOP_RESYNC_NEEDED
, &vha
->dpc_flags
),
7304 test_bit(FCPORT_UPDATE_NEEDED
, &vha
->dpc_flags
),
7306 test_bit(RESET_MARKER_NEEDED
, &vha
->dpc_flags
));
7307 ql_dbg(ql_dbg_timer
, vha
, 0x600c,
7308 "beacon_blink_needed=%d isp_unrecoverable=%d "
7309 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
7310 "relogin_needed=%d, Process_purex_iocb=%d.\n",
7311 test_bit(BEACON_BLINK_NEEDED
, &vha
->dpc_flags
),
7312 test_bit(ISP_UNRECOVERABLE
, &vha
->dpc_flags
),
7313 test_bit(FCOE_CTX_RESET_NEEDED
, &vha
->dpc_flags
),
7314 test_bit(VP_DPC_NEEDED
, &vha
->dpc_flags
),
7315 test_bit(RELOGIN_NEEDED
, &vha
->dpc_flags
),
7316 test_bit(PROCESS_PUREX_IOCB
, &vha
->dpc_flags
));
7317 qla2xxx_wake_dpc(vha
);
7320 qla2x00_restart_timer(vha
, WATCH_INTERVAL
);
7323 /* Firmware interface routines. */
7325 #define FW_ISP21XX 0
7326 #define FW_ISP22XX 1
7327 #define FW_ISP2300 2
7328 #define FW_ISP2322 3
7329 #define FW_ISP24XX 4
7330 #define FW_ISP25XX 5
7331 #define FW_ISP81XX 6
7332 #define FW_ISP82XX 7
7333 #define FW_ISP2031 8
7334 #define FW_ISP8031 9
7335 #define FW_ISP27XX 10
7336 #define FW_ISP28XX 11
7338 #define FW_FILE_ISP21XX "ql2100_fw.bin"
7339 #define FW_FILE_ISP22XX "ql2200_fw.bin"
7340 #define FW_FILE_ISP2300 "ql2300_fw.bin"
7341 #define FW_FILE_ISP2322 "ql2322_fw.bin"
7342 #define FW_FILE_ISP24XX "ql2400_fw.bin"
7343 #define FW_FILE_ISP25XX "ql2500_fw.bin"
7344 #define FW_FILE_ISP81XX "ql8100_fw.bin"
7345 #define FW_FILE_ISP82XX "ql8200_fw.bin"
7346 #define FW_FILE_ISP2031 "ql2600_fw.bin"
7347 #define FW_FILE_ISP8031 "ql8300_fw.bin"
7348 #define FW_FILE_ISP27XX "ql2700_fw.bin"
7349 #define FW_FILE_ISP28XX "ql2800_fw.bin"
7352 static DEFINE_MUTEX(qla_fw_lock
);
7354 static struct fw_blob qla_fw_blobs
[] = {
7355 { .name
= FW_FILE_ISP21XX
, .segs
= { 0x1000, 0 }, },
7356 { .name
= FW_FILE_ISP22XX
, .segs
= { 0x1000, 0 }, },
7357 { .name
= FW_FILE_ISP2300
, .segs
= { 0x800, 0 }, },
7358 { .name
= FW_FILE_ISP2322
, .segs
= { 0x800, 0x1c000, 0x1e000, 0 }, },
7359 { .name
= FW_FILE_ISP24XX
, },
7360 { .name
= FW_FILE_ISP25XX
, },
7361 { .name
= FW_FILE_ISP81XX
, },
7362 { .name
= FW_FILE_ISP82XX
, },
7363 { .name
= FW_FILE_ISP2031
, },
7364 { .name
= FW_FILE_ISP8031
, },
7365 { .name
= FW_FILE_ISP27XX
, },
7366 { .name
= FW_FILE_ISP28XX
, },
7371 qla2x00_request_firmware(scsi_qla_host_t
*vha
)
7373 struct qla_hw_data
*ha
= vha
->hw
;
7374 struct fw_blob
*blob
;
7376 if (IS_QLA2100(ha
)) {
7377 blob
= &qla_fw_blobs
[FW_ISP21XX
];
7378 } else if (IS_QLA2200(ha
)) {
7379 blob
= &qla_fw_blobs
[FW_ISP22XX
];
7380 } else if (IS_QLA2300(ha
) || IS_QLA2312(ha
) || IS_QLA6312(ha
)) {
7381 blob
= &qla_fw_blobs
[FW_ISP2300
];
7382 } else if (IS_QLA2322(ha
) || IS_QLA6322(ha
)) {
7383 blob
= &qla_fw_blobs
[FW_ISP2322
];
7384 } else if (IS_QLA24XX_TYPE(ha
)) {
7385 blob
= &qla_fw_blobs
[FW_ISP24XX
];
7386 } else if (IS_QLA25XX(ha
)) {
7387 blob
= &qla_fw_blobs
[FW_ISP25XX
];
7388 } else if (IS_QLA81XX(ha
)) {
7389 blob
= &qla_fw_blobs
[FW_ISP81XX
];
7390 } else if (IS_QLA82XX(ha
)) {
7391 blob
= &qla_fw_blobs
[FW_ISP82XX
];
7392 } else if (IS_QLA2031(ha
)) {
7393 blob
= &qla_fw_blobs
[FW_ISP2031
];
7394 } else if (IS_QLA8031(ha
)) {
7395 blob
= &qla_fw_blobs
[FW_ISP8031
];
7396 } else if (IS_QLA27XX(ha
)) {
7397 blob
= &qla_fw_blobs
[FW_ISP27XX
];
7398 } else if (IS_QLA28XX(ha
)) {
7399 blob
= &qla_fw_blobs
[FW_ISP28XX
];
7407 mutex_lock(&qla_fw_lock
);
7411 if (request_firmware(&blob
->fw
, blob
->name
, &ha
->pdev
->dev
)) {
7412 ql_log(ql_log_warn
, vha
, 0x0063,
7413 "Failed to load firmware image (%s).\n", blob
->name
);
7419 mutex_unlock(&qla_fw_lock
);
7424 qla2x00_release_firmware(void)
7426 struct fw_blob
*blob
;
7428 mutex_lock(&qla_fw_lock
);
7429 for (blob
= qla_fw_blobs
; blob
->name
; blob
++)
7430 release_firmware(blob
->fw
);
7431 mutex_unlock(&qla_fw_lock
);
7434 static void qla_pci_error_cleanup(scsi_qla_host_t
*vha
)
7436 struct qla_hw_data
*ha
= vha
->hw
;
7437 scsi_qla_host_t
*base_vha
= pci_get_drvdata(ha
->pdev
);
7438 struct qla_qpair
*qpair
= NULL
;
7439 struct scsi_qla_host
*vp
;
7442 unsigned long flags
;
7446 ha
->base_qpair
->chip_reset
= ha
->chip_reset
;
7447 for (i
= 0; i
< ha
->max_qpairs
; i
++) {
7448 if (ha
->queue_pair_map
[i
])
7449 ha
->queue_pair_map
[i
]->chip_reset
=
7450 ha
->base_qpair
->chip_reset
;
7453 /* purge MBox commands */
7454 if (atomic_read(&ha
->num_pend_mbx_stage3
)) {
7455 clear_bit(MBX_INTR_WAIT
, &ha
->mbx_cmd_flags
);
7456 complete(&ha
->mbx_intr_comp
);
7461 while (atomic_read(&ha
->num_pend_mbx_stage3
) ||
7462 atomic_read(&ha
->num_pend_mbx_stage2
) ||
7463 atomic_read(&ha
->num_pend_mbx_stage1
)) {
7470 ha
->flags
.purge_mbox
= 0;
7472 mutex_lock(&ha
->mq_lock
);
7473 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
7475 mutex_unlock(&ha
->mq_lock
);
7477 qla2x00_mark_all_devices_lost(vha
);
7479 spin_lock_irqsave(&ha
->vport_slock
, flags
);
7480 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
7481 atomic_inc(&vp
->vref_count
);
7482 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
7483 qla2x00_mark_all_devices_lost(vp
);
7484 spin_lock_irqsave(&ha
->vport_slock
, flags
);
7485 atomic_dec(&vp
->vref_count
);
7487 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
7489 /* Clear all async request states across all VPs. */
7490 list_for_each_entry(fcport
, &vha
->vp_fcports
, list
)
7491 fcport
->flags
&= ~(FCF_LOGIN_NEEDED
| FCF_ASYNC_SENT
);
7493 spin_lock_irqsave(&ha
->vport_slock
, flags
);
7494 list_for_each_entry(vp
, &ha
->vp_list
, list
) {
7495 atomic_inc(&vp
->vref_count
);
7496 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
7497 list_for_each_entry(fcport
, &vp
->vp_fcports
, list
)
7498 fcport
->flags
&= ~(FCF_LOGIN_NEEDED
| FCF_ASYNC_SENT
);
7499 spin_lock_irqsave(&ha
->vport_slock
, flags
);
7500 atomic_dec(&vp
->vref_count
);
7502 spin_unlock_irqrestore(&ha
->vport_slock
, flags
);
7506 static pci_ers_result_t
7507 qla2xxx_pci_error_detected(struct pci_dev
*pdev
, pci_channel_state_t state
)
7509 scsi_qla_host_t
*vha
= pci_get_drvdata(pdev
);
7510 struct qla_hw_data
*ha
= vha
->hw
;
7512 ql_dbg(ql_dbg_aer
, vha
, 0x9000,
7513 "PCI error detected, state %x.\n", state
);
7515 if (!atomic_read(&pdev
->enable_cnt
)) {
7516 ql_log(ql_log_info
, vha
, 0xffff,
7517 "PCI device is disabled,state %x\n", state
);
7518 return PCI_ERS_RESULT_NEED_RESET
;
7522 case pci_channel_io_normal
:
7523 ha
->flags
.eeh_busy
= 0;
7524 if (ql2xmqsupport
|| ql2xnvmeenable
) {
7525 set_bit(QPAIR_ONLINE_CHECK_NEEDED
, &vha
->dpc_flags
);
7526 qla2xxx_wake_dpc(vha
);
7528 return PCI_ERS_RESULT_CAN_RECOVER
;
7529 case pci_channel_io_frozen
:
7530 ha
->flags
.eeh_busy
= 1;
7531 qla_pci_error_cleanup(vha
);
7532 return PCI_ERS_RESULT_NEED_RESET
;
7533 case pci_channel_io_perm_failure
:
7534 ha
->flags
.pci_channel_io_perm_failure
= 1;
7535 qla2x00_abort_all_cmds(vha
, DID_NO_CONNECT
<< 16);
7536 if (ql2xmqsupport
|| ql2xnvmeenable
) {
7537 set_bit(QPAIR_ONLINE_CHECK_NEEDED
, &vha
->dpc_flags
);
7538 qla2xxx_wake_dpc(vha
);
7540 return PCI_ERS_RESULT_DISCONNECT
;
7542 return PCI_ERS_RESULT_NEED_RESET
;
7545 static pci_ers_result_t
7546 qla2xxx_pci_mmio_enabled(struct pci_dev
*pdev
)
7548 int risc_paused
= 0;
7550 unsigned long flags
;
7551 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7552 struct qla_hw_data
*ha
= base_vha
->hw
;
7553 struct device_reg_2xxx __iomem
*reg
= &ha
->iobase
->isp
;
7554 struct device_reg_24xx __iomem
*reg24
= &ha
->iobase
->isp24
;
7557 return PCI_ERS_RESULT_RECOVERED
;
7559 spin_lock_irqsave(&ha
->hardware_lock
, flags
);
7560 if (IS_QLA2100(ha
) || IS_QLA2200(ha
)){
7561 stat
= RD_REG_DWORD(®
->hccr
);
7562 if (stat
& HCCR_RISC_PAUSE
)
7564 } else if (IS_QLA23XX(ha
)) {
7565 stat
= RD_REG_DWORD(®
->u
.isp2300
.host_status
);
7566 if (stat
& HSR_RISC_PAUSED
)
7568 } else if (IS_FWI2_CAPABLE(ha
)) {
7569 stat
= RD_REG_DWORD(®24
->host_status
);
7570 if (stat
& HSRX_RISC_PAUSED
)
7573 spin_unlock_irqrestore(&ha
->hardware_lock
, flags
);
7576 ql_log(ql_log_info
, base_vha
, 0x9003,
7577 "RISC paused -- mmio_enabled, Dumping firmware.\n");
7578 qla2xxx_dump_fw(base_vha
);
7580 return PCI_ERS_RESULT_NEED_RESET
;
7582 return PCI_ERS_RESULT_RECOVERED
;
7585 static pci_ers_result_t
7586 qla2xxx_pci_slot_reset(struct pci_dev
*pdev
)
7588 pci_ers_result_t ret
= PCI_ERS_RESULT_DISCONNECT
;
7589 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7590 struct qla_hw_data
*ha
= base_vha
->hw
;
7592 struct qla_qpair
*qpair
= NULL
;
7594 ql_dbg(ql_dbg_aer
, base_vha
, 0x9004,
7597 /* Workaround: qla2xxx driver which access hardware earlier
7598 * needs error state to be pci_channel_io_online.
7599 * Otherwise mailbox command timesout.
7601 pdev
->error_state
= pci_channel_io_normal
;
7603 pci_restore_state(pdev
);
7605 /* pci_restore_state() clears the saved_state flag of the device
7606 * save restored state which resets saved_state flag
7608 pci_save_state(pdev
);
7611 rc
= pci_enable_device_mem(pdev
);
7613 rc
= pci_enable_device(pdev
);
7616 ql_log(ql_log_warn
, base_vha
, 0x9005,
7617 "Can't re-enable PCI device after reset.\n");
7618 goto exit_slot_reset
;
7622 if (ha
->isp_ops
->pci_config(base_vha
))
7623 goto exit_slot_reset
;
7625 mutex_lock(&ha
->mq_lock
);
7626 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
7628 mutex_unlock(&ha
->mq_lock
);
7630 base_vha
->flags
.online
= 1;
7631 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7632 if (ha
->isp_ops
->abort_isp(base_vha
) == QLA_SUCCESS
)
7633 ret
= PCI_ERS_RESULT_RECOVERED
;
7634 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7638 ql_dbg(ql_dbg_aer
, base_vha
, 0x900e,
7639 "slot_reset return %x.\n", ret
);
7645 qla2xxx_pci_resume(struct pci_dev
*pdev
)
7647 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7648 struct qla_hw_data
*ha
= base_vha
->hw
;
7651 ql_dbg(ql_dbg_aer
, base_vha
, 0x900f,
7654 ha
->flags
.eeh_busy
= 0;
7656 ret
= qla2x00_wait_for_hba_online(base_vha
);
7657 if (ret
!= QLA_SUCCESS
) {
7658 ql_log(ql_log_fatal
, base_vha
, 0x9002,
7659 "The device failed to resume I/O from slot/link_reset.\n");
7664 qla_pci_reset_prepare(struct pci_dev
*pdev
)
7666 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7667 struct qla_hw_data
*ha
= base_vha
->hw
;
7668 struct qla_qpair
*qpair
;
7670 ql_log(ql_log_warn
, base_vha
, 0xffff,
7674 * PCI FLR/function reset is about to reset the
7675 * slot. Stop the chip to stop all DMA access.
7676 * It is assumed that pci_reset_done will be called
7677 * after FLR to resume Chip operation.
7679 ha
->flags
.eeh_busy
= 1;
7680 mutex_lock(&ha
->mq_lock
);
7681 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
7683 mutex_unlock(&ha
->mq_lock
);
7685 set_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7686 qla2x00_abort_isp_cleanup(base_vha
);
7687 qla2x00_abort_all_cmds(base_vha
, DID_RESET
<< 16);
7691 qla_pci_reset_done(struct pci_dev
*pdev
)
7693 scsi_qla_host_t
*base_vha
= pci_get_drvdata(pdev
);
7694 struct qla_hw_data
*ha
= base_vha
->hw
;
7695 struct qla_qpair
*qpair
;
7697 ql_log(ql_log_warn
, base_vha
, 0xffff,
7701 * FLR just completed by PCI layer. Resume adapter
7703 ha
->flags
.eeh_busy
= 0;
7704 mutex_lock(&ha
->mq_lock
);
7705 list_for_each_entry(qpair
, &base_vha
->qp_list
, qp_list_elem
)
7707 mutex_unlock(&ha
->mq_lock
);
7709 base_vha
->flags
.online
= 1;
7710 ha
->isp_ops
->abort_isp(base_vha
);
7711 clear_bit(ABORT_ISP_ACTIVE
, &base_vha
->dpc_flags
);
7714 static int qla2xxx_map_queues(struct Scsi_Host
*shost
)
7717 scsi_qla_host_t
*vha
= (scsi_qla_host_t
*)shost
->hostdata
;
7718 struct blk_mq_queue_map
*qmap
= &shost
->tag_set
.map
[HCTX_TYPE_DEFAULT
];
7720 if (USER_CTRL_IRQ(vha
->hw
) || !vha
->hw
->mqiobase
)
7721 rc
= blk_mq_map_queues(qmap
);
7723 rc
= blk_mq_pci_map_queues(qmap
, vha
->hw
->pdev
, vha
->irq_offset
);
7727 struct scsi_host_template qla2xxx_driver_template
= {
7728 .module
= THIS_MODULE
,
7729 .name
= QLA2XXX_DRIVER_NAME
,
7730 .queuecommand
= qla2xxx_queuecommand
,
7732 .eh_timed_out
= fc_eh_timed_out
,
7733 .eh_abort_handler
= qla2xxx_eh_abort
,
7734 .eh_device_reset_handler
= qla2xxx_eh_device_reset
,
7735 .eh_target_reset_handler
= qla2xxx_eh_target_reset
,
7736 .eh_bus_reset_handler
= qla2xxx_eh_bus_reset
,
7737 .eh_host_reset_handler
= qla2xxx_eh_host_reset
,
7739 .slave_configure
= qla2xxx_slave_configure
,
7741 .slave_alloc
= qla2xxx_slave_alloc
,
7742 .slave_destroy
= qla2xxx_slave_destroy
,
7743 .scan_finished
= qla2xxx_scan_finished
,
7744 .scan_start
= qla2xxx_scan_start
,
7745 .change_queue_depth
= scsi_change_queue_depth
,
7746 .map_queues
= qla2xxx_map_queues
,
7749 .sg_tablesize
= SG_ALL
,
7751 .max_sectors
= 0xFFFF,
7752 .shost_attrs
= qla2x00_host_attrs
,
7754 .supported_mode
= MODE_INITIATOR
,
7755 .track_queue_depth
= 1,
7756 .cmd_size
= sizeof(srb_t
),
7759 static const struct pci_error_handlers qla2xxx_err_handler
= {
7760 .error_detected
= qla2xxx_pci_error_detected
,
7761 .mmio_enabled
= qla2xxx_pci_mmio_enabled
,
7762 .slot_reset
= qla2xxx_pci_slot_reset
,
7763 .resume
= qla2xxx_pci_resume
,
7764 .reset_prepare
= qla_pci_reset_prepare
,
7765 .reset_done
= qla_pci_reset_done
,
7768 static struct pci_device_id qla2xxx_pci_tbl
[] = {
7769 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2100
) },
7770 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2200
) },
7771 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2300
) },
7772 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2312
) },
7773 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2322
) },
7774 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6312
) },
7775 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP6322
) },
7776 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2422
) },
7777 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2432
) },
7778 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8432
) },
7779 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5422
) },
7780 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP5432
) },
7781 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2532
) },
7782 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2031
) },
7783 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8001
) },
7784 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8021
) },
7785 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8031
) },
7786 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISPF001
) },
7787 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP8044
) },
7788 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2071
) },
7789 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2271
) },
7790 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2261
) },
7791 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2061
) },
7792 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2081
) },
7793 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2281
) },
7794 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2089
) },
7795 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP2289
) },
7798 MODULE_DEVICE_TABLE(pci
, qla2xxx_pci_tbl
);
7800 static struct pci_driver qla2xxx_pci_driver
= {
7801 .name
= QLA2XXX_DRIVER_NAME
,
7803 .owner
= THIS_MODULE
,
7805 .id_table
= qla2xxx_pci_tbl
,
7806 .probe
= qla2x00_probe_one
,
7807 .remove
= qla2x00_remove_one
,
7808 .shutdown
= qla2x00_shutdown
,
7809 .err_handler
= &qla2xxx_err_handler
,
7812 static const struct file_operations apidev_fops
= {
7813 .owner
= THIS_MODULE
,
7814 .llseek
= noop_llseek
,
7818 * qla2x00_module_init - Module initialization.
7821 qla2x00_module_init(void)
7825 BUILD_BUG_ON(sizeof(cmd_entry_t
) != 64);
7826 BUILD_BUG_ON(sizeof(cont_a64_entry_t
) != 64);
7827 BUILD_BUG_ON(sizeof(cont_entry_t
) != 64);
7828 BUILD_BUG_ON(sizeof(init_cb_t
) != 96);
7829 BUILD_BUG_ON(sizeof(ms_iocb_entry_t
) != 64);
7830 BUILD_BUG_ON(sizeof(request_t
) != 64);
7831 BUILD_BUG_ON(sizeof(struct access_chip_84xx
) != 64);
7832 BUILD_BUG_ON(sizeof(struct cmd_bidir
) != 64);
7833 BUILD_BUG_ON(sizeof(struct cmd_nvme
) != 64);
7834 BUILD_BUG_ON(sizeof(struct cmd_type_6
) != 64);
7835 BUILD_BUG_ON(sizeof(struct cmd_type_7
) != 64);
7836 BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00
) != 64);
7837 BUILD_BUG_ON(sizeof(struct cmd_type_crc_2
) != 64);
7838 BUILD_BUG_ON(sizeof(struct ct_entry_24xx
) != 64);
7839 BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw
) != 64);
7840 BUILD_BUG_ON(sizeof(struct els_entry_24xx
) != 64);
7841 BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00
) != 64);
7842 BUILD_BUG_ON(sizeof(struct init_cb_24xx
) != 128);
7843 BUILD_BUG_ON(sizeof(struct init_cb_81xx
) != 128);
7844 BUILD_BUG_ON(sizeof(struct pt_ls4_request
) != 64);
7845 BUILD_BUG_ON(sizeof(struct qla_flt_header
) != 8);
7846 BUILD_BUG_ON(sizeof(struct qla_flt_region
) != 16);
7847 BUILD_BUG_ON(sizeof(struct sns_cmd_pkt
) != 2064);
7848 BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx
) != 64);
7849 BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx
) != 56);
7851 /* Allocate cache for SRBs. */
7852 srb_cachep
= kmem_cache_create("qla2xxx_srbs", sizeof(srb_t
), 0,
7853 SLAB_HWCACHE_ALIGN
, NULL
);
7854 if (srb_cachep
== NULL
) {
7855 ql_log(ql_log_fatal
, NULL
, 0x0001,
7856 "Unable to allocate SRB cache...Failing load!.\n");
7860 /* Initialize target kmem_cache and mem_pools */
7864 } else if (ret
> 0) {
7866 * If initiator mode is explictly disabled by qlt_init(),
7867 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7868 * performing scsi_scan_target() during LOOP UP event.
7870 qla2xxx_transport_functions
.disable_target_scan
= 1;
7871 qla2xxx_transport_vport_functions
.disable_target_scan
= 1;
7874 /* Derive version string. */
7875 strcpy(qla2x00_version_str
, QLA2XXX_VERSION
);
7876 if (ql2xextended_error_logging
)
7877 strcat(qla2x00_version_str
, "-debug");
7878 if (ql2xextended_error_logging
== 1)
7879 ql2xextended_error_logging
= QL_DBG_DEFAULT1_MASK
;
7881 if (ql2x_ini_mode
== QLA2XXX_INI_MODE_DUAL
)
7882 qla_insert_tgt_attrs();
7884 qla2xxx_transport_template
=
7885 fc_attach_transport(&qla2xxx_transport_functions
);
7886 if (!qla2xxx_transport_template
) {
7887 ql_log(ql_log_fatal
, NULL
, 0x0002,
7888 "fc_attach_transport failed...Failing load!.\n");
7893 apidev_major
= register_chrdev(0, QLA2XXX_APIDEV
, &apidev_fops
);
7894 if (apidev_major
< 0) {
7895 ql_log(ql_log_fatal
, NULL
, 0x0003,
7896 "Unable to register char device %s.\n", QLA2XXX_APIDEV
);
7899 qla2xxx_transport_vport_template
=
7900 fc_attach_transport(&qla2xxx_transport_vport_functions
);
7901 if (!qla2xxx_transport_vport_template
) {
7902 ql_log(ql_log_fatal
, NULL
, 0x0004,
7903 "fc_attach_transport vport failed...Failing load!.\n");
7907 ql_log(ql_log_info
, NULL
, 0x0005,
7908 "QLogic Fibre Channel HBA Driver: %s.\n",
7909 qla2x00_version_str
);
7910 ret
= pci_register_driver(&qla2xxx_pci_driver
);
7912 ql_log(ql_log_fatal
, NULL
, 0x0006,
7913 "pci_register_driver failed...ret=%d Failing load!.\n",
7915 goto release_vport_transport
;
7919 release_vport_transport
:
7920 fc_release_transport(qla2xxx_transport_vport_template
);
7923 if (apidev_major
>= 0)
7924 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
7925 fc_release_transport(qla2xxx_transport_template
);
7931 kmem_cache_destroy(srb_cachep
);
7936 * qla2x00_module_exit - Module cleanup.
7939 qla2x00_module_exit(void)
7941 pci_unregister_driver(&qla2xxx_pci_driver
);
7942 qla2x00_release_firmware();
7943 kmem_cache_destroy(ctx_cachep
);
7944 fc_release_transport(qla2xxx_transport_vport_template
);
7945 if (apidev_major
>= 0)
7946 unregister_chrdev(apidev_major
, QLA2XXX_APIDEV
);
7947 fc_release_transport(qla2xxx_transport_template
);
7949 kmem_cache_destroy(srb_cachep
);
7952 module_init(qla2x00_module_init
);
7953 module_exit(qla2x00_module_exit
);
7955 MODULE_AUTHOR("QLogic Corporation");
7956 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7957 MODULE_LICENSE("GPL");
7958 MODULE_VERSION(QLA2XXX_VERSION
);
7959 MODULE_FIRMWARE(FW_FILE_ISP21XX
);
7960 MODULE_FIRMWARE(FW_FILE_ISP22XX
);
7961 MODULE_FIRMWARE(FW_FILE_ISP2300
);
7962 MODULE_FIRMWARE(FW_FILE_ISP2322
);
7963 MODULE_FIRMWARE(FW_FILE_ISP24XX
);
7964 MODULE_FIRMWARE(FW_FILE_ISP25XX
);