2 * Broadcom BCM63xx SPI controller support
4 * Copyright (C) 2009-2012 Florian Fainelli <florian@openwrt.org>
5 * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the
19 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/clk.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30 #include <linux/spi/spi.h>
31 #include <linux/completion.h>
32 #include <linux/err.h>
33 #include <linux/workqueue.h>
34 #include <linux/pm_runtime.h>
36 #include <bcm63xx_dev_spi.h>
38 #define PFX KBUILD_MODNAME
41 struct completion done
;
49 unsigned int msg_type_shift
;
50 unsigned int msg_ctl_width
;
53 const unsigned char *tx_ptr
;
54 unsigned char *rx_ptr
;
58 const u8 __iomem
*rx_io
;
63 struct platform_device
*pdev
;
66 static inline u8
bcm_spi_readb(struct bcm63xx_spi
*bs
,
69 return bcm_readb(bs
->regs
+ bcm63xx_spireg(offset
));
72 static inline u16
bcm_spi_readw(struct bcm63xx_spi
*bs
,
75 return bcm_readw(bs
->regs
+ bcm63xx_spireg(offset
));
78 static inline void bcm_spi_writeb(struct bcm63xx_spi
*bs
,
79 u8 value
, unsigned int offset
)
81 bcm_writeb(value
, bs
->regs
+ bcm63xx_spireg(offset
));
84 static inline void bcm_spi_writew(struct bcm63xx_spi
*bs
,
85 u16 value
, unsigned int offset
)
87 bcm_writew(value
, bs
->regs
+ bcm63xx_spireg(offset
));
90 static const unsigned bcm63xx_spi_freq_table
[SPI_CLK_MASK
][2] = {
91 { 20000000, SPI_CLK_20MHZ
},
92 { 12500000, SPI_CLK_12_50MHZ
},
93 { 6250000, SPI_CLK_6_250MHZ
},
94 { 3125000, SPI_CLK_3_125MHZ
},
95 { 1563000, SPI_CLK_1_563MHZ
},
96 { 781000, SPI_CLK_0_781MHZ
},
97 { 391000, SPI_CLK_0_391MHZ
}
100 static int bcm63xx_spi_check_transfer(struct spi_device
*spi
,
101 struct spi_transfer
*t
)
105 bits_per_word
= (t
) ? t
->bits_per_word
: spi
->bits_per_word
;
106 if (bits_per_word
!= 8) {
107 dev_err(&spi
->dev
, "%s, unsupported bits_per_word=%d\n",
108 __func__
, bits_per_word
);
112 if (spi
->chip_select
> spi
->master
->num_chipselect
) {
113 dev_err(&spi
->dev
, "%s, unsupported slave %d\n",
114 __func__
, spi
->chip_select
);
121 static void bcm63xx_spi_setup_transfer(struct spi_device
*spi
,
122 struct spi_transfer
*t
)
124 struct bcm63xx_spi
*bs
= spi_master_get_devdata(spi
->master
);
129 hz
= (t
) ? t
->speed_hz
: spi
->max_speed_hz
;
131 /* Find the closest clock configuration */
132 for (i
= 0; i
< SPI_CLK_MASK
; i
++) {
133 if (hz
>= bcm63xx_spi_freq_table
[i
][0]) {
134 clk_cfg
= bcm63xx_spi_freq_table
[i
][1];
139 /* No matching configuration found, default to lowest */
140 if (i
== SPI_CLK_MASK
)
141 clk_cfg
= SPI_CLK_0_391MHZ
;
143 /* clear existing clock configuration bits of the register */
144 reg
= bcm_spi_readb(bs
, SPI_CLK_CFG
);
145 reg
&= ~SPI_CLK_MASK
;
148 bcm_spi_writeb(bs
, reg
, SPI_CLK_CFG
);
149 dev_dbg(&spi
->dev
, "Setting clock register to %02x (hz %d)\n",
153 /* the spi->mode bits understood by this driver: */
154 #define MODEBITS (SPI_CPOL | SPI_CPHA)
156 static int bcm63xx_spi_setup(struct spi_device
*spi
)
158 struct bcm63xx_spi
*bs
;
161 bs
= spi_master_get_devdata(spi
->master
);
163 if (!spi
->bits_per_word
)
164 spi
->bits_per_word
= 8;
166 if (spi
->mode
& ~MODEBITS
) {
167 dev_err(&spi
->dev
, "%s, unsupported mode bits %x\n",
168 __func__
, spi
->mode
& ~MODEBITS
);
172 dev_dbg(&spi
->dev
, "%s, mode %d, %u bits/w, %u nsec/bit\n",
173 __func__
, spi
->mode
& MODEBITS
, spi
->bits_per_word
, 0);
178 /* Fill the TX FIFO with as many bytes as possible */
179 static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi
*bs
)
183 /* Fill the Tx FIFO with as many bytes as possible */
184 size
= bs
->remaining_bytes
< bs
->fifo_size
? bs
->remaining_bytes
:
186 memcpy_toio(bs
->tx_io
, bs
->tx_ptr
, size
);
187 bs
->remaining_bytes
-= size
;
190 static unsigned int bcm63xx_txrx_bufs(struct spi_device
*spi
,
191 struct spi_transfer
*t
)
193 struct bcm63xx_spi
*bs
= spi_master_get_devdata(spi
->master
);
197 /* Disable the CMD_DONE interrupt */
198 bcm_spi_writeb(bs
, 0, SPI_INT_MASK
);
200 dev_dbg(&spi
->dev
, "txrx: tx %p, rx %p, len %d\n",
201 t
->tx_buf
, t
->rx_buf
, t
->len
);
203 /* Transmitter is inhibited */
204 bs
->tx_ptr
= t
->tx_buf
;
205 bs
->rx_ptr
= t
->rx_buf
;
208 bs
->remaining_bytes
= t
->len
;
209 bcm63xx_spi_fill_tx_fifo(bs
);
212 init_completion(&bs
->done
);
214 /* Fill in the Message control register */
215 msg_ctl
= (t
->len
<< SPI_BYTE_CNT_SHIFT
);
217 if (t
->rx_buf
&& t
->tx_buf
)
218 msg_ctl
|= (SPI_FD_RW
<< bs
->msg_type_shift
);
220 msg_ctl
|= (SPI_HD_R
<< bs
->msg_type_shift
);
222 msg_ctl
|= (SPI_HD_W
<< bs
->msg_type_shift
);
224 switch (bs
->msg_ctl_width
) {
226 bcm_spi_writeb(bs
, msg_ctl
, SPI_MSG_CTL
);
229 bcm_spi_writew(bs
, msg_ctl
, SPI_MSG_CTL
);
233 /* Issue the transfer */
234 cmd
= SPI_CMD_START_IMMEDIATE
;
235 cmd
|= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT
);
236 cmd
|= (spi
->chip_select
<< SPI_CMD_DEVICE_ID_SHIFT
);
237 bcm_spi_writew(bs
, cmd
, SPI_CMD
);
239 /* Enable the CMD_DONE interrupt */
240 bcm_spi_writeb(bs
, SPI_INTR_CMD_DONE
, SPI_INT_MASK
);
242 return t
->len
- bs
->remaining_bytes
;
245 static int bcm63xx_spi_prepare_transfer(struct spi_master
*master
)
247 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
249 pm_runtime_get_sync(&bs
->pdev
->dev
);
254 static int bcm63xx_spi_unprepare_transfer(struct spi_master
*master
)
256 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
258 pm_runtime_put(&bs
->pdev
->dev
);
263 static int bcm63xx_spi_transfer_one(struct spi_master
*master
,
264 struct spi_message
*m
)
266 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
267 struct spi_transfer
*t
;
268 struct spi_device
*spi
= m
->spi
;
270 unsigned int timeout
= 0;
272 list_for_each_entry(t
, &m
->transfers
, transfer_list
) {
273 unsigned int len
= t
->len
;
276 status
= bcm63xx_spi_check_transfer(spi
, t
);
280 /* configure adapter for a new transfer */
281 bcm63xx_spi_setup_transfer(spi
, t
);
285 len
-= bcm63xx_txrx_bufs(spi
, t
);
287 timeout
= wait_for_completion_timeout(&bs
->done
, HZ
);
293 /* read out all data */
294 rx_tail
= bcm_spi_readb(bs
, SPI_RX_TAIL
);
296 /* Read out all the data */
298 memcpy_fromio(bs
->rx_ptr
, bs
->rx_io
, rx_tail
);
301 m
->actual_length
+= t
->len
;
305 spi_finalize_current_message(master
);
310 /* This driver supports single master mode only. Hence
311 * CMD_DONE is the only interrupt we care about
313 static irqreturn_t
bcm63xx_spi_interrupt(int irq
, void *dev_id
)
315 struct spi_master
*master
= (struct spi_master
*)dev_id
;
316 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
319 /* Read interupts and clear them immediately */
320 intr
= bcm_spi_readb(bs
, SPI_INT_STATUS
);
321 bcm_spi_writeb(bs
, SPI_INTR_CLEAR_ALL
, SPI_INT_STATUS
);
322 bcm_spi_writeb(bs
, 0, SPI_INT_MASK
);
324 /* A transfer completed */
325 if (intr
& SPI_INTR_CMD_DONE
)
332 static int __devinit
bcm63xx_spi_probe(struct platform_device
*pdev
)
335 struct device
*dev
= &pdev
->dev
;
336 struct bcm63xx_spi_pdata
*pdata
= pdev
->dev
.platform_data
;
338 struct spi_master
*master
;
340 struct bcm63xx_spi
*bs
;
343 r
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
345 dev_err(dev
, "no iomem\n");
350 irq
= platform_get_irq(pdev
, 0);
352 dev_err(dev
, "no irq\n");
357 clk
= clk_get(dev
, "spi");
359 dev_err(dev
, "no clock for device\n");
364 master
= spi_alloc_master(dev
, sizeof(*bs
));
366 dev_err(dev
, "out of memory\n");
371 bs
= spi_master_get_devdata(master
);
373 platform_set_drvdata(pdev
, master
);
376 if (!devm_request_mem_region(&pdev
->dev
, r
->start
,
377 resource_size(r
), PFX
)) {
378 dev_err(dev
, "iomem request failed\n");
383 bs
->regs
= devm_ioremap_nocache(&pdev
->dev
, r
->start
,
386 dev_err(dev
, "unable to ioremap regs\n");
393 bs
->fifo_size
= pdata
->fifo_size
;
395 ret
= devm_request_irq(&pdev
->dev
, irq
, bcm63xx_spi_interrupt
, 0,
398 dev_err(dev
, "unable to request irq\n");
402 master
->bus_num
= pdata
->bus_num
;
403 master
->num_chipselect
= pdata
->num_chipselect
;
404 master
->setup
= bcm63xx_spi_setup
;
405 master
->prepare_transfer_hardware
= bcm63xx_spi_prepare_transfer
;
406 master
->unprepare_transfer_hardware
= bcm63xx_spi_unprepare_transfer
;
407 master
->transfer_one_message
= bcm63xx_spi_transfer_one
;
408 master
->mode_bits
= MODEBITS
;
409 bs
->speed_hz
= pdata
->speed_hz
;
410 bs
->msg_type_shift
= pdata
->msg_type_shift
;
411 bs
->msg_ctl_width
= pdata
->msg_ctl_width
;
412 bs
->tx_io
= (u8
*)(bs
->regs
+ bcm63xx_spireg(SPI_MSG_DATA
));
413 bs
->rx_io
= (const u8
*)(bs
->regs
+ bcm63xx_spireg(SPI_RX_DATA
));
415 switch (bs
->msg_ctl_width
) {
420 dev_err(dev
, "unsupported MSG_CTL width: %d\n",
422 goto out_clk_disable
;
425 /* Initialize hardware */
427 bcm_spi_writeb(bs
, SPI_INTR_CLEAR_ALL
, SPI_INT_STATUS
);
429 /* register and we are done */
430 ret
= spi_register_master(master
);
432 dev_err(dev
, "spi register failed\n");
433 goto out_clk_disable
;
436 dev_info(dev
, "at 0x%08x (irq %d, FIFOs size %d)\n",
437 r
->start
, irq
, bs
->fifo_size
);
444 platform_set_drvdata(pdev
, NULL
);
445 spi_master_put(master
);
452 static int __devexit
bcm63xx_spi_remove(struct platform_device
*pdev
)
454 struct spi_master
*master
= spi_master_get(platform_get_drvdata(pdev
));
455 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
457 spi_unregister_master(master
);
459 /* reset spi block */
460 bcm_spi_writeb(bs
, 0, SPI_INT_MASK
);
463 clk_disable(bs
->clk
);
466 platform_set_drvdata(pdev
, 0);
468 spi_master_put(master
);
474 static int bcm63xx_spi_suspend(struct device
*dev
)
476 struct spi_master
*master
=
477 platform_get_drvdata(to_platform_device(dev
));
478 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
480 spi_master_suspend(master
);
482 clk_disable(bs
->clk
);
487 static int bcm63xx_spi_resume(struct device
*dev
)
489 struct spi_master
*master
=
490 platform_get_drvdata(to_platform_device(dev
));
491 struct bcm63xx_spi
*bs
= spi_master_get_devdata(master
);
495 spi_master_resume(master
);
500 static const struct dev_pm_ops bcm63xx_spi_pm_ops
= {
501 .suspend
= bcm63xx_spi_suspend
,
502 .resume
= bcm63xx_spi_resume
,
505 #define BCM63XX_SPI_PM_OPS (&bcm63xx_spi_pm_ops)
507 #define BCM63XX_SPI_PM_OPS NULL
510 static struct platform_driver bcm63xx_spi_driver
= {
512 .name
= "bcm63xx-spi",
513 .owner
= THIS_MODULE
,
514 .pm
= BCM63XX_SPI_PM_OPS
,
516 .probe
= bcm63xx_spi_probe
,
517 .remove
= __devexit_p(bcm63xx_spi_remove
),
520 module_platform_driver(bcm63xx_spi_driver
);
522 MODULE_ALIAS("platform:bcm63xx_spi");
523 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
524 MODULE_AUTHOR("Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>");
525 MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver");
526 MODULE_LICENSE("GPL");