2 * i.MX IPUv3 Graphics driver
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20 #include <linux/module.h>
21 #include <linux/export.h>
22 #include <linux/device.h>
23 #include <linux/platform_device.h>
25 #include <drm/drm_fb_helper.h>
26 #include <drm/drm_crtc_helper.h>
28 #include <linux/clk.h>
29 #include <drm/drm_gem_cma_helper.h>
30 #include <drm/drm_fb_cma_helper.h>
32 #include "ipu-v3/imx-ipu-v3.h"
35 #define DRIVER_DESC "i.MX IPUv3 Graphics"
37 struct ipu_framebuffer
{
38 struct drm_framebuffer base
;
45 struct drm_fb_helper fb_helper
;
46 struct ipu_framebuffer ifb
;
50 struct imx_drm_crtc
*imx_crtc
;
51 struct ipuv3_channel
*ipu_ch
;
54 struct dmfc_channel
*dmfc
;
57 struct ipu_priv
*ipu_priv
;
58 struct drm_pending_vblank_event
*page_flip_event
;
59 struct drm_framebuffer
*newfb
;
61 u32 interface_pix_fmt
;
62 unsigned long di_clkflags
;
67 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
69 static int calc_vref(struct drm_display_mode
*mode
)
71 unsigned long htotal
, vtotal
;
73 htotal
= mode
->htotal
;
74 vtotal
= mode
->vtotal
;
76 if (!htotal
|| !vtotal
)
79 return mode
->clock
* 1000 / vtotal
/ htotal
;
82 static int calc_bandwidth(struct drm_display_mode
*mode
, unsigned int vref
)
84 return mode
->hdisplay
* mode
->vdisplay
* vref
;
87 static void ipu_fb_enable(struct ipu_crtc
*ipu_crtc
)
89 if (ipu_crtc
->enabled
)
92 ipu_di_enable(ipu_crtc
->di
);
93 ipu_dmfc_enable_channel(ipu_crtc
->dmfc
);
94 ipu_idmac_enable_channel(ipu_crtc
->ipu_ch
);
95 ipu_dc_enable_channel(ipu_crtc
->dc
);
97 ipu_dp_enable_channel(ipu_crtc
->dp
);
99 ipu_crtc
->enabled
= 1;
102 static void ipu_fb_disable(struct ipu_crtc
*ipu_crtc
)
104 if (!ipu_crtc
->enabled
)
108 ipu_dp_disable_channel(ipu_crtc
->dp
);
109 ipu_dc_disable_channel(ipu_crtc
->dc
);
110 ipu_idmac_disable_channel(ipu_crtc
->ipu_ch
);
111 ipu_dmfc_disable_channel(ipu_crtc
->dmfc
);
112 ipu_di_disable(ipu_crtc
->di
);
114 ipu_crtc
->enabled
= 0;
117 static void ipu_crtc_dpms(struct drm_crtc
*crtc
, int mode
)
119 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
121 dev_dbg(ipu_crtc
->dev
, "%s mode: %d\n", __func__
, mode
);
124 case DRM_MODE_DPMS_ON
:
125 ipu_fb_enable(ipu_crtc
);
127 case DRM_MODE_DPMS_STANDBY
:
128 case DRM_MODE_DPMS_SUSPEND
:
129 case DRM_MODE_DPMS_OFF
:
130 ipu_fb_disable(ipu_crtc
);
135 static int ipu_page_flip(struct drm_crtc
*crtc
,
136 struct drm_framebuffer
*fb
,
137 struct drm_pending_vblank_event
*event
)
139 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
145 ret
= imx_drm_crtc_vblank_get(ipu_crtc
->imx_crtc
);
147 dev_dbg(ipu_crtc
->dev
, "failed to acquire vblank counter\n");
148 list_del(&event
->base
.link
);
153 ipu_crtc
->newfb
= fb
;
154 ipu_crtc
->page_flip_event
= event
;
159 static const struct drm_crtc_funcs ipu_crtc_funcs
= {
160 .set_config
= drm_crtc_helper_set_config
,
161 .destroy
= drm_crtc_cleanup
,
162 .page_flip
= ipu_page_flip
,
165 static int ipu_drm_set_base(struct drm_crtc
*crtc
, int x
, int y
)
167 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
168 struct drm_gem_cma_object
*cma_obj
;
169 struct drm_framebuffer
*fb
= crtc
->fb
;
172 cma_obj
= drm_fb_cma_get_gem_obj(fb
, 0);
174 DRM_LOG_KMS("entry is null.\n");
178 phys
= cma_obj
->paddr
;
179 phys
+= x
* (fb
->bits_per_pixel
>> 3);
180 phys
+= y
* fb
->pitches
[0];
182 dev_dbg(ipu_crtc
->dev
, "%s: phys: 0x%lx\n", __func__
, phys
);
183 dev_dbg(ipu_crtc
->dev
, "%s: xy: %dx%d\n", __func__
, x
, y
);
185 ipu_cpmem_set_stride(ipu_get_cpmem(ipu_crtc
->ipu_ch
), fb
->pitches
[0]);
186 ipu_cpmem_set_buffer(ipu_get_cpmem(ipu_crtc
->ipu_ch
),
192 static int ipu_crtc_mode_set(struct drm_crtc
*crtc
,
193 struct drm_display_mode
*orig_mode
,
194 struct drm_display_mode
*mode
,
196 struct drm_framebuffer
*old_fb
)
198 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
199 struct drm_framebuffer
*fb
= ipu_crtc
->base
.fb
;
201 struct ipu_di_signal_cfg sig_cfg
= {};
203 struct ipu_ch_param __iomem
*cpmem
= ipu_get_cpmem(ipu_crtc
->ipu_ch
);
207 dev_dbg(ipu_crtc
->dev
, "%s: mode->hdisplay: %d\n", __func__
,
209 dev_dbg(ipu_crtc
->dev
, "%s: mode->vdisplay: %d\n", __func__
,
212 ipu_ch_param_zero(cpmem
);
214 switch (fb
->pixel_format
) {
215 case DRM_FORMAT_XRGB8888
:
216 case DRM_FORMAT_ARGB8888
:
217 v4l2_fmt
= V4L2_PIX_FMT_RGB32
;
220 case DRM_FORMAT_RGB565
:
221 v4l2_fmt
= V4L2_PIX_FMT_RGB565
;
224 case DRM_FORMAT_RGB888
:
225 v4l2_fmt
= V4L2_PIX_FMT_RGB24
;
229 dev_err(ipu_crtc
->dev
, "unsupported pixel format 0x%08x\n",
234 out_pixel_fmt
= ipu_crtc
->interface_pix_fmt
;
236 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
237 sig_cfg
.interlaced
= 1;
238 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
239 sig_cfg
.Hsync_pol
= 1;
240 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
241 sig_cfg
.Vsync_pol
= 1;
243 sig_cfg
.enable_pol
= 1;
245 sig_cfg
.width
= mode
->hdisplay
;
246 sig_cfg
.height
= mode
->vdisplay
;
247 sig_cfg
.pixel_fmt
= out_pixel_fmt
;
248 sig_cfg
.h_start_width
= mode
->htotal
- mode
->hsync_end
;
249 sig_cfg
.h_sync_width
= mode
->hsync_end
- mode
->hsync_start
;
250 sig_cfg
.h_end_width
= mode
->hsync_start
- mode
->hdisplay
;
252 sig_cfg
.v_start_width
= mode
->vtotal
- mode
->vsync_end
;
253 sig_cfg
.v_sync_width
= mode
->vsync_end
- mode
->vsync_start
;
254 sig_cfg
.v_end_width
= mode
->vsync_start
- mode
->vdisplay
;
255 sig_cfg
.pixelclock
= mode
->clock
* 1000;
256 sig_cfg
.clkflags
= ipu_crtc
->di_clkflags
;
258 sig_cfg
.v_to_h_sync
= 0;
260 sig_cfg
.hsync_pin
= ipu_crtc
->di_hsync_pin
;
261 sig_cfg
.vsync_pin
= ipu_crtc
->di_vsync_pin
;
264 ret
= ipu_dp_setup_channel(ipu_crtc
->dp
, IPUV3_COLORSPACE_RGB
,
265 IPUV3_COLORSPACE_RGB
);
267 dev_err(ipu_crtc
->dev
,
268 "initializing display processor failed with %d\n",
272 ipu_dp_set_global_alpha(ipu_crtc
->dp
, 1, 0, 1);
275 ret
= ipu_dc_init_sync(ipu_crtc
->dc
, ipu_crtc
->di
, sig_cfg
.interlaced
,
276 out_pixel_fmt
, mode
->hdisplay
);
278 dev_err(ipu_crtc
->dev
,
279 "initializing display controller failed with %d\n",
284 ret
= ipu_di_init_sync_panel(ipu_crtc
->di
, &sig_cfg
);
286 dev_err(ipu_crtc
->dev
,
287 "initializing panel failed with %d\n", ret
);
291 ipu_cpmem_set_resolution(cpmem
, mode
->hdisplay
, mode
->vdisplay
);
292 ipu_cpmem_set_fmt(cpmem
, v4l2_fmt
);
293 ipu_cpmem_set_high_priority(ipu_crtc
->ipu_ch
);
295 ret
= ipu_dmfc_init_channel(ipu_crtc
->dmfc
, mode
->hdisplay
);
297 dev_err(ipu_crtc
->dev
,
298 "initializing dmfc channel failed with %d\n",
303 ret
= ipu_dmfc_alloc_bandwidth(ipu_crtc
->dmfc
,
304 calc_bandwidth(mode
, calc_vref(mode
)), 64);
306 dev_err(ipu_crtc
->dev
,
307 "allocating dmfc bandwidth failed with %d\n",
312 ipu_drm_set_base(crtc
, x
, y
);
317 static void ipu_crtc_handle_pageflip(struct ipu_crtc
*ipu_crtc
)
320 struct drm_device
*drm
= ipu_crtc
->base
.dev
;
322 spin_lock_irqsave(&drm
->event_lock
, flags
);
323 if (ipu_crtc
->page_flip_event
)
324 drm_send_vblank_event(drm
, -1, ipu_crtc
->page_flip_event
);
325 ipu_crtc
->page_flip_event
= NULL
;
326 imx_drm_crtc_vblank_put(ipu_crtc
->imx_crtc
);
327 spin_unlock_irqrestore(&drm
->event_lock
, flags
);
330 static irqreturn_t
ipu_irq_handler(int irq
, void *dev_id
)
332 struct ipu_crtc
*ipu_crtc
= dev_id
;
334 imx_drm_handle_vblank(ipu_crtc
->imx_crtc
);
336 if (ipu_crtc
->newfb
) {
337 ipu_crtc
->base
.fb
= ipu_crtc
->newfb
;
338 ipu_crtc
->newfb
= NULL
;
339 ipu_drm_set_base(&ipu_crtc
->base
, 0, 0);
340 ipu_crtc_handle_pageflip(ipu_crtc
);
346 static bool ipu_crtc_mode_fixup(struct drm_crtc
*crtc
,
347 const struct drm_display_mode
*mode
,
348 struct drm_display_mode
*adjusted_mode
)
353 static void ipu_crtc_prepare(struct drm_crtc
*crtc
)
355 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
357 ipu_fb_disable(ipu_crtc
);
360 static void ipu_crtc_commit(struct drm_crtc
*crtc
)
362 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
364 ipu_fb_enable(ipu_crtc
);
367 static void ipu_crtc_load_lut(struct drm_crtc
*crtc
)
371 static struct drm_crtc_helper_funcs ipu_helper_funcs
= {
372 .dpms
= ipu_crtc_dpms
,
373 .mode_fixup
= ipu_crtc_mode_fixup
,
374 .mode_set
= ipu_crtc_mode_set
,
375 .prepare
= ipu_crtc_prepare
,
376 .commit
= ipu_crtc_commit
,
377 .load_lut
= ipu_crtc_load_lut
,
380 static int ipu_enable_vblank(struct drm_crtc
*crtc
)
382 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
384 enable_irq(ipu_crtc
->irq
);
389 static void ipu_disable_vblank(struct drm_crtc
*crtc
)
391 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
393 disable_irq(ipu_crtc
->irq
);
396 static int ipu_set_interface_pix_fmt(struct drm_crtc
*crtc
, u32 encoder_type
,
397 u32 pixfmt
, int hsync_pin
, int vsync_pin
)
399 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
401 ipu_crtc
->interface_pix_fmt
= pixfmt
;
402 ipu_crtc
->di_hsync_pin
= hsync_pin
;
403 ipu_crtc
->di_vsync_pin
= vsync_pin
;
405 switch (encoder_type
) {
406 case DRM_MODE_ENCODER_DAC
:
407 case DRM_MODE_ENCODER_TVDAC
:
408 case DRM_MODE_ENCODER_LVDS
:
409 ipu_crtc
->di_clkflags
= IPU_DI_CLKMODE_SYNC
|
412 case DRM_MODE_ENCODER_NONE
:
413 ipu_crtc
->di_clkflags
= 0;
420 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs
= {
421 .enable_vblank
= ipu_enable_vblank
,
422 .disable_vblank
= ipu_disable_vblank
,
423 .set_interface_pix_fmt
= ipu_set_interface_pix_fmt
,
424 .crtc_funcs
= &ipu_crtc_funcs
,
425 .crtc_helper_funcs
= &ipu_helper_funcs
,
428 static void ipu_put_resources(struct ipu_crtc
*ipu_crtc
)
430 if (!IS_ERR_OR_NULL(ipu_crtc
->ipu_ch
))
431 ipu_idmac_put(ipu_crtc
->ipu_ch
);
432 if (!IS_ERR_OR_NULL(ipu_crtc
->dmfc
))
433 ipu_dmfc_put(ipu_crtc
->dmfc
);
434 if (!IS_ERR_OR_NULL(ipu_crtc
->dp
))
435 ipu_dp_put(ipu_crtc
->dp
);
436 if (!IS_ERR_OR_NULL(ipu_crtc
->di
))
437 ipu_di_put(ipu_crtc
->di
);
440 static int ipu_get_resources(struct ipu_crtc
*ipu_crtc
,
441 struct ipu_client_platformdata
*pdata
)
443 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
446 ipu_crtc
->ipu_ch
= ipu_idmac_get(ipu
, pdata
->dma
[0]);
447 if (IS_ERR(ipu_crtc
->ipu_ch
)) {
448 ret
= PTR_ERR(ipu_crtc
->ipu_ch
);
452 ipu_crtc
->dc
= ipu_dc_get(ipu
, pdata
->dc
);
453 if (IS_ERR(ipu_crtc
->dc
)) {
454 ret
= PTR_ERR(ipu_crtc
->dc
);
458 ipu_crtc
->dmfc
= ipu_dmfc_get(ipu
, pdata
->dma
[0]);
459 if (IS_ERR(ipu_crtc
->dmfc
)) {
460 ret
= PTR_ERR(ipu_crtc
->dmfc
);
464 if (pdata
->dp
>= 0) {
465 ipu_crtc
->dp
= ipu_dp_get(ipu
, pdata
->dp
);
466 if (IS_ERR(ipu_crtc
->dp
)) {
467 ret
= PTR_ERR(ipu_crtc
->dp
);
472 ipu_crtc
->di
= ipu_di_get(ipu
, pdata
->di
);
473 if (IS_ERR(ipu_crtc
->di
)) {
474 ret
= PTR_ERR(ipu_crtc
->di
);
480 ipu_put_resources(ipu_crtc
);
485 static int ipu_crtc_init(struct ipu_crtc
*ipu_crtc
,
486 struct ipu_client_platformdata
*pdata
)
488 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
491 ret
= ipu_get_resources(ipu_crtc
, pdata
);
493 dev_err(ipu_crtc
->dev
, "getting resources failed with %d.\n",
498 ret
= imx_drm_add_crtc(&ipu_crtc
->base
,
500 &ipu_crtc_helper_funcs
, THIS_MODULE
,
501 ipu_crtc
->dev
->parent
->of_node
, pdata
->di
);
503 dev_err(ipu_crtc
->dev
, "adding crtc failed with %d.\n", ret
);
504 goto err_put_resources
;
507 ipu_crtc
->irq
= ipu_idmac_channel_irq(ipu
, ipu_crtc
->ipu_ch
,
509 ret
= devm_request_irq(ipu_crtc
->dev
, ipu_crtc
->irq
, ipu_irq_handler
, 0,
510 "imx_drm", ipu_crtc
);
512 dev_err(ipu_crtc
->dev
, "irq request failed with %d.\n", ret
);
513 goto err_put_resources
;
516 disable_irq(ipu_crtc
->irq
);
521 ipu_put_resources(ipu_crtc
);
526 static int ipu_drm_probe(struct platform_device
*pdev
)
528 struct ipu_client_platformdata
*pdata
= pdev
->dev
.platform_data
;
529 struct ipu_crtc
*ipu_crtc
;
535 pdev
->dev
.coherent_dma_mask
= DMA_BIT_MASK(32);
537 ipu_crtc
= devm_kzalloc(&pdev
->dev
, sizeof(*ipu_crtc
), GFP_KERNEL
);
541 ipu_crtc
->dev
= &pdev
->dev
;
543 ret
= ipu_crtc_init(ipu_crtc
, pdata
);
547 platform_set_drvdata(pdev
, ipu_crtc
);
552 static int ipu_drm_remove(struct platform_device
*pdev
)
554 struct ipu_crtc
*ipu_crtc
= platform_get_drvdata(pdev
);
556 imx_drm_remove_crtc(ipu_crtc
->imx_crtc
);
558 ipu_put_resources(ipu_crtc
);
563 static struct platform_driver ipu_drm_driver
= {
565 .name
= "imx-ipuv3-crtc",
567 .probe
= ipu_drm_probe
,
568 .remove
= ipu_drm_remove
,
570 module_platform_driver(ipu_drm_driver
);
572 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
573 MODULE_DESCRIPTION(DRIVER_DESC
);
574 MODULE_LICENSE("GPL");