2 * LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
4 * lirc_sir - Device driver for use with SIR (serial infra red)
5 * mode of IrDA on many notebooks.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
23 * added timeout and relaxed pulse detection, removed gap bug
25 * 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
26 * added support for Tekram Irmate 210 (sending does not work yet,
27 * kind of disappointing that nobody was able to implement that
31 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
32 * added support for StrongARM SA1100 embedded microprocessor
33 * parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
36 #include <linux/module.h>
37 #include <linux/sched.h>
38 #include <linux/errno.h>
39 #include <linux/signal.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/serial_reg.h>
45 #include <linux/time.h>
46 #include <linux/string.h>
47 #include <linux/types.h>
48 #include <linux/wait.h>
50 #include <linux/delay.h>
51 #include <linux/poll.h>
52 #include <asm/system.h>
55 #include <linux/fcntl.h>
57 #include <asm/hardware.h>
58 #ifdef CONFIG_SA1100_COLLIE
59 #include <asm/arch/tc35143.h>
60 #include <asm/ucb1200.h>
64 #include <linux/timer.h>
66 #include <media/lirc.h>
67 #include <media/lirc_dev.h>
69 /* SECTION: Definitions */
71 /*** Tekram dongle ***/
72 #ifdef LIRC_SIR_TEKRAM
73 /* stolen from kernel source */
74 /* definitions for Tekram dongle */
75 #define TEKRAM_115200 0x00
76 #define TEKRAM_57600 0x01
77 #define TEKRAM_38400 0x02
78 #define TEKRAM_19200 0x03
79 #define TEKRAM_9600 0x04
80 #define TEKRAM_2400 0x08
82 #define TEKRAM_PW 0x10 /* Pulse select bit */
84 /* 10bit * 1s/115200bit in milliseconds = 87ms*/
85 #define TIME_CONST (10000000ul/115200ul)
89 #ifdef LIRC_SIR_ACTISYS_ACT200L
90 static void init_act200(void);
91 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
92 static void init_act220(void);
97 struct sa1100_ser2_registers
{
98 /* HSSP control register */
111 static int irq
= IRQ_Ser2ICP
;
113 #define LIRC_ON_SA1100_TRANSMITTER_LATENCY 0
115 /* pulse/space ratio of 50/50 */
116 static unsigned long pulse_width
= (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY
);
117 /* 1000000/freq-pulse_width */
118 static unsigned long space_width
= (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY
);
119 static unsigned int freq
= 38000; /* modulation frequency */
120 static unsigned int duty_cycle
= 50; /* duty cycle of 50% */
124 #define RBUF_LEN 1024
125 #define WBUF_LEN 1024
127 #define LIRC_DRIVER_NAME "lirc_sir"
131 #ifndef LIRC_SIR_TEKRAM
132 /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
133 #define TIME_CONST (9000000ul/115200ul)
137 /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
138 #define SIR_TIMEOUT (HZ*5/100)
140 #ifndef LIRC_ON_SA1100
145 /* for external dongles, default to com1 */
146 #if defined(LIRC_SIR_ACTISYS_ACT200L) || \
147 defined(LIRC_SIR_ACTISYS_ACT220L) || \
148 defined(LIRC_SIR_TEKRAM)
149 #define LIRC_PORT 0x3f8
151 /* onboard sir ports are typically com3 */
152 #define LIRC_PORT 0x3e8
156 static int io
= LIRC_PORT
;
157 static int irq
= LIRC_IRQ
;
158 static int threshold
= 3;
161 static DEFINE_SPINLOCK(timer_lock
);
162 static struct timer_list timerlist
;
163 /* time of last signal change detected */
164 static struct timeval last_tv
= {0, 0};
165 /* time of last UART data ready interrupt */
166 static struct timeval last_intr_tv
= {0, 0};
167 static int last_value
;
169 static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue
);
171 static DEFINE_SPINLOCK(hardware_lock
);
173 static int rx_buf
[RBUF_LEN
];
174 static unsigned int rx_tail
, rx_head
;
177 #define dprintk(fmt, args...) \
180 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
184 /* SECTION: Prototypes */
186 /* Communication with user-space */
187 static unsigned int lirc_poll(struct file
*file
, poll_table
*wait
);
188 static ssize_t
lirc_read(struct file
*file
, char *buf
, size_t count
,
190 static ssize_t
lirc_write(struct file
*file
, const char *buf
, size_t n
,
192 static long lirc_ioctl(struct file
*filep
, unsigned int cmd
, unsigned long arg
);
193 static void add_read_queue(int flag
, unsigned long val
);
194 static int init_chrdev(void);
195 static void drop_chrdev(void);
197 static irqreturn_t
sir_interrupt(int irq
, void *dev_id
);
198 static void send_space(unsigned long len
);
199 static void send_pulse(unsigned long len
);
200 static int init_hardware(void);
201 static void drop_hardware(void);
203 static int init_port(void);
204 static void drop_port(void);
206 #ifdef LIRC_ON_SA1100
212 static void off(void)
217 static inline unsigned int sinp(int offset
)
219 return inb(io
+ offset
);
222 static inline void soutp(int offset
, int value
)
224 outb(value
, io
+ offset
);
228 #ifndef MAX_UDELAY_MS
229 #define MAX_UDELAY_US 5000
231 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
234 static void safe_udelay(unsigned long usecs
)
236 while (usecs
> MAX_UDELAY_US
) {
237 udelay(MAX_UDELAY_US
);
238 usecs
-= MAX_UDELAY_US
;
243 /* SECTION: Communication with user-space */
245 static unsigned int lirc_poll(struct file
*file
, poll_table
*wait
)
247 poll_wait(file
, &lirc_read_queue
, wait
);
248 if (rx_head
!= rx_tail
)
249 return POLLIN
| POLLRDNORM
;
253 static ssize_t
lirc_read(struct file
*file
, char *buf
, size_t count
,
258 DECLARE_WAITQUEUE(wait
, current
);
260 if (count
% sizeof(int))
263 add_wait_queue(&lirc_read_queue
, &wait
);
264 set_current_state(TASK_INTERRUPTIBLE
);
266 if (rx_head
!= rx_tail
) {
267 if (copy_to_user((void *) buf
+ n
,
268 (void *) (rx_buf
+ rx_head
),
273 rx_head
= (rx_head
+ 1) & (RBUF_LEN
- 1);
276 if (file
->f_flags
& O_NONBLOCK
) {
280 if (signal_pending(current
)) {
281 retval
= -ERESTARTSYS
;
285 set_current_state(TASK_INTERRUPTIBLE
);
288 remove_wait_queue(&lirc_read_queue
, &wait
);
289 set_current_state(TASK_RUNNING
);
290 return n
? n
: retval
;
292 static ssize_t
lirc_write(struct file
*file
, const char *buf
, size_t n
,
299 count
= n
/ sizeof(int);
300 if (n
% sizeof(int) || count
% 2 == 0)
302 tx_buf
= memdup_user(buf
, n
);
304 return PTR_ERR(tx_buf
);
306 #ifdef LIRC_ON_SA1100
307 /* disable receiver */
310 local_irq_save(flags
);
315 send_pulse(tx_buf
[i
]);
320 send_space(tx_buf
[i
]);
323 local_irq_restore(flags
);
324 #ifdef LIRC_ON_SA1100
326 udelay(1000); /* wait 1ms for IR diode to recover */
328 /* clear status register to prevent unwanted interrupts */
329 Ser2UTSR0
&= (UTSR0_RID
| UTSR0_RBB
| UTSR0_REB
);
330 /* enable receiver */
331 Ser2UTCR3
= UTCR3_RXE
|UTCR3_RIE
;
336 static long lirc_ioctl(struct file
*filep
, unsigned int cmd
, unsigned long arg
)
340 #ifdef LIRC_ON_SA1100
342 if (cmd
== LIRC_GET_FEATURES
)
343 value
= LIRC_CAN_SEND_PULSE
|
344 LIRC_CAN_SET_SEND_DUTY_CYCLE
|
345 LIRC_CAN_SET_SEND_CARRIER
|
347 else if (cmd
== LIRC_GET_SEND_MODE
)
348 value
= LIRC_MODE_PULSE
;
349 else if (cmd
== LIRC_GET_REC_MODE
)
350 value
= LIRC_MODE_MODE2
;
352 if (cmd
== LIRC_GET_FEATURES
)
353 value
= LIRC_CAN_SEND_PULSE
| LIRC_CAN_REC_MODE2
;
354 else if (cmd
== LIRC_GET_SEND_MODE
)
355 value
= LIRC_MODE_PULSE
;
356 else if (cmd
== LIRC_GET_REC_MODE
)
357 value
= LIRC_MODE_MODE2
;
361 case LIRC_GET_FEATURES
:
362 case LIRC_GET_SEND_MODE
:
363 case LIRC_GET_REC_MODE
:
364 retval
= put_user(value
, (__u32
*) arg
);
367 case LIRC_SET_SEND_MODE
:
368 case LIRC_SET_REC_MODE
:
369 retval
= get_user(value
, (__u32
*) arg
);
371 #ifdef LIRC_ON_SA1100
372 case LIRC_SET_SEND_DUTY_CYCLE
:
373 retval
= get_user(value
, (__u32
*) arg
);
376 if (value
<= 0 || value
> 100)
378 /* (value/100)*(1000000/freq) */
380 pulse_width
= (unsigned long) duty_cycle
*10000/freq
;
381 space_width
= (unsigned long) 1000000L/freq
-pulse_width
;
382 if (pulse_width
>= LIRC_ON_SA1100_TRANSMITTER_LATENCY
)
383 pulse_width
-= LIRC_ON_SA1100_TRANSMITTER_LATENCY
;
384 if (space_width
>= LIRC_ON_SA1100_TRANSMITTER_LATENCY
)
385 space_width
-= LIRC_ON_SA1100_TRANSMITTER_LATENCY
;
387 case LIRC_SET_SEND_CARRIER
:
388 retval
= get_user(value
, (__u32
*) arg
);
391 if (value
> 500000 || value
< 20000)
394 pulse_width
= (unsigned long) duty_cycle
*10000/freq
;
395 space_width
= (unsigned long) 1000000L/freq
-pulse_width
;
396 if (pulse_width
>= LIRC_ON_SA1100_TRANSMITTER_LATENCY
)
397 pulse_width
-= LIRC_ON_SA1100_TRANSMITTER_LATENCY
;
398 if (space_width
>= LIRC_ON_SA1100_TRANSMITTER_LATENCY
)
399 space_width
-= LIRC_ON_SA1100_TRANSMITTER_LATENCY
;
403 retval
= -ENOIOCTLCMD
;
409 if (cmd
== LIRC_SET_REC_MODE
) {
410 if (value
!= LIRC_MODE_MODE2
)
412 } else if (cmd
== LIRC_SET_SEND_MODE
) {
413 if (value
!= LIRC_MODE_PULSE
)
420 static void add_read_queue(int flag
, unsigned long val
)
422 unsigned int new_rx_tail
;
425 dprintk("add flag %d with val %lu\n", flag
, val
);
427 newval
= val
& PULSE_MASK
;
430 * statistically, pulses are ~TIME_CONST/2 too long. we could
431 * maybe make this more exact, but this is good enough
435 if (newval
> TIME_CONST
/2)
436 newval
-= TIME_CONST
/2;
437 else /* should not ever happen */
441 newval
+= TIME_CONST
/2;
443 new_rx_tail
= (rx_tail
+ 1) & (RBUF_LEN
- 1);
444 if (new_rx_tail
== rx_head
) {
445 dprintk("Buffer overrun.\n");
448 rx_buf
[rx_tail
] = newval
;
449 rx_tail
= new_rx_tail
;
450 wake_up_interruptible(&lirc_read_queue
);
453 static const struct file_operations lirc_fops
= {
454 .owner
= THIS_MODULE
,
458 .unlocked_ioctl
= lirc_ioctl
,
460 .compat_ioctl
= lirc_ioctl
,
462 .open
= lirc_dev_fop_open
,
463 .release
= lirc_dev_fop_close
,
467 static int set_use_inc(void *data
)
472 static void set_use_dec(void *data
)
476 static struct lirc_driver driver
= {
477 .name
= LIRC_DRIVER_NAME
,
483 .set_use_inc
= set_use_inc
,
484 .set_use_dec
= set_use_dec
,
487 .owner
= THIS_MODULE
,
491 static int init_chrdev(void)
493 driver
.minor
= lirc_register_driver(&driver
);
494 if (driver
.minor
< 0) {
495 printk(KERN_ERR LIRC_DRIVER_NAME
": init_chrdev() failed.\n");
501 static void drop_chrdev(void)
503 lirc_unregister_driver(driver
.minor
);
506 /* SECTION: Hardware */
507 static long delta(struct timeval
*tv1
, struct timeval
*tv2
)
511 deltv
= tv2
->tv_sec
- tv1
->tv_sec
;
515 deltv
= deltv
*1000000 +
521 static void sir_timeout(unsigned long data
)
524 * if last received signal was a pulse, but receiving stopped
525 * within the 9 bit frame, we need to finish this pulse and
526 * simulate a signal change to from pulse to space. Otherwise
527 * upper layers will receive two sequences next time.
531 unsigned long pulse_end
;
533 /* avoid interference with interrupt */
534 spin_lock_irqsave(&timer_lock
, flags
);
536 #ifndef LIRC_ON_SA1100
537 /* clear unread bits in UART and restart */
538 outb(UART_FCR_CLEAR_RCVR
, io
+ UART_FCR
);
540 /* determine 'virtual' pulse end: */
541 pulse_end
= delta(&last_tv
, &last_intr_tv
);
542 dprintk("timeout add %d for %lu usec\n", last_value
, pulse_end
);
543 add_read_queue(last_value
, pulse_end
);
545 last_tv
= last_intr_tv
;
547 spin_unlock_irqrestore(&timer_lock
, flags
);
550 static irqreturn_t
sir_interrupt(int irq
, void *dev_id
)
553 struct timeval curr_tv
;
554 static unsigned long deltv
;
555 #ifdef LIRC_ON_SA1100
561 * Deal with any receive errors first. The bytes in error may be
562 * the only bytes in the receive FIFO, so we do this first.
564 while (status
& UTSR0_EIF
) {
571 if (bstat
& UTSR1_FRE
)
572 dprintk("frame error\n");
573 if (bstat
& UTSR1_ROR
)
574 dprintk("receive fifo overrun\n");
575 if (bstat
& UTSR1_PRE
)
576 dprintk("parity error\n");
584 if (status
& (UTSR0_RFS
| UTSR0_RID
)) {
585 do_gettimeofday(&curr_tv
);
586 deltv
= delta(&last_tv
, &curr_tv
);
589 dprintk("%d data: %u\n", n
, (unsigned int) data
);
591 } while (status
& UTSR0_RID
&& /* do not empty fifo in order to
592 * get UTSR0_RID in any case */
593 Ser2UTSR1
& UTSR1_RNE
); /* data ready */
595 if (status
&UTSR0_RID
) {
596 add_read_queue(0 , deltv
- n
* TIME_CONST
); /*space*/
597 add_read_queue(1, n
* TIME_CONST
); /*pulse*/
603 if (status
& UTSR0_TFS
)
604 printk(KERN_ERR
"transmit fifo not full, shouldn't happen\n");
606 /* We must clear certain bits. */
607 status
&= (UTSR0_RID
| UTSR0_RBB
| UTSR0_REB
);
611 unsigned long deltintrtv
;
615 while ((iir
= inb(io
+ UART_IIR
) & UART_IIR_ID
)) {
616 switch (iir
&UART_IIR_ID
) { /* FIXME toto treba preriedit */
618 (void) inb(io
+ UART_MSR
);
621 (void) inb(io
+ UART_LSR
);
625 if (lsr
& UART_LSR_THRE
) /* FIFO is empty */
626 outb(data
, io
+ UART_TX
)
630 /* avoid interference with timer */
631 spin_lock_irqsave(&timer_lock
, flags
);
633 del_timer(&timerlist
);
634 data
= inb(io
+ UART_RX
);
635 do_gettimeofday(&curr_tv
);
636 deltv
= delta(&last_tv
, &curr_tv
);
637 deltintrtv
= delta(&last_intr_tv
, &curr_tv
);
638 dprintk("t %lu, d %d\n", deltintrtv
, (int)data
);
640 * if nothing came in last X cycles,
643 if (deltintrtv
> TIME_CONST
* threshold
) {
646 /* simulate signal change */
647 add_read_queue(last_value
,
654 last_intr_tv
.tv_usec
;
659 if (data
^ last_value
) {
661 * deltintrtv > 2*TIME_CONST, remember?
662 * the other case is timeout
664 add_read_queue(last_value
,
668 if (last_tv
.tv_usec
>= TIME_CONST
) {
669 last_tv
.tv_usec
-= TIME_CONST
;
672 last_tv
.tv_usec
+= 1000000 -
676 last_intr_tv
= curr_tv
;
679 * start timer for end of
682 timerlist
.expires
= jiffies
+
684 add_timer(&timerlist
);
687 lsr
= inb(io
+ UART_LSR
);
688 } while (lsr
& UART_LSR_DR
); /* data ready */
689 spin_unlock_irqrestore(&timer_lock
, flags
);
696 return IRQ_RETVAL(IRQ_HANDLED
);
699 #ifdef LIRC_ON_SA1100
700 static void send_pulse(unsigned long length
)
702 unsigned long k
, delay
;
708 * this won't give us the carrier frequency we really want
709 * due to integer arithmetic, but we can accept this inaccuracy
712 for (k
= flag
= 0; k
< length
; k
+= delay
, flag
= !flag
) {
725 static void send_space(unsigned long length
)
733 static void send_space(unsigned long len
)
738 static void send_pulse(unsigned long len
)
740 long bytes_out
= len
/ TIME_CONST
;
743 time_left
= (long)len
- (long)bytes_out
* (long)TIME_CONST
;
744 if (bytes_out
== 0) {
748 while (bytes_out
--) {
749 outb(PULSE
, io
+ UART_TX
);
750 /* FIXME treba seriozne cakanie z char/serial.c */
751 while (!(inb(io
+ UART_LSR
) & UART_LSR_THRE
))
756 safe_udelay(time_left
);
761 #ifdef CONFIG_SA1100_COLLIE
762 static int sa1100_irda_set_power_collie(int state
)
767 * 1 - short range, lowest power
768 * 2 - medium range, medium power
769 * 3 - maximum range, high power
771 ucb1200_set_io_direction(TC35143_GPIO_IR_ON
,
772 TC35143_IODIR_OUTPUT
);
773 ucb1200_set_io(TC35143_GPIO_IR_ON
, TC35143_IODAT_LOW
);
777 ucb1200_set_io_direction(TC35143_GPIO_IR_ON
,
778 TC35143_IODIR_OUTPUT
);
779 ucb1200_set_io(TC35143_GPIO_IR_ON
, TC35143_IODAT_HIGH
);
785 static int init_hardware(void)
789 spin_lock_irqsave(&hardware_lock
, flags
);
791 #ifdef LIRC_ON_SA1100
792 #ifdef CONFIG_SA1100_BITSY
793 if (machine_is_bitsy()) {
794 printk(KERN_INFO
"Power on IR module\n");
795 set_bitsy_egpio(EGPIO_BITSY_IR_ON
);
798 #ifdef CONFIG_SA1100_COLLIE
799 sa1100_irda_set_power_collie(3); /* power on */
801 sr
.hscr0
= Ser2HSCR0
;
803 sr
.utcr0
= Ser2UTCR0
;
804 sr
.utcr1
= Ser2UTCR1
;
805 sr
.utcr2
= Ser2UTCR2
;
806 sr
.utcr3
= Ser2UTCR3
;
807 sr
.utcr4
= Ser2UTCR4
;
810 sr
.utsr0
= Ser2UTSR0
;
811 sr
.utsr1
= Ser2UTSR1
;
817 /* set output to 0 */
820 /* Enable HP-SIR modulation, and ensure that the port is disabled. */
822 Ser2HSCR0
= sr
.hscr0
& (~HSCR0_HSSP
);
824 /* clear status register to prevent unwanted interrupts */
825 Ser2UTSR0
&= (UTSR0_RID
| UTSR0_RBB
| UTSR0_REB
);
828 Ser2UTCR0
= UTCR0_1StpBit
|UTCR0_7BitData
;
832 /* use HPSIR, 1.6 usec pulses */
833 Ser2UTCR4
= UTCR4_HPSIR
|UTCR4_Z1_6us
;
835 /* enable receiver, receive fifo interrupt */
836 Ser2UTCR3
= UTCR3_RXE
|UTCR3_RIE
;
838 /* clear status register to prevent unwanted interrupts */
839 Ser2UTSR0
&= (UTSR0_RID
| UTSR0_RBB
| UTSR0_REB
);
841 #elif defined(LIRC_SIR_TEKRAM)
849 soutp(UART_LCR
, sinp(UART_LCR
) & (~UART_LCR_DLAB
));
851 /* First of all, disable all interrupts */
852 soutp(UART_IER
, sinp(UART_IER
) &
853 (~(UART_IER_MSI
|UART_IER_RLSI
|UART_IER_THRI
|UART_IER_RDI
)));
856 soutp(UART_LCR
, sinp(UART_LCR
) | UART_LCR_DLAB
);
858 /* Set divisor to 12 => 9600 Baud */
863 soutp(UART_LCR
, sinp(UART_LCR
) & (~UART_LCR_DLAB
));
866 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_DTR
|UART_MCR_OUT2
);
867 safe_udelay(50*1000);
869 /* -DTR low -> reset PIC */
870 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_OUT2
);
873 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_DTR
|UART_MCR_OUT2
);
877 /* -RTS low -> send control byte */
878 soutp(UART_MCR
, UART_MCR_DTR
|UART_MCR_OUT2
);
880 soutp(UART_TX
, TEKRAM_115200
|TEKRAM_PW
);
882 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
885 /* back to normal operation */
886 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_DTR
|UART_MCR_OUT2
);
891 /* read previous control byte */
892 printk(KERN_INFO LIRC_DRIVER_NAME
893 ": 0x%02x\n", sinp(UART_RX
));
896 soutp(UART_LCR
, sinp(UART_LCR
) | UART_LCR_DLAB
);
898 /* Set divisor to 1 => 115200 Baud */
902 /* Set DLAB 0, 8 Bit */
903 soutp(UART_LCR
, UART_LCR_WLEN8
);
904 /* enable interrupts */
905 soutp(UART_IER
, sinp(UART_IER
)|UART_IER_RDI
);
907 outb(0, io
+ UART_MCR
);
908 outb(0, io
+ UART_IER
);
910 /* set DLAB, speed = 115200 */
911 outb(UART_LCR_DLAB
| UART_LCR_WLEN7
, io
+ UART_LCR
);
912 outb(1, io
+ UART_DLL
); outb(0, io
+ UART_DLM
);
913 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
914 outb(UART_LCR_WLEN7
, io
+ UART_LCR
);
916 outb(UART_FCR_ENABLE_FIFO
, io
+ UART_FCR
);
918 /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
919 outb(UART_IER_RDI
, io
+ UART_IER
);
921 outb(UART_MCR_DTR
|UART_MCR_RTS
|UART_MCR_OUT2
, io
+ UART_MCR
);
922 #ifdef LIRC_SIR_ACTISYS_ACT200L
924 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
928 spin_unlock_irqrestore(&hardware_lock
, flags
);
932 static void drop_hardware(void)
936 spin_lock_irqsave(&hardware_lock
, flags
);
938 #ifdef LIRC_ON_SA1100
941 Ser2UTCR0
= sr
.utcr0
;
942 Ser2UTCR1
= sr
.utcr1
;
943 Ser2UTCR2
= sr
.utcr2
;
944 Ser2UTCR4
= sr
.utcr4
;
945 Ser2UTCR3
= sr
.utcr3
;
947 Ser2HSCR0
= sr
.hscr0
;
948 #ifdef CONFIG_SA1100_BITSY
949 if (machine_is_bitsy())
950 clr_bitsy_egpio(EGPIO_BITSY_IR_ON
);
952 #ifdef CONFIG_SA1100_COLLIE
953 sa1100_irda_set_power_collie(0); /* power off */
956 /* turn off interrupts */
957 outb(0, io
+ UART_IER
);
959 spin_unlock_irqrestore(&hardware_lock
, flags
);
962 /* SECTION: Initialisation */
964 static int init_port(void)
968 /* get I/O port access and IRQ line */
969 #ifndef LIRC_ON_SA1100
970 if (request_region(io
, 8, LIRC_DRIVER_NAME
) == NULL
) {
971 printk(KERN_ERR LIRC_DRIVER_NAME
972 ": i/o port 0x%.4x already in use.\n", io
);
976 retval
= request_irq(irq
, sir_interrupt
, IRQF_DISABLED
,
977 LIRC_DRIVER_NAME
, NULL
);
979 # ifndef LIRC_ON_SA1100
980 release_region(io
, 8);
982 printk(KERN_ERR LIRC_DRIVER_NAME
983 ": IRQ %d already in use.\n",
987 #ifndef LIRC_ON_SA1100
988 printk(KERN_INFO LIRC_DRIVER_NAME
989 ": I/O port 0x%.4x, IRQ %d.\n",
993 init_timer(&timerlist
);
994 timerlist
.function
= sir_timeout
;
995 timerlist
.data
= 0xabadcafe;
1000 static void drop_port(void)
1002 free_irq(irq
, NULL
);
1003 del_timer_sync(&timerlist
);
1004 #ifndef LIRC_ON_SA1100
1005 release_region(io
, 8);
1009 #ifdef LIRC_SIR_ACTISYS_ACT200L
1010 /* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
1011 /* some code borrowed from Linux IRDA driver */
1013 /* Register 0: Control register #1 */
1014 #define ACT200L_REG0 0x00
1015 #define ACT200L_TXEN 0x01 /* Enable transmitter */
1016 #define ACT200L_RXEN 0x02 /* Enable receiver */
1017 #define ACT200L_ECHO 0x08 /* Echo control chars */
1019 /* Register 1: Control register #2 */
1020 #define ACT200L_REG1 0x10
1021 #define ACT200L_LODB 0x01 /* Load new baud rate count value */
1022 #define ACT200L_WIDE 0x04 /* Expand the maximum allowable pulse */
1024 /* Register 3: Transmit mode register #2 */
1025 #define ACT200L_REG3 0x30
1026 #define ACT200L_B0 0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1027 #define ACT200L_B1 0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1028 #define ACT200L_CHSY 0x04 /* StartBit Synced 0=bittime, 1=startbit */
1030 /* Register 4: Output Power register */
1031 #define ACT200L_REG4 0x40
1032 #define ACT200L_OP0 0x01 /* Enable LED1C output */
1033 #define ACT200L_OP1 0x02 /* Enable LED2C output */
1034 #define ACT200L_BLKR 0x04
1036 /* Register 5: Receive Mode register */
1037 #define ACT200L_REG5 0x50
1038 #define ACT200L_RWIDL 0x01 /* fixed 1.6us pulse mode */
1039 /*.. other various IRDA bit modes, and TV remote modes..*/
1041 /* Register 6: Receive Sensitivity register #1 */
1042 #define ACT200L_REG6 0x60
1043 #define ACT200L_RS0 0x01 /* receive threshold bit 0 */
1044 #define ACT200L_RS1 0x02 /* receive threshold bit 1 */
1046 /* Register 7: Receive Sensitivity register #2 */
1047 #define ACT200L_REG7 0x70
1048 #define ACT200L_ENPOS 0x04 /* Ignore the falling edge */
1050 /* Register 8,9: Baud Rate Divider register #1,#2 */
1051 #define ACT200L_REG8 0x80
1052 #define ACT200L_REG9 0x90
1054 #define ACT200L_2400 0x5f
1055 #define ACT200L_9600 0x17
1056 #define ACT200L_19200 0x0b
1057 #define ACT200L_38400 0x05
1058 #define ACT200L_57600 0x03
1059 #define ACT200L_115200 0x01
1061 /* Register 13: Control register #3 */
1062 #define ACT200L_REG13 0xd0
1063 #define ACT200L_SHDW 0x01 /* Enable access to shadow registers */
1065 /* Register 15: Status register */
1066 #define ACT200L_REG15 0xf0
1068 /* Register 21: Control register #4 */
1069 #define ACT200L_REG21 0x50
1070 #define ACT200L_EXCK 0x02 /* Disable clock output driver */
1071 #define ACT200L_OSCL 0x04 /* oscillator in low power, medium accuracy mode */
1073 static void init_act200(void)
1078 ACT200L_REG13
| ACT200L_SHDW
,
1079 ACT200L_REG21
| ACT200L_EXCK
| ACT200L_OSCL
,
1081 ACT200L_REG7
| ACT200L_ENPOS
,
1082 ACT200L_REG6
| ACT200L_RS0
| ACT200L_RS1
,
1083 ACT200L_REG5
| ACT200L_RWIDL
,
1084 ACT200L_REG4
| ACT200L_OP0
| ACT200L_OP1
| ACT200L_BLKR
,
1085 ACT200L_REG3
| ACT200L_B0
,
1086 ACT200L_REG0
| ACT200L_TXEN
| ACT200L_RXEN
,
1087 ACT200L_REG8
| (ACT200L_115200
& 0x0f),
1088 ACT200L_REG9
| ((ACT200L_115200
>> 4) & 0x0f),
1089 ACT200L_REG1
| ACT200L_LODB
| ACT200L_WIDE
1093 soutp(UART_LCR
, UART_LCR_DLAB
| UART_LCR_WLEN8
);
1095 /* Set divisor to 12 => 9600 Baud */
1097 soutp(UART_DLL
, 12);
1100 soutp(UART_LCR
, UART_LCR_WLEN8
);
1101 /* Set divisor to 12 => 9600 Baud */
1104 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_DTR
|UART_MCR_OUT2
);
1105 for (i
= 0; i
< 50; i
++)
1108 /* Reset the dongle : set RTS low for 25 ms */
1109 soutp(UART_MCR
, UART_MCR_DTR
|UART_MCR_OUT2
);
1110 for (i
= 0; i
< 25; i
++)
1113 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_DTR
|UART_MCR_OUT2
);
1116 /* Clear DTR and set RTS to enter command mode */
1117 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_OUT2
);
1120 /* send out the control register settings for 115K 7N1 SIR operation */
1121 for (i
= 0; i
< sizeof(control
); i
++) {
1122 soutp(UART_TX
, control
[i
]);
1123 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
1127 /* back to normal operation */
1128 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_DTR
|UART_MCR_OUT2
);
1132 soutp(UART_LCR
, sinp(UART_LCR
) | UART_LCR_DLAB
);
1135 soutp(UART_LCR
, UART_LCR_DLAB
| UART_LCR_WLEN7
);
1137 /* Set divisor to 1 => 115200 Baud */
1142 soutp(UART_LCR
, sinp(UART_LCR
) & (~UART_LCR_DLAB
));
1144 /* Set DLAB 0, 7 Bit */
1145 soutp(UART_LCR
, UART_LCR_WLEN7
);
1147 /* enable interrupts */
1148 soutp(UART_IER
, sinp(UART_IER
)|UART_IER_RDI
);
1152 #ifdef LIRC_SIR_ACTISYS_ACT220L
1154 * Derived from linux IrDA driver (net/irda/actisys.c)
1155 * Drop me a mail for any kind of comment: maxx@spaceboyz.net
1158 void init_act220(void)
1163 soutp(UART_LCR
, UART_LCR_DLAB
|UART_LCR_WLEN7
);
1167 soutp(UART_DLL
, 12);
1170 soutp(UART_LCR
, UART_LCR_WLEN7
);
1172 /* reset the dongle, set DTR low for 10us */
1173 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_OUT2
);
1176 /* back to normal (still 9600) */
1177 soutp(UART_MCR
, UART_MCR_DTR
|UART_MCR_RTS
|UART_MCR_OUT2
);
1180 * send RTS pulses until we reach 115200
1181 * i hope this is really the same for act220l/act220l+
1183 for (i
= 0; i
< 3; i
++) {
1185 /* set RTS low for 10 us */
1186 soutp(UART_MCR
, UART_MCR_DTR
|UART_MCR_OUT2
);
1188 /* set RTS high for 10 us */
1189 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_DTR
|UART_MCR_OUT2
);
1192 /* back to normal operation */
1193 udelay(1500); /* better safe than sorry ;) */
1196 soutp(UART_LCR
, UART_LCR_DLAB
| UART_LCR_WLEN7
);
1198 /* Set divisor to 1 => 115200 Baud */
1202 /* Set DLAB 0, 7 Bit */
1203 /* The dongle doesn't seem to have any problems with operation at 7N1 */
1204 soutp(UART_LCR
, UART_LCR_WLEN7
);
1206 /* enable interrupts */
1207 soutp(UART_IER
, UART_IER_RDI
);
1211 static int init_lirc_sir(void)
1215 init_waitqueue_head(&lirc_read_queue
);
1216 retval
= init_port();
1220 printk(KERN_INFO LIRC_DRIVER_NAME
1226 static int __init
lirc_sir_init(void)
1230 retval
= init_chrdev();
1233 retval
= init_lirc_sir();
1241 static void __exit
lirc_sir_exit(void)
1246 printk(KERN_INFO LIRC_DRIVER_NAME
": Uninstalled.\n");
1249 module_init(lirc_sir_init
);
1250 module_exit(lirc_sir_exit
);
1252 #ifdef LIRC_SIR_TEKRAM
1253 MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
1254 MODULE_AUTHOR("Christoph Bartelmus");
1255 #elif defined(LIRC_ON_SA1100)
1256 MODULE_DESCRIPTION("LIRC driver for StrongARM SA1100 embedded microprocessor");
1257 MODULE_AUTHOR("Christoph Bartelmus");
1258 #elif defined(LIRC_SIR_ACTISYS_ACT200L)
1259 MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
1260 MODULE_AUTHOR("Karl Bongers");
1261 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
1262 MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
1263 MODULE_AUTHOR("Jan Roemisch");
1265 MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
1266 MODULE_AUTHOR("Milan Pikula");
1268 MODULE_LICENSE("GPL");
1270 #ifdef LIRC_ON_SA1100
1271 module_param(irq
, int, S_IRUGO
);
1272 MODULE_PARM_DESC(irq
, "Interrupt (16)");
1274 module_param(io
, int, S_IRUGO
);
1275 MODULE_PARM_DESC(io
, "I/O address base (0x3f8 or 0x2f8)");
1277 module_param(irq
, int, S_IRUGO
);
1278 MODULE_PARM_DESC(irq
, "Interrupt (4 or 3)");
1280 module_param(threshold
, int, S_IRUGO
);
1281 MODULE_PARM_DESC(threshold
, "space detection threshold (3)");
1284 module_param(debug
, bool, S_IRUGO
| S_IWUSR
);
1285 MODULE_PARM_DESC(debug
, "Enable debugging messages");