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1 /*
2 * QEMU 16550A UART emulation
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "qapi/error.h"
28 #include "qemu/module.h"
29 #include "sysemu/sysemu.h"
30 #include "hw/acpi/aml-build.h"
31 #include "hw/char/serial.h"
32 #include "hw/isa/isa.h"
33 #include "hw/qdev-properties.h"
34 #include "migration/vmstate.h"
35 #include "qom/object.h"
36
37 typedef struct ISASerialState ISASerialState;
38 DECLARE_INSTANCE_CHECKER(ISASerialState, ISA_SERIAL,
39 TYPE_ISA_SERIAL)
40
41 struct ISASerialState {
42 ISADevice parent_obj;
43
44 uint32_t index;
45 uint32_t iobase;
46 uint32_t isairq;
47 SerialState state;
48 };
49
50 static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = {
51 0x3f8, 0x2f8, 0x3e8, 0x2e8
52 };
53 static const int isa_serial_irq[MAX_ISA_SERIAL_PORTS] = {
54 4, 3, 4, 3
55 };
56
57 static void serial_isa_realizefn(DeviceState *dev, Error **errp)
58 {
59 static int index;
60 ISADevice *isadev = ISA_DEVICE(dev);
61 ISASerialState *isa = ISA_SERIAL(dev);
62 SerialState *s = &isa->state;
63
64 if (isa->index == -1) {
65 isa->index = index;
66 }
67 if (isa->index >= MAX_ISA_SERIAL_PORTS) {
68 error_setg(errp, "Max. supported number of ISA serial ports is %d.",
69 MAX_ISA_SERIAL_PORTS);
70 return;
71 }
72 if (isa->iobase == -1) {
73 isa->iobase = isa_serial_io[isa->index];
74 }
75 if (isa->isairq == -1) {
76 isa->isairq = isa_serial_irq[isa->index];
77 }
78 index++;
79
80 isa_init_irq(isadev, &s->irq, isa->isairq);
81 qdev_realize(DEVICE(s), NULL, errp);
82 qdev_set_legacy_instance_id(dev, isa->iobase, 3);
83
84 memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8);
85 isa_register_ioport(isadev, &s->io, isa->iobase);
86 }
87
88 static void serial_isa_build_aml(ISADevice *isadev, Aml *scope)
89 {
90 ISASerialState *isa = ISA_SERIAL(isadev);
91 Aml *dev;
92 Aml *crs;
93
94 crs = aml_resource_template();
95 aml_append(crs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, 0x08));
96 aml_append(crs, aml_irq_no_flags(isa->isairq));
97
98 dev = aml_device("COM%d", isa->index + 1);
99 aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0501")));
100 aml_append(dev, aml_name_decl("_UID", aml_int(isa->index + 1)));
101 aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
102 aml_append(dev, aml_name_decl("_CRS", crs));
103
104 aml_append(scope, dev);
105 }
106
107 static const VMStateDescription vmstate_isa_serial = {
108 .name = "serial",
109 .version_id = 3,
110 .minimum_version_id = 2,
111 .fields = (VMStateField[]) {
112 VMSTATE_STRUCT(state, ISASerialState, 0, vmstate_serial, SerialState),
113 VMSTATE_END_OF_LIST()
114 }
115 };
116
117 static Property serial_isa_properties[] = {
118 DEFINE_PROP_UINT32("index", ISASerialState, index, -1),
119 DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1),
120 DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),
121 DEFINE_PROP_CHR("chardev", ISASerialState, state.chr),
122 DEFINE_PROP_UINT32("wakeup", ISASerialState, state.wakeup, 0),
123 DEFINE_PROP_END_OF_LIST(),
124 };
125
126 static void serial_isa_class_initfn(ObjectClass *klass, void *data)
127 {
128 DeviceClass *dc = DEVICE_CLASS(klass);
129 ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
130
131 dc->realize = serial_isa_realizefn;
132 dc->vmsd = &vmstate_isa_serial;
133 isa->build_aml = serial_isa_build_aml;
134 device_class_set_props(dc, serial_isa_properties);
135 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
136 }
137
138 static void serial_isa_initfn(Object *o)
139 {
140 ISASerialState *self = ISA_SERIAL(o);
141
142 object_initialize_child(o, "serial", &self->state, TYPE_SERIAL);
143 }
144
145 static const TypeInfo serial_isa_info = {
146 .name = TYPE_ISA_SERIAL,
147 .parent = TYPE_ISA_DEVICE,
148 .instance_size = sizeof(ISASerialState),
149 .instance_init = serial_isa_initfn,
150 .class_init = serial_isa_class_initfn,
151 };
152
153 static void serial_register_types(void)
154 {
155 type_register_static(&serial_isa_info);
156 }
157
158 type_init(serial_register_types)
159
160 static void serial_isa_init(ISABus *bus, int index, Chardev *chr)
161 {
162 DeviceState *dev;
163 ISADevice *isadev;
164
165 isadev = isa_new(TYPE_ISA_SERIAL);
166 dev = DEVICE(isadev);
167 qdev_prop_set_uint32(dev, "index", index);
168 qdev_prop_set_chr(dev, "chardev", chr);
169 isa_realize_and_unref(isadev, bus, &error_fatal);
170 }
171
172 void serial_hds_isa_init(ISABus *bus, int from, int to)
173 {
174 int i;
175
176 assert(from >= 0);
177 assert(to <= MAX_ISA_SERIAL_PORTS);
178
179 for (i = from; i < to; ++i) {
180 if (serial_hd(i)) {
181 serial_isa_init(bus, i, serial_hd(i));
182 }
183 }
184 }