hw/cxl/cxl-mailbox-utils.c

   1 /*
   2  * CXL Utility library for mailbox interface
   3  *
   4  * Copyright(C) 2020 Intel Corporation.
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2. See the
   7  * COPYING file in the top-level directory.
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "hw/cxl/cxl.h"
  12 #include "hw/pci/pci.h"
  13 #include "qemu/cutils.h"
  14 #include "qemu/log.h"
  15 #include "qemu/uuid.h"
  16
  17 /*
  18  * How to add a new command, example. The command set FOO, with cmd BAR.
  19  *  1. Add the command set and cmd to the enum.
  20  *     FOO    = 0x7f,
  21  *          #define BAR 0
  22  *  2. Implement the handler
  23  *    static ret_code cmd_foo_bar(struct cxl_cmd *cmd,
  24  *                                  CXLDeviceState *cxl_dstate, uint16_t *len)
  25  *  3. Add the command to the cxl_cmd_set[][]
  26  *    [FOO][BAR] = { "FOO_BAR", cmd_foo_bar, x, y },
  27  *  4. Implement your handler
  28  *     define_mailbox_handler(FOO_BAR) { ... return CXL_MBOX_SUCCESS; }
  29  *
  30  *
  31  *  Writing the handler:
  32  *    The handler will provide the &struct cxl_cmd, the &CXLDeviceState, and the
  33  *    in/out length of the payload. The handler is responsible for consuming the
  34  *    payload from cmd->payload and operating upon it as necessary. It must then
  35  *    fill the output data into cmd->payload (overwriting what was there),
  36  *    setting the length, and returning a valid return code.
  37  *
  38  *  XXX: The handler need not worry about endianess. The payload is read out of
  39  *  a register interface that already deals with it.
  40  */
  41
  42 enum {
  43     EVENTS      = 0x01,
  44         #define GET_RECORDS   0x0
  45         #define CLEAR_RECORDS   0x1
  46         #define GET_INTERRUPT_POLICY   0x2
  47         #define SET_INTERRUPT_POLICY   0x3
  48     FIRMWARE_UPDATE = 0x02,
  49         #define GET_INFO      0x0
  50     TIMESTAMP   = 0x03,
  51         #define GET           0x0
  52         #define SET           0x1
  53     LOGS        = 0x04,
  54         #define GET_SUPPORTED 0x0
  55         #define GET_LOG       0x1
  56     IDENTIFY    = 0x40,
  57         #define MEMORY_DEVICE 0x0
  58     CCLS        = 0x41,
  59         #define GET_PARTITION_INFO     0x0
  60 };
  61
  62 /* 8.2.8.4.5.1 Command Return Codes */
  63 typedef enum {
  64     CXL_MBOX_SUCCESS = 0x0,
  65     CXL_MBOX_BG_STARTED = 0x1,
  66     CXL_MBOX_INVALID_INPUT = 0x2,
  67     CXL_MBOX_UNSUPPORTED = 0x3,
  68     CXL_MBOX_INTERNAL_ERROR = 0x4,
  69     CXL_MBOX_RETRY_REQUIRED = 0x5,
  70     CXL_MBOX_BUSY = 0x6,
  71     CXL_MBOX_MEDIA_DISABLED = 0x7,
  72     CXL_MBOX_FW_XFER_IN_PROGRESS = 0x8,
  73     CXL_MBOX_FW_XFER_OUT_OF_ORDER = 0x9,
  74     CXL_MBOX_FW_AUTH_FAILED = 0xa,
  75     CXL_MBOX_FW_INVALID_SLOT = 0xb,
  76     CXL_MBOX_FW_ROLLEDBACK = 0xc,
  77     CXL_MBOX_FW_REST_REQD = 0xd,
  78     CXL_MBOX_INVALID_HANDLE = 0xe,
  79     CXL_MBOX_INVALID_PA = 0xf,
  80     CXL_MBOX_INJECT_POISON_LIMIT = 0x10,
  81     CXL_MBOX_PERMANENT_MEDIA_FAILURE = 0x11,
  82     CXL_MBOX_ABORTED = 0x12,
  83     CXL_MBOX_INVALID_SECURITY_STATE = 0x13,
  84     CXL_MBOX_INCORRECT_PASSPHRASE = 0x14,
  85     CXL_MBOX_UNSUPPORTED_MAILBOX = 0x15,
  86     CXL_MBOX_INVALID_PAYLOAD_LENGTH = 0x16,
  87     CXL_MBOX_MAX = 0x17
  88 } ret_code;
  89
  90 struct cxl_cmd;
  91 typedef ret_code (*opcode_handler)(struct cxl_cmd *cmd,
  92                                    CXLDeviceState *cxl_dstate, uint16_t *len);
  93 struct cxl_cmd {
  94     const char *name;
  95     opcode_handler handler;
  96     ssize_t in;
  97     uint16_t effect; /* Reported in CEL */
  98     uint8_t *payload;
  99 };
 100
 101 #define DEFINE_MAILBOX_HANDLER_ZEROED(name, size)                         \
 102     uint16_t __zero##name = size;                                         \
 103     static ret_code cmd_##name(struct cxl_cmd *cmd,                       \
 104                                CXLDeviceState *cxl_dstate, uint16_t *len) \
 105     {                                                                     \
 106         *len = __zero##name;                                              \
 107         memset(cmd->payload, 0, *len);                                    \
 108         return CXL_MBOX_SUCCESS;                                          \
 109     }
 110 #define DEFINE_MAILBOX_HANDLER_NOP(name)                                  \
 111     static ret_code cmd_##name(struct cxl_cmd *cmd,                       \
 112                                CXLDeviceState *cxl_dstate, uint16_t *len) \
 113     {                                                                     \
 114         return CXL_MBOX_SUCCESS;                                          \
 115     }
 116
 117 DEFINE_MAILBOX_HANDLER_ZEROED(events_get_records, 0x20);
 118 DEFINE_MAILBOX_HANDLER_NOP(events_clear_records);
 119 DEFINE_MAILBOX_HANDLER_ZEROED(events_get_interrupt_policy, 4);
 120 DEFINE_MAILBOX_HANDLER_NOP(events_set_interrupt_policy);
 121
 122 /* 8.2.9.2.1 */
 123 static ret_code cmd_firmware_update_get_info(struct cxl_cmd *cmd,
 124                                              CXLDeviceState *cxl_dstate,
 125                                              uint16_t *len)
 126 {
 127     struct {
 128         uint8_t slots_supported;
 129         uint8_t slot_info;
 130         uint8_t caps;
 131         uint8_t rsvd[0xd];
 132         char fw_rev1[0x10];
 133         char fw_rev2[0x10];
 134         char fw_rev3[0x10];
 135         char fw_rev4[0x10];
 136     } QEMU_PACKED *fw_info;
 137     QEMU_BUILD_BUG_ON(sizeof(*fw_info) != 0x50);
 138
 139     if (cxl_dstate->pmem_size < (256 << 20)) {
 140         return CXL_MBOX_INTERNAL_ERROR;
 141     }
 142
 143     fw_info = (void *)cmd->payload;
 144     memset(fw_info, 0, sizeof(*fw_info));
 145
 146     fw_info->slots_supported = 2;
 147     fw_info->slot_info = BIT(0) | BIT(3);
 148     fw_info->caps = 0;
 149     pstrcpy(fw_info->fw_rev1, sizeof(fw_info->fw_rev1), "BWFW VERSION 0");
 150
 151     *len = sizeof(*fw_info);
 152     return CXL_MBOX_SUCCESS;
 153 }
 154
 155 /* 8.2.9.3.1 */
 156 static ret_code cmd_timestamp_get(struct cxl_cmd *cmd,
 157                                   CXLDeviceState *cxl_dstate,
 158                                   uint16_t *len)
 159 {
 160     uint64_t time, delta;
 161     uint64_t final_time = 0;
 162
 163     if (cxl_dstate->timestamp.set) {
 164         /* First find the delta from the last time the host set the time. */
 165         time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 166         delta = time - cxl_dstate->timestamp.last_set;
 167         final_time = cxl_dstate->timestamp.host_set + delta;
 168     }
 169
 170     /* Then adjust the actual time */
 171     stq_le_p(cmd->payload, final_time);
 172     *len = 8;
 173
 174     return CXL_MBOX_SUCCESS;
 175 }
 176
 177 /* 8.2.9.3.2 */
 178 static ret_code cmd_timestamp_set(struct cxl_cmd *cmd,
 179                                   CXLDeviceState *cxl_dstate,
 180                                   uint16_t *len)
 181 {
 182     cxl_dstate->timestamp.set = true;
 183     cxl_dstate->timestamp.last_set = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 184
 185     cxl_dstate->timestamp.host_set = le64_to_cpu(*(uint64_t *)cmd->payload);
 186
 187     *len = 0;
 188     return CXL_MBOX_SUCCESS;
 189 }
 190
 191 static QemuUUID cel_uuid;
 192
 193 /* 8.2.9.4.1 */
 194 static ret_code cmd_logs_get_supported(struct cxl_cmd *cmd,
 195                                        CXLDeviceState *cxl_dstate,
 196                                        uint16_t *len)
 197 {
 198     struct {
 199         uint16_t entries;
 200         uint8_t rsvd[6];
 201         struct {
 202             QemuUUID uuid;
 203             uint32_t size;
 204         } log_entries[1];
 205     } QEMU_PACKED *supported_logs = (void *)cmd->payload;
 206     QEMU_BUILD_BUG_ON(sizeof(*supported_logs) != 0x1c);
 207
 208     supported_logs->entries = 1;
 209     supported_logs->log_entries[0].uuid = cel_uuid;
 210     supported_logs->log_entries[0].size = 4 * cxl_dstate->cel_size;
 211
 212     *len = sizeof(*supported_logs);
 213     return CXL_MBOX_SUCCESS;
 214 }
 215
 216 /* 8.2.9.4.2 */
 217 static ret_code cmd_logs_get_log(struct cxl_cmd *cmd,
 218                                  CXLDeviceState *cxl_dstate,
 219                                  uint16_t *len)
 220 {
 221     struct {
 222         QemuUUID uuid;
 223         uint32_t offset;
 224         uint32_t length;
 225     } QEMU_PACKED QEMU_ALIGNED(16) *get_log = (void *)cmd->payload;
 226
 227     /*
 228      * 8.2.9.4.2
 229      *   The device shall return Invalid Parameter if the Offset or Length
 230      *   fields attempt to access beyond the size of the log as reported by Get
 231      *   Supported Logs.
 232      *
 233      * XXX: Spec is wrong, "Invalid Parameter" isn't a thing.
 234      * XXX: Spec doesn't address incorrect UUID incorrectness.
 235      *
 236      * The CEL buffer is large enough to fit all commands in the emulation, so
 237      * the only possible failure would be if the mailbox itself isn't big
 238      * enough.
 239      */
 240     if (get_log->offset + get_log->length > cxl_dstate->payload_size) {
 241         return CXL_MBOX_INVALID_INPUT;
 242     }
 243
 244     if (!qemu_uuid_is_equal(&get_log->uuid, &cel_uuid)) {
 245         return CXL_MBOX_UNSUPPORTED;
 246     }
 247
 248     /* Store off everything to local variables so we can wipe out the payload */
 249     *len = get_log->length;
 250
 251     memmove(cmd->payload, cxl_dstate->cel_log + get_log->offset,
 252            get_log->length);
 253
 254     return CXL_MBOX_SUCCESS;
 255 }
 256
 257 /* 8.2.9.5.1.1 */
 258 static ret_code cmd_identify_memory_device(struct cxl_cmd *cmd,
 259                                            CXLDeviceState *cxl_dstate,
 260                                            uint16_t *len)
 261 {
 262     struct {
 263         char fw_revision[0x10];
 264         uint64_t total_capacity;
 265         uint64_t volatile_capacity;
 266         uint64_t persistent_capacity;
 267         uint64_t partition_align;
 268         uint16_t info_event_log_size;
 269         uint16_t warning_event_log_size;
 270         uint16_t failure_event_log_size;
 271         uint16_t fatal_event_log_size;
 272         uint32_t lsa_size;
 273         uint8_t poison_list_max_mer[3];
 274         uint16_t inject_poison_limit;
 275         uint8_t poison_caps;
 276         uint8_t qos_telemetry_caps;
 277     } QEMU_PACKED *id;
 278     QEMU_BUILD_BUG_ON(sizeof(*id) != 0x43);
 279
 280     CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, cxl_dstate);
 281     CXLType3Class *cvc = CXL_TYPE3_GET_CLASS(ct3d);
 282     uint64_t size = cxl_dstate->pmem_size;
 283
 284     if (!QEMU_IS_ALIGNED(size, 256 << 20)) {
 285         return CXL_MBOX_INTERNAL_ERROR;
 286     }
 287
 288     id = (void *)cmd->payload;
 289     memset(id, 0, sizeof(*id));
 290
 291     /* PMEM only */
 292     snprintf(id->fw_revision, 0x10, "BWFW VERSION %02d", 0);
 293
 294     id->total_capacity = size / (256 << 20);
 295     id->persistent_capacity = size / (256 << 20);
 296     id->lsa_size = cvc->get_lsa_size(ct3d);
 297
 298     *len = sizeof(*id);
 299     return CXL_MBOX_SUCCESS;
 300 }
 301
 302 static ret_code cmd_ccls_get_partition_info(struct cxl_cmd *cmd,
 303                                            CXLDeviceState *cxl_dstate,
 304                                            uint16_t *len)
 305 {
 306     struct {
 307         uint64_t active_vmem;
 308         uint64_t active_pmem;
 309         uint64_t next_vmem;
 310         uint64_t next_pmem;
 311     } QEMU_PACKED *part_info = (void *)cmd->payload;
 312     QEMU_BUILD_BUG_ON(sizeof(*part_info) != 0x20);
 313     uint64_t size = cxl_dstate->pmem_size;
 314
 315     if (!QEMU_IS_ALIGNED(size, 256 << 20)) {
 316         return CXL_MBOX_INTERNAL_ERROR;
 317     }
 318
 319     /* PMEM only */
 320     part_info->active_vmem = 0;
 321     part_info->next_vmem = 0;
 322     part_info->active_pmem = size / (256 << 20);
 323     part_info->next_pmem = 0;
 324
 325     *len = sizeof(*part_info);
 326     return CXL_MBOX_SUCCESS;
 327 }
 328
 329 #define IMMEDIATE_CONFIG_CHANGE (1 << 1)
 330 #define IMMEDIATE_POLICY_CHANGE (1 << 3)
 331 #define IMMEDIATE_LOG_CHANGE (1 << 4)
 332
 333 static struct cxl_cmd cxl_cmd_set[256][256] = {
 334     [EVENTS][GET_RECORDS] = { "EVENTS_GET_RECORDS",
 335         cmd_events_get_records, 1, 0 },
 336     [EVENTS][CLEAR_RECORDS] = { "EVENTS_CLEAR_RECORDS",
 337         cmd_events_clear_records, ~0, IMMEDIATE_LOG_CHANGE },
 338     [EVENTS][GET_INTERRUPT_POLICY] = { "EVENTS_GET_INTERRUPT_POLICY",
 339         cmd_events_get_interrupt_policy, 0, 0 },
 340     [EVENTS][SET_INTERRUPT_POLICY] = { "EVENTS_SET_INTERRUPT_POLICY",
 341         cmd_events_set_interrupt_policy, 4, IMMEDIATE_CONFIG_CHANGE },
 342     [FIRMWARE_UPDATE][GET_INFO] = { "FIRMWARE_UPDATE_GET_INFO",
 343         cmd_firmware_update_get_info, 0, 0 },
 344     [TIMESTAMP][GET] = { "TIMESTAMP_GET", cmd_timestamp_get, 0, 0 },
 345     [TIMESTAMP][SET] = { "TIMESTAMP_SET", cmd_timestamp_set, 8, IMMEDIATE_POLICY_CHANGE },
 346     [LOGS][GET_SUPPORTED] = { "LOGS_GET_SUPPORTED", cmd_logs_get_supported, 0, 0 },
 347     [LOGS][GET_LOG] = { "LOGS_GET_LOG", cmd_logs_get_log, 0x18, 0 },
 348     [IDENTIFY][MEMORY_DEVICE] = { "IDENTIFY_MEMORY_DEVICE",
 349         cmd_identify_memory_device, 0, 0 },
 350     [CCLS][GET_PARTITION_INFO] = { "CCLS_GET_PARTITION_INFO",
 351         cmd_ccls_get_partition_info, 0, 0 },
 352 };
 353
 354 void cxl_process_mailbox(CXLDeviceState *cxl_dstate)
 355 {
 356     uint16_t ret = CXL_MBOX_SUCCESS;
 357     struct cxl_cmd *cxl_cmd;
 358     uint64_t status_reg;
 359     opcode_handler h;
 360     uint64_t command_reg = cxl_dstate->mbox_reg_state64[R_CXL_DEV_MAILBOX_CMD];
 361
 362     uint8_t set = FIELD_EX64(command_reg, CXL_DEV_MAILBOX_CMD, COMMAND_SET);
 363     uint8_t cmd = FIELD_EX64(command_reg, CXL_DEV_MAILBOX_CMD, COMMAND);
 364     uint16_t len = FIELD_EX64(command_reg, CXL_DEV_MAILBOX_CMD, LENGTH);
 365     cxl_cmd = &cxl_cmd_set[set][cmd];
 366     h = cxl_cmd->handler;
 367     if (h) {
 368         if (len == cxl_cmd->in) {
 369             cxl_cmd->payload = cxl_dstate->mbox_reg_state +
 370                 A_CXL_DEV_CMD_PAYLOAD;
 371             ret = (*h)(cxl_cmd, cxl_dstate, &len);
 372             assert(len <= cxl_dstate->payload_size);
 373         } else {
 374             ret = CXL_MBOX_INVALID_PAYLOAD_LENGTH;
 375         }
 376     } else {
 377         qemu_log_mask(LOG_UNIMP, "Command %04xh not implemented\n",
 378                       set << 8 | cmd);
 379         ret = CXL_MBOX_UNSUPPORTED;
 380     }
 381
 382     /* Set the return code */
 383     status_reg = FIELD_DP64(0, CXL_DEV_MAILBOX_STS, ERRNO, ret);
 384
 385     /* Set the return length */
 386     command_reg = FIELD_DP64(command_reg, CXL_DEV_MAILBOX_CMD, COMMAND_SET, 0);
 387     command_reg = FIELD_DP64(command_reg, CXL_DEV_MAILBOX_CMD, COMMAND, 0);
 388     command_reg = FIELD_DP64(command_reg, CXL_DEV_MAILBOX_CMD, LENGTH, len);
 389
 390     cxl_dstate->mbox_reg_state64[R_CXL_DEV_MAILBOX_CMD] = command_reg;
 391     cxl_dstate->mbox_reg_state64[R_CXL_DEV_MAILBOX_STS] = status_reg;
 392
 393     /* Tell the host we're done */
 394     ARRAY_FIELD_DP32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CTRL,
 395                      DOORBELL, 0);
 396 }
 397
 398 int cxl_initialize_mailbox(CXLDeviceState *cxl_dstate)
 399 {
 400     /* CXL 2.0: Table 169 Get Supported Logs Log Entry */
 401     const char *cel_uuidstr = "0da9c0b5-bf41-4b78-8f79-96b1623b3f17";
 402
 403     for (int set = 0; set < 256; set++) {
 404         for (int cmd = 0; cmd < 256; cmd++) {
 405             if (cxl_cmd_set[set][cmd].handler) {
 406                 struct cxl_cmd *c = &cxl_cmd_set[set][cmd];
 407                 struct cel_log *log =
 408                     &cxl_dstate->cel_log[cxl_dstate->cel_size];
 409
 410                 log->opcode = (set << 8) | cmd;
 411                 log->effect = c->effect;
 412                 cxl_dstate->cel_size++;
 413             }
 414         }
 415     }
 416
 417     return qemu_uuid_parse(cel_uuidstr, &cel_uuid);
 418 }