2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #include "qemu/osdep.h"
26 #include "hw/i386/pc.h"
27 #include "hw/char/serial.h"
28 #include "hw/i386/apic.h"
29 #include "hw/i386/topology.h"
30 #include "sysemu/cpus.h"
31 #include "hw/block/fdc.h"
33 #include "hw/pci/pci.h"
34 #include "hw/pci/pci_bus.h"
35 #include "hw/nvram/fw_cfg.h"
36 #include "hw/timer/hpet.h"
37 #include "hw/smbios/smbios.h"
38 #include "hw/loader.h"
40 #include "multiboot.h"
41 #include "hw/timer/mc146818rtc.h"
42 #include "hw/timer/i8254.h"
43 #include "hw/audio/pcspk.h"
44 #include "hw/pci/msi.h"
45 #include "hw/sysbus.h"
46 #include "sysemu/sysemu.h"
47 #include "sysemu/numa.h"
48 #include "sysemu/kvm.h"
49 #include "sysemu/qtest.h"
51 #include "hw/xen/xen.h"
52 #include "sysemu/block-backend.h"
53 #include "hw/block/block.h"
54 #include "ui/qemu-spice.h"
55 #include "exec/memory.h"
56 #include "exec/address-spaces.h"
57 #include "sysemu/arch_init.h"
58 #include "qemu/bitmap.h"
59 #include "qemu/config-file.h"
60 #include "qemu/error-report.h"
61 #include "hw/acpi/acpi.h"
62 #include "hw/acpi/cpu_hotplug.h"
63 #include "hw/boards.h"
64 #include "hw/pci/pci_host.h"
65 #include "acpi-build.h"
66 #include "hw/mem/pc-dimm.h"
67 #include "qapi/visitor.h"
68 #include "qapi-visit.h"
72 /* debug PC/ISA interrupts */
76 #define DPRINTF(fmt, ...) \
77 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
79 #define DPRINTF(fmt, ...)
82 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
83 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
84 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
85 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
86 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
88 #define E820_NR_ENTRIES 16
94 } QEMU_PACKED
__attribute((__aligned__(4)));
98 struct e820_entry entry
[E820_NR_ENTRIES
];
99 } QEMU_PACKED
__attribute((__aligned__(4)));
101 static struct e820_table e820_reserve
;
102 static struct e820_entry
*e820_table
;
103 static unsigned e820_entries
;
104 struct hpet_fw_config hpet_cfg
= {.count
= UINT8_MAX
};
106 void gsi_handler(void *opaque
, int n
, int level
)
108 GSIState
*s
= opaque
;
110 DPRINTF("pc: %s GSI %d\n", level
? "raising" : "lowering", n
);
111 if (n
< ISA_NUM_IRQS
) {
112 qemu_set_irq(s
->i8259_irq
[n
], level
);
114 qemu_set_irq(s
->ioapic_irq
[n
], level
);
117 static void ioport80_write(void *opaque
, hwaddr addr
, uint64_t data
,
122 static uint64_t ioport80_read(void *opaque
, hwaddr addr
, unsigned size
)
124 return 0xffffffffffffffffULL
;
127 /* MSDOS compatibility mode FPU exception support */
128 static qemu_irq ferr_irq
;
130 void pc_register_ferr_irq(qemu_irq irq
)
135 /* XXX: add IGNNE support */
136 void cpu_set_ferr(CPUX86State
*s
)
138 qemu_irq_raise(ferr_irq
);
141 static void ioportF0_write(void *opaque
, hwaddr addr
, uint64_t data
,
144 qemu_irq_lower(ferr_irq
);
147 static uint64_t ioportF0_read(void *opaque
, hwaddr addr
, unsigned size
)
149 return 0xffffffffffffffffULL
;
153 uint64_t cpu_get_tsc(CPUX86State
*env
)
155 return cpu_get_ticks();
159 int cpu_get_pic_interrupt(CPUX86State
*env
)
161 X86CPU
*cpu
= x86_env_get_cpu(env
);
164 if (!kvm_irqchip_in_kernel()) {
165 intno
= apic_get_interrupt(cpu
->apic_state
);
169 /* read the irq from the PIC */
170 if (!apic_accept_pic_intr(cpu
->apic_state
)) {
175 intno
= pic_read_irq(isa_pic
);
179 static void pic_irq_request(void *opaque
, int irq
, int level
)
181 CPUState
*cs
= first_cpu
;
182 X86CPU
*cpu
= X86_CPU(cs
);
184 DPRINTF("pic_irqs: %s irq %d\n", level
? "raise" : "lower", irq
);
185 if (cpu
->apic_state
&& !kvm_irqchip_in_kernel()) {
188 if (apic_accept_pic_intr(cpu
->apic_state
)) {
189 apic_deliver_pic_intr(cpu
->apic_state
, level
);
194 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
196 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
201 /* PC cmos mappings */
203 #define REG_EQUIPMENT_BYTE 0x14
205 int cmos_get_fd_drive_type(FloppyDriveType fd0
)
210 case FLOPPY_DRIVE_TYPE_144
:
211 /* 1.44 Mb 3"5 drive */
214 case FLOPPY_DRIVE_TYPE_288
:
215 /* 2.88 Mb 3"5 drive */
218 case FLOPPY_DRIVE_TYPE_120
:
219 /* 1.2 Mb 5"5 drive */
222 case FLOPPY_DRIVE_TYPE_NONE
:
230 static void cmos_init_hd(ISADevice
*s
, int type_ofs
, int info_ofs
,
231 int16_t cylinders
, int8_t heads
, int8_t sectors
)
233 rtc_set_memory(s
, type_ofs
, 47);
234 rtc_set_memory(s
, info_ofs
, cylinders
);
235 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
236 rtc_set_memory(s
, info_ofs
+ 2, heads
);
237 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
238 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
239 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
240 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
241 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
242 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
245 /* convert boot_device letter to something recognizable by the bios */
246 static int boot_device2nibble(char boot_device
)
248 switch(boot_device
) {
251 return 0x01; /* floppy boot */
253 return 0x02; /* hard drive boot */
255 return 0x03; /* CD-ROM boot */
257 return 0x04; /* Network boot */
262 static void set_boot_dev(ISADevice
*s
, const char *boot_device
, Error
**errp
)
264 #define PC_MAX_BOOT_DEVICES 3
265 int nbds
, bds
[3] = { 0, };
268 nbds
= strlen(boot_device
);
269 if (nbds
> PC_MAX_BOOT_DEVICES
) {
270 error_setg(errp
, "Too many boot devices for PC");
273 for (i
= 0; i
< nbds
; i
++) {
274 bds
[i
] = boot_device2nibble(boot_device
[i
]);
276 error_setg(errp
, "Invalid boot device for PC: '%c'",
281 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
282 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
285 static void pc_boot_set(void *opaque
, const char *boot_device
, Error
**errp
)
287 set_boot_dev(opaque
, boot_device
, errp
);
290 static void pc_cmos_init_floppy(ISADevice
*rtc_state
, ISADevice
*floppy
)
293 FloppyDriveType fd_type
[2] = { FLOPPY_DRIVE_TYPE_NONE
,
294 FLOPPY_DRIVE_TYPE_NONE
};
298 for (i
= 0; i
< 2; i
++) {
299 fd_type
[i
] = isa_fdc_get_drive_type(floppy
, i
);
302 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
303 cmos_get_fd_drive_type(fd_type
[1]);
304 rtc_set_memory(rtc_state
, 0x10, val
);
306 val
= rtc_get_memory(rtc_state
, REG_EQUIPMENT_BYTE
);
308 if (fd_type
[0] != FLOPPY_DRIVE_TYPE_NONE
) {
311 if (fd_type
[1] != FLOPPY_DRIVE_TYPE_NONE
) {
318 val
|= 0x01; /* 1 drive, ready for boot */
321 val
|= 0x41; /* 2 drives, ready for boot */
324 rtc_set_memory(rtc_state
, REG_EQUIPMENT_BYTE
, val
);
327 typedef struct pc_cmos_init_late_arg
{
328 ISADevice
*rtc_state
;
330 } pc_cmos_init_late_arg
;
332 typedef struct check_fdc_state
{
337 static int check_fdc(Object
*obj
, void *opaque
)
339 CheckFdcState
*state
= opaque
;
342 Error
*local_err
= NULL
;
344 fdc
= object_dynamic_cast(obj
, TYPE_ISA_FDC
);
349 iobase
= object_property_get_int(obj
, "iobase", &local_err
);
350 if (local_err
|| iobase
!= 0x3f0) {
351 error_free(local_err
);
356 state
->multiple
= true;
358 state
->floppy
= ISA_DEVICE(obj
);
363 static const char * const fdc_container_path
[] = {
364 "/unattached", "/peripheral", "/peripheral-anon"
368 * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers
371 ISADevice
*pc_find_fdc0(void)
375 CheckFdcState state
= { 0 };
377 for (i
= 0; i
< ARRAY_SIZE(fdc_container_path
); i
++) {
378 container
= container_get(qdev_get_machine(), fdc_container_path
[i
]);
379 object_child_foreach(container
, check_fdc
, &state
);
382 if (state
.multiple
) {
383 error_report("warning: multiple floppy disk controllers with "
384 "iobase=0x3f0 have been found");
385 error_printf("the one being picked for CMOS setup might not reflect "
392 static void pc_cmos_init_late(void *opaque
)
394 pc_cmos_init_late_arg
*arg
= opaque
;
395 ISADevice
*s
= arg
->rtc_state
;
397 int8_t heads
, sectors
;
402 if (ide_get_geometry(arg
->idebus
[0], 0,
403 &cylinders
, &heads
, §ors
) >= 0) {
404 cmos_init_hd(s
, 0x19, 0x1b, cylinders
, heads
, sectors
);
407 if (ide_get_geometry(arg
->idebus
[0], 1,
408 &cylinders
, &heads
, §ors
) >= 0) {
409 cmos_init_hd(s
, 0x1a, 0x24, cylinders
, heads
, sectors
);
412 rtc_set_memory(s
, 0x12, val
);
415 for (i
= 0; i
< 4; i
++) {
416 /* NOTE: ide_get_geometry() returns the physical
417 geometry. It is always such that: 1 <= sects <= 63, 1
418 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
419 geometry can be different if a translation is done. */
420 if (ide_get_geometry(arg
->idebus
[i
/ 2], i
% 2,
421 &cylinders
, &heads
, §ors
) >= 0) {
422 trans
= ide_get_bios_chs_trans(arg
->idebus
[i
/ 2], i
% 2) - 1;
423 assert((trans
& ~3) == 0);
424 val
|= trans
<< (i
* 2);
427 rtc_set_memory(s
, 0x39, val
);
429 pc_cmos_init_floppy(s
, pc_find_fdc0());
431 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
434 void pc_cmos_init(PCMachineState
*pcms
,
435 BusState
*idebus0
, BusState
*idebus1
,
439 static pc_cmos_init_late_arg arg
;
441 /* various important CMOS locations needed by PC/Bochs bios */
444 /* base memory (first MiB) */
445 val
= MIN(pcms
->below_4g_mem_size
/ 1024, 640);
446 rtc_set_memory(s
, 0x15, val
);
447 rtc_set_memory(s
, 0x16, val
>> 8);
448 /* extended memory (next 64MiB) */
449 if (pcms
->below_4g_mem_size
> 1024 * 1024) {
450 val
= (pcms
->below_4g_mem_size
- 1024 * 1024) / 1024;
456 rtc_set_memory(s
, 0x17, val
);
457 rtc_set_memory(s
, 0x18, val
>> 8);
458 rtc_set_memory(s
, 0x30, val
);
459 rtc_set_memory(s
, 0x31, val
>> 8);
460 /* memory between 16MiB and 4GiB */
461 if (pcms
->below_4g_mem_size
> 16 * 1024 * 1024) {
462 val
= (pcms
->below_4g_mem_size
- 16 * 1024 * 1024) / 65536;
468 rtc_set_memory(s
, 0x34, val
);
469 rtc_set_memory(s
, 0x35, val
>> 8);
470 /* memory above 4GiB */
471 val
= pcms
->above_4g_mem_size
/ 65536;
472 rtc_set_memory(s
, 0x5b, val
);
473 rtc_set_memory(s
, 0x5c, val
>> 8);
474 rtc_set_memory(s
, 0x5d, val
>> 16);
476 object_property_add_link(OBJECT(pcms
), "rtc_state",
478 (Object
**)&pcms
->rtc
,
479 object_property_allow_set_link
,
480 OBJ_PROP_LINK_UNREF_ON_RELEASE
, &error_abort
);
481 object_property_set_link(OBJECT(pcms
), OBJECT(s
),
482 "rtc_state", &error_abort
);
484 set_boot_dev(s
, MACHINE(pcms
)->boot_order
, &error_fatal
);
487 val
|= 0x02; /* FPU is there */
488 val
|= 0x04; /* PS/2 mouse installed */
489 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
491 /* hard drives and FDC */
493 arg
.idebus
[0] = idebus0
;
494 arg
.idebus
[1] = idebus1
;
495 qemu_register_reset(pc_cmos_init_late
, &arg
);
498 #define TYPE_PORT92 "port92"
499 #define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92)
501 /* port 92 stuff: could be split off */
502 typedef struct Port92State
{
503 ISADevice parent_obj
;
510 static void port92_write(void *opaque
, hwaddr addr
, uint64_t val
,
513 Port92State
*s
= opaque
;
514 int oldval
= s
->outport
;
516 DPRINTF("port92: write 0x%02" PRIx64
"\n", val
);
518 qemu_set_irq(s
->a20_out
, (val
>> 1) & 1);
519 if ((val
& 1) && !(oldval
& 1)) {
520 qemu_system_reset_request();
524 static uint64_t port92_read(void *opaque
, hwaddr addr
,
527 Port92State
*s
= opaque
;
531 DPRINTF("port92: read 0x%02x\n", ret
);
535 static void port92_init(ISADevice
*dev
, qemu_irq a20_out
)
537 qdev_connect_gpio_out_named(DEVICE(dev
), PORT92_A20_LINE
, 0, a20_out
);
540 static const VMStateDescription vmstate_port92_isa
= {
543 .minimum_version_id
= 1,
544 .fields
= (VMStateField
[]) {
545 VMSTATE_UINT8(outport
, Port92State
),
546 VMSTATE_END_OF_LIST()
550 static void port92_reset(DeviceState
*d
)
552 Port92State
*s
= PORT92(d
);
557 static const MemoryRegionOps port92_ops
= {
559 .write
= port92_write
,
561 .min_access_size
= 1,
562 .max_access_size
= 1,
564 .endianness
= DEVICE_LITTLE_ENDIAN
,
567 static void port92_initfn(Object
*obj
)
569 Port92State
*s
= PORT92(obj
);
571 memory_region_init_io(&s
->io
, OBJECT(s
), &port92_ops
, s
, "port92", 1);
575 qdev_init_gpio_out_named(DEVICE(obj
), &s
->a20_out
, PORT92_A20_LINE
, 1);
578 static void port92_realizefn(DeviceState
*dev
, Error
**errp
)
580 ISADevice
*isadev
= ISA_DEVICE(dev
);
581 Port92State
*s
= PORT92(dev
);
583 isa_register_ioport(isadev
, &s
->io
, 0x92);
586 static void port92_class_initfn(ObjectClass
*klass
, void *data
)
588 DeviceClass
*dc
= DEVICE_CLASS(klass
);
590 dc
->realize
= port92_realizefn
;
591 dc
->reset
= port92_reset
;
592 dc
->vmsd
= &vmstate_port92_isa
;
594 * Reason: unlike ordinary ISA devices, this one needs additional
595 * wiring: its A20 output line needs to be wired up by
598 dc
->cannot_instantiate_with_device_add_yet
= true;
601 static const TypeInfo port92_info
= {
603 .parent
= TYPE_ISA_DEVICE
,
604 .instance_size
= sizeof(Port92State
),
605 .instance_init
= port92_initfn
,
606 .class_init
= port92_class_initfn
,
609 static void port92_register_types(void)
611 type_register_static(&port92_info
);
614 type_init(port92_register_types
)
616 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
618 X86CPU
*cpu
= opaque
;
620 /* XXX: send to all CPUs ? */
621 /* XXX: add logic to handle multiple A20 line sources */
622 x86_cpu_set_a20(cpu
, level
);
625 int e820_add_entry(uint64_t address
, uint64_t length
, uint32_t type
)
627 int index
= le32_to_cpu(e820_reserve
.count
);
628 struct e820_entry
*entry
;
630 if (type
!= E820_RAM
) {
631 /* old FW_CFG_E820_TABLE entry -- reservations only */
632 if (index
>= E820_NR_ENTRIES
) {
635 entry
= &e820_reserve
.entry
[index
++];
637 entry
->address
= cpu_to_le64(address
);
638 entry
->length
= cpu_to_le64(length
);
639 entry
->type
= cpu_to_le32(type
);
641 e820_reserve
.count
= cpu_to_le32(index
);
644 /* new "etc/e820" file -- include ram too */
645 e820_table
= g_renew(struct e820_entry
, e820_table
, e820_entries
+ 1);
646 e820_table
[e820_entries
].address
= cpu_to_le64(address
);
647 e820_table
[e820_entries
].length
= cpu_to_le64(length
);
648 e820_table
[e820_entries
].type
= cpu_to_le32(type
);
654 int e820_get_num_entries(void)
659 bool e820_get_entry(int idx
, uint32_t type
, uint64_t *address
, uint64_t *length
)
661 if (idx
< e820_entries
&& e820_table
[idx
].type
== cpu_to_le32(type
)) {
662 *address
= le64_to_cpu(e820_table
[idx
].address
);
663 *length
= le64_to_cpu(e820_table
[idx
].length
);
669 /* Enables contiguous-apic-ID mode, for compatibility */
670 static bool compat_apic_id_mode
;
672 void enable_compat_apic_id_mode(void)
674 compat_apic_id_mode
= true;
677 /* Calculates initial APIC ID for a specific CPU index
679 * Currently we need to be able to calculate the APIC ID from the CPU index
680 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
681 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
682 * all CPUs up to max_cpus.
684 static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index
)
689 correct_id
= x86_apicid_from_cpu_idx(smp_cores
, smp_threads
, cpu_index
);
690 if (compat_apic_id_mode
) {
691 if (cpu_index
!= correct_id
&& !warned
&& !qtest_enabled()) {
692 error_report("APIC IDs set in compatibility mode, "
693 "CPU topology won't match the configuration");
702 static void pc_build_smbios(FWCfgState
*fw_cfg
)
704 uint8_t *smbios_tables
, *smbios_anchor
;
705 size_t smbios_tables_len
, smbios_anchor_len
;
706 struct smbios_phys_mem_area
*mem_array
;
707 unsigned i
, array_count
;
709 smbios_tables
= smbios_get_table_legacy(&smbios_tables_len
);
711 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
712 smbios_tables
, smbios_tables_len
);
715 /* build the array of physical mem area from e820 table */
716 mem_array
= g_malloc0(sizeof(*mem_array
) * e820_get_num_entries());
717 for (i
= 0, array_count
= 0; i
< e820_get_num_entries(); i
++) {
720 if (e820_get_entry(i
, E820_RAM
, &addr
, &len
)) {
721 mem_array
[array_count
].address
= addr
;
722 mem_array
[array_count
].length
= len
;
726 smbios_get_tables(mem_array
, array_count
,
727 &smbios_tables
, &smbios_tables_len
,
728 &smbios_anchor
, &smbios_anchor_len
);
732 fw_cfg_add_file(fw_cfg
, "etc/smbios/smbios-tables",
733 smbios_tables
, smbios_tables_len
);
734 fw_cfg_add_file(fw_cfg
, "etc/smbios/smbios-anchor",
735 smbios_anchor
, smbios_anchor_len
);
739 static FWCfgState
*bochs_bios_init(AddressSpace
*as
, PCMachineState
*pcms
)
742 uint64_t *numa_fw_cfg
;
745 fw_cfg
= fw_cfg_init_io_dma(FW_CFG_IO_BASE
, FW_CFG_IO_BASE
+ 4, as
);
747 /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
749 * SeaBIOS needs FW_CFG_MAX_CPUS for CPU hotplug, but the CPU hotplug
750 * QEMU<->SeaBIOS interface is not based on the "CPU index", but on the APIC
751 * ID of hotplugged CPUs[1]. This means that FW_CFG_MAX_CPUS is not the
752 * "maximum number of CPUs", but the "limit to the APIC ID values SeaBIOS
755 * So, this means we must not use max_cpus, here, but the maximum possible
756 * APIC ID value, plus one.
758 * [1] The only kind of "CPU identifier" used between SeaBIOS and QEMU is
759 * the APIC ID, not the "CPU index"
761 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, (uint16_t)pcms
->apic_id_limit
);
762 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
763 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
,
764 acpi_tables
, acpi_tables_len
);
765 fw_cfg_add_i32(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, kvm_allows_irq0_override());
767 fw_cfg_add_bytes(fw_cfg
, FW_CFG_E820_TABLE
,
768 &e820_reserve
, sizeof(e820_reserve
));
769 fw_cfg_add_file(fw_cfg
, "etc/e820", e820_table
,
770 sizeof(struct e820_entry
) * e820_entries
);
772 fw_cfg_add_bytes(fw_cfg
, FW_CFG_HPET
, &hpet_cfg
, sizeof(hpet_cfg
));
773 /* allocate memory for the NUMA channel: one (64bit) word for the number
774 * of nodes, one word for each VCPU->node and one word for each node to
775 * hold the amount of memory.
777 numa_fw_cfg
= g_new0(uint64_t, 1 + pcms
->apic_id_limit
+ nb_numa_nodes
);
778 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
779 for (i
= 0; i
< max_cpus
; i
++) {
780 unsigned int apic_id
= x86_cpu_apic_id_from_index(i
);
781 assert(apic_id
< pcms
->apic_id_limit
);
782 j
= numa_get_node_for_cpu(i
);
783 if (j
< nb_numa_nodes
) {
784 numa_fw_cfg
[apic_id
+ 1] = cpu_to_le64(j
);
787 for (i
= 0; i
< nb_numa_nodes
; i
++) {
788 numa_fw_cfg
[pcms
->apic_id_limit
+ 1 + i
] =
789 cpu_to_le64(numa_info
[i
].node_mem
);
791 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, numa_fw_cfg
,
792 (1 + pcms
->apic_id_limit
+ nb_numa_nodes
) *
793 sizeof(*numa_fw_cfg
));
798 static long get_file_size(FILE *f
)
802 /* XXX: on Unix systems, using fstat() probably makes more sense */
805 fseek(f
, 0, SEEK_END
);
807 fseek(f
, where
, SEEK_SET
);
812 /* setup_data types */
814 #define SETUP_E820_EXT 1
824 } __attribute__((packed
));
826 static void load_linux(PCMachineState
*pcms
,
830 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
831 int dtb_size
, setup_data_offset
;
833 uint8_t header
[8192], *setup
, *kernel
, *initrd_data
;
834 hwaddr real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
837 MachineState
*machine
= MACHINE(pcms
);
838 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
839 struct setup_data
*setup_data
;
840 const char *kernel_filename
= machine
->kernel_filename
;
841 const char *initrd_filename
= machine
->initrd_filename
;
842 const char *dtb_filename
= machine
->dtb
;
843 const char *kernel_cmdline
= machine
->kernel_cmdline
;
845 /* Align to 16 bytes as a paranoia measure */
846 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
848 /* load the kernel header */
849 f
= fopen(kernel_filename
, "rb");
850 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
851 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
852 MIN(ARRAY_SIZE(header
), kernel_size
)) {
853 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
854 kernel_filename
, strerror(errno
));
858 /* kernel protocol version */
860 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
862 if (ldl_p(header
+0x202) == 0x53726448) {
863 protocol
= lduw_p(header
+0x206);
865 /* This looks like a multiboot kernel. If it is, let's stop
866 treating it like a Linux kernel. */
867 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
868 kernel_cmdline
, kernel_size
, header
)) {
874 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
877 cmdline_addr
= 0x9a000 - cmdline_size
;
879 } else if (protocol
< 0x202) {
880 /* High but ancient kernel */
882 cmdline_addr
= 0x9a000 - cmdline_size
;
883 prot_addr
= 0x100000;
885 /* High and recent kernel */
887 cmdline_addr
= 0x20000;
888 prot_addr
= 0x100000;
893 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
894 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
895 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
901 /* highest address for loading the initrd */
902 if (protocol
>= 0x203) {
903 initrd_max
= ldl_p(header
+0x22c);
905 initrd_max
= 0x37ffffff;
908 if (initrd_max
>= pcms
->below_4g_mem_size
- pcmc
->acpi_data_size
) {
909 initrd_max
= pcms
->below_4g_mem_size
- pcmc
->acpi_data_size
- 1;
912 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
913 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
)+1);
914 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
916 if (protocol
>= 0x202) {
917 stl_p(header
+0x228, cmdline_addr
);
919 stw_p(header
+0x20, 0xA33F);
920 stw_p(header
+0x22, cmdline_addr
-real_addr
);
923 /* handle vga= parameter */
924 vmode
= strstr(kernel_cmdline
, "vga=");
926 unsigned int video_mode
;
929 if (!strncmp(vmode
, "normal", 6)) {
931 } else if (!strncmp(vmode
, "ext", 3)) {
933 } else if (!strncmp(vmode
, "ask", 3)) {
936 video_mode
= strtol(vmode
, NULL
, 0);
938 stw_p(header
+0x1fa, video_mode
);
942 /* High nybble = B reserved for QEMU; low nybble is revision number.
943 If this code is substantially changed, you may want to consider
944 incrementing the revision. */
945 if (protocol
>= 0x200) {
946 header
[0x210] = 0xB0;
949 if (protocol
>= 0x201) {
950 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
951 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
955 if (initrd_filename
) {
956 if (protocol
< 0x200) {
957 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
961 initrd_size
= get_image_size(initrd_filename
);
962 if (initrd_size
< 0) {
963 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
964 initrd_filename
, strerror(errno
));
968 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
970 initrd_data
= g_malloc(initrd_size
);
971 load_image(initrd_filename
, initrd_data
);
973 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
974 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
975 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
977 stl_p(header
+0x218, initrd_addr
);
978 stl_p(header
+0x21c, initrd_size
);
981 /* load kernel and setup */
982 setup_size
= header
[0x1f1];
983 if (setup_size
== 0) {
986 setup_size
= (setup_size
+1)*512;
987 if (setup_size
> kernel_size
) {
988 fprintf(stderr
, "qemu: invalid kernel header\n");
991 kernel_size
-= setup_size
;
993 setup
= g_malloc(setup_size
);
994 kernel
= g_malloc(kernel_size
);
995 fseek(f
, 0, SEEK_SET
);
996 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
997 fprintf(stderr
, "fread() failed\n");
1000 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
1001 fprintf(stderr
, "fread() failed\n");
1006 /* append dtb to kernel */
1008 if (protocol
< 0x209) {
1009 fprintf(stderr
, "qemu: Linux kernel too old to load a dtb\n");
1013 dtb_size
= get_image_size(dtb_filename
);
1014 if (dtb_size
<= 0) {
1015 fprintf(stderr
, "qemu: error reading dtb %s: %s\n",
1016 dtb_filename
, strerror(errno
));
1020 setup_data_offset
= QEMU_ALIGN_UP(kernel_size
, 16);
1021 kernel_size
= setup_data_offset
+ sizeof(struct setup_data
) + dtb_size
;
1022 kernel
= g_realloc(kernel
, kernel_size
);
1024 stq_p(header
+0x250, prot_addr
+ setup_data_offset
);
1026 setup_data
= (struct setup_data
*)(kernel
+ setup_data_offset
);
1027 setup_data
->next
= 0;
1028 setup_data
->type
= cpu_to_le32(SETUP_DTB
);
1029 setup_data
->len
= cpu_to_le32(dtb_size
);
1031 load_image_size(dtb_filename
, setup_data
->data
, dtb_size
);
1034 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
1036 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
1037 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
1038 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
1040 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
1041 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
1042 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
1044 if (fw_cfg_dma_enabled(fw_cfg
)) {
1045 option_rom
[nb_option_roms
].name
= "linuxboot_dma.bin";
1046 option_rom
[nb_option_roms
].bootindex
= 0;
1048 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
1049 option_rom
[nb_option_roms
].bootindex
= 0;
1054 #define NE2000_NB_MAX 6
1056 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
1058 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
1060 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
)
1062 static int nb_ne2k
= 0;
1064 if (nb_ne2k
== NE2000_NB_MAX
)
1066 isa_ne2000_init(bus
, ne2000_io
[nb_ne2k
],
1067 ne2000_irq
[nb_ne2k
], nd
);
1071 DeviceState
*cpu_get_current_apic(void)
1074 X86CPU
*cpu
= X86_CPU(current_cpu
);
1075 return cpu
->apic_state
;
1081 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
1083 X86CPU
*cpu
= opaque
;
1086 cpu_interrupt(CPU(cpu
), CPU_INTERRUPT_SMI
);
1090 static int pc_present_cpus_count(PCMachineState
*pcms
)
1092 int i
, boot_cpus
= 0;
1093 for (i
= 0; i
< pcms
->possible_cpus
->len
; i
++) {
1094 if (pcms
->possible_cpus
->cpus
[i
].cpu
) {
1101 static X86CPU
*pc_new_cpu(const char *typename
, int64_t apic_id
,
1105 Error
*local_err
= NULL
;
1107 cpu
= X86_CPU(object_new(typename
));
1109 object_property_set_int(OBJECT(cpu
), apic_id
, "apic-id", &local_err
);
1110 object_property_set_bool(OBJECT(cpu
), true, "realized", &local_err
);
1113 error_propagate(errp
, local_err
);
1114 object_unref(OBJECT(cpu
));
1120 void pc_hot_add_cpu(const int64_t id
, Error
**errp
)
1124 PCMachineState
*pcms
= PC_MACHINE(qdev_get_machine());
1125 int64_t apic_id
= x86_cpu_apic_id_from_index(id
);
1126 Error
*local_err
= NULL
;
1129 error_setg(errp
, "Invalid CPU id: %" PRIi64
, id
);
1133 if (apic_id
>= ACPI_CPU_HOTPLUG_ID_LIMIT
) {
1134 error_setg(errp
, "Unable to add CPU: %" PRIi64
1135 ", resulting APIC ID (%" PRIi64
") is too large",
1140 assert(pcms
->possible_cpus
->cpus
[0].cpu
); /* BSP is always present */
1141 oc
= OBJECT_CLASS(CPU_GET_CLASS(pcms
->possible_cpus
->cpus
[0].cpu
));
1142 cpu
= pc_new_cpu(object_class_get_name(oc
), apic_id
, &local_err
);
1144 error_propagate(errp
, local_err
);
1147 object_unref(OBJECT(cpu
));
1150 void pc_cpus_init(PCMachineState
*pcms
)
1155 const char *typename
;
1156 gchar
**model_pieces
;
1158 MachineState
*machine
= MACHINE(pcms
);
1161 if (machine
->cpu_model
== NULL
) {
1162 #ifdef TARGET_X86_64
1163 machine
->cpu_model
= "qemu64";
1165 machine
->cpu_model
= "qemu32";
1169 model_pieces
= g_strsplit(machine
->cpu_model
, ",", 2);
1170 if (!model_pieces
[0]) {
1171 error_report("Invalid/empty CPU model name");
1175 oc
= cpu_class_by_name(TYPE_X86_CPU
, model_pieces
[0]);
1177 error_report("Unable to find CPU definition: %s", model_pieces
[0]);
1180 typename
= object_class_get_name(oc
);
1182 cc
->parse_features(typename
, model_pieces
[1], &error_fatal
);
1183 g_strfreev(model_pieces
);
1185 /* Calculates the limit to CPU APIC ID values
1187 * Limit for the APIC ID value, so that all
1188 * CPU APIC IDs are < pcms->apic_id_limit.
1190 * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
1192 pcms
->apic_id_limit
= x86_cpu_apic_id_from_index(max_cpus
- 1) + 1;
1193 pcms
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
1194 sizeof(CPUArchId
) * max_cpus
);
1195 for (i
= 0; i
< max_cpus
; i
++) {
1196 pcms
->possible_cpus
->cpus
[i
].arch_id
= x86_cpu_apic_id_from_index(i
);
1197 pcms
->possible_cpus
->len
++;
1199 cpu
= pc_new_cpu(typename
, x86_cpu_apic_id_from_index(i
),
1201 object_unref(OBJECT(cpu
));
1205 /* tell smbios about cpuid version and features */
1206 smbios_set_cpuid(cpu
->env
.cpuid_version
, cpu
->env
.features
[FEAT_1_EDX
]);
1209 static void pc_build_feature_control_file(PCMachineState
*pcms
)
1211 X86CPU
*cpu
= X86_CPU(pcms
->possible_cpus
->cpus
[0].cpu
);
1212 CPUX86State
*env
= &cpu
->env
;
1213 uint32_t unused
, ecx
, edx
;
1214 uint64_t feature_control_bits
= 0;
1217 cpu_x86_cpuid(env
, 1, 0, &unused
, &unused
, &ecx
, &edx
);
1218 if (ecx
& CPUID_EXT_VMX
) {
1219 feature_control_bits
|= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX
;
1222 if ((edx
& (CPUID_EXT2_MCE
| CPUID_EXT2_MCA
)) ==
1223 (CPUID_EXT2_MCE
| CPUID_EXT2_MCA
) &&
1224 (env
->mcg_cap
& MCG_LMCE_P
)) {
1225 feature_control_bits
|= FEATURE_CONTROL_LMCE
;
1228 if (!feature_control_bits
) {
1232 val
= g_malloc(sizeof(*val
));
1233 *val
= cpu_to_le64(feature_control_bits
| FEATURE_CONTROL_LOCKED
);
1234 fw_cfg_add_file(pcms
->fw_cfg
, "etc/msr_feature_control", val
, sizeof(*val
));
1238 void pc_machine_done(Notifier
*notifier
, void *data
)
1240 PCMachineState
*pcms
= container_of(notifier
,
1241 PCMachineState
, machine_done
);
1242 PCIBus
*bus
= pcms
->bus
;
1244 /* set the number of CPUs */
1245 rtc_set_memory(pcms
->rtc
, 0x5f, pc_present_cpus_count(pcms
) - 1);
1248 int extra_hosts
= 0;
1250 QLIST_FOREACH(bus
, &bus
->child
, sibling
) {
1251 /* look for expander root buses */
1252 if (pci_bus_is_root(bus
)) {
1256 if (extra_hosts
&& pcms
->fw_cfg
) {
1257 uint64_t *val
= g_malloc(sizeof(*val
));
1258 *val
= cpu_to_le64(extra_hosts
);
1259 fw_cfg_add_file(pcms
->fw_cfg
,
1260 "etc/extra-pci-roots", val
, sizeof(*val
));
1266 pc_build_smbios(pcms
->fw_cfg
);
1267 pc_build_feature_control_file(pcms
);
1271 void pc_guest_info_init(PCMachineState
*pcms
)
1275 pcms
->apic_xrupt_override
= kvm_allows_irq0_override();
1276 pcms
->numa_nodes
= nb_numa_nodes
;
1277 pcms
->node_mem
= g_malloc0(pcms
->numa_nodes
*
1278 sizeof *pcms
->node_mem
);
1279 for (i
= 0; i
< nb_numa_nodes
; i
++) {
1280 pcms
->node_mem
[i
] = numa_info
[i
].node_mem
;
1283 pcms
->machine_done
.notify
= pc_machine_done
;
1284 qemu_add_machine_init_done_notifier(&pcms
->machine_done
);
1287 /* setup pci memory address space mapping into system address space */
1288 void pc_pci_as_mapping_init(Object
*owner
, MemoryRegion
*system_memory
,
1289 MemoryRegion
*pci_address_space
)
1291 /* Set to lower priority than RAM */
1292 memory_region_add_subregion_overlap(system_memory
, 0x0,
1293 pci_address_space
, -1);
1296 void pc_acpi_init(const char *default_dsdt
)
1300 if (acpi_tables
!= NULL
) {
1301 /* manually set via -acpitable, leave it alone */
1305 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, default_dsdt
);
1306 if (filename
== NULL
) {
1307 fprintf(stderr
, "WARNING: failed to find %s\n", default_dsdt
);
1309 QemuOpts
*opts
= qemu_opts_create(qemu_find_opts("acpi"), NULL
, 0,
1313 qemu_opt_set(opts
, "file", filename
, &error_abort
);
1315 acpi_table_add_builtin(opts
, &err
);
1317 error_reportf_err(err
, "WARNING: failed to load %s: ",
1324 void xen_load_linux(PCMachineState
*pcms
)
1329 assert(MACHINE(pcms
)->kernel_filename
!= NULL
);
1331 fw_cfg
= fw_cfg_init_io(FW_CFG_IO_BASE
);
1334 load_linux(pcms
, fw_cfg
);
1335 for (i
= 0; i
< nb_option_roms
; i
++) {
1336 assert(!strcmp(option_rom
[i
].name
, "linuxboot.bin") ||
1337 !strcmp(option_rom
[i
].name
, "linuxboot_dma.bin") ||
1338 !strcmp(option_rom
[i
].name
, "multiboot.bin"));
1339 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1341 pcms
->fw_cfg
= fw_cfg
;
1344 void pc_memory_init(PCMachineState
*pcms
,
1345 MemoryRegion
*system_memory
,
1346 MemoryRegion
*rom_memory
,
1347 MemoryRegion
**ram_memory
)
1350 MemoryRegion
*ram
, *option_rom_mr
;
1351 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
1353 MachineState
*machine
= MACHINE(pcms
);
1354 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1356 assert(machine
->ram_size
== pcms
->below_4g_mem_size
+
1357 pcms
->above_4g_mem_size
);
1359 linux_boot
= (machine
->kernel_filename
!= NULL
);
1361 /* Allocate RAM. We allocate it as a single memory region and use
1362 * aliases to address portions of it, mostly for backwards compatibility
1363 * with older qemus that used qemu_ram_alloc().
1365 ram
= g_malloc(sizeof(*ram
));
1366 memory_region_allocate_system_memory(ram
, NULL
, "pc.ram",
1369 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
1370 memory_region_init_alias(ram_below_4g
, NULL
, "ram-below-4g", ram
,
1371 0, pcms
->below_4g_mem_size
);
1372 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
1373 e820_add_entry(0, pcms
->below_4g_mem_size
, E820_RAM
);
1374 if (pcms
->above_4g_mem_size
> 0) {
1375 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
1376 memory_region_init_alias(ram_above_4g
, NULL
, "ram-above-4g", ram
,
1377 pcms
->below_4g_mem_size
,
1378 pcms
->above_4g_mem_size
);
1379 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
1381 e820_add_entry(0x100000000ULL
, pcms
->above_4g_mem_size
, E820_RAM
);
1384 if (!pcmc
->has_reserved_memory
&&
1385 (machine
->ram_slots
||
1386 (machine
->maxram_size
> machine
->ram_size
))) {
1387 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1389 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s",
1394 /* initialize hotplug memory address space */
1395 if (pcmc
->has_reserved_memory
&&
1396 (machine
->ram_size
< machine
->maxram_size
)) {
1397 ram_addr_t hotplug_mem_size
=
1398 machine
->maxram_size
- machine
->ram_size
;
1400 if (machine
->ram_slots
> ACPI_MAX_RAM_SLOTS
) {
1401 error_report("unsupported amount of memory slots: %"PRIu64
,
1402 machine
->ram_slots
);
1406 if (QEMU_ALIGN_UP(machine
->maxram_size
,
1407 TARGET_PAGE_SIZE
) != machine
->maxram_size
) {
1408 error_report("maximum memory size must by aligned to multiple of "
1409 "%d bytes", TARGET_PAGE_SIZE
);
1413 pcms
->hotplug_memory
.base
=
1414 ROUND_UP(0x100000000ULL
+ pcms
->above_4g_mem_size
, 1ULL << 30);
1416 if (pcmc
->enforce_aligned_dimm
) {
1417 /* size hotplug region assuming 1G page max alignment per slot */
1418 hotplug_mem_size
+= (1ULL << 30) * machine
->ram_slots
;
1421 if ((pcms
->hotplug_memory
.base
+ hotplug_mem_size
) <
1423 error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT
,
1424 machine
->maxram_size
);
1428 memory_region_init(&pcms
->hotplug_memory
.mr
, OBJECT(pcms
),
1429 "hotplug-memory", hotplug_mem_size
);
1430 memory_region_add_subregion(system_memory
, pcms
->hotplug_memory
.base
,
1431 &pcms
->hotplug_memory
.mr
);
1434 /* Initialize PC system firmware */
1435 pc_system_firmware_init(rom_memory
, !pcmc
->pci_enabled
);
1437 option_rom_mr
= g_malloc(sizeof(*option_rom_mr
));
1438 memory_region_init_ram(option_rom_mr
, NULL
, "pc.rom", PC_ROM_SIZE
,
1440 vmstate_register_ram_global(option_rom_mr
);
1441 memory_region_add_subregion_overlap(rom_memory
,
1446 fw_cfg
= bochs_bios_init(&address_space_memory
, pcms
);
1450 if (pcmc
->has_reserved_memory
&& pcms
->hotplug_memory
.base
) {
1451 uint64_t *val
= g_malloc(sizeof(*val
));
1452 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1453 uint64_t res_mem_end
= pcms
->hotplug_memory
.base
;
1455 if (!pcmc
->broken_reserved_end
) {
1456 res_mem_end
+= memory_region_size(&pcms
->hotplug_memory
.mr
);
1458 *val
= cpu_to_le64(ROUND_UP(res_mem_end
, 0x1ULL
<< 30));
1459 fw_cfg_add_file(fw_cfg
, "etc/reserved-memory-end", val
, sizeof(*val
));
1463 load_linux(pcms
, fw_cfg
);
1466 for (i
= 0; i
< nb_option_roms
; i
++) {
1467 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1469 pcms
->fw_cfg
= fw_cfg
;
1471 /* Init default IOAPIC address space */
1472 pcms
->ioapic_as
= &address_space_memory
;
1475 qemu_irq
pc_allocate_cpu_irq(void)
1477 return qemu_allocate_irq(pic_irq_request
, NULL
, 0);
1480 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1482 DeviceState
*dev
= NULL
;
1484 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_VGA
);
1486 PCIDevice
*pcidev
= pci_vga_init(pci_bus
);
1487 dev
= pcidev
? &pcidev
->qdev
: NULL
;
1488 } else if (isa_bus
) {
1489 ISADevice
*isadev
= isa_vga_init(isa_bus
);
1490 dev
= isadev
? DEVICE(isadev
) : NULL
;
1492 rom_reset_order_override();
1496 static const MemoryRegionOps ioport80_io_ops
= {
1497 .write
= ioport80_write
,
1498 .read
= ioport80_read
,
1499 .endianness
= DEVICE_NATIVE_ENDIAN
,
1501 .min_access_size
= 1,
1502 .max_access_size
= 1,
1506 static const MemoryRegionOps ioportF0_io_ops
= {
1507 .write
= ioportF0_write
,
1508 .read
= ioportF0_read
,
1509 .endianness
= DEVICE_NATIVE_ENDIAN
,
1511 .min_access_size
= 1,
1512 .max_access_size
= 1,
1516 void pc_basic_device_init(ISABus
*isa_bus
, qemu_irq
*gsi
,
1517 ISADevice
**rtc_state
,
1523 DriveInfo
*fd
[MAX_FD
];
1524 DeviceState
*hpet
= NULL
;
1525 int pit_isa_irq
= 0;
1526 qemu_irq pit_alt_irq
= NULL
;
1527 qemu_irq rtc_irq
= NULL
;
1529 ISADevice
*i8042
, *port92
, *vmmouse
, *pit
= NULL
;
1530 MemoryRegion
*ioport80_io
= g_new(MemoryRegion
, 1);
1531 MemoryRegion
*ioportF0_io
= g_new(MemoryRegion
, 1);
1533 memory_region_init_io(ioport80_io
, NULL
, &ioport80_io_ops
, NULL
, "ioport80", 1);
1534 memory_region_add_subregion(isa_bus
->address_space_io
, 0x80, ioport80_io
);
1536 memory_region_init_io(ioportF0_io
, NULL
, &ioportF0_io_ops
, NULL
, "ioportF0", 1);
1537 memory_region_add_subregion(isa_bus
->address_space_io
, 0xf0, ioportF0_io
);
1540 * Check if an HPET shall be created.
1542 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1543 * when the HPET wants to take over. Thus we have to disable the latter.
1545 if (!no_hpet
&& (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1546 /* In order to set property, here not using sysbus_try_create_simple */
1547 hpet
= qdev_try_create(NULL
, TYPE_HPET
);
1549 /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
1550 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
1553 uint8_t compat
= object_property_get_int(OBJECT(hpet
),
1556 qdev_prop_set_uint32(hpet
, HPET_INTCAP
, hpet_irqs
);
1558 qdev_init_nofail(hpet
);
1559 sysbus_mmio_map(SYS_BUS_DEVICE(hpet
), 0, HPET_BASE
);
1561 for (i
= 0; i
< GSI_NUM_PINS
; i
++) {
1562 sysbus_connect_irq(SYS_BUS_DEVICE(hpet
), i
, gsi
[i
]);
1565 pit_alt_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_PIT_INT
);
1566 rtc_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_RTC_INT
);
1569 *rtc_state
= rtc_init(isa_bus
, 2000, rtc_irq
);
1571 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1573 if (!xen_enabled()) {
1574 if (kvm_pit_in_kernel()) {
1575 pit
= kvm_pit_init(isa_bus
, 0x40);
1577 pit
= pit_init(isa_bus
, 0x40, pit_isa_irq
, pit_alt_irq
);
1580 /* connect PIT to output control line of the HPET */
1581 qdev_connect_gpio_out(hpet
, 0, qdev_get_gpio_in(DEVICE(pit
), 0));
1583 pcspk_init(isa_bus
, pit
);
1586 serial_hds_isa_init(isa_bus
, 0, MAX_SERIAL_PORTS
);
1587 parallel_hds_isa_init(isa_bus
, MAX_PARALLEL_PORTS
);
1589 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1590 i8042
= isa_create_simple(isa_bus
, "i8042");
1591 i8042_setup_a20_line(i8042
, a20_line
[0]);
1593 vmport_init(isa_bus
);
1594 vmmouse
= isa_try_create(isa_bus
, "vmmouse");
1599 DeviceState
*dev
= DEVICE(vmmouse
);
1600 qdev_prop_set_ptr(dev
, "ps2_mouse", i8042
);
1601 qdev_init_nofail(dev
);
1603 port92
= isa_create_simple(isa_bus
, "port92");
1604 port92_init(port92
, a20_line
[1]);
1607 DMA_init(isa_bus
, 0);
1609 for(i
= 0; i
< MAX_FD
; i
++) {
1610 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1611 create_fdctrl
|= !!fd
[i
];
1613 if (create_fdctrl
) {
1614 fdctrl_init_isa(isa_bus
, fd
);
1618 void pc_nic_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1622 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC
);
1623 for (i
= 0; i
< nb_nics
; i
++) {
1624 NICInfo
*nd
= &nd_table
[i
];
1626 if (!pci_bus
|| (nd
->model
&& strcmp(nd
->model
, "ne2k_isa") == 0)) {
1627 pc_init_ne2k_isa(isa_bus
, nd
);
1629 pci_nic_init_nofail(nd
, pci_bus
, "e1000", NULL
);
1632 rom_reset_order_override();
1635 void pc_pci_device_init(PCIBus
*pci_bus
)
1640 max_bus
= drive_get_max_bus(IF_SCSI
);
1641 for (bus
= 0; bus
<= max_bus
; bus
++) {
1642 pci_create_simple(pci_bus
, -1, "lsi53c895a");
1646 void ioapic_init_gsi(GSIState
*gsi_state
, const char *parent_name
)
1652 if (kvm_ioapic_in_kernel()) {
1653 dev
= qdev_create(NULL
, "kvm-ioapic");
1655 dev
= qdev_create(NULL
, "ioapic");
1658 object_property_add_child(object_resolve_path(parent_name
, NULL
),
1659 "ioapic", OBJECT(dev
), NULL
);
1661 qdev_init_nofail(dev
);
1662 d
= SYS_BUS_DEVICE(dev
);
1663 sysbus_mmio_map(d
, 0, IO_APIC_DEFAULT_ADDRESS
);
1665 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
1666 gsi_state
->ioapic_irq
[i
] = qdev_get_gpio_in(dev
, i
);
1670 static void pc_dimm_plug(HotplugHandler
*hotplug_dev
,
1671 DeviceState
*dev
, Error
**errp
)
1673 HotplugHandlerClass
*hhc
;
1674 Error
*local_err
= NULL
;
1675 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1676 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1677 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
1678 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
1679 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
1680 uint64_t align
= TARGET_PAGE_SIZE
;
1682 if (memory_region_get_alignment(mr
) && pcmc
->enforce_aligned_dimm
) {
1683 align
= memory_region_get_alignment(mr
);
1686 if (!pcms
->acpi_dev
) {
1687 error_setg(&local_err
,
1688 "memory hotplug is not enabled: missing acpi device");
1692 pc_dimm_memory_plug(dev
, &pcms
->hotplug_memory
, mr
, align
, &local_err
);
1697 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1698 hhc
->plug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &error_abort
);
1700 error_propagate(errp
, local_err
);
1703 static void pc_dimm_unplug_request(HotplugHandler
*hotplug_dev
,
1704 DeviceState
*dev
, Error
**errp
)
1706 HotplugHandlerClass
*hhc
;
1707 Error
*local_err
= NULL
;
1708 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1710 if (!pcms
->acpi_dev
) {
1711 error_setg(&local_err
,
1712 "memory hotplug is not enabled: missing acpi device");
1716 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1717 hhc
->unplug_request(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1720 error_propagate(errp
, local_err
);
1723 static void pc_dimm_unplug(HotplugHandler
*hotplug_dev
,
1724 DeviceState
*dev
, Error
**errp
)
1726 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1727 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
1728 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
1729 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
1730 HotplugHandlerClass
*hhc
;
1731 Error
*local_err
= NULL
;
1733 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1734 hhc
->unplug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1740 pc_dimm_memory_unplug(dev
, &pcms
->hotplug_memory
, mr
);
1741 object_unparent(OBJECT(dev
));
1744 error_propagate(errp
, local_err
);
1747 static int pc_apic_cmp(const void *a
, const void *b
)
1749 CPUArchId
*apic_a
= (CPUArchId
*)a
;
1750 CPUArchId
*apic_b
= (CPUArchId
*)b
;
1752 return apic_a
->arch_id
- apic_b
->arch_id
;
1755 /* returns pointer to CPUArchId descriptor that matches CPU's apic_id
1756 * in pcms->possible_cpus->cpus, if pcms->possible_cpus->cpus has no
1757 * entry correponding to CPU's apic_id returns NULL.
1759 static CPUArchId
*pc_find_cpu_slot(PCMachineState
*pcms
, CPUState
*cpu
,
1762 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
1763 CPUArchId apic_id
, *found_cpu
;
1765 apic_id
.arch_id
= cc
->get_arch_id(CPU(cpu
));
1766 found_cpu
= bsearch(&apic_id
, pcms
->possible_cpus
->cpus
,
1767 pcms
->possible_cpus
->len
, sizeof(*pcms
->possible_cpus
->cpus
),
1769 if (found_cpu
&& idx
) {
1770 *idx
= found_cpu
- pcms
->possible_cpus
->cpus
;
1775 static void pc_cpu_plug(HotplugHandler
*hotplug_dev
,
1776 DeviceState
*dev
, Error
**errp
)
1778 CPUArchId
*found_cpu
;
1779 HotplugHandlerClass
*hhc
;
1780 Error
*local_err
= NULL
;
1781 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1783 if (pcms
->acpi_dev
) {
1784 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1785 hhc
->plug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1791 if (dev
->hotplugged
) {
1792 /* increment the number of CPUs */
1793 rtc_set_memory(pcms
->rtc
, 0x5f, rtc_get_memory(pcms
->rtc
, 0x5f) + 1);
1796 found_cpu
= pc_find_cpu_slot(pcms
, CPU(dev
), NULL
);
1797 found_cpu
->cpu
= CPU(dev
);
1799 error_propagate(errp
, local_err
);
1801 static void pc_cpu_unplug_request_cb(HotplugHandler
*hotplug_dev
,
1802 DeviceState
*dev
, Error
**errp
)
1805 HotplugHandlerClass
*hhc
;
1806 Error
*local_err
= NULL
;
1807 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1809 pc_find_cpu_slot(pcms
, CPU(dev
), &idx
);
1812 error_setg(&local_err
, "Boot CPU is unpluggable");
1816 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1817 hhc
->unplug_request(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1824 error_propagate(errp
, local_err
);
1828 static void pc_cpu_unplug_cb(HotplugHandler
*hotplug_dev
,
1829 DeviceState
*dev
, Error
**errp
)
1831 CPUArchId
*found_cpu
;
1832 HotplugHandlerClass
*hhc
;
1833 Error
*local_err
= NULL
;
1834 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1836 hhc
= HOTPLUG_HANDLER_GET_CLASS(pcms
->acpi_dev
);
1837 hhc
->unplug(HOTPLUG_HANDLER(pcms
->acpi_dev
), dev
, &local_err
);
1843 found_cpu
= pc_find_cpu_slot(pcms
, CPU(dev
), NULL
);
1844 found_cpu
->cpu
= NULL
;
1845 object_unparent(OBJECT(dev
));
1847 rtc_set_memory(pcms
->rtc
, 0x5f, rtc_get_memory(pcms
->rtc
, 0x5f) - 1);
1849 error_propagate(errp
, local_err
);
1852 static void pc_cpu_pre_plug(HotplugHandler
*hotplug_dev
,
1853 DeviceState
*dev
, Error
**errp
)
1857 CPUArchId
*cpu_slot
;
1858 X86CPUTopoInfo topo
;
1859 X86CPU
*cpu
= X86_CPU(dev
);
1860 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1862 /* if APIC ID is not set, set it based on socket/core/thread properties */
1863 if (cpu
->apic_id
== UNASSIGNED_APIC_ID
) {
1864 int max_socket
= (max_cpus
- 1) / smp_threads
/ smp_cores
;
1866 if (cpu
->socket_id
< 0) {
1867 error_setg(errp
, "CPU socket-id is not set");
1869 } else if (cpu
->socket_id
> max_socket
) {
1870 error_setg(errp
, "Invalid CPU socket-id: %u must be in range 0:%u",
1871 cpu
->socket_id
, max_socket
);
1874 if (cpu
->core_id
< 0) {
1875 error_setg(errp
, "CPU core-id is not set");
1877 } else if (cpu
->core_id
> (smp_cores
- 1)) {
1878 error_setg(errp
, "Invalid CPU core-id: %u must be in range 0:%u",
1879 cpu
->core_id
, smp_cores
- 1);
1882 if (cpu
->thread_id
< 0) {
1883 error_setg(errp
, "CPU thread-id is not set");
1885 } else if (cpu
->thread_id
> (smp_threads
- 1)) {
1886 error_setg(errp
, "Invalid CPU thread-id: %u must be in range 0:%u",
1887 cpu
->thread_id
, smp_threads
- 1);
1891 topo
.pkg_id
= cpu
->socket_id
;
1892 topo
.core_id
= cpu
->core_id
;
1893 topo
.smt_id
= cpu
->thread_id
;
1894 cpu
->apic_id
= apicid_from_topo_ids(smp_cores
, smp_threads
, &topo
);
1897 cpu_slot
= pc_find_cpu_slot(pcms
, CPU(dev
), &idx
);
1899 x86_topo_ids_from_apicid(cpu
->apic_id
, smp_cores
, smp_threads
, &topo
);
1900 error_setg(errp
, "Invalid CPU [socket: %u, core: %u, thread: %u] with"
1901 " APIC ID %" PRIu32
", valid index range 0:%d",
1902 topo
.pkg_id
, topo
.core_id
, topo
.smt_id
, cpu
->apic_id
,
1903 pcms
->possible_cpus
->len
- 1);
1907 if (cpu_slot
->cpu
) {
1908 error_setg(errp
, "CPU[%d] with APIC ID %" PRIu32
" exists",
1913 /* if 'address' properties socket-id/core-id/thread-id are not set, set them
1914 * so that query_hotpluggable_cpus would show correct values
1916 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
1917 * once -smp refactoring is complete and there will be CPU private
1918 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
1919 x86_topo_ids_from_apicid(cpu
->apic_id
, smp_cores
, smp_threads
, &topo
);
1920 if (cpu
->socket_id
!= -1 && cpu
->socket_id
!= topo
.pkg_id
) {
1921 error_setg(errp
, "property socket-id: %u doesn't match set apic-id:"
1922 " 0x%x (socket-id: %u)", cpu
->socket_id
, cpu
->apic_id
, topo
.pkg_id
);
1925 cpu
->socket_id
= topo
.pkg_id
;
1927 if (cpu
->core_id
!= -1 && cpu
->core_id
!= topo
.core_id
) {
1928 error_setg(errp
, "property core-id: %u doesn't match set apic-id:"
1929 " 0x%x (core-id: %u)", cpu
->core_id
, cpu
->apic_id
, topo
.core_id
);
1932 cpu
->core_id
= topo
.core_id
;
1934 if (cpu
->thread_id
!= -1 && cpu
->thread_id
!= topo
.smt_id
) {
1935 error_setg(errp
, "property thread-id: %u doesn't match set apic-id:"
1936 " 0x%x (thread-id: %u)", cpu
->thread_id
, cpu
->apic_id
, topo
.smt_id
);
1939 cpu
->thread_id
= topo
.smt_id
;
1942 cs
->cpu_index
= idx
;
1945 static void pc_machine_device_pre_plug_cb(HotplugHandler
*hotplug_dev
,
1946 DeviceState
*dev
, Error
**errp
)
1948 if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1949 pc_cpu_pre_plug(hotplug_dev
, dev
, errp
);
1953 static void pc_machine_device_plug_cb(HotplugHandler
*hotplug_dev
,
1954 DeviceState
*dev
, Error
**errp
)
1956 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1957 pc_dimm_plug(hotplug_dev
, dev
, errp
);
1958 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1959 pc_cpu_plug(hotplug_dev
, dev
, errp
);
1963 static void pc_machine_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
1964 DeviceState
*dev
, Error
**errp
)
1966 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1967 pc_dimm_unplug_request(hotplug_dev
, dev
, errp
);
1968 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1969 pc_cpu_unplug_request_cb(hotplug_dev
, dev
, errp
);
1971 error_setg(errp
, "acpi: device unplug request for not supported device"
1972 " type: %s", object_get_typename(OBJECT(dev
)));
1976 static void pc_machine_device_unplug_cb(HotplugHandler
*hotplug_dev
,
1977 DeviceState
*dev
, Error
**errp
)
1979 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1980 pc_dimm_unplug(hotplug_dev
, dev
, errp
);
1981 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1982 pc_cpu_unplug_cb(hotplug_dev
, dev
, errp
);
1984 error_setg(errp
, "acpi: device unplug for not supported device"
1985 " type: %s", object_get_typename(OBJECT(dev
)));
1989 static HotplugHandler
*pc_get_hotpug_handler(MachineState
*machine
,
1992 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(machine
);
1994 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
1995 object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1996 return HOTPLUG_HANDLER(machine
);
1999 return pcmc
->get_hotplug_handler
?
2000 pcmc
->get_hotplug_handler(machine
, dev
) : NULL
;
2004 pc_machine_get_hotplug_memory_region_size(Object
*obj
, Visitor
*v
,
2005 const char *name
, void *opaque
,
2008 PCMachineState
*pcms
= PC_MACHINE(obj
);
2009 int64_t value
= memory_region_size(&pcms
->hotplug_memory
.mr
);
2011 visit_type_int(v
, name
, &value
, errp
);
2014 static void pc_machine_get_max_ram_below_4g(Object
*obj
, Visitor
*v
,
2015 const char *name
, void *opaque
,
2018 PCMachineState
*pcms
= PC_MACHINE(obj
);
2019 uint64_t value
= pcms
->max_ram_below_4g
;
2021 visit_type_size(v
, name
, &value
, errp
);
2024 static void pc_machine_set_max_ram_below_4g(Object
*obj
, Visitor
*v
,
2025 const char *name
, void *opaque
,
2028 PCMachineState
*pcms
= PC_MACHINE(obj
);
2029 Error
*error
= NULL
;
2032 visit_type_size(v
, name
, &value
, &error
);
2034 error_propagate(errp
, error
);
2037 if (value
> (1ULL << 32)) {
2039 "Machine option 'max-ram-below-4g=%"PRIu64
2040 "' expects size less than or equal to 4G", value
);
2041 error_propagate(errp
, error
);
2045 if (value
< (1ULL << 20)) {
2046 error_report("Warning: small max_ram_below_4g(%"PRIu64
2047 ") less than 1M. BIOS may not work..",
2051 pcms
->max_ram_below_4g
= value
;
2054 static void pc_machine_get_vmport(Object
*obj
, Visitor
*v
, const char *name
,
2055 void *opaque
, Error
**errp
)
2057 PCMachineState
*pcms
= PC_MACHINE(obj
);
2058 OnOffAuto vmport
= pcms
->vmport
;
2060 visit_type_OnOffAuto(v
, name
, &vmport
, errp
);
2063 static void pc_machine_set_vmport(Object
*obj
, Visitor
*v
, const char *name
,
2064 void *opaque
, Error
**errp
)
2066 PCMachineState
*pcms
= PC_MACHINE(obj
);
2068 visit_type_OnOffAuto(v
, name
, &pcms
->vmport
, errp
);
2071 bool pc_machine_is_smm_enabled(PCMachineState
*pcms
)
2073 bool smm_available
= false;
2075 if (pcms
->smm
== ON_OFF_AUTO_OFF
) {
2079 if (tcg_enabled() || qtest_enabled()) {
2080 smm_available
= true;
2081 } else if (kvm_enabled()) {
2082 smm_available
= kvm_has_smm();
2085 if (smm_available
) {
2089 if (pcms
->smm
== ON_OFF_AUTO_ON
) {
2090 error_report("System Management Mode not supported by this hypervisor.");
2096 static void pc_machine_get_smm(Object
*obj
, Visitor
*v
, const char *name
,
2097 void *opaque
, Error
**errp
)
2099 PCMachineState
*pcms
= PC_MACHINE(obj
);
2100 OnOffAuto smm
= pcms
->smm
;
2102 visit_type_OnOffAuto(v
, name
, &smm
, errp
);
2105 static void pc_machine_set_smm(Object
*obj
, Visitor
*v
, const char *name
,
2106 void *opaque
, Error
**errp
)
2108 PCMachineState
*pcms
= PC_MACHINE(obj
);
2110 visit_type_OnOffAuto(v
, name
, &pcms
->smm
, errp
);
2113 static bool pc_machine_get_nvdimm(Object
*obj
, Error
**errp
)
2115 PCMachineState
*pcms
= PC_MACHINE(obj
);
2117 return pcms
->acpi_nvdimm_state
.is_enabled
;
2120 static void pc_machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
2122 PCMachineState
*pcms
= PC_MACHINE(obj
);
2124 pcms
->acpi_nvdimm_state
.is_enabled
= value
;
2127 static void pc_machine_initfn(Object
*obj
)
2129 PCMachineState
*pcms
= PC_MACHINE(obj
);
2131 pcms
->max_ram_below_4g
= 0; /* use default */
2132 pcms
->smm
= ON_OFF_AUTO_AUTO
;
2133 pcms
->vmport
= ON_OFF_AUTO_AUTO
;
2134 /* nvdimm is disabled on default. */
2135 pcms
->acpi_nvdimm_state
.is_enabled
= false;
2138 static void pc_machine_reset(void)
2143 qemu_devices_reset();
2145 /* Reset APIC after devices have been reset to cancel
2146 * any changes that qemu_devices_reset() might have done.
2151 if (cpu
->apic_state
) {
2152 device_reset(cpu
->apic_state
);
2157 static unsigned pc_cpu_index_to_socket_id(unsigned cpu_index
)
2159 X86CPUTopoInfo topo
;
2160 x86_topo_ids_from_idx(smp_cores
, smp_threads
, cpu_index
,
2165 static CPUArchIdList
*pc_possible_cpu_arch_ids(MachineState
*machine
)
2167 PCMachineState
*pcms
= PC_MACHINE(machine
);
2168 int len
= sizeof(CPUArchIdList
) +
2169 sizeof(CPUArchId
) * (pcms
->possible_cpus
->len
);
2170 CPUArchIdList
*list
= g_malloc(len
);
2172 memcpy(list
, pcms
->possible_cpus
, len
);
2176 static HotpluggableCPUList
*pc_query_hotpluggable_cpus(MachineState
*machine
)
2180 HotpluggableCPUList
*head
= NULL
;
2181 PCMachineState
*pcms
= PC_MACHINE(machine
);
2182 const char *cpu_type
;
2184 cpu
= pcms
->possible_cpus
->cpus
[0].cpu
;
2185 assert(cpu
); /* BSP is always present */
2186 cpu_type
= object_class_get_name(OBJECT_CLASS(CPU_GET_CLASS(cpu
)));
2188 for (i
= 0; i
< pcms
->possible_cpus
->len
; i
++) {
2189 X86CPUTopoInfo topo
;
2190 HotpluggableCPUList
*list_item
= g_new0(typeof(*list_item
), 1);
2191 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
2192 CpuInstanceProperties
*cpu_props
= g_new0(typeof(*cpu_props
), 1);
2193 const uint32_t apic_id
= pcms
->possible_cpus
->cpus
[i
].arch_id
;
2195 x86_topo_ids_from_apicid(apic_id
, smp_cores
, smp_threads
, &topo
);
2197 cpu_item
->type
= g_strdup(cpu_type
);
2198 cpu_item
->vcpus_count
= 1;
2199 cpu_props
->has_socket_id
= true;
2200 cpu_props
->socket_id
= topo
.pkg_id
;
2201 cpu_props
->has_core_id
= true;
2202 cpu_props
->core_id
= topo
.core_id
;
2203 cpu_props
->has_thread_id
= true;
2204 cpu_props
->thread_id
= topo
.smt_id
;
2205 cpu_item
->props
= cpu_props
;
2207 cpu
= pcms
->possible_cpus
->cpus
[i
].cpu
;
2209 cpu_item
->has_qom_path
= true;
2210 cpu_item
->qom_path
= object_get_canonical_path(OBJECT(cpu
));
2213 list_item
->value
= cpu_item
;
2214 list_item
->next
= head
;
2220 static void x86_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2222 /* cpu index isn't used */
2226 X86CPU
*cpu
= X86_CPU(cs
);
2228 if (!cpu
->apic_state
) {
2229 cpu_interrupt(cs
, CPU_INTERRUPT_NMI
);
2231 apic_deliver_nmi(cpu
->apic_state
);
2236 static void pc_machine_class_init(ObjectClass
*oc
, void *data
)
2238 MachineClass
*mc
= MACHINE_CLASS(oc
);
2239 PCMachineClass
*pcmc
= PC_MACHINE_CLASS(oc
);
2240 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
2241 NMIClass
*nc
= NMI_CLASS(oc
);
2243 pcmc
->get_hotplug_handler
= mc
->get_hotplug_handler
;
2244 pcmc
->pci_enabled
= true;
2245 pcmc
->has_acpi_build
= true;
2246 pcmc
->rsdp_in_ram
= true;
2247 pcmc
->smbios_defaults
= true;
2248 pcmc
->smbios_uuid_encoded
= true;
2249 pcmc
->gigabyte_align
= true;
2250 pcmc
->has_reserved_memory
= true;
2251 pcmc
->kvmclock_enabled
= true;
2252 pcmc
->enforce_aligned_dimm
= true;
2253 /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported
2254 * to be used at the moment, 32K should be enough for a while. */
2255 pcmc
->acpi_data_size
= 0x20000 + 0x8000;
2256 pcmc
->save_tsc_khz
= true;
2257 mc
->get_hotplug_handler
= pc_get_hotpug_handler
;
2258 mc
->cpu_index_to_socket_id
= pc_cpu_index_to_socket_id
;
2259 mc
->possible_cpu_arch_ids
= pc_possible_cpu_arch_ids
;
2260 mc
->query_hotpluggable_cpus
= pc_query_hotpluggable_cpus
;
2261 mc
->default_boot_order
= "cad";
2262 mc
->hot_add_cpu
= pc_hot_add_cpu
;
2264 mc
->reset
= pc_machine_reset
;
2265 hc
->pre_plug
= pc_machine_device_pre_plug_cb
;
2266 hc
->plug
= pc_machine_device_plug_cb
;
2267 hc
->unplug_request
= pc_machine_device_unplug_request_cb
;
2268 hc
->unplug
= pc_machine_device_unplug_cb
;
2269 nc
->nmi_monitor_handler
= x86_nmi
;
2271 object_class_property_add(oc
, PC_MACHINE_MEMHP_REGION_SIZE
, "int",
2272 pc_machine_get_hotplug_memory_region_size
, NULL
,
2273 NULL
, NULL
, &error_abort
);
2275 object_class_property_add(oc
, PC_MACHINE_MAX_RAM_BELOW_4G
, "size",
2276 pc_machine_get_max_ram_below_4g
, pc_machine_set_max_ram_below_4g
,
2277 NULL
, NULL
, &error_abort
);
2279 object_class_property_set_description(oc
, PC_MACHINE_MAX_RAM_BELOW_4G
,
2280 "Maximum ram below the 4G boundary (32bit boundary)", &error_abort
);
2282 object_class_property_add(oc
, PC_MACHINE_SMM
, "OnOffAuto",
2283 pc_machine_get_smm
, pc_machine_set_smm
,
2284 NULL
, NULL
, &error_abort
);
2285 object_class_property_set_description(oc
, PC_MACHINE_SMM
,
2286 "Enable SMM (pc & q35)", &error_abort
);
2288 object_class_property_add(oc
, PC_MACHINE_VMPORT
, "OnOffAuto",
2289 pc_machine_get_vmport
, pc_machine_set_vmport
,
2290 NULL
, NULL
, &error_abort
);
2291 object_class_property_set_description(oc
, PC_MACHINE_VMPORT
,
2292 "Enable vmport (pc & q35)", &error_abort
);
2294 object_class_property_add_bool(oc
, PC_MACHINE_NVDIMM
,
2295 pc_machine_get_nvdimm
, pc_machine_set_nvdimm
, &error_abort
);
2298 static const TypeInfo pc_machine_info
= {
2299 .name
= TYPE_PC_MACHINE
,
2300 .parent
= TYPE_MACHINE
,
2302 .instance_size
= sizeof(PCMachineState
),
2303 .instance_init
= pc_machine_initfn
,
2304 .class_size
= sizeof(PCMachineClass
),
2305 .class_init
= pc_machine_class_init
,
2306 .interfaces
= (InterfaceInfo
[]) {
2307 { TYPE_HOTPLUG_HANDLER
},
2313 static void pc_machine_register_types(void)
2315 type_register_static(&pc_machine_info
);
2318 type_init(pc_machine_register_types
)