hw/i8259_internal.h

   1 /*
   2  * QEMU 8259 - internal interfaces
   3  *
   4  * Copyright (c) 2011 Jan Kiszka, Siemens AG
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef QEMU_I8259_INTERNAL_H
  26 #define QEMU_I8259_INTERNAL_H
  27
  28 #include "hw.h"
  29 #include "pc.h"
  30 #include "isa.h"
  31
  32 typedef struct PICCommonState PICCommonState;
  33
  34 struct PICCommonState {
  35     ISADevice dev;
  36     uint8_t last_irr; /* edge detection */
  37     uint8_t irr; /* interrupt request register */
  38     uint8_t imr; /* interrupt mask register */
  39     uint8_t isr; /* interrupt service register */
  40     uint8_t priority_add; /* highest irq priority */
  41     uint8_t irq_base;
  42     uint8_t read_reg_select;
  43     uint8_t poll;
  44     uint8_t special_mask;
  45     uint8_t init_state;
  46     uint8_t auto_eoi;
  47     uint8_t rotate_on_auto_eoi;
  48     uint8_t special_fully_nested_mode;
  49     uint8_t init4; /* true if 4 byte init */
  50     uint8_t single_mode; /* true if slave pic is not initialized */
  51     uint8_t elcr; /* PIIX edge/trigger selection*/
  52     uint8_t elcr_mask;
  53     qemu_irq int_out[1];
  54     uint32_t master; /* reflects /SP input pin */
  55     uint32_t iobase;
  56     uint32_t elcr_addr;
  57     MemoryRegion base_io;
  58     MemoryRegion elcr_io;
  59 };
  60
  61 typedef struct PICCommonInfo PICCommonInfo;
  62
  63 struct PICCommonInfo {
  64     ISADeviceInfo isadev;
  65     void (*init)(PICCommonState *s);
  66     void (*pre_save)(PICCommonState *s);
  67     void (*post_load)(PICCommonState *s);
  68 };
  69
  70 void pic_reset_common(PICCommonState *s);
  71
  72 ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master);
  73
  74 void pic_qdev_register(PICCommonInfo *info);
  75
  76 #endif /* !QEMU_I8259_INTERNAL_H */