2 * QEMU IDE disk and CD/DVD-ROM Emulator
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include <hw/pci/pci.h>
29 #include "qemu/error-report.h"
30 #include "qemu/timer.h"
31 #include "sysemu/sysemu.h"
32 #include "sysemu/dma.h"
33 #include "hw/block-common.h"
34 #include "sysemu/blockdev.h"
36 #include <hw/ide/internal.h>
38 /* These values were based on a Seagate ST3500418AS but have been modified
39 to make more sense in QEMU */
40 static const int smart_attributes
[][12] = {
41 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
42 /* raw read error rate*/
43 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
45 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
46 /* start stop count */
47 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
48 /* remapped sectors */
49 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
51 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
52 /* power cycle count */
53 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
54 /* airflow-temperature-celsius */
55 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
58 static int ide_handle_rw_error(IDEState
*s
, int error
, int op
);
59 static void ide_dummy_transfer_stop(IDEState
*s
);
61 static void padstr(char *str
, const char *src
, int len
)
64 for(i
= 0; i
< len
; i
++) {
73 static void put_le16(uint16_t *p
, unsigned int v
)
78 static void ide_identify(IDEState
*s
)
82 IDEDevice
*dev
= s
->unit
? s
->bus
->slave
: s
->bus
->master
;
84 if (s
->identify_set
) {
85 memcpy(s
->io_buffer
, s
->identify_data
, sizeof(s
->identify_data
));
89 memset(s
->io_buffer
, 0, 512);
90 p
= (uint16_t *)s
->io_buffer
;
91 put_le16(p
+ 0, 0x0040);
92 put_le16(p
+ 1, s
->cylinders
);
93 put_le16(p
+ 3, s
->heads
);
94 put_le16(p
+ 4, 512 * s
->sectors
); /* XXX: retired, remove ? */
95 put_le16(p
+ 5, 512); /* XXX: retired, remove ? */
96 put_le16(p
+ 6, s
->sectors
);
97 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
98 put_le16(p
+ 20, 3); /* XXX: retired, remove ? */
99 put_le16(p
+ 21, 512); /* cache size in sectors */
100 put_le16(p
+ 22, 4); /* ecc bytes */
101 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
102 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
103 #if MAX_MULT_SECTORS > 1
104 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
106 put_le16(p
+ 48, 1); /* dword I/O */
107 put_le16(p
+ 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
108 put_le16(p
+ 51, 0x200); /* PIO transfer cycle */
109 put_le16(p
+ 52, 0x200); /* DMA transfer cycle */
110 put_le16(p
+ 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
111 put_le16(p
+ 54, s
->cylinders
);
112 put_le16(p
+ 55, s
->heads
);
113 put_le16(p
+ 56, s
->sectors
);
114 oldsize
= s
->cylinders
* s
->heads
* s
->sectors
;
115 put_le16(p
+ 57, oldsize
);
116 put_le16(p
+ 58, oldsize
>> 16);
118 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
119 put_le16(p
+ 60, s
->nb_sectors
);
120 put_le16(p
+ 61, s
->nb_sectors
>> 16);
121 put_le16(p
+ 62, 0x07); /* single word dma0-2 supported */
122 put_le16(p
+ 63, 0x07); /* mdma0-2 supported */
123 put_le16(p
+ 64, 0x03); /* pio3-4 supported */
124 put_le16(p
+ 65, 120);
125 put_le16(p
+ 66, 120);
126 put_le16(p
+ 67, 120);
127 put_le16(p
+ 68, 120);
128 if (dev
&& dev
->conf
.discard_granularity
) {
129 put_le16(p
+ 69, (1 << 14)); /* determinate TRIM behavior */
133 put_le16(p
+ 75, s
->ncq_queues
- 1);
135 put_le16(p
+ 76, (1 << 8));
138 put_le16(p
+ 80, 0xf0); /* ata3 -> ata6 supported */
139 put_le16(p
+ 81, 0x16); /* conforms to ata5 */
140 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
141 put_le16(p
+ 82, (1 << 14) | (1 << 5) | 1);
142 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
143 put_le16(p
+ 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
144 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
146 put_le16(p
+ 84, (1 << 14) | (1 << 8) | 0);
148 put_le16(p
+ 84, (1 << 14) | 0);
150 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
151 if (bdrv_enable_write_cache(s
->bs
))
152 put_le16(p
+ 85, (1 << 14) | (1 << 5) | 1);
154 put_le16(p
+ 85, (1 << 14) | 1);
155 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
156 put_le16(p
+ 86, (1 << 13) | (1 <<12) | (1 << 10));
157 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
159 put_le16(p
+ 87, (1 << 14) | (1 << 8) | 0);
161 put_le16(p
+ 87, (1 << 14) | 0);
163 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
164 put_le16(p
+ 93, 1 | (1 << 14) | 0x2000);
165 put_le16(p
+ 100, s
->nb_sectors
);
166 put_le16(p
+ 101, s
->nb_sectors
>> 16);
167 put_le16(p
+ 102, s
->nb_sectors
>> 32);
168 put_le16(p
+ 103, s
->nb_sectors
>> 48);
170 if (dev
&& dev
->conf
.physical_block_size
)
171 put_le16(p
+ 106, 0x6000 | get_physical_block_exp(&dev
->conf
));
173 /* LE 16-bit words 111-108 contain 64-bit World Wide Name */
174 put_le16(p
+ 108, s
->wwn
>> 48);
175 put_le16(p
+ 109, s
->wwn
>> 32);
176 put_le16(p
+ 110, s
->wwn
>> 16);
177 put_le16(p
+ 111, s
->wwn
);
179 if (dev
&& dev
->conf
.discard_granularity
) {
180 put_le16(p
+ 169, 1); /* TRIM support */
183 memcpy(s
->identify_data
, p
, sizeof(s
->identify_data
));
187 static void ide_atapi_identify(IDEState
*s
)
191 if (s
->identify_set
) {
192 memcpy(s
->io_buffer
, s
->identify_data
, sizeof(s
->identify_data
));
196 memset(s
->io_buffer
, 0, 512);
197 p
= (uint16_t *)s
->io_buffer
;
198 /* Removable CDROM, 50us response, 12 byte packets */
199 put_le16(p
+ 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
200 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
201 put_le16(p
+ 20, 3); /* buffer type */
202 put_le16(p
+ 21, 512); /* cache size in sectors */
203 put_le16(p
+ 22, 4); /* ecc bytes */
204 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
205 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
206 put_le16(p
+ 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
208 put_le16(p
+ 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
209 put_le16(p
+ 53, 7); /* words 64-70, 54-58, 88 valid */
210 put_le16(p
+ 62, 7); /* single word dma0-2 supported */
211 put_le16(p
+ 63, 7); /* mdma0-2 supported */
213 put_le16(p
+ 49, 1 << 9); /* LBA supported, no DMA */
214 put_le16(p
+ 53, 3); /* words 64-70, 54-58 valid */
215 put_le16(p
+ 63, 0x103); /* DMA modes XXX: may be incorrect */
217 put_le16(p
+ 64, 3); /* pio3-4 supported */
218 put_le16(p
+ 65, 0xb4); /* minimum DMA multiword tx cycle time */
219 put_le16(p
+ 66, 0xb4); /* recommended DMA multiword tx cycle time */
220 put_le16(p
+ 67, 0x12c); /* minimum PIO cycle time without flow control */
221 put_le16(p
+ 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
223 put_le16(p
+ 71, 30); /* in ns */
224 put_le16(p
+ 72, 30); /* in ns */
227 put_le16(p
+ 75, s
->ncq_queues
- 1);
229 put_le16(p
+ 76, (1 << 8));
232 put_le16(p
+ 80, 0x1e); /* support up to ATA/ATAPI-4 */
234 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
236 memcpy(s
->identify_data
, p
, sizeof(s
->identify_data
));
240 static void ide_cfata_identify(IDEState
*s
)
245 p
= (uint16_t *) s
->identify_data
;
249 memset(p
, 0, sizeof(s
->identify_data
));
251 cur_sec
= s
->cylinders
* s
->heads
* s
->sectors
;
253 put_le16(p
+ 0, 0x848a); /* CF Storage Card signature */
254 put_le16(p
+ 1, s
->cylinders
); /* Default cylinders */
255 put_le16(p
+ 3, s
->heads
); /* Default heads */
256 put_le16(p
+ 6, s
->sectors
); /* Default sectors per track */
257 put_le16(p
+ 7, s
->nb_sectors
>> 16); /* Sectors per card */
258 put_le16(p
+ 8, s
->nb_sectors
); /* Sectors per card */
259 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
260 put_le16(p
+ 22, 0x0004); /* ECC bytes */
261 padstr((char *) (p
+ 23), s
->version
, 8); /* Firmware Revision */
262 padstr((char *) (p
+ 27), s
->drive_model_str
, 40);/* Model number */
263 #if MAX_MULT_SECTORS > 1
264 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
266 put_le16(p
+ 47, 0x0000);
268 put_le16(p
+ 49, 0x0f00); /* Capabilities */
269 put_le16(p
+ 51, 0x0002); /* PIO cycle timing mode */
270 put_le16(p
+ 52, 0x0001); /* DMA cycle timing mode */
271 put_le16(p
+ 53, 0x0003); /* Translation params valid */
272 put_le16(p
+ 54, s
->cylinders
); /* Current cylinders */
273 put_le16(p
+ 55, s
->heads
); /* Current heads */
274 put_le16(p
+ 56, s
->sectors
); /* Current sectors */
275 put_le16(p
+ 57, cur_sec
); /* Current capacity */
276 put_le16(p
+ 58, cur_sec
>> 16); /* Current capacity */
277 if (s
->mult_sectors
) /* Multiple sector setting */
278 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
279 put_le16(p
+ 60, s
->nb_sectors
); /* Total LBA sectors */
280 put_le16(p
+ 61, s
->nb_sectors
>> 16); /* Total LBA sectors */
281 put_le16(p
+ 63, 0x0203); /* Multiword DMA capability */
282 put_le16(p
+ 64, 0x0001); /* Flow Control PIO support */
283 put_le16(p
+ 65, 0x0096); /* Min. Multiword DMA cycle */
284 put_le16(p
+ 66, 0x0096); /* Rec. Multiword DMA cycle */
285 put_le16(p
+ 68, 0x00b4); /* Min. PIO cycle time */
286 put_le16(p
+ 82, 0x400c); /* Command Set supported */
287 put_le16(p
+ 83, 0x7068); /* Command Set supported */
288 put_le16(p
+ 84, 0x4000); /* Features supported */
289 put_le16(p
+ 85, 0x000c); /* Command Set enabled */
290 put_le16(p
+ 86, 0x7044); /* Command Set enabled */
291 put_le16(p
+ 87, 0x4000); /* Features enabled */
292 put_le16(p
+ 91, 0x4060); /* Current APM level */
293 put_le16(p
+ 129, 0x0002); /* Current features option */
294 put_le16(p
+ 130, 0x0005); /* Reassigned sectors */
295 put_le16(p
+ 131, 0x0001); /* Initial power mode */
296 put_le16(p
+ 132, 0x0000); /* User signature */
297 put_le16(p
+ 160, 0x8100); /* Power requirement */
298 put_le16(p
+ 161, 0x8001); /* CF command set */
303 memcpy(s
->io_buffer
, p
, sizeof(s
->identify_data
));
306 static void ide_set_signature(IDEState
*s
)
308 s
->select
&= 0xf0; /* clear head */
312 if (s
->drive_kind
== IDE_CD
) {
324 typedef struct TrimAIOCB
{
325 BlockDriverAIOCB common
;
329 BlockDriverAIOCB
*aiocb
;
333 static void trim_aio_cancel(BlockDriverAIOCB
*acb
)
335 TrimAIOCB
*iocb
= container_of(acb
, TrimAIOCB
, common
);
337 /* Exit the loop in case bdrv_aio_cancel calls ide_issue_trim_cb again. */
338 iocb
->j
= iocb
->qiov
->niov
- 1;
339 iocb
->i
= (iocb
->qiov
->iov
[iocb
->j
].iov_len
/ 8) - 1;
341 /* Tell ide_issue_trim_cb not to trigger the completion, too. */
342 qemu_bh_delete(iocb
->bh
);
346 bdrv_aio_cancel(iocb
->aiocb
);
348 qemu_aio_release(iocb
);
351 static const AIOCBInfo trim_aiocb_info
= {
352 .aiocb_size
= sizeof(TrimAIOCB
),
353 .cancel
= trim_aio_cancel
,
356 static void ide_trim_bh_cb(void *opaque
)
358 TrimAIOCB
*iocb
= opaque
;
360 iocb
->common
.cb(iocb
->common
.opaque
, iocb
->ret
);
362 qemu_bh_delete(iocb
->bh
);
364 qemu_aio_release(iocb
);
367 static void ide_issue_trim_cb(void *opaque
, int ret
)
369 TrimAIOCB
*iocb
= opaque
;
371 while (iocb
->j
< iocb
->qiov
->niov
) {
373 while (++iocb
->i
< iocb
->qiov
->iov
[j
].iov_len
/ 8) {
375 uint64_t *buffer
= iocb
->qiov
->iov
[j
].iov_base
;
377 /* 6-byte LBA + 2-byte range per entry */
378 uint64_t entry
= le64_to_cpu(buffer
[i
]);
379 uint64_t sector
= entry
& 0x0000ffffffffffffULL
;
380 uint16_t count
= entry
>> 48;
386 /* Got an entry! Submit and exit. */
387 iocb
->aiocb
= bdrv_aio_discard(iocb
->common
.bs
, sector
, count
,
388 ide_issue_trim_cb
, opaque
);
401 qemu_bh_schedule(iocb
->bh
);
405 BlockDriverAIOCB
*ide_issue_trim(BlockDriverState
*bs
,
406 int64_t sector_num
, QEMUIOVector
*qiov
, int nb_sectors
,
407 BlockDriverCompletionFunc
*cb
, void *opaque
)
411 iocb
= qemu_aio_get(&trim_aiocb_info
, bs
, cb
, opaque
);
412 iocb
->bh
= qemu_bh_new(ide_trim_bh_cb
, iocb
);
417 ide_issue_trim_cb(iocb
, 0);
418 return &iocb
->common
;
421 static inline void ide_abort_command(IDEState
*s
)
423 s
->status
= READY_STAT
| ERR_STAT
;
427 /* prepare data transfer and tell what to do after */
428 void ide_transfer_start(IDEState
*s
, uint8_t *buf
, int size
,
429 EndTransferFunc
*end_transfer_func
)
431 s
->end_transfer_func
= end_transfer_func
;
433 s
->data_end
= buf
+ size
;
434 if (!(s
->status
& ERR_STAT
)) {
435 s
->status
|= DRQ_STAT
;
437 s
->bus
->dma
->ops
->start_transfer(s
->bus
->dma
);
440 void ide_transfer_stop(IDEState
*s
)
442 s
->end_transfer_func
= ide_transfer_stop
;
443 s
->data_ptr
= s
->io_buffer
;
444 s
->data_end
= s
->io_buffer
;
445 s
->status
&= ~DRQ_STAT
;
448 int64_t ide_get_sector(IDEState
*s
)
451 if (s
->select
& 0x40) {
454 sector_num
= ((s
->select
& 0x0f) << 24) | (s
->hcyl
<< 16) |
455 (s
->lcyl
<< 8) | s
->sector
;
457 sector_num
= ((int64_t)s
->hob_hcyl
<< 40) |
458 ((int64_t) s
->hob_lcyl
<< 32) |
459 ((int64_t) s
->hob_sector
<< 24) |
460 ((int64_t) s
->hcyl
<< 16) |
461 ((int64_t) s
->lcyl
<< 8) | s
->sector
;
464 sector_num
= ((s
->hcyl
<< 8) | s
->lcyl
) * s
->heads
* s
->sectors
+
465 (s
->select
& 0x0f) * s
->sectors
+ (s
->sector
- 1);
470 void ide_set_sector(IDEState
*s
, int64_t sector_num
)
473 if (s
->select
& 0x40) {
475 s
->select
= (s
->select
& 0xf0) | (sector_num
>> 24);
476 s
->hcyl
= (sector_num
>> 16);
477 s
->lcyl
= (sector_num
>> 8);
478 s
->sector
= (sector_num
);
480 s
->sector
= sector_num
;
481 s
->lcyl
= sector_num
>> 8;
482 s
->hcyl
= sector_num
>> 16;
483 s
->hob_sector
= sector_num
>> 24;
484 s
->hob_lcyl
= sector_num
>> 32;
485 s
->hob_hcyl
= sector_num
>> 40;
488 cyl
= sector_num
/ (s
->heads
* s
->sectors
);
489 r
= sector_num
% (s
->heads
* s
->sectors
);
492 s
->select
= (s
->select
& 0xf0) | ((r
/ s
->sectors
) & 0x0f);
493 s
->sector
= (r
% s
->sectors
) + 1;
497 static void ide_rw_error(IDEState
*s
) {
498 ide_abort_command(s
);
502 static void ide_sector_read_cb(void *opaque
, int ret
)
504 IDEState
*s
= opaque
;
508 s
->status
&= ~BUSY_STAT
;
510 bdrv_acct_done(s
->bs
, &s
->acct
);
512 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_PIO_RETRY
|
513 BM_STATUS_RETRY_READ
)) {
519 if (n
> s
->req_nb_sectors
) {
520 n
= s
->req_nb_sectors
;
523 /* Allow the guest to read the io_buffer */
524 ide_transfer_start(s
, s
->io_buffer
, n
* BDRV_SECTOR_SIZE
, ide_sector_read
);
528 ide_set_sector(s
, ide_get_sector(s
) + n
);
532 void ide_sector_read(IDEState
*s
)
537 s
->status
= READY_STAT
| SEEK_STAT
;
538 s
->error
= 0; /* not needed by IDE spec, but needed by Windows */
539 sector_num
= ide_get_sector(s
);
543 ide_transfer_stop(s
);
547 s
->status
|= BUSY_STAT
;
549 if (n
> s
->req_nb_sectors
) {
550 n
= s
->req_nb_sectors
;
553 #if defined(DEBUG_IDE)
554 printf("sector=%" PRId64
"\n", sector_num
);
557 s
->iov
.iov_base
= s
->io_buffer
;
558 s
->iov
.iov_len
= n
* BDRV_SECTOR_SIZE
;
559 qemu_iovec_init_external(&s
->qiov
, &s
->iov
, 1);
561 bdrv_acct_start(s
->bs
, &s
->acct
, n
* BDRV_SECTOR_SIZE
, BDRV_ACCT_READ
);
562 s
->pio_aiocb
= bdrv_aio_readv(s
->bs
, sector_num
, &s
->qiov
, n
,
563 ide_sector_read_cb
, s
);
566 static void dma_buf_commit(IDEState
*s
)
568 qemu_sglist_destroy(&s
->sg
);
571 void ide_set_inactive(IDEState
*s
)
573 s
->bus
->dma
->aiocb
= NULL
;
574 s
->bus
->dma
->ops
->set_inactive(s
->bus
->dma
);
577 void ide_dma_error(IDEState
*s
)
579 ide_transfer_stop(s
);
581 s
->status
= READY_STAT
| ERR_STAT
;
586 static int ide_handle_rw_error(IDEState
*s
, int error
, int op
)
588 bool is_read
= (op
& BM_STATUS_RETRY_READ
) != 0;
589 BlockErrorAction action
= bdrv_get_error_action(s
->bs
, is_read
, error
);
591 if (action
== BDRV_ACTION_STOP
) {
592 s
->bus
->dma
->ops
->set_unit(s
->bus
->dma
, s
->unit
);
593 s
->bus
->error_status
= op
;
594 } else if (action
== BDRV_ACTION_REPORT
) {
595 if (op
& BM_STATUS_DMA_RETRY
) {
602 bdrv_error_action(s
->bs
, action
, is_read
, error
);
603 return action
!= BDRV_ACTION_IGNORE
;
606 void ide_dma_cb(void *opaque
, int ret
)
608 IDEState
*s
= opaque
;
611 bool stay_active
= false;
614 int op
= BM_STATUS_DMA_RETRY
;
616 if (s
->dma_cmd
== IDE_DMA_READ
)
617 op
|= BM_STATUS_RETRY_READ
;
618 else if (s
->dma_cmd
== IDE_DMA_TRIM
)
619 op
|= BM_STATUS_RETRY_TRIM
;
621 if (ide_handle_rw_error(s
, -ret
, op
)) {
626 n
= s
->io_buffer_size
>> 9;
627 if (n
> s
->nsector
) {
628 /* The PRDs were longer than needed for this request. Shorten them so
629 * we don't get a negative remainder. The Active bit must remain set
630 * after the request completes. */
635 sector_num
= ide_get_sector(s
);
639 ide_set_sector(s
, sector_num
);
643 /* end of transfer ? */
644 if (s
->nsector
== 0) {
645 s
->status
= READY_STAT
| SEEK_STAT
;
650 /* launch next transfer */
652 s
->io_buffer_index
= 0;
653 s
->io_buffer_size
= n
* 512;
654 if (s
->bus
->dma
->ops
->prepare_buf(s
->bus
->dma
, ide_cmd_is_read(s
)) == 0) {
655 /* The PRDs were too short. Reset the Active bit, but don't raise an
657 s
->status
= READY_STAT
| SEEK_STAT
;
662 printf("ide_dma_cb: sector_num=%" PRId64
" n=%d, cmd_cmd=%d\n",
663 sector_num
, n
, s
->dma_cmd
);
666 switch (s
->dma_cmd
) {
668 s
->bus
->dma
->aiocb
= dma_bdrv_read(s
->bs
, &s
->sg
, sector_num
,
672 s
->bus
->dma
->aiocb
= dma_bdrv_write(s
->bs
, &s
->sg
, sector_num
,
676 s
->bus
->dma
->aiocb
= dma_bdrv_io(s
->bs
, &s
->sg
, sector_num
,
677 ide_issue_trim
, ide_dma_cb
, s
,
678 DMA_DIRECTION_TO_DEVICE
);
684 if (s
->dma_cmd
== IDE_DMA_READ
|| s
->dma_cmd
== IDE_DMA_WRITE
) {
685 bdrv_acct_done(s
->bs
, &s
->acct
);
689 s
->bus
->dma
->ops
->add_status(s
->bus
->dma
, BM_STATUS_DMAING
);
693 static void ide_sector_start_dma(IDEState
*s
, enum ide_dma_cmd dma_cmd
)
695 s
->status
= READY_STAT
| SEEK_STAT
| DRQ_STAT
| BUSY_STAT
;
696 s
->io_buffer_index
= 0;
697 s
->io_buffer_size
= 0;
698 s
->dma_cmd
= dma_cmd
;
702 bdrv_acct_start(s
->bs
, &s
->acct
, s
->nsector
* BDRV_SECTOR_SIZE
,
706 bdrv_acct_start(s
->bs
, &s
->acct
, s
->nsector
* BDRV_SECTOR_SIZE
,
713 s
->bus
->dma
->ops
->start_dma(s
->bus
->dma
, s
, ide_dma_cb
);
716 static void ide_sector_write_timer_cb(void *opaque
)
718 IDEState
*s
= opaque
;
722 static void ide_sector_write_cb(void *opaque
, int ret
)
724 IDEState
*s
= opaque
;
727 bdrv_acct_done(s
->bs
, &s
->acct
);
730 s
->status
&= ~BUSY_STAT
;
733 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_PIO_RETRY
)) {
739 if (n
> s
->req_nb_sectors
) {
740 n
= s
->req_nb_sectors
;
743 if (s
->nsector
== 0) {
744 /* no more sectors to write */
745 ide_transfer_stop(s
);
748 if (n1
> s
->req_nb_sectors
) {
749 n1
= s
->req_nb_sectors
;
751 ide_transfer_start(s
, s
->io_buffer
, n1
* BDRV_SECTOR_SIZE
,
754 ide_set_sector(s
, ide_get_sector(s
) + n
);
756 if (win2k_install_hack
&& ((++s
->irq_count
% 16) == 0)) {
757 /* It seems there is a bug in the Windows 2000 installer HDD
758 IDE driver which fills the disk with empty logs when the
759 IDE write IRQ comes too early. This hack tries to correct
760 that at the expense of slower write performances. Use this
761 option _only_ to install Windows 2000. You must disable it
763 qemu_mod_timer(s
->sector_write_timer
,
764 qemu_get_clock_ns(vm_clock
) + (get_ticks_per_sec() / 1000));
770 void ide_sector_write(IDEState
*s
)
775 s
->status
= READY_STAT
| SEEK_STAT
| BUSY_STAT
;
776 sector_num
= ide_get_sector(s
);
777 #if defined(DEBUG_IDE)
778 printf("sector=%" PRId64
"\n", sector_num
);
781 if (n
> s
->req_nb_sectors
) {
782 n
= s
->req_nb_sectors
;
785 s
->iov
.iov_base
= s
->io_buffer
;
786 s
->iov
.iov_len
= n
* BDRV_SECTOR_SIZE
;
787 qemu_iovec_init_external(&s
->qiov
, &s
->iov
, 1);
789 bdrv_acct_start(s
->bs
, &s
->acct
, n
* BDRV_SECTOR_SIZE
, BDRV_ACCT_READ
);
790 s
->pio_aiocb
= bdrv_aio_writev(s
->bs
, sector_num
, &s
->qiov
, n
,
791 ide_sector_write_cb
, s
);
794 static void ide_flush_cb(void *opaque
, int ret
)
796 IDEState
*s
= opaque
;
799 /* XXX: What sector number to set here? */
800 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_RETRY_FLUSH
)) {
805 bdrv_acct_done(s
->bs
, &s
->acct
);
806 s
->status
= READY_STAT
| SEEK_STAT
;
810 void ide_flush_cache(IDEState
*s
)
817 bdrv_acct_start(s
->bs
, &s
->acct
, 0, BDRV_ACCT_FLUSH
);
818 bdrv_aio_flush(s
->bs
, ide_flush_cb
, s
);
821 static void ide_cfata_metadata_inquiry(IDEState
*s
)
826 p
= (uint16_t *) s
->io_buffer
;
828 spd
= ((s
->mdata_size
- 1) >> 9) + 1;
830 put_le16(p
+ 0, 0x0001); /* Data format revision */
831 put_le16(p
+ 1, 0x0000); /* Media property: silicon */
832 put_le16(p
+ 2, s
->media_changed
); /* Media status */
833 put_le16(p
+ 3, s
->mdata_size
& 0xffff); /* Capacity in bytes (low) */
834 put_le16(p
+ 4, s
->mdata_size
>> 16); /* Capacity in bytes (high) */
835 put_le16(p
+ 5, spd
& 0xffff); /* Sectors per device (low) */
836 put_le16(p
+ 6, spd
>> 16); /* Sectors per device (high) */
839 static void ide_cfata_metadata_read(IDEState
*s
)
843 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
844 s
->status
= ERR_STAT
;
849 p
= (uint16_t *) s
->io_buffer
;
852 put_le16(p
+ 0, s
->media_changed
); /* Media status */
853 memcpy(p
+ 1, s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
854 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
855 s
->nsector
<< 9), 0x200 - 2));
858 static void ide_cfata_metadata_write(IDEState
*s
)
860 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
861 s
->status
= ERR_STAT
;
866 s
->media_changed
= 0;
868 memcpy(s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
870 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
871 s
->nsector
<< 9), 0x200 - 2));
874 /* called when the inserted state of the media has changed */
875 static void ide_cd_change_cb(void *opaque
, bool load
)
877 IDEState
*s
= opaque
;
880 s
->tray_open
= !load
;
881 bdrv_get_geometry(s
->bs
, &nb_sectors
);
882 s
->nb_sectors
= nb_sectors
;
885 * First indicate to the guest that a CD has been removed. That's
886 * done on the next command the guest sends us.
888 * Then we set UNIT_ATTENTION, by which the guest will
889 * detect a new CD in the drive. See ide_atapi_cmd() for details.
891 s
->cdrom_changed
= 1;
892 s
->events
.new_media
= true;
893 s
->events
.eject_request
= false;
897 static void ide_cd_eject_request_cb(void *opaque
, bool force
)
899 IDEState
*s
= opaque
;
901 s
->events
.eject_request
= true;
903 s
->tray_locked
= false;
908 static void ide_cmd_lba48_transform(IDEState
*s
, int lba48
)
912 /* handle the 'magic' 0 nsector count conversion here. to avoid
913 * fiddling with the rest of the read logic, we just store the
914 * full sector count in ->nsector and ignore ->hob_nsector from now
920 if (!s
->nsector
&& !s
->hob_nsector
)
924 int hi
= s
->hob_nsector
;
926 s
->nsector
= (hi
<< 8) | lo
;
931 static void ide_clear_hob(IDEBus
*bus
)
933 /* any write clears HOB high bit of device control register */
934 bus
->ifs
[0].select
&= ~(1 << 7);
935 bus
->ifs
[1].select
&= ~(1 << 7);
938 void ide_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
940 IDEBus
*bus
= opaque
;
943 printf("IDE: write addr=0x%x val=0x%02x\n", addr
, val
);
948 /* ignore writes to command block while busy with previous command */
949 if (addr
!= 7 && (idebus_active_if(bus
)->status
& (BUSY_STAT
|DRQ_STAT
)))
957 /* NOTE: data is written to the two drives */
958 bus
->ifs
[0].hob_feature
= bus
->ifs
[0].feature
;
959 bus
->ifs
[1].hob_feature
= bus
->ifs
[1].feature
;
960 bus
->ifs
[0].feature
= val
;
961 bus
->ifs
[1].feature
= val
;
965 bus
->ifs
[0].hob_nsector
= bus
->ifs
[0].nsector
;
966 bus
->ifs
[1].hob_nsector
= bus
->ifs
[1].nsector
;
967 bus
->ifs
[0].nsector
= val
;
968 bus
->ifs
[1].nsector
= val
;
972 bus
->ifs
[0].hob_sector
= bus
->ifs
[0].sector
;
973 bus
->ifs
[1].hob_sector
= bus
->ifs
[1].sector
;
974 bus
->ifs
[0].sector
= val
;
975 bus
->ifs
[1].sector
= val
;
979 bus
->ifs
[0].hob_lcyl
= bus
->ifs
[0].lcyl
;
980 bus
->ifs
[1].hob_lcyl
= bus
->ifs
[1].lcyl
;
981 bus
->ifs
[0].lcyl
= val
;
982 bus
->ifs
[1].lcyl
= val
;
986 bus
->ifs
[0].hob_hcyl
= bus
->ifs
[0].hcyl
;
987 bus
->ifs
[1].hob_hcyl
= bus
->ifs
[1].hcyl
;
988 bus
->ifs
[0].hcyl
= val
;
989 bus
->ifs
[1].hcyl
= val
;
992 /* FIXME: HOB readback uses bit 7 */
993 bus
->ifs
[0].select
= (val
& ~0x10) | 0xa0;
994 bus
->ifs
[1].select
= (val
| 0x10) | 0xa0;
996 bus
->unit
= (val
>> 4) & 1;
1001 ide_exec_cmd(bus
, val
);
1006 #define HD_OK (1u << IDE_HD)
1007 #define CD_OK (1u << IDE_CD)
1008 #define CFA_OK (1u << IDE_CFATA)
1009 #define HD_CFA_OK (HD_OK | CFA_OK)
1010 #define ALL_OK (HD_OK | CD_OK | CFA_OK)
1012 /* See ACS-2 T13/2015-D Table B.2 Command codes */
1013 static const uint8_t ide_cmd_table
[0x100] = {
1014 /* NOP not implemented, mandatory for CD */
1015 [CFA_REQ_EXT_ERROR_CODE
] = CFA_OK
,
1017 [WIN_DEVICE_RESET
] = CD_OK
,
1018 [WIN_RECAL
] = HD_CFA_OK
,
1019 [WIN_READ
] = ALL_OK
,
1020 [WIN_READ_ONCE
] = ALL_OK
,
1021 [WIN_READ_EXT
] = HD_CFA_OK
,
1022 [WIN_READDMA_EXT
] = HD_CFA_OK
,
1023 [WIN_READ_NATIVE_MAX_EXT
] = HD_CFA_OK
,
1024 [WIN_MULTREAD_EXT
] = HD_CFA_OK
,
1025 [WIN_WRITE
] = HD_CFA_OK
,
1026 [WIN_WRITE_ONCE
] = HD_CFA_OK
,
1027 [WIN_WRITE_EXT
] = HD_CFA_OK
,
1028 [WIN_WRITEDMA_EXT
] = HD_CFA_OK
,
1029 [CFA_WRITE_SECT_WO_ERASE
] = CFA_OK
,
1030 [WIN_MULTWRITE_EXT
] = HD_CFA_OK
,
1031 [WIN_WRITE_VERIFY
] = HD_CFA_OK
,
1032 [WIN_VERIFY
] = HD_CFA_OK
,
1033 [WIN_VERIFY_ONCE
] = HD_CFA_OK
,
1034 [WIN_VERIFY_EXT
] = HD_CFA_OK
,
1035 [WIN_SEEK
] = HD_CFA_OK
,
1036 [CFA_TRANSLATE_SECTOR
] = CFA_OK
,
1037 [WIN_DIAGNOSE
] = ALL_OK
,
1038 [WIN_SPECIFY
] = HD_CFA_OK
,
1039 [WIN_STANDBYNOW2
] = ALL_OK
,
1040 [WIN_IDLEIMMEDIATE2
] = ALL_OK
,
1041 [WIN_STANDBY2
] = ALL_OK
,
1042 [WIN_SETIDLE2
] = ALL_OK
,
1043 [WIN_CHECKPOWERMODE2
] = ALL_OK
,
1044 [WIN_SLEEPNOW2
] = ALL_OK
,
1045 [WIN_PACKETCMD
] = CD_OK
,
1046 [WIN_PIDENTIFY
] = CD_OK
,
1047 [WIN_SMART
] = HD_CFA_OK
,
1048 [CFA_ACCESS_METADATA_STORAGE
] = CFA_OK
,
1049 [CFA_ERASE_SECTORS
] = CFA_OK
,
1050 [WIN_MULTREAD
] = HD_CFA_OK
,
1051 [WIN_MULTWRITE
] = HD_CFA_OK
,
1052 [WIN_SETMULT
] = HD_CFA_OK
,
1053 [WIN_READDMA
] = HD_CFA_OK
,
1054 [WIN_READDMA_ONCE
] = HD_CFA_OK
,
1055 [WIN_WRITEDMA
] = HD_CFA_OK
,
1056 [WIN_WRITEDMA_ONCE
] = HD_CFA_OK
,
1057 [CFA_WRITE_MULTI_WO_ERASE
] = CFA_OK
,
1058 [WIN_STANDBYNOW1
] = ALL_OK
,
1059 [WIN_IDLEIMMEDIATE
] = ALL_OK
,
1060 [WIN_STANDBY
] = ALL_OK
,
1061 [WIN_SETIDLE1
] = ALL_OK
,
1062 [WIN_CHECKPOWERMODE1
] = ALL_OK
,
1063 [WIN_SLEEPNOW1
] = ALL_OK
,
1064 [WIN_FLUSH_CACHE
] = ALL_OK
,
1065 [WIN_FLUSH_CACHE_EXT
] = HD_CFA_OK
,
1066 [WIN_IDENTIFY
] = ALL_OK
,
1067 [WIN_SETFEATURES
] = ALL_OK
,
1068 [IBM_SENSE_CONDITION
] = CFA_OK
,
1069 [CFA_WEAR_LEVEL
] = HD_CFA_OK
,
1070 [WIN_READ_NATIVE_MAX
] = ALL_OK
,
1073 static bool ide_cmd_permitted(IDEState
*s
, uint32_t cmd
)
1075 return cmd
< ARRAY_SIZE(ide_cmd_table
)
1076 && (ide_cmd_table
[cmd
] & (1u << s
->drive_kind
));
1079 void ide_exec_cmd(IDEBus
*bus
, uint32_t val
)
1081 uint16_t *identify_data
;
1086 #if defined(DEBUG_IDE)
1087 printf("ide: CMD=%02x\n", val
);
1089 s
= idebus_active_if(bus
);
1090 /* ignore commands to non existent slave */
1091 if (s
!= bus
->ifs
&& !s
->bs
)
1094 /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
1095 if ((s
->status
& (BUSY_STAT
|DRQ_STAT
)) && val
!= WIN_DEVICE_RESET
)
1098 if (!ide_cmd_permitted(s
, val
)) {
1104 switch (s
->feature
) {
1109 ide_sector_start_dma(s
, IDE_DMA_TRIM
);
1116 if (s
->bs
&& s
->drive_kind
!= IDE_CD
) {
1117 if (s
->drive_kind
!= IDE_CFATA
)
1120 ide_cfata_identify(s
);
1121 s
->status
= READY_STAT
| SEEK_STAT
;
1122 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1124 if (s
->drive_kind
== IDE_CD
) {
1125 ide_set_signature(s
);
1127 ide_abort_command(s
);
1129 ide_set_irq(s
->bus
);
1134 s
->status
= READY_STAT
| SEEK_STAT
;
1135 ide_set_irq(s
->bus
);
1138 if (s
->drive_kind
== IDE_CFATA
&& s
->nsector
== 0) {
1139 /* Disable Read and Write Multiple */
1140 s
->mult_sectors
= 0;
1141 s
->status
= READY_STAT
| SEEK_STAT
;
1142 } else if ((s
->nsector
& 0xff) != 0 &&
1143 ((s
->nsector
& 0xff) > MAX_MULT_SECTORS
||
1144 (s
->nsector
& (s
->nsector
- 1)) != 0)) {
1145 ide_abort_command(s
);
1147 s
->mult_sectors
= s
->nsector
& 0xff;
1148 s
->status
= READY_STAT
| SEEK_STAT
;
1150 ide_set_irq(s
->bus
);
1152 case WIN_VERIFY_EXT
:
1155 case WIN_VERIFY_ONCE
:
1156 /* do sector number check ? */
1157 ide_cmd_lba48_transform(s
, lba48
);
1158 s
->status
= READY_STAT
| SEEK_STAT
;
1159 ide_set_irq(s
->bus
);
1165 if (s
->drive_kind
== IDE_CD
) {
1166 ide_set_signature(s
); /* odd, but ATA4 8.27.5.2 requires it */
1172 ide_cmd_lba48_transform(s
, lba48
);
1173 s
->req_nb_sectors
= 1;
1179 case WIN_WRITE_ONCE
:
1180 case CFA_WRITE_SECT_WO_ERASE
:
1181 case WIN_WRITE_VERIFY
:
1185 ide_cmd_lba48_transform(s
, lba48
);
1187 s
->status
= SEEK_STAT
| READY_STAT
;
1188 s
->req_nb_sectors
= 1;
1189 ide_transfer_start(s
, s
->io_buffer
, 512, ide_sector_write
);
1190 s
->media_changed
= 1;
1192 case WIN_MULTREAD_EXT
:
1198 if (!s
->mult_sectors
) {
1201 ide_cmd_lba48_transform(s
, lba48
);
1202 s
->req_nb_sectors
= s
->mult_sectors
;
1205 case WIN_MULTWRITE_EXT
:
1208 case CFA_WRITE_MULTI_WO_ERASE
:
1212 if (!s
->mult_sectors
) {
1215 ide_cmd_lba48_transform(s
, lba48
);
1217 s
->status
= SEEK_STAT
| READY_STAT
;
1218 s
->req_nb_sectors
= s
->mult_sectors
;
1220 if (n
> s
->req_nb_sectors
)
1221 n
= s
->req_nb_sectors
;
1222 ide_transfer_start(s
, s
->io_buffer
, 512 * n
, ide_sector_write
);
1223 s
->media_changed
= 1;
1225 case WIN_READDMA_EXT
:
1228 case WIN_READDMA_ONCE
:
1232 ide_cmd_lba48_transform(s
, lba48
);
1233 ide_sector_start_dma(s
, IDE_DMA_READ
);
1235 case WIN_WRITEDMA_EXT
:
1238 case WIN_WRITEDMA_ONCE
:
1242 ide_cmd_lba48_transform(s
, lba48
);
1243 ide_sector_start_dma(s
, IDE_DMA_WRITE
);
1244 s
->media_changed
= 1;
1246 case WIN_READ_NATIVE_MAX_EXT
:
1248 case WIN_READ_NATIVE_MAX
:
1249 ide_cmd_lba48_transform(s
, lba48
);
1250 ide_set_sector(s
, s
->nb_sectors
- 1);
1251 s
->status
= READY_STAT
| SEEK_STAT
;
1252 ide_set_irq(s
->bus
);
1254 case WIN_CHECKPOWERMODE1
:
1255 case WIN_CHECKPOWERMODE2
:
1257 s
->nsector
= 0xff; /* device active or idle */
1258 s
->status
= READY_STAT
| SEEK_STAT
;
1259 ide_set_irq(s
->bus
);
1261 case WIN_SETFEATURES
:
1264 /* XXX: valid for CDROM ? */
1265 switch(s
->feature
) {
1266 case 0x02: /* write cache enable */
1267 bdrv_set_enable_write_cache(s
->bs
, true);
1268 identify_data
= (uint16_t *)s
->identify_data
;
1269 put_le16(identify_data
+ 85, (1 << 14) | (1 << 5) | 1);
1270 s
->status
= READY_STAT
| SEEK_STAT
;
1271 ide_set_irq(s
->bus
);
1273 case 0x82: /* write cache disable */
1274 bdrv_set_enable_write_cache(s
->bs
, false);
1275 identify_data
= (uint16_t *)s
->identify_data
;
1276 put_le16(identify_data
+ 85, (1 << 14) | 1);
1279 case 0xcc: /* reverting to power-on defaults enable */
1280 case 0x66: /* reverting to power-on defaults disable */
1281 case 0xaa: /* read look-ahead enable */
1282 case 0x55: /* read look-ahead disable */
1283 case 0x05: /* set advanced power management mode */
1284 case 0x85: /* disable advanced power management mode */
1285 case 0x69: /* NOP */
1286 case 0x67: /* NOP */
1287 case 0x96: /* NOP */
1288 case 0x9a: /* NOP */
1289 case 0x42: /* enable Automatic Acoustic Mode */
1290 case 0xc2: /* disable Automatic Acoustic Mode */
1291 s
->status
= READY_STAT
| SEEK_STAT
;
1292 ide_set_irq(s
->bus
);
1294 case 0x03: { /* set transfer mode */
1295 uint8_t val
= s
->nsector
& 0x07;
1296 identify_data
= (uint16_t *)s
->identify_data
;
1298 switch (s
->nsector
>> 3) {
1299 case 0x00: /* pio default */
1300 case 0x01: /* pio mode */
1301 put_le16(identify_data
+ 62,0x07);
1302 put_le16(identify_data
+ 63,0x07);
1303 put_le16(identify_data
+ 88,0x3f);
1305 case 0x02: /* sigle word dma mode*/
1306 put_le16(identify_data
+ 62,0x07 | (1 << (val
+ 8)));
1307 put_le16(identify_data
+ 63,0x07);
1308 put_le16(identify_data
+ 88,0x3f);
1310 case 0x04: /* mdma mode */
1311 put_le16(identify_data
+ 62,0x07);
1312 put_le16(identify_data
+ 63,0x07 | (1 << (val
+ 8)));
1313 put_le16(identify_data
+ 88,0x3f);
1315 case 0x08: /* udma mode */
1316 put_le16(identify_data
+ 62,0x07);
1317 put_le16(identify_data
+ 63,0x07);
1318 put_le16(identify_data
+ 88,0x3f | (1 << (val
+ 8)));
1323 s
->status
= READY_STAT
| SEEK_STAT
;
1324 ide_set_irq(s
->bus
);
1331 case WIN_FLUSH_CACHE
:
1332 case WIN_FLUSH_CACHE_EXT
:
1337 case WIN_STANDBYNOW1
:
1338 case WIN_STANDBYNOW2
:
1339 case WIN_IDLEIMMEDIATE
:
1340 case WIN_IDLEIMMEDIATE2
:
1345 s
->status
= READY_STAT
;
1346 ide_set_irq(s
->bus
);
1349 /* XXX: Check that seek is within bounds */
1350 s
->status
= READY_STAT
| SEEK_STAT
;
1351 ide_set_irq(s
->bus
);
1353 /* ATAPI commands */
1355 ide_atapi_identify(s
);
1356 s
->status
= READY_STAT
| SEEK_STAT
;
1357 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1358 ide_set_irq(s
->bus
);
1361 ide_set_signature(s
);
1362 if (s
->drive_kind
== IDE_CD
)
1363 s
->status
= 0; /* ATAPI spec (v6) section 9.10 defines packet
1364 * devices to return a clear status register
1365 * with READY_STAT *not* set. */
1367 s
->status
= READY_STAT
| SEEK_STAT
;
1368 s
->error
= 0x01; /* Device 0 passed, Device 1 passed or not
1371 ide_set_irq(s
->bus
);
1373 case WIN_DEVICE_RESET
:
1374 ide_set_signature(s
);
1375 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1379 /* overlapping commands not supported */
1380 if (s
->feature
& 0x02)
1382 s
->status
= READY_STAT
| SEEK_STAT
;
1383 s
->atapi_dma
= s
->feature
& 1;
1385 ide_transfer_start(s
, s
->io_buffer
, ATAPI_PACKET_SIZE
,
1388 /* CF-ATA commands */
1389 case CFA_REQ_EXT_ERROR_CODE
:
1390 s
->error
= 0x09; /* miscellaneous error */
1391 s
->status
= READY_STAT
| SEEK_STAT
;
1392 ide_set_irq(s
->bus
);
1394 case CFA_ERASE_SECTORS
:
1395 case CFA_WEAR_LEVEL
:
1397 /* This one has the same ID as CFA_WEAR_LEVEL and is required for
1398 Windows 8 to work with AHCI */
1399 case WIN_SECURITY_FREEZE_LOCK
:
1401 if (val
== CFA_WEAR_LEVEL
)
1403 if (val
== CFA_ERASE_SECTORS
)
1404 s
->media_changed
= 1;
1406 s
->status
= READY_STAT
| SEEK_STAT
;
1407 ide_set_irq(s
->bus
);
1409 case CFA_TRANSLATE_SECTOR
:
1411 s
->status
= READY_STAT
| SEEK_STAT
;
1412 memset(s
->io_buffer
, 0, 0x200);
1413 s
->io_buffer
[0x00] = s
->hcyl
; /* Cyl MSB */
1414 s
->io_buffer
[0x01] = s
->lcyl
; /* Cyl LSB */
1415 s
->io_buffer
[0x02] = s
->select
; /* Head */
1416 s
->io_buffer
[0x03] = s
->sector
; /* Sector */
1417 s
->io_buffer
[0x04] = ide_get_sector(s
) >> 16; /* LBA MSB */
1418 s
->io_buffer
[0x05] = ide_get_sector(s
) >> 8; /* LBA */
1419 s
->io_buffer
[0x06] = ide_get_sector(s
) >> 0; /* LBA LSB */
1420 s
->io_buffer
[0x13] = 0x00; /* Erase flag */
1421 s
->io_buffer
[0x18] = 0x00; /* Hot count */
1422 s
->io_buffer
[0x19] = 0x00; /* Hot count */
1423 s
->io_buffer
[0x1a] = 0x01; /* Hot count */
1424 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1425 ide_set_irq(s
->bus
);
1427 case CFA_ACCESS_METADATA_STORAGE
:
1428 switch (s
->feature
) {
1429 case 0x02: /* Inquiry Metadata Storage */
1430 ide_cfata_metadata_inquiry(s
);
1432 case 0x03: /* Read Metadata Storage */
1433 ide_cfata_metadata_read(s
);
1435 case 0x04: /* Write Metadata Storage */
1436 ide_cfata_metadata_write(s
);
1441 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1442 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1443 ide_set_irq(s
->bus
);
1445 case IBM_SENSE_CONDITION
:
1446 switch (s
->feature
) {
1447 case 0x01: /* sense temperature in device */
1448 s
->nsector
= 0x50; /* +20 C */
1453 s
->status
= READY_STAT
| SEEK_STAT
;
1454 ide_set_irq(s
->bus
);
1458 if (s
->hcyl
!= 0xc2 || s
->lcyl
!= 0x4f)
1460 if (!s
->smart_enabled
&& s
->feature
!= SMART_ENABLE
)
1462 switch (s
->feature
) {
1464 s
->smart_enabled
= 0;
1465 s
->status
= READY_STAT
| SEEK_STAT
;
1466 ide_set_irq(s
->bus
);
1469 s
->smart_enabled
= 1;
1470 s
->status
= READY_STAT
| SEEK_STAT
;
1471 ide_set_irq(s
->bus
);
1473 case SMART_ATTR_AUTOSAVE
:
1474 switch (s
->sector
) {
1476 s
->smart_autosave
= 0;
1479 s
->smart_autosave
= 1;
1484 s
->status
= READY_STAT
| SEEK_STAT
;
1485 ide_set_irq(s
->bus
);
1488 if (!s
->smart_errors
) {
1495 s
->status
= READY_STAT
| SEEK_STAT
;
1496 ide_set_irq(s
->bus
);
1498 case SMART_READ_THRESH
:
1499 memset(s
->io_buffer
, 0, 0x200);
1500 s
->io_buffer
[0] = 0x01; /* smart struct version */
1501 for (n
= 0; n
< ARRAY_SIZE(smart_attributes
); n
++) {
1502 s
->io_buffer
[2+0+(n
*12)] = smart_attributes
[n
][0];
1503 s
->io_buffer
[2+1+(n
*12)] = smart_attributes
[n
][11];
1505 for (n
=0; n
<511; n
++) /* checksum */
1506 s
->io_buffer
[511] += s
->io_buffer
[n
];
1507 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1508 s
->status
= READY_STAT
| SEEK_STAT
;
1509 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1510 ide_set_irq(s
->bus
);
1512 case SMART_READ_DATA
:
1513 memset(s
->io_buffer
, 0, 0x200);
1514 s
->io_buffer
[0] = 0x01; /* smart struct version */
1515 for (n
= 0; n
< ARRAY_SIZE(smart_attributes
); n
++) {
1517 for(i
= 0; i
< 11; i
++) {
1518 s
->io_buffer
[2+i
+(n
*12)] = smart_attributes
[n
][i
];
1521 s
->io_buffer
[362] = 0x02 | (s
->smart_autosave
?0x80:0x00);
1522 if (s
->smart_selftest_count
== 0) {
1523 s
->io_buffer
[363] = 0;
1526 s
->smart_selftest_data
[3 +
1527 (s
->smart_selftest_count
- 1) *
1530 s
->io_buffer
[364] = 0x20;
1531 s
->io_buffer
[365] = 0x01;
1532 /* offline data collection capacity: execute + self-test*/
1533 s
->io_buffer
[367] = (1<<4 | 1<<3 | 1);
1534 s
->io_buffer
[368] = 0x03; /* smart capability (1) */
1535 s
->io_buffer
[369] = 0x00; /* smart capability (2) */
1536 s
->io_buffer
[370] = 0x01; /* error logging supported */
1537 s
->io_buffer
[372] = 0x02; /* minutes for poll short test */
1538 s
->io_buffer
[373] = 0x36; /* minutes for poll ext test */
1539 s
->io_buffer
[374] = 0x01; /* minutes for poll conveyance */
1541 for (n
=0; n
<511; n
++)
1542 s
->io_buffer
[511] += s
->io_buffer
[n
];
1543 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1544 s
->status
= READY_STAT
| SEEK_STAT
;
1545 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1546 ide_set_irq(s
->bus
);
1548 case SMART_READ_LOG
:
1549 switch (s
->sector
) {
1550 case 0x01: /* summary smart error log */
1551 memset(s
->io_buffer
, 0, 0x200);
1552 s
->io_buffer
[0] = 0x01;
1553 s
->io_buffer
[1] = 0x00; /* no error entries */
1554 s
->io_buffer
[452] = s
->smart_errors
& 0xff;
1555 s
->io_buffer
[453] = (s
->smart_errors
& 0xff00) >> 8;
1557 for (n
=0; n
<511; n
++)
1558 s
->io_buffer
[511] += s
->io_buffer
[n
];
1559 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1561 case 0x06: /* smart self test log */
1562 memset(s
->io_buffer
, 0, 0x200);
1563 s
->io_buffer
[0] = 0x01;
1564 if (s
->smart_selftest_count
== 0) {
1565 s
->io_buffer
[508] = 0;
1567 s
->io_buffer
[508] = s
->smart_selftest_count
;
1568 for (n
=2; n
<506; n
++)
1569 s
->io_buffer
[n
] = s
->smart_selftest_data
[n
];
1571 for (n
=0; n
<511; n
++)
1572 s
->io_buffer
[511] += s
->io_buffer
[n
];
1573 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1578 s
->status
= READY_STAT
| SEEK_STAT
;
1579 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1580 ide_set_irq(s
->bus
);
1582 case SMART_EXECUTE_OFFLINE
:
1583 switch (s
->sector
) {
1584 case 0: /* off-line routine */
1585 case 1: /* short self test */
1586 case 2: /* extended self test */
1587 s
->smart_selftest_count
++;
1588 if(s
->smart_selftest_count
> 21)
1589 s
->smart_selftest_count
= 0;
1590 n
= 2 + (s
->smart_selftest_count
- 1) * 24;
1591 s
->smart_selftest_data
[n
] = s
->sector
;
1592 s
->smart_selftest_data
[n
+1] = 0x00; /* OK and finished */
1593 s
->smart_selftest_data
[n
+2] = 0x34; /* hour count lsb */
1594 s
->smart_selftest_data
[n
+3] = 0x12; /* hour count msb */
1595 s
->status
= READY_STAT
| SEEK_STAT
;
1596 ide_set_irq(s
->bus
);
1607 /* should not be reachable */
1609 ide_abort_command(s
);
1610 ide_set_irq(s
->bus
);
1615 uint32_t ide_ioport_read(void *opaque
, uint32_t addr1
)
1617 IDEBus
*bus
= opaque
;
1618 IDEState
*s
= idebus_active_if(bus
);
1623 /* FIXME: HOB readback uses bit 7, but it's always set right now */
1624 //hob = s->select & (1 << 7);
1631 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1632 (s
!= bus
->ifs
&& !s
->bs
))
1637 ret
= s
->hob_feature
;
1640 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1643 ret
= s
->nsector
& 0xff;
1645 ret
= s
->hob_nsector
;
1648 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1653 ret
= s
->hob_sector
;
1656 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1664 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1672 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1679 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1680 (s
!= bus
->ifs
&& !s
->bs
))
1684 qemu_irq_lower(bus
->irq
);
1688 printf("ide: read addr=0x%x val=%02x\n", addr1
, ret
);
1693 uint32_t ide_status_read(void *opaque
, uint32_t addr
)
1695 IDEBus
*bus
= opaque
;
1696 IDEState
*s
= idebus_active_if(bus
);
1699 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1700 (s
!= bus
->ifs
&& !s
->bs
))
1705 printf("ide: read status addr=0x%x val=%02x\n", addr
, ret
);
1710 void ide_cmd_write(void *opaque
, uint32_t addr
, uint32_t val
)
1712 IDEBus
*bus
= opaque
;
1717 printf("ide: write control addr=0x%x val=%02x\n", addr
, val
);
1719 /* common for both drives */
1720 if (!(bus
->cmd
& IDE_CMD_RESET
) &&
1721 (val
& IDE_CMD_RESET
)) {
1722 /* reset low to high */
1723 for(i
= 0;i
< 2; i
++) {
1725 s
->status
= BUSY_STAT
| SEEK_STAT
;
1728 } else if ((bus
->cmd
& IDE_CMD_RESET
) &&
1729 !(val
& IDE_CMD_RESET
)) {
1731 for(i
= 0;i
< 2; i
++) {
1733 if (s
->drive_kind
== IDE_CD
)
1734 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1736 s
->status
= READY_STAT
| SEEK_STAT
;
1737 ide_set_signature(s
);
1745 * Returns true if the running PIO transfer is a PIO out (i.e. data is
1746 * transferred from the device to the guest), false if it's a PIO in
1748 static bool ide_is_pio_out(IDEState
*s
)
1750 if (s
->end_transfer_func
== ide_sector_write
||
1751 s
->end_transfer_func
== ide_atapi_cmd
) {
1753 } else if (s
->end_transfer_func
== ide_sector_read
||
1754 s
->end_transfer_func
== ide_transfer_stop
||
1755 s
->end_transfer_func
== ide_atapi_cmd_reply_end
||
1756 s
->end_transfer_func
== ide_dummy_transfer_stop
) {
1763 void ide_data_writew(void *opaque
, uint32_t addr
, uint32_t val
)
1765 IDEBus
*bus
= opaque
;
1766 IDEState
*s
= idebus_active_if(bus
);
1769 /* PIO data access allowed only when DRQ bit is set. The result of a write
1770 * during PIO out is indeterminate, just ignore it. */
1771 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
1776 *(uint16_t *)p
= le16_to_cpu(val
);
1779 if (p
>= s
->data_end
)
1780 s
->end_transfer_func(s
);
1783 uint32_t ide_data_readw(void *opaque
, uint32_t addr
)
1785 IDEBus
*bus
= opaque
;
1786 IDEState
*s
= idebus_active_if(bus
);
1790 /* PIO data access allowed only when DRQ bit is set. The result of a read
1791 * during PIO in is indeterminate, return 0 and don't move forward. */
1792 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
1797 ret
= cpu_to_le16(*(uint16_t *)p
);
1800 if (p
>= s
->data_end
)
1801 s
->end_transfer_func(s
);
1805 void ide_data_writel(void *opaque
, uint32_t addr
, uint32_t val
)
1807 IDEBus
*bus
= opaque
;
1808 IDEState
*s
= idebus_active_if(bus
);
1811 /* PIO data access allowed only when DRQ bit is set. The result of a write
1812 * during PIO out is indeterminate, just ignore it. */
1813 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
1818 *(uint32_t *)p
= le32_to_cpu(val
);
1821 if (p
>= s
->data_end
)
1822 s
->end_transfer_func(s
);
1825 uint32_t ide_data_readl(void *opaque
, uint32_t addr
)
1827 IDEBus
*bus
= opaque
;
1828 IDEState
*s
= idebus_active_if(bus
);
1832 /* PIO data access allowed only when DRQ bit is set. The result of a read
1833 * during PIO in is indeterminate, return 0 and don't move forward. */
1834 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
1839 ret
= cpu_to_le32(*(uint32_t *)p
);
1842 if (p
>= s
->data_end
)
1843 s
->end_transfer_func(s
);
1847 static void ide_dummy_transfer_stop(IDEState
*s
)
1849 s
->data_ptr
= s
->io_buffer
;
1850 s
->data_end
= s
->io_buffer
;
1851 s
->io_buffer
[0] = 0xff;
1852 s
->io_buffer
[1] = 0xff;
1853 s
->io_buffer
[2] = 0xff;
1854 s
->io_buffer
[3] = 0xff;
1857 static void ide_reset(IDEState
*s
)
1860 printf("ide: reset\n");
1864 bdrv_aio_cancel(s
->pio_aiocb
);
1865 s
->pio_aiocb
= NULL
;
1868 if (s
->drive_kind
== IDE_CFATA
)
1869 s
->mult_sectors
= 0;
1871 s
->mult_sectors
= MAX_MULT_SECTORS
;
1888 s
->status
= READY_STAT
| SEEK_STAT
;
1892 /* ATAPI specific */
1895 s
->cdrom_changed
= 0;
1896 s
->packet_transfer_size
= 0;
1897 s
->elementary_transfer_size
= 0;
1898 s
->io_buffer_index
= 0;
1899 s
->cd_sector_size
= 0;
1904 s
->io_buffer_size
= 0;
1905 s
->req_nb_sectors
= 0;
1907 ide_set_signature(s
);
1908 /* init the transfer handler so that 0xffff is returned on data
1910 s
->end_transfer_func
= ide_dummy_transfer_stop
;
1911 ide_dummy_transfer_stop(s
);
1912 s
->media_changed
= 0;
1915 void ide_bus_reset(IDEBus
*bus
)
1919 ide_reset(&bus
->ifs
[0]);
1920 ide_reset(&bus
->ifs
[1]);
1923 /* pending async DMA */
1924 if (bus
->dma
->aiocb
) {
1926 printf("aio_cancel\n");
1928 bdrv_aio_cancel(bus
->dma
->aiocb
);
1929 bus
->dma
->aiocb
= NULL
;
1932 /* reset dma provider too */
1933 bus
->dma
->ops
->reset(bus
->dma
);
1936 static bool ide_cd_is_tray_open(void *opaque
)
1938 return ((IDEState
*)opaque
)->tray_open
;
1941 static bool ide_cd_is_medium_locked(void *opaque
)
1943 return ((IDEState
*)opaque
)->tray_locked
;
1946 static const BlockDevOps ide_cd_block_ops
= {
1947 .change_media_cb
= ide_cd_change_cb
,
1948 .eject_request_cb
= ide_cd_eject_request_cb
,
1949 .is_tray_open
= ide_cd_is_tray_open
,
1950 .is_medium_locked
= ide_cd_is_medium_locked
,
1953 int ide_init_drive(IDEState
*s
, BlockDriverState
*bs
, IDEDriveKind kind
,
1954 const char *version
, const char *serial
, const char *model
,
1956 uint32_t cylinders
, uint32_t heads
, uint32_t secs
,
1959 uint64_t nb_sectors
;
1962 s
->drive_kind
= kind
;
1964 bdrv_get_geometry(bs
, &nb_sectors
);
1965 s
->cylinders
= cylinders
;
1968 s
->chs_trans
= chs_trans
;
1969 s
->nb_sectors
= nb_sectors
;
1971 /* The SMART values should be preserved across power cycles
1973 s
->smart_enabled
= 1;
1974 s
->smart_autosave
= 1;
1975 s
->smart_errors
= 0;
1976 s
->smart_selftest_count
= 0;
1977 if (kind
== IDE_CD
) {
1978 bdrv_set_dev_ops(bs
, &ide_cd_block_ops
, s
);
1979 bdrv_set_buffer_alignment(bs
, 2048);
1981 if (!bdrv_is_inserted(s
->bs
)) {
1982 error_report("Device needs media, but drive is empty");
1985 if (bdrv_is_read_only(bs
)) {
1986 error_report("Can't use a read-only drive");
1991 pstrcpy(s
->drive_serial_str
, sizeof(s
->drive_serial_str
), serial
);
1993 snprintf(s
->drive_serial_str
, sizeof(s
->drive_serial_str
),
1994 "QM%05d", s
->drive_serial
);
1997 pstrcpy(s
->drive_model_str
, sizeof(s
->drive_model_str
), model
);
2001 strcpy(s
->drive_model_str
, "QEMU DVD-ROM");
2004 strcpy(s
->drive_model_str
, "QEMU MICRODRIVE");
2007 strcpy(s
->drive_model_str
, "QEMU HARDDISK");
2013 pstrcpy(s
->version
, sizeof(s
->version
), version
);
2015 pstrcpy(s
->version
, sizeof(s
->version
), qemu_get_version());
2019 bdrv_iostatus_enable(bs
);
2023 static void ide_init1(IDEBus
*bus
, int unit
)
2025 static int drive_serial
= 1;
2026 IDEState
*s
= &bus
->ifs
[unit
];
2030 s
->drive_serial
= drive_serial
++;
2031 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
2032 s
->io_buffer_total_len
= IDE_DMA_BUF_SECTORS
*512 + 4;
2033 s
->io_buffer
= qemu_memalign(2048, s
->io_buffer_total_len
);
2034 memset(s
->io_buffer
, 0, s
->io_buffer_total_len
);
2036 s
->smart_selftest_data
= qemu_blockalign(s
->bs
, 512);
2037 memset(s
->smart_selftest_data
, 0, 512);
2039 s
->sector_write_timer
= qemu_new_timer_ns(vm_clock
,
2040 ide_sector_write_timer_cb
, s
);
2043 static void ide_nop_start(IDEDMA
*dma
, IDEState
*s
,
2044 BlockDriverCompletionFunc
*cb
)
2048 static int ide_nop(IDEDMA
*dma
)
2053 static int ide_nop_int(IDEDMA
*dma
, int x
)
2058 static void ide_nop_restart(void *opaque
, int x
, RunState y
)
2062 static const IDEDMAOps ide_dma_nop_ops
= {
2063 .start_dma
= ide_nop_start
,
2064 .start_transfer
= ide_nop
,
2065 .prepare_buf
= ide_nop_int
,
2066 .rw_buf
= ide_nop_int
,
2067 .set_unit
= ide_nop_int
,
2068 .add_status
= ide_nop_int
,
2069 .set_inactive
= ide_nop
,
2070 .restart_cb
= ide_nop_restart
,
2074 static IDEDMA ide_dma_nop
= {
2075 .ops
= &ide_dma_nop_ops
,
2079 void ide_init2(IDEBus
*bus
, qemu_irq irq
)
2083 for(i
= 0; i
< 2; i
++) {
2085 ide_reset(&bus
->ifs
[i
]);
2088 bus
->dma
= &ide_dma_nop
;
2091 /* TODO convert users to qdev and remove */
2092 void ide_init2_with_non_qdev_drives(IDEBus
*bus
, DriveInfo
*hd0
,
2093 DriveInfo
*hd1
, qemu_irq irq
)
2097 uint32_t cyls
, heads
, secs
;
2099 for(i
= 0; i
< 2; i
++) {
2100 dinfo
= i
== 0 ? hd0
: hd1
;
2104 heads
= dinfo
->heads
;
2106 trans
= dinfo
->trans
;
2107 if (!cyls
&& !heads
&& !secs
) {
2108 hd_geometry_guess(dinfo
->bdrv
, &cyls
, &heads
, &secs
, &trans
);
2109 } else if (trans
== BIOS_ATA_TRANSLATION_AUTO
) {
2110 trans
= hd_bios_chs_auto_trans(cyls
, heads
, secs
);
2112 if (cyls
< 1 || cyls
> 65535) {
2113 error_report("cyls must be between 1 and 65535");
2116 if (heads
< 1 || heads
> 16) {
2117 error_report("heads must be between 1 and 16");
2120 if (secs
< 1 || secs
> 255) {
2121 error_report("secs must be between 1 and 255");
2124 if (ide_init_drive(&bus
->ifs
[i
], dinfo
->bdrv
,
2125 dinfo
->media_cd
? IDE_CD
: IDE_HD
,
2126 NULL
, dinfo
->serial
, NULL
, 0,
2127 cyls
, heads
, secs
, trans
) < 0) {
2128 error_report("Can't set up IDE drive %s", dinfo
->id
);
2131 bdrv_attach_dev_nofail(dinfo
->bdrv
, &bus
->ifs
[i
]);
2133 ide_reset(&bus
->ifs
[i
]);
2137 bus
->dma
= &ide_dma_nop
;
2140 static const MemoryRegionPortio ide_portio_list
[] = {
2141 { 0, 8, 1, .read
= ide_ioport_read
, .write
= ide_ioport_write
},
2142 { 0, 2, 2, .read
= ide_data_readw
, .write
= ide_data_writew
},
2143 { 0, 4, 4, .read
= ide_data_readl
, .write
= ide_data_writel
},
2144 PORTIO_END_OF_LIST(),
2147 static const MemoryRegionPortio ide_portio2_list
[] = {
2148 { 0, 1, 1, .read
= ide_status_read
, .write
= ide_cmd_write
},
2149 PORTIO_END_OF_LIST(),
2152 void ide_init_ioport(IDEBus
*bus
, ISADevice
*dev
, int iobase
, int iobase2
)
2154 /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA
2155 bridge has been setup properly to always register with ISA. */
2156 isa_register_portio_list(dev
, iobase
, ide_portio_list
, bus
, "ide");
2159 isa_register_portio_list(dev
, iobase2
, ide_portio2_list
, bus
, "ide");
2163 static bool is_identify_set(void *opaque
, int version_id
)
2165 IDEState
*s
= opaque
;
2167 return s
->identify_set
!= 0;
2170 static EndTransferFunc
* transfer_end_table
[] = {
2174 ide_atapi_cmd_reply_end
,
2176 ide_dummy_transfer_stop
,
2179 static int transfer_end_table_idx(EndTransferFunc
*fn
)
2183 for (i
= 0; i
< ARRAY_SIZE(transfer_end_table
); i
++)
2184 if (transfer_end_table
[i
] == fn
)
2190 static int ide_drive_post_load(void *opaque
, int version_id
)
2192 IDEState
*s
= opaque
;
2194 if (s
->identify_set
) {
2195 bdrv_set_enable_write_cache(s
->bs
, !!(s
->identify_data
[85] & (1 << 5)));
2200 static int ide_drive_pio_post_load(void *opaque
, int version_id
)
2202 IDEState
*s
= opaque
;
2204 if (s
->end_transfer_fn_idx
>= ARRAY_SIZE(transfer_end_table
)) {
2207 s
->end_transfer_func
= transfer_end_table
[s
->end_transfer_fn_idx
];
2208 s
->data_ptr
= s
->io_buffer
+ s
->cur_io_buffer_offset
;
2209 s
->data_end
= s
->data_ptr
+ s
->cur_io_buffer_len
;
2214 static void ide_drive_pio_pre_save(void *opaque
)
2216 IDEState
*s
= opaque
;
2219 s
->cur_io_buffer_offset
= s
->data_ptr
- s
->io_buffer
;
2220 s
->cur_io_buffer_len
= s
->data_end
- s
->data_ptr
;
2222 idx
= transfer_end_table_idx(s
->end_transfer_func
);
2224 fprintf(stderr
, "%s: invalid end_transfer_func for DRQ_STAT\n",
2226 s
->end_transfer_fn_idx
= 2;
2228 s
->end_transfer_fn_idx
= idx
;
2232 static bool ide_drive_pio_state_needed(void *opaque
)
2234 IDEState
*s
= opaque
;
2236 return ((s
->status
& DRQ_STAT
) != 0)
2237 || (s
->bus
->error_status
& BM_STATUS_PIO_RETRY
);
2240 static bool ide_tray_state_needed(void *opaque
)
2242 IDEState
*s
= opaque
;
2244 return s
->tray_open
|| s
->tray_locked
;
2247 static bool ide_atapi_gesn_needed(void *opaque
)
2249 IDEState
*s
= opaque
;
2251 return s
->events
.new_media
|| s
->events
.eject_request
;
2254 static bool ide_error_needed(void *opaque
)
2256 IDEBus
*bus
= opaque
;
2258 return (bus
->error_status
!= 0);
2261 /* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
2262 static const VMStateDescription vmstate_ide_atapi_gesn_state
= {
2263 .name
="ide_drive/atapi/gesn_state",
2265 .minimum_version_id
= 1,
2266 .minimum_version_id_old
= 1,
2267 .fields
= (VMStateField
[]) {
2268 VMSTATE_BOOL(events
.new_media
, IDEState
),
2269 VMSTATE_BOOL(events
.eject_request
, IDEState
),
2270 VMSTATE_END_OF_LIST()
2274 static const VMStateDescription vmstate_ide_tray_state
= {
2275 .name
= "ide_drive/tray_state",
2277 .minimum_version_id
= 1,
2278 .minimum_version_id_old
= 1,
2279 .fields
= (VMStateField
[]) {
2280 VMSTATE_BOOL(tray_open
, IDEState
),
2281 VMSTATE_BOOL(tray_locked
, IDEState
),
2282 VMSTATE_END_OF_LIST()
2286 static const VMStateDescription vmstate_ide_drive_pio_state
= {
2287 .name
= "ide_drive/pio_state",
2289 .minimum_version_id
= 1,
2290 .minimum_version_id_old
= 1,
2291 .pre_save
= ide_drive_pio_pre_save
,
2292 .post_load
= ide_drive_pio_post_load
,
2293 .fields
= (VMStateField
[]) {
2294 VMSTATE_INT32(req_nb_sectors
, IDEState
),
2295 VMSTATE_VARRAY_INT32(io_buffer
, IDEState
, io_buffer_total_len
, 1,
2296 vmstate_info_uint8
, uint8_t),
2297 VMSTATE_INT32(cur_io_buffer_offset
, IDEState
),
2298 VMSTATE_INT32(cur_io_buffer_len
, IDEState
),
2299 VMSTATE_UINT8(end_transfer_fn_idx
, IDEState
),
2300 VMSTATE_INT32(elementary_transfer_size
, IDEState
),
2301 VMSTATE_INT32(packet_transfer_size
, IDEState
),
2302 VMSTATE_END_OF_LIST()
2306 const VMStateDescription vmstate_ide_drive
= {
2307 .name
= "ide_drive",
2309 .minimum_version_id
= 0,
2310 .minimum_version_id_old
= 0,
2311 .post_load
= ide_drive_post_load
,
2312 .fields
= (VMStateField
[]) {
2313 VMSTATE_INT32(mult_sectors
, IDEState
),
2314 VMSTATE_INT32(identify_set
, IDEState
),
2315 VMSTATE_BUFFER_TEST(identify_data
, IDEState
, is_identify_set
),
2316 VMSTATE_UINT8(feature
, IDEState
),
2317 VMSTATE_UINT8(error
, IDEState
),
2318 VMSTATE_UINT32(nsector
, IDEState
),
2319 VMSTATE_UINT8(sector
, IDEState
),
2320 VMSTATE_UINT8(lcyl
, IDEState
),
2321 VMSTATE_UINT8(hcyl
, IDEState
),
2322 VMSTATE_UINT8(hob_feature
, IDEState
),
2323 VMSTATE_UINT8(hob_sector
, IDEState
),
2324 VMSTATE_UINT8(hob_nsector
, IDEState
),
2325 VMSTATE_UINT8(hob_lcyl
, IDEState
),
2326 VMSTATE_UINT8(hob_hcyl
, IDEState
),
2327 VMSTATE_UINT8(select
, IDEState
),
2328 VMSTATE_UINT8(status
, IDEState
),
2329 VMSTATE_UINT8(lba48
, IDEState
),
2330 VMSTATE_UINT8(sense_key
, IDEState
),
2331 VMSTATE_UINT8(asc
, IDEState
),
2332 VMSTATE_UINT8_V(cdrom_changed
, IDEState
, 3),
2333 VMSTATE_END_OF_LIST()
2335 .subsections
= (VMStateSubsection
[]) {
2337 .vmsd
= &vmstate_ide_drive_pio_state
,
2338 .needed
= ide_drive_pio_state_needed
,
2340 .vmsd
= &vmstate_ide_tray_state
,
2341 .needed
= ide_tray_state_needed
,
2343 .vmsd
= &vmstate_ide_atapi_gesn_state
,
2344 .needed
= ide_atapi_gesn_needed
,
2351 static const VMStateDescription vmstate_ide_error_status
= {
2352 .name
="ide_bus/error",
2354 .minimum_version_id
= 1,
2355 .minimum_version_id_old
= 1,
2356 .fields
= (VMStateField
[]) {
2357 VMSTATE_INT32(error_status
, IDEBus
),
2358 VMSTATE_END_OF_LIST()
2362 const VMStateDescription vmstate_ide_bus
= {
2365 .minimum_version_id
= 1,
2366 .minimum_version_id_old
= 1,
2367 .fields
= (VMStateField
[]) {
2368 VMSTATE_UINT8(cmd
, IDEBus
),
2369 VMSTATE_UINT8(unit
, IDEBus
),
2370 VMSTATE_END_OF_LIST()
2372 .subsections
= (VMStateSubsection
[]) {
2374 .vmsd
= &vmstate_ide_error_status
,
2375 .needed
= ide_error_needed
,
2382 void ide_drive_get(DriveInfo
**hd
, int max_bus
)
2386 if (drive_get_max_bus(IF_IDE
) >= max_bus
) {
2387 fprintf(stderr
, "qemu: too many IDE bus: %d\n", max_bus
);
2391 for(i
= 0; i
< max_bus
* MAX_IDE_DEVS
; i
++) {
2392 hd
[i
] = drive_get(IF_IDE
, i
/ MAX_IDE_DEVS
, i
% MAX_IDE_DEVS
);