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1 /*
2 * PowerMac NVRAM emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 #include "hw.h"
26 #include "firmware_abi.h"
27 #include "sysemu.h"
28 #include "ppc_mac.h"
29
30 /* debug NVR */
31 //#define DEBUG_NVR
32
33 #ifdef DEBUG_NVR
34 #define NVR_DPRINTF(fmt, args...) \
35 do { printf("NVR: " fmt , ##args); } while (0)
36 #else
37 #define NVR_DPRINTF(fmt, args...)
38 #endif
39
40 struct MacIONVRAMState {
41 target_phys_addr_t size;
42 int mem_index;
43 uint8_t *data;
44 };
45
46 #define DEF_SYSTEM_SIZE 0xc10
47
48 /* Direct access to NVRAM */
49 uint32_t macio_nvram_read (void *opaque, uint32_t addr)
50 {
51 MacIONVRAMState *s = opaque;
52 uint32_t ret;
53
54 if (addr < s->size)
55 ret = s->data[addr];
56 else
57 ret = -1;
58 NVR_DPRINTF("read addr %04x val %x\n", addr, ret);
59
60 return ret;
61 }
62
63 void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val)
64 {
65 MacIONVRAMState *s = opaque;
66
67 NVR_DPRINTF("write addr %04x val %x\n", addr, val);
68 if (addr < s->size)
69 s->data[addr] = val;
70 }
71
72 /* macio style NVRAM device */
73 static void macio_nvram_writeb (void *opaque,
74 target_phys_addr_t addr, uint32_t value)
75 {
76 MacIONVRAMState *s = opaque;
77
78 addr = (addr >> 4) & (s->size - 1);
79 s->data[addr] = value;
80 NVR_DPRINTF("writeb addr %04x val %x\n", (int)addr, value);
81 }
82
83 static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
84 {
85 MacIONVRAMState *s = opaque;
86 uint32_t value;
87
88 addr = (addr >> 4) & (s->size - 1);
89 value = s->data[addr];
90 NVR_DPRINTF("readb addr %04x val %x\n", (int)addr, value);
91
92 return value;
93 }
94
95 static CPUWriteMemoryFunc *nvram_write[] = {
96 &macio_nvram_writeb,
97 &macio_nvram_writeb,
98 &macio_nvram_writeb,
99 };
100
101 static CPUReadMemoryFunc *nvram_read[] = {
102 &macio_nvram_readb,
103 &macio_nvram_readb,
104 &macio_nvram_readb,
105 };
106
107 static void macio_nvram_save(QEMUFile *f, void *opaque)
108 {
109 MacIONVRAMState *s = (MacIONVRAMState *)opaque;
110
111 qemu_put_buffer(f, s->data, s->size);
112 }
113
114 static int macio_nvram_load(QEMUFile *f, void *opaque, int version_id)
115 {
116 MacIONVRAMState *s = (MacIONVRAMState *)opaque;
117
118 if (version_id != 1)
119 return -EINVAL;
120
121 qemu_get_buffer(f, s->data, s->size);
122
123 return 0;
124 }
125
126 static void macio_nvram_reset(void *opaque)
127 {
128 }
129
130 MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
131 {
132 MacIONVRAMState *s;
133
134 s = qemu_mallocz(sizeof(MacIONVRAMState));
135 s->data = qemu_mallocz(size);
136 s->size = size;
137
138 s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
139 *mem_index = s->mem_index;
140 register_savevm("macio_nvram", -1, 1, macio_nvram_save, macio_nvram_load,
141 s);
142 qemu_register_reset(macio_nvram_reset, s);
143 macio_nvram_reset(s);
144
145 return s;
146 }
147
148 void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
149 {
150 MacIONVRAMState *s;
151
152 s = opaque;
153 cpu_register_physical_memory(mem_base, s->size << 4, s->mem_index);
154 }
155
156 /* Set up a system OpenBIOS NVRAM partition */
157 void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len)
158 {
159 unsigned int i;
160 uint32_t start = 0, end;
161 struct OpenBIOS_nvpart_v1 *part_header;
162
163 // OpenBIOS nvram variables
164 // Variable partition
165 part_header = (struct OpenBIOS_nvpart_v1 *)nvr->data;
166 part_header->signature = OPENBIOS_PART_SYSTEM;
167 pstrcpy(part_header->name, sizeof(part_header->name), "system");
168
169 end = start + sizeof(struct OpenBIOS_nvpart_v1);
170 for (i = 0; i < nb_prom_envs; i++)
171 end = OpenBIOS_set_var(nvr->data, end, prom_envs[i]);
172
173 // End marker
174 nvr->data[end++] = '\0';
175
176 end = start + ((end - start + 15) & ~15);
177 /* XXX: OpenBIOS is not able to grow up a partition. Leave some space for
178 new variables. */
179 if (end < DEF_SYSTEM_SIZE)
180 end = DEF_SYSTEM_SIZE;
181 OpenBIOS_finish_partition(part_header, end - start);
182
183 // free partition
184 start = end;
185 part_header = (struct OpenBIOS_nvpart_v1 *)&nvr->data[start];
186 part_header->signature = OPENBIOS_PART_FREE;
187 pstrcpy(part_header->name, sizeof(part_header->name), "free");
188
189 end = len;
190 OpenBIOS_finish_partition(part_header, end - start);
191 }