hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "vl.h"
  11
  12 #ifdef TARGET_WORDS_BIGENDIAN
  13 #define BIOS_FILENAME "mips_bios.bin"
  14 #else
  15 #define BIOS_FILENAME "mipsel_bios.bin"
  16 #endif
  17
  18 #ifdef TARGET_MIPS64
  19 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
  20 #else
  21 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
  22 #endif
  23
  24 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
  25
  26 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  27 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  28 static const int ide_irq[2] = { 14, 15 };
  29
  30 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
  31 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
  32
  33 extern FILE *logfile;
  34
  35 static PITState *pit; /* PIT i8254 */
  36
  37 /*i8254 PIT is attached to the IRQ0 at PIC i8259 */
  38
  39 static struct _loaderparams {
  40     int ram_size;
  41     const char *kernel_filename;
  42     const char *kernel_cmdline;
  43     const char *initrd_filename;
  44 } loaderparams;
  45
  46 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  47                               uint32_t val)
  48 {
  49     if ((addr & 0xffff) == 0 && val == 42)
  50         qemu_system_reset_request ();
  51     else if ((addr & 0xffff) == 4 && val == 42)
  52         qemu_system_shutdown_request ();
  53 }
  54
  55 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  56 {
  57     return 0;
  58 }
  59
  60 static CPUWriteMemoryFunc *mips_qemu_write[] = {
  61     &mips_qemu_writel,
  62     &mips_qemu_writel,
  63     &mips_qemu_writel,
  64 };
  65
  66 static CPUReadMemoryFunc *mips_qemu_read[] = {
  67     &mips_qemu_readl,
  68     &mips_qemu_readl,
  69     &mips_qemu_readl,
  70 };
  71
  72 static int mips_qemu_iomemtype = 0;
  73
  74 static void load_kernel (CPUState *env)
  75 {
  76     int64_t entry, kernel_low, kernel_high;
  77     long kernel_size, initrd_size;
  78     ram_addr_t initrd_offset;
  79
  80     kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
  81                            &entry, &kernel_low, &kernel_high);
  82     if (kernel_size >= 0) {
  83         if ((entry & ~0x7fffffffULL) == 0x80000000)
  84             entry = (int32_t)entry;
  85         env->PC[env->current_tc] = entry;
  86     } else {
  87         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  88                 loaderparams.kernel_filename);
  89         exit(1);
  90     }
  91
  92     /* load initrd */
  93     initrd_size = 0;
  94     initrd_offset = 0;
  95     if (loaderparams.initrd_filename) {
  96         initrd_size = get_image_size (loaderparams.initrd_filename);
  97         if (initrd_size > 0) {
  98             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
  99             if (initrd_offset + initrd_size > ram_size) {
 100                 fprintf(stderr,
 101                         "qemu: memory too small for initial ram disk '%s'\n",
 102                         loaderparams.initrd_filename);
 103                 exit(1);
 104             }
 105             initrd_size = load_image(loaderparams.initrd_filename,
 106                                      phys_ram_base + initrd_offset);
 107         }
 108         if (initrd_size == (target_ulong) -1) {
 109             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 110                     loaderparams.initrd_filename);
 111             exit(1);
 112         }
 113     }
 114
 115     /* Store command line.  */
 116     if (initrd_size > 0) {
 117         int ret;
 118         ret = sprintf(phys_ram_base + (16 << 20) - 256,
 119                       "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
 120                       PHYS_TO_VIRT((uint32_t)initrd_offset),
 121                       initrd_size);
 122         strcpy (phys_ram_base + (16 << 20) - 256 + ret,
 123                 loaderparams.kernel_cmdline);
 124     }
 125     else {
 126         strcpy (phys_ram_base + (16 << 20) - 256,
 127                 loaderparams.kernel_cmdline);
 128     }
 129
 130     *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
 131     *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
 132 }
 133
 134 static void main_cpu_reset(void *opaque)
 135 {
 136     CPUState *env = opaque;
 137     cpu_reset(env);
 138
 139     if (loaderparams.kernel_filename)
 140         load_kernel (env);
 141 }
 142
 143 static
 144 void mips_r4k_init (int ram_size, int vga_ram_size, const char *boot_device,
 145                     DisplayState *ds, const char **fd_filename, int snapshot,
 146                     const char *kernel_filename, const char *kernel_cmdline,
 147                     const char *initrd_filename, const char *cpu_model)
 148 {
 149     char buf[1024];
 150     unsigned long bios_offset;
 151     int bios_size;
 152     CPUState *env;
 153     RTCState *rtc_state;
 154     int i;
 155     mips_def_t *def;
 156     qemu_irq *i8259;
 157
 158     /* init CPUs */
 159     if (cpu_model == NULL) {
 160 #ifdef TARGET_MIPS64
 161         cpu_model = "R4000";
 162 #else
 163         cpu_model = "24Kf";
 164 #endif
 165     }
 166     env = cpu_init(cpu_model);
 167     if (!env) {
 168         fprintf(stderr, "Unable to find CPU definition\n");
 169         exit(1);
 170     }
 171     register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
 172     qemu_register_reset(main_cpu_reset, env);
 173
 174     /* allocate RAM */
 175     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 176
 177     if (!mips_qemu_iomemtype) {
 178         mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
 179                                                      mips_qemu_write, NULL);
 180     }
 181     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 182
 183     /* Try to load a BIOS image. If this fails, we continue regardless,
 184        but initialize the hardware ourselves. When a kernel gets
 185        preloaded we also initialize the hardware, since the BIOS wasn't
 186        run. */
 187     bios_offset = ram_size + vga_ram_size;
 188     if (bios_name == NULL)
 189         bios_name = BIOS_FILENAME;
 190     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 191     bios_size = load_image(buf, phys_ram_base + bios_offset);
 192     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 193         cpu_register_physical_memory(0x1fc00000,
 194                                      BIOS_SIZE, bios_offset | IO_MEM_ROM);
 195     } else {
 196         /* not fatal */
 197         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 198                 buf);
 199     }
 200
 201     if (kernel_filename) {
 202         loaderparams.ram_size = ram_size;
 203         loaderparams.kernel_filename = kernel_filename;
 204         loaderparams.kernel_cmdline = kernel_cmdline;
 205         loaderparams.initrd_filename = initrd_filename;
 206         load_kernel (env);
 207     }
 208
 209     /* Init CPU internal devices */
 210     cpu_mips_irq_init_cpu(env);
 211     cpu_mips_clock_init(env);
 212     cpu_mips_irqctrl_init();
 213
 214     /* The PIC is attached to the MIPS CPU INT0 pin */
 215     i8259 = i8259_init(env->irq[2]);
 216
 217     rtc_state = rtc_init(0x70, i8259[8]);
 218
 219     /* Register 64 KB of ISA IO space at 0x14000000 */
 220     isa_mmio_init(0x14000000, 0x00010000);
 221     isa_mem_base = 0x10000000;
 222
 223     pit = pit_init(0x40, i8259[0]);
 224
 225     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 226         if (serial_hds[i]) {
 227             serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
 228         }
 229     }
 230
 231     isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
 232                  vga_ram_size);
 233
 234     if (nd_table[0].vlan) {
 235         if (nd_table[0].model == NULL
 236             || strcmp(nd_table[0].model, "ne2k_isa") == 0) {
 237             isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
 238         } else if (strcmp(nd_table[0].model, "?") == 0) {
 239             fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");
 240             exit (1);
 241         } else {
 242             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
 243             exit (1);
 244         }
 245     }
 246
 247     for(i = 0; i < 2; i++)
 248         isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
 249                      bs_table[2 * i], bs_table[2 * i + 1]);
 250
 251     i8042_init(i8259[1], i8259[12], 0x60);
 252     ds1225y_init(0x9000, "nvram");
 253 }
 254
 255 QEMUMachine mips_machine = {
 256     "mips",
 257     "mips r4k platform",
 258     mips_r4k_init,
 259 };