4 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "ui/console.h"
21 #include "hw/arm/omap.h"
22 #include "hw/framebuffer.h"
23 #include "ui/pixel_ops.h"
25 struct omap_lcd_panel_s
{
42 struct omap_dma_lcd_channel_s
*dma
;
43 uint16_t palette
[256];
50 static void omap_lcd_interrupts(struct omap_lcd_panel_s
*s
)
52 if (s
->frame_done
&& (s
->interrupts
& 1)) {
53 qemu_irq_raise(s
->irq
);
57 if (s
->palette_done
&& (s
->interrupts
& 2)) {
58 qemu_irq_raise(s
->irq
);
63 qemu_irq_raise(s
->irq
);
67 qemu_irq_lower(s
->irq
);
70 #define draw_line_func drawfn
73 #include "hw/omap_lcd_template.h"
75 #include "hw/omap_lcd_template.h"
77 #include "hw/omap_lcd_template.h"
79 #include "hw/omap_lcd_template.h"
81 static draw_line_func draw_line_table2
[33] = {
87 }, draw_line_table4
[33] = {
93 }, draw_line_table8
[33] = {
99 }, draw_line_table12
[33] = {
102 [15] = draw_line12_15
,
103 [16] = draw_line12_16
,
104 [32] = draw_line12_32
,
105 }, draw_line_table16
[33] = {
108 [15] = draw_line16_15
,
109 [16] = draw_line16_16
,
110 [32] = draw_line16_32
,
113 static void omap_update_display(void *opaque
)
115 struct omap_lcd_panel_s
*omap_lcd
= (struct omap_lcd_panel_s
*) opaque
;
116 DisplaySurface
*surface
= qemu_console_surface(omap_lcd
->con
);
117 draw_line_func draw_line
;
118 int size
, height
, first
, last
;
119 int width
, linesize
, step
, bpp
, frame_offset
;
122 if (!omap_lcd
|| omap_lcd
->plm
== 1 || !omap_lcd
->enable
||
123 !surface_bits_per_pixel(surface
)) {
128 if (omap_lcd
->plm
!= 2) {
129 cpu_physical_memory_read(omap_lcd
->dma
->phys_framebuffer
[
130 omap_lcd
->dma
->current_frame
],
131 (void *)omap_lcd
->palette
, 0x200);
132 switch (omap_lcd
->palette
[0] >> 12 & 7) {
134 frame_offset
+= 0x200;
137 frame_offset
+= 0x20;
142 switch ((omap_lcd
->palette
[0] >> 12) & 7) {
144 draw_line
= draw_line_table2
[surface_bits_per_pixel(surface
)];
149 draw_line
= draw_line_table4
[surface_bits_per_pixel(surface
)];
154 draw_line
= draw_line_table8
[surface_bits_per_pixel(surface
)];
160 draw_line
= draw_line_table12
[surface_bits_per_pixel(surface
)];
162 draw_line
= draw_line_table16
[surface_bits_per_pixel(surface
)];
167 /* Unsupported at the moment. */
172 width
= omap_lcd
->width
;
173 if (width
!= surface_width(surface
) ||
174 omap_lcd
->height
!= surface_height(surface
)) {
175 qemu_console_resize(omap_lcd
->con
,
176 omap_lcd
->width
, omap_lcd
->height
);
177 surface
= qemu_console_surface(omap_lcd
->con
);
178 omap_lcd
->invalidate
= 1;
181 if (omap_lcd
->dma
->current_frame
== 0)
182 size
= omap_lcd
->dma
->src_f1_bottom
- omap_lcd
->dma
->src_f1_top
;
184 size
= omap_lcd
->dma
->src_f2_bottom
- omap_lcd
->dma
->src_f2_top
;
186 if (frame_offset
+ ((width
* omap_lcd
->height
* bpp
) >> 3) > size
+ 2) {
187 omap_lcd
->sync_error
= 1;
188 omap_lcd_interrupts(omap_lcd
);
189 omap_lcd
->enable
= 0;
194 frame_base
= omap_lcd
->dma
->phys_framebuffer
[
195 omap_lcd
->dma
->current_frame
] + frame_offset
;
196 omap_lcd
->dma
->condition
|= 1 << omap_lcd
->dma
->current_frame
;
197 if (omap_lcd
->dma
->interrupts
& 1)
198 qemu_irq_raise(omap_lcd
->dma
->irq
);
199 if (omap_lcd
->dma
->dual
)
200 omap_lcd
->dma
->current_frame
^= 1;
202 if (!surface_bits_per_pixel(surface
)) {
207 height
= omap_lcd
->height
;
208 if (omap_lcd
->subpanel
& (1 << 31)) {
209 if (omap_lcd
->subpanel
& (1 << 29))
210 first
= (omap_lcd
->subpanel
>> 16) & 0x3ff;
212 height
= (omap_lcd
->subpanel
>> 16) & 0x3ff;
213 /* TODO: fill the rest of the panel with DPD */
216 step
= width
* bpp
>> 3;
217 linesize
= surface_stride(surface
);
218 framebuffer_update_display(surface
, omap_lcd
->sysmem
,
219 frame_base
, width
, height
,
221 omap_lcd
->invalidate
,
222 draw_line
, omap_lcd
->palette
,
225 dpy_gfx_update(omap_lcd
->con
, 0, first
, width
, last
- first
+ 1);
227 omap_lcd
->invalidate
= 0;
230 static void omap_ppm_save(const char *filename
, uint8_t *data
,
231 int w
, int h
, int linesize
, Error
**errp
)
238 f
= fopen(filename
, "wb");
240 error_setg(errp
, "failed to open file '%s': %s", filename
,
244 ret
= fprintf(f
, "P6\n%d %d\n%d\n", w
, h
, 255);
250 for (y
= 0; y
< h
; y
++) {
252 for (x
= 0; x
< w
; x
++) {
256 ret
= fputc((v
>> 8) & 0xf8, f
);
260 ret
= fputc((v
>> 3) & 0xfc, f
);
264 ret
= fputc((v
<< 3) & 0xf8, f
);
272 ret
= fputc((v
>> 16) & 0xff, f
);
276 ret
= fputc((v
>> 8) & 0xff, f
);
280 ret
= fputc((v
) & 0xff, f
);
295 error_setg(errp
, "failed to write to file '%s': %s", filename
,
301 static void omap_screen_dump(void *opaque
, const char *filename
, bool cswitch
,
304 struct omap_lcd_panel_s
*omap_lcd
= opaque
;
305 DisplaySurface
*surface
= qemu_console_surface(omap_lcd
->con
);
307 omap_update_display(opaque
);
308 if (omap_lcd
&& surface_data(surface
))
309 omap_ppm_save(filename
, surface_data(surface
),
310 omap_lcd
->width
, omap_lcd
->height
,
311 surface_stride(surface
), errp
);
314 static void omap_invalidate_display(void *opaque
) {
315 struct omap_lcd_panel_s
*omap_lcd
= opaque
;
316 omap_lcd
->invalidate
= 1;
319 static void omap_lcd_update(struct omap_lcd_panel_s
*s
) {
321 s
->dma
->current_frame
= -1;
325 omap_lcd_interrupts(s
);
329 if (s
->dma
->current_frame
== -1) {
332 s
->dma
->current_frame
= 0;
335 if (!s
->dma
->mpu
->port
[s
->dma
->src
].addr_valid(s
->dma
->mpu
,
336 s
->dma
->src_f1_top
) ||
338 s
->dma
->src
].addr_valid(s
->dma
->mpu
,
339 s
->dma
->src_f1_bottom
) ||
342 s
->dma
->src
].addr_valid(s
->dma
->mpu
,
343 s
->dma
->src_f2_top
) ||
345 s
->dma
->src
].addr_valid(s
->dma
->mpu
,
346 s
->dma
->src_f2_bottom
)))) {
347 s
->dma
->condition
|= 1 << 2;
348 if (s
->dma
->interrupts
& (1 << 1))
349 qemu_irq_raise(s
->dma
->irq
);
354 s
->dma
->phys_framebuffer
[0] = s
->dma
->src_f1_top
;
355 s
->dma
->phys_framebuffer
[1] = s
->dma
->src_f2_top
;
357 if (s
->plm
!= 2 && !s
->palette_done
) {
358 cpu_physical_memory_read(
359 s
->dma
->phys_framebuffer
[s
->dma
->current_frame
],
360 (void *)s
->palette
, 0x200);
362 omap_lcd_interrupts(s
);
366 static uint64_t omap_lcdc_read(void *opaque
, hwaddr addr
,
369 struct omap_lcd_panel_s
*s
= (struct omap_lcd_panel_s
*) opaque
;
372 case 0x00: /* LCD_CONTROL */
373 return (s
->tft
<< 23) | (s
->plm
<< 20) |
374 (s
->tft
<< 7) | (s
->interrupts
<< 3) |
375 (s
->mono
<< 1) | s
->enable
| s
->ctrl
| 0xfe000c34;
377 case 0x04: /* LCD_TIMING0 */
378 return (s
->timing
[0] << 10) | (s
->width
- 1) | 0x0000000f;
380 case 0x08: /* LCD_TIMING1 */
381 return (s
->timing
[1] << 10) | (s
->height
- 1);
383 case 0x0c: /* LCD_TIMING2 */
384 return s
->timing
[2] | 0xfc000000;
386 case 0x10: /* LCD_STATUS */
387 return (s
->palette_done
<< 6) | (s
->sync_error
<< 2) | s
->frame_done
;
389 case 0x14: /* LCD_SUBPANEL */
399 static void omap_lcdc_write(void *opaque
, hwaddr addr
,
400 uint64_t value
, unsigned size
)
402 struct omap_lcd_panel_s
*s
= (struct omap_lcd_panel_s
*) opaque
;
405 case 0x00: /* LCD_CONTROL */
406 s
->plm
= (value
>> 20) & 3;
407 s
->tft
= (value
>> 7) & 1;
408 s
->interrupts
= (value
>> 3) & 3;
409 s
->mono
= (value
>> 1) & 1;
410 s
->ctrl
= value
& 0x01cff300;
411 if (s
->enable
!= (value
& 1)) {
412 s
->enable
= value
& 1;
417 case 0x04: /* LCD_TIMING0 */
418 s
->timing
[0] = value
>> 10;
419 s
->width
= (value
& 0x3ff) + 1;
422 case 0x08: /* LCD_TIMING1 */
423 s
->timing
[1] = value
>> 10;
424 s
->height
= (value
& 0x3ff) + 1;
427 case 0x0c: /* LCD_TIMING2 */
428 s
->timing
[2] = value
;
431 case 0x10: /* LCD_STATUS */
434 case 0x14: /* LCD_SUBPANEL */
435 s
->subpanel
= value
& 0xa1ffffff;
443 static const MemoryRegionOps omap_lcdc_ops
= {
444 .read
= omap_lcdc_read
,
445 .write
= omap_lcdc_write
,
446 .endianness
= DEVICE_NATIVE_ENDIAN
,
449 void omap_lcdc_reset(struct omap_lcd_panel_s
*s
)
451 s
->dma
->current_frame
= -1;
471 struct omap_lcd_panel_s
*omap_lcdc_init(MemoryRegion
*sysmem
,
474 struct omap_dma_lcd_channel_s
*dma
,
477 struct omap_lcd_panel_s
*s
= (struct omap_lcd_panel_s
*)
478 g_malloc0(sizeof(struct omap_lcd_panel_s
));
485 memory_region_init_io(&s
->iomem
, &omap_lcdc_ops
, s
, "omap.lcdc", 0x100);
486 memory_region_add_subregion(sysmem
, base
, &s
->iomem
);
488 s
->con
= graphic_console_init(omap_update_display
,
489 omap_invalidate_display
,
490 omap_screen_dump
, NULL
, s
);