hw/pc_piix.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "pc.h"
  27 #include "apic.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "net.h"
  32 #include "boards.h"
  33 #include "ide.h"
  34 #include "kvm.h"
  35 #include "kvmclock.h"
  36 #include "sysemu.h"
  37 #include "sysbus.h"
  38 #include "arch_init.h"
  39 #include "blockdev.h"
  40 #include "smbus.h"
  41
  42 #define MAX_IDE_BUS 2
  43
  44 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  45 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  46 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  47
  48 static void ioapic_init(IsaIrqState *isa_irq_state)
  49 {
  50     DeviceState *dev;
  51     SysBusDevice *d;
  52     unsigned int i;
  53
  54     dev = qdev_create(NULL, "ioapic");
  55     qdev_init_nofail(dev);
  56     d = sysbus_from_qdev(dev);
  57     sysbus_mmio_map(d, 0, 0xfec00000);
  58
  59     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  60         isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
  61     }
  62 }
  63
  64 /* PC hardware initialisation */
  65 static void pc_init1(ram_addr_t ram_size,
  66                      const char *boot_device,
  67                      const char *kernel_filename,
  68                      const char *kernel_cmdline,
  69                      const char *initrd_filename,
  70                      const char *cpu_model,
  71                      int pci_enabled,
  72                      int kvmclock_enabled)
  73 {
  74     int i;
  75     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  76     PCIBus *pci_bus;
  77     PCII440FXState *i440fx_state;
  78     int piix3_devfn = -1;
  79     qemu_irq *cpu_irq;
  80     qemu_irq *isa_irq;
  81     qemu_irq *i8259;
  82     qemu_irq *cmos_s3;
  83     qemu_irq *smi_irq;
  84     IsaIrqState *isa_irq_state;
  85     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  86     BusState *idebus[MAX_IDE_BUS];
  87     ISADevice *rtc_state;
  88
  89     pc_cpus_init(cpu_model);
  90
  91     if (kvmclock_enabled) {
  92         kvmclock_create();
  93     }
  94
  95     if (ram_size >= 0xe0000000 ) {
  96         above_4g_mem_size = ram_size - 0xe0000000;
  97         below_4g_mem_size = 0xe0000000;
  98     } else {
  99         above_4g_mem_size = 0;
 100         below_4g_mem_size = ram_size;
 101     }
 102
 103     /* allocate ram and load rom/bios */
 104     pc_memory_init(kernel_filename, kernel_cmdline, initrd_filename,
 105                    below_4g_mem_size, above_4g_mem_size);
 106
 107     cpu_irq = pc_allocate_cpu_irq();
 108     i8259 = i8259_init(cpu_irq[0]);
 109     isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
 110     isa_irq_state->i8259 = i8259;
 111     if (pci_enabled) {
 112         ioapic_init(isa_irq_state);
 113     }
 114     isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 115
 116     if (pci_enabled) {
 117         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
 118     } else {
 119         pci_bus = NULL;
 120         i440fx_state = NULL;
 121         isa_bus_new(NULL);
 122     }
 123     isa_bus_irqs(isa_irq);
 124
 125     pc_register_ferr_irq(isa_get_irq(13));
 126
 127     pc_vga_init(pci_enabled? pci_bus: NULL);
 128
 129     /* init basic PC hardware */
 130     pc_basic_device_init(isa_irq, &rtc_state);
 131
 132     for(i = 0; i < nb_nics; i++) {
 133         NICInfo *nd = &nd_table[i];
 134
 135         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
 136             pc_init_ne2k_isa(nd);
 137         else
 138             pci_nic_init_nofail(nd, "e1000", NULL);
 139     }
 140
 141     ide_drive_get(hd, MAX_IDE_BUS);
 142     if (pci_enabled) {
 143         PCIDevice *dev;
 144         dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
 145         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
 146         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
 147     } else {
 148         for(i = 0; i < MAX_IDE_BUS; i++) {
 149             ISADevice *dev;
 150             dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 151                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 152             idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
 153         }
 154     }
 155
 156     audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
 157
 158     pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
 159                  idebus[0], idebus[1], rtc_state);
 160
 161     if (pci_enabled && usb_enabled) {
 162         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 163     }
 164
 165     if (pci_enabled && acpi_enabled) {
 166         i2c_bus *smbus;
 167
 168         cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
 169         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
 170         /* TODO: Populate SPD eeprom data.  */
 171         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
 172                               isa_get_irq(9), *cmos_s3, *smi_irq,
 173                               kvm_enabled());
 174         smbus_eeprom_init(smbus, 8, NULL, 0);
 175     }
 176
 177     if (i440fx_state) {
 178         i440fx_init_memory_mappings(i440fx_state);
 179     }
 180
 181     if (pci_enabled) {
 182         pc_pci_device_init(pci_bus);
 183     }
 184 }
 185
 186 static void pc_init_pci(ram_addr_t ram_size,
 187                         const char *boot_device,
 188                         const char *kernel_filename,
 189                         const char *kernel_cmdline,
 190                         const char *initrd_filename,
 191                         const char *cpu_model)
 192 {
 193     pc_init1(ram_size, boot_device,
 194              kernel_filename, kernel_cmdline,
 195              initrd_filename, cpu_model, 1, 1);
 196 }
 197
 198 static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
 199                                     const char *boot_device,
 200                                     const char *kernel_filename,
 201                                     const char *kernel_cmdline,
 202                                     const char *initrd_filename,
 203                                     const char *cpu_model)
 204 {
 205     pc_init1(ram_size, boot_device,
 206              kernel_filename, kernel_cmdline,
 207              initrd_filename, cpu_model, 1, 0);
 208 }
 209
 210 static void pc_init_isa(ram_addr_t ram_size,
 211                         const char *boot_device,
 212                         const char *kernel_filename,
 213                         const char *kernel_cmdline,
 214                         const char *initrd_filename,
 215                         const char *cpu_model)
 216 {
 217     if (cpu_model == NULL)
 218         cpu_model = "486";
 219     pc_init1(ram_size, boot_device,
 220              kernel_filename, kernel_cmdline,
 221              initrd_filename, cpu_model, 0, 1);
 222 }
 223
 224 static QEMUMachine pc_machine = {
 225     .name = "pc-0.14",
 226     .alias = "pc",
 227     .desc = "Standard PC",
 228     .init = pc_init_pci,
 229     .max_cpus = 255,
 230     .is_default = 1,
 231 };
 232
 233 static QEMUMachine pc_machine_v0_13 = {
 234     .name = "pc-0.13",
 235     .desc = "Standard PC",
 236     .init = pc_init_pci_no_kvmclock,
 237     .max_cpus = 255,
 238     .compat_props = (GlobalProperty[]) {
 239         {
 240             .driver   = "virtio-9p-pci",
 241             .property = "vectors",
 242             .value    = stringify(0),
 243         },{
 244             .driver   = "VGA",
 245             .property = "rombar",
 246             .value    = stringify(0),
 247         },{
 248             .driver   = "vmware-svga",
 249             .property = "rombar",
 250             .value    = stringify(0),
 251         },{
 252             .driver   = "PCI",
 253             .property = "command_serr_enable",
 254             .value    = "off",
 255         },
 256         { /* end of list */ }
 257     },
 258 };
 259
 260 static QEMUMachine pc_machine_v0_12 = {
 261     .name = "pc-0.12",
 262     .desc = "Standard PC",
 263     .init = pc_init_pci_no_kvmclock,
 264     .max_cpus = 255,
 265     .compat_props = (GlobalProperty[]) {
 266         {
 267             .driver   = "virtio-serial-pci",
 268             .property = "max_ports",
 269             .value    = stringify(1),
 270         },{
 271             .driver   = "virtio-serial-pci",
 272             .property = "vectors",
 273             .value    = stringify(0),
 274         },{
 275             .driver   = "VGA",
 276             .property = "rombar",
 277             .value    = stringify(0),
 278         },{
 279             .driver   = "vmware-svga",
 280             .property = "rombar",
 281             .value    = stringify(0),
 282         },{
 283             .driver   = "PCI",
 284             .property = "command_serr_enable",
 285             .value    = "off",
 286         },
 287         { /* end of list */ }
 288     }
 289 };
 290
 291 static QEMUMachine pc_machine_v0_11 = {
 292     .name = "pc-0.11",
 293     .desc = "Standard PC, qemu 0.11",
 294     .init = pc_init_pci_no_kvmclock,
 295     .max_cpus = 255,
 296     .compat_props = (GlobalProperty[]) {
 297         {
 298             .driver   = "virtio-blk-pci",
 299             .property = "vectors",
 300             .value    = stringify(0),
 301         },{
 302             .driver   = "virtio-serial-pci",
 303             .property = "max_ports",
 304             .value    = stringify(1),
 305         },{
 306             .driver   = "virtio-serial-pci",
 307             .property = "vectors",
 308             .value    = stringify(0),
 309         },{
 310             .driver   = "ide-drive",
 311             .property = "ver",
 312             .value    = "0.11",
 313         },{
 314             .driver   = "scsi-disk",
 315             .property = "ver",
 316             .value    = "0.11",
 317         },{
 318             .driver   = "PCI",
 319             .property = "rombar",
 320             .value    = stringify(0),
 321         },{
 322             .driver   = "PCI",
 323             .property = "command_serr_enable",
 324             .value    = "off",
 325         },
 326         { /* end of list */ }
 327     }
 328 };
 329
 330 static QEMUMachine pc_machine_v0_10 = {
 331     .name = "pc-0.10",
 332     .desc = "Standard PC, qemu 0.10",
 333     .init = pc_init_pci_no_kvmclock,
 334     .max_cpus = 255,
 335     .compat_props = (GlobalProperty[]) {
 336         {
 337             .driver   = "virtio-blk-pci",
 338             .property = "class",
 339             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
 340         },{
 341             .driver   = "virtio-serial-pci",
 342             .property = "class",
 343             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
 344         },{
 345             .driver   = "virtio-serial-pci",
 346             .property = "max_ports",
 347             .value    = stringify(1),
 348         },{
 349             .driver   = "virtio-serial-pci",
 350             .property = "vectors",
 351             .value    = stringify(0),
 352         },{
 353             .driver   = "virtio-net-pci",
 354             .property = "vectors",
 355             .value    = stringify(0),
 356         },{
 357             .driver   = "virtio-blk-pci",
 358             .property = "vectors",
 359             .value    = stringify(0),
 360         },{
 361             .driver   = "ide-drive",
 362             .property = "ver",
 363             .value    = "0.10",
 364         },{
 365             .driver   = "scsi-disk",
 366             .property = "ver",
 367             .value    = "0.10",
 368         },{
 369             .driver   = "PCI",
 370             .property = "rombar",
 371             .value    = stringify(0),
 372         },{
 373             .driver   = "PCI",
 374             .property = "command_serr_enable",
 375             .value    = "off",
 376         },
 377         { /* end of list */ }
 378     },
 379 };
 380
 381 static QEMUMachine isapc_machine = {
 382     .name = "isapc",
 383     .desc = "ISA-only PC",
 384     .init = pc_init_isa,
 385     .max_cpus = 1,
 386 };
 387
 388 static void pc_machine_init(void)
 389 {
 390     qemu_register_machine(&pc_machine);
 391     qemu_register_machine(&pc_machine_v0_13);
 392     qemu_register_machine(&pc_machine_v0_12);
 393     qemu_register_machine(&pc_machine_v0_11);
 394     qemu_register_machine(&pc_machine_v0_10);
 395     qemu_register_machine(&isapc_machine);
 396 }
 397
 398 machine_init(pc_machine_init);