2 * sPAPR CPU core device, acts as container of CPU thread devices.
4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 #include "hw/cpu/core.h"
10 #include "hw/ppc/spapr_cpu_core.h"
11 #include "target-ppc/cpu.h"
12 #include "hw/ppc/spapr.h"
13 #include "hw/boards.h"
14 #include "qapi/error.h"
15 #include "sysemu/cpus.h"
16 #include "target-ppc/kvm_ppc.h"
17 #include "hw/ppc/ppc.h"
18 #include "target-ppc/mmu-hash64.h"
19 #include "sysemu/numa.h"
21 static void spapr_cpu_reset(void *opaque
)
23 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
24 PowerPCCPU
*cpu
= opaque
;
25 CPUState
*cs
= CPU(cpu
);
26 CPUPPCState
*env
= &cpu
->env
;
30 /* All CPUs start halted. CPU0 is unhalted from the machine level
31 * reset code and the rest are explicitly started up by the guest
32 * using an RTAS call */
35 env
->spr
[SPR_HIOR
] = 0;
37 ppc_hash64_set_external_hpt(cpu
, spapr
->htab
, spapr
->htab_shift
,
41 static void spapr_cpu_destroy(PowerPCCPU
*cpu
)
43 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
45 xics_cpu_destroy(spapr
->xics
, cpu
);
46 qemu_unregister_reset(spapr_cpu_reset
, cpu
);
49 void spapr_cpu_init(sPAPRMachineState
*spapr
, PowerPCCPU
*cpu
, Error
**errp
)
51 CPUPPCState
*env
= &cpu
->env
;
52 CPUState
*cs
= CPU(cpu
);
55 /* Set time-base frequency to 512 MHz */
56 cpu_ppc_tb_init(env
, SPAPR_TIMEBASE_FREQ
);
58 /* Enable PAPR mode in TCG or KVM */
59 cpu_ppc_set_papr(cpu
);
61 if (cpu
->max_compat
) {
62 Error
*local_err
= NULL
;
64 ppc_set_compat(cpu
, cpu
->max_compat
, &local_err
);
66 error_propagate(errp
, local_err
);
71 /* Set NUMA node for the added CPUs */
72 for (i
= 0; i
< nb_numa_nodes
; i
++) {
73 if (test_bit(cs
->cpu_index
, numa_info
[i
].node_cpu
)) {
79 xics_cpu_setup(spapr
->xics
, cpu
);
81 qemu_register_reset(spapr_cpu_reset
, cpu
);
86 * Return the sPAPR CPU core type for @model which essentially is the CPU
87 * model specified with -cpu cmdline option.
89 char *spapr_get_cpu_core_type(const char *model
)
92 gchar
**model_pieces
= g_strsplit(model
, ",", 2);
94 core_type
= g_strdup_printf("%s-%s", model_pieces
[0], TYPE_SPAPR_CPU_CORE
);
95 g_strfreev(model_pieces
);
99 static void spapr_core_release(DeviceState
*dev
, void *opaque
)
101 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
102 const char *typename
= object_class_get_name(sc
->cpu_class
);
103 size_t size
= object_type_get_instance_size(typename
);
104 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
105 CPUCore
*cc
= CPU_CORE(dev
);
108 for (i
= 0; i
< cc
->nr_threads
; i
++) {
109 void *obj
= sc
->threads
+ i
* size
;
110 DeviceState
*dev
= DEVICE(obj
);
111 CPUState
*cs
= CPU(dev
);
112 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
114 spapr_cpu_destroy(cpu
);
116 object_unparent(obj
);
119 spapr
->cores
[cc
->core_id
/ smp_threads
] = NULL
;
122 object_unparent(OBJECT(dev
));
125 void spapr_core_unplug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
128 CPUCore
*cc
= CPU_CORE(dev
);
129 int smt
= kvmppc_smt_threads();
130 int index
= cc
->core_id
/ smp_threads
;
131 sPAPRDRConnector
*drc
=
132 spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU
, index
* smt
);
133 sPAPRDRConnectorClass
*drck
;
134 Error
*local_err
= NULL
;
137 error_setg(errp
, "Boot CPU core may not be unplugged");
143 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
144 drck
->detach(drc
, dev
, spapr_core_release
, NULL
, &local_err
);
146 error_propagate(errp
, local_err
);
150 spapr_hotplug_req_remove_by_index(drc
);
153 void spapr_core_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
156 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
157 sPAPRCPUCore
*core
= SPAPR_CPU_CORE(OBJECT(dev
));
158 CPUCore
*cc
= CPU_CORE(dev
);
159 CPUState
*cs
= CPU(core
->threads
);
160 sPAPRDRConnector
*drc
;
161 sPAPRDRConnectorClass
*drck
;
162 Error
*local_err
= NULL
;
165 int index
= cc
->core_id
/ smp_threads
;
166 int smt
= kvmppc_smt_threads();
168 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU
, index
* smt
);
169 spapr
->cores
[index
] = OBJECT(dev
);
174 * Setup CPU DT entries only for hotplugged CPUs. For boot time or
175 * coldplugged CPUs DT entries are setup in spapr_finalize_fdt().
177 if (dev
->hotplugged
) {
178 fdt
= spapr_populate_hotplug_cpu_dt(cs
, &fdt_offset
, spapr
);
181 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
182 drck
->attach(drc
, dev
, fdt
, fdt_offset
, !dev
->hotplugged
, &local_err
);
185 spapr
->cores
[index
] = NULL
;
186 error_propagate(errp
, local_err
);
190 if (dev
->hotplugged
) {
192 * Send hotplug notification interrupt to the guest only in case
193 * of hotplugged CPUs.
195 spapr_hotplug_req_add_by_index(drc
);
198 * Set the right DRC states for cold plugged CPU.
200 drck
->set_allocation_state(drc
, SPAPR_DR_ALLOCATION_STATE_USABLE
);
201 drck
->set_isolation_state(drc
, SPAPR_DR_ISOLATION_STATE_UNISOLATED
);
205 void spapr_core_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
208 MachineState
*machine
= MACHINE(OBJECT(hotplug_dev
));
209 MachineClass
*mc
= MACHINE_GET_CLASS(hotplug_dev
);
210 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
211 int spapr_max_cores
= max_cpus
/ smp_threads
;
213 Error
*local_err
= NULL
;
214 CPUCore
*cc
= CPU_CORE(dev
);
215 char *base_core_type
= spapr_get_cpu_core_type(machine
->cpu_model
);
216 const char *type
= object_get_typename(OBJECT(dev
));
218 if (!mc
->query_hotpluggable_cpus
) {
219 error_setg(&local_err
, "CPU hotplug not supported for this machine");
223 if (strcmp(base_core_type
, type
)) {
224 error_setg(&local_err
, "CPU core type should be %s", base_core_type
);
228 if (cc
->nr_threads
!= smp_threads
) {
229 error_setg(&local_err
, "threads must be %d", smp_threads
);
233 if (cc
->core_id
% smp_threads
) {
234 error_setg(&local_err
, "invalid core id %d", cc
->core_id
);
238 index
= cc
->core_id
/ smp_threads
;
239 if (index
< 0 || index
>= spapr_max_cores
) {
240 error_setg(&local_err
, "core id %d out of range", cc
->core_id
);
244 if (spapr
->cores
[index
]) {
245 error_setg(&local_err
, "core %d already populated", cc
->core_id
);
250 g_free(base_core_type
);
251 error_propagate(errp
, local_err
);
254 static void spapr_cpu_core_realize_child(Object
*child
, Error
**errp
)
256 Error
*local_err
= NULL
;
257 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
258 CPUState
*cs
= CPU(child
);
259 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
261 object_property_set_bool(child
, true, "realized", &local_err
);
263 error_propagate(errp
, local_err
);
267 spapr_cpu_init(spapr
, cpu
, &local_err
);
269 error_propagate(errp
, local_err
);
274 static void spapr_cpu_core_realize(DeviceState
*dev
, Error
**errp
)
276 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
277 CPUCore
*cc
= CPU_CORE(OBJECT(dev
));
278 const char *typename
= object_class_get_name(sc
->cpu_class
);
279 size_t size
= object_type_get_instance_size(typename
);
280 Error
*local_err
= NULL
;
284 sc
->threads
= g_malloc0(size
* cc
->nr_threads
);
285 for (i
= 0; i
< cc
->nr_threads
; i
++) {
289 obj
= sc
->threads
+ i
* size
;
291 object_initialize(obj
, size
, typename
);
293 cs
->cpu_index
= cc
->core_id
+ i
;
294 snprintf(id
, sizeof(id
), "thread[%d]", i
);
295 object_property_add_child(OBJECT(sc
), id
, obj
, &local_err
);
302 for (j
= 0; j
< cc
->nr_threads
; j
++) {
303 obj
= sc
->threads
+ j
* size
;
305 spapr_cpu_core_realize_child(obj
, &local_err
);
314 obj
= sc
->threads
+ i
* size
;
315 object_unparent(obj
);
318 error_propagate(errp
, local_err
);
321 static void spapr_cpu_core_class_init(ObjectClass
*oc
, void *data
)
323 DeviceClass
*dc
= DEVICE_CLASS(oc
);
324 dc
->realize
= spapr_cpu_core_realize
;
328 * instance_init routines from different flavours of sPAPR CPU cores.
330 #define SPAPR_CPU_CORE_INITFN(_type, _fname) \
331 static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \
333 sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \
334 char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \
335 ObjectClass *oc = object_class_by_name(name); \
337 g_free((void *)name); \
338 core->cpu_class = oc; \
341 SPAPR_CPU_CORE_INITFN(970mp_v1
.0
, 970MP_v10
);
342 SPAPR_CPU_CORE_INITFN(970mp_v1
.1
, 970MP_v11
);
343 SPAPR_CPU_CORE_INITFN(970_v2
.2
, 970);
344 SPAPR_CPU_CORE_INITFN(POWER5
+_v2
.1
, POWER5plus
);
345 SPAPR_CPU_CORE_INITFN(POWER7_v2
.3
, POWER7
);
346 SPAPR_CPU_CORE_INITFN(POWER7
+_v2
.1
, POWER7plus
);
347 SPAPR_CPU_CORE_INITFN(POWER8_v2
.0
, POWER8
);
348 SPAPR_CPU_CORE_INITFN(POWER8E_v2
.1
, POWER8E
);
349 SPAPR_CPU_CORE_INITFN(POWER8NVL_v1
.0
, POWER8NVL
);
351 typedef struct SPAPRCoreInfo
{
353 void (*initfn
)(Object
*obj
);
356 static const SPAPRCoreInfo spapr_cores
[] = {
358 { .name
= "970_v2.2", .initfn
= spapr_cpu_core_970_initfn
},
359 { .name
= "970", .initfn
= spapr_cpu_core_970_initfn
},
361 /* 970MP variants and aliases */
362 { .name
= "970MP_v1.0", .initfn
= spapr_cpu_core_970MP_v10_initfn
},
363 { .name
= "970mp_v1.0", .initfn
= spapr_cpu_core_970MP_v10_initfn
},
364 { .name
= "970MP_v1.1", .initfn
= spapr_cpu_core_970MP_v11_initfn
},
365 { .name
= "970mp_v1.1", .initfn
= spapr_cpu_core_970MP_v11_initfn
},
366 { .name
= "970mp", .initfn
= spapr_cpu_core_970MP_v11_initfn
},
368 /* POWER5 and aliases */
369 { .name
= "POWER5+_v2.1", .initfn
= spapr_cpu_core_POWER5plus_initfn
},
370 { .name
= "POWER5+", .initfn
= spapr_cpu_core_POWER5plus_initfn
},
372 /* POWER7 and aliases */
373 { .name
= "POWER7_v2.3", .initfn
= spapr_cpu_core_POWER7_initfn
},
374 { .name
= "POWER7", .initfn
= spapr_cpu_core_POWER7_initfn
},
376 /* POWER7+ and aliases */
377 { .name
= "POWER7+_v2.1", .initfn
= spapr_cpu_core_POWER7plus_initfn
},
378 { .name
= "POWER7+", .initfn
= spapr_cpu_core_POWER7plus_initfn
},
380 /* POWER8 and aliases */
381 { .name
= "POWER8_v2.0", .initfn
= spapr_cpu_core_POWER8_initfn
},
382 { .name
= "POWER8", .initfn
= spapr_cpu_core_POWER8_initfn
},
383 { .name
= "power8", .initfn
= spapr_cpu_core_POWER8_initfn
},
385 /* POWER8E and aliases */
386 { .name
= "POWER8E_v2.1", .initfn
= spapr_cpu_core_POWER8E_initfn
},
387 { .name
= "POWER8E", .initfn
= spapr_cpu_core_POWER8E_initfn
},
389 /* POWER8NVL and aliases */
390 { .name
= "POWER8NVL_v1.0", .initfn
= spapr_cpu_core_POWER8NVL_initfn
},
391 { .name
= "POWER8NVL", .initfn
= spapr_cpu_core_POWER8NVL_initfn
},
396 static void spapr_cpu_core_register(const SPAPRCoreInfo
*info
)
398 TypeInfo type_info
= {
399 .parent
= TYPE_SPAPR_CPU_CORE
,
400 .instance_size
= sizeof(sPAPRCPUCore
),
401 .instance_init
= info
->initfn
,
404 type_info
.name
= g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE
, info
->name
);
405 type_register(&type_info
);
406 g_free((void *)type_info
.name
);
409 static const TypeInfo spapr_cpu_core_type_info
= {
410 .name
= TYPE_SPAPR_CPU_CORE
,
411 .parent
= TYPE_CPU_CORE
,
413 .instance_size
= sizeof(sPAPRCPUCore
),
414 .class_init
= spapr_cpu_core_class_init
,
417 static void spapr_cpu_core_register_types(void)
419 const SPAPRCoreInfo
*info
= spapr_cores
;
421 type_register_static(&spapr_cpu_core_type_info
);
423 spapr_cpu_core_register(info
);
428 type_init(spapr_cpu_core_register_types
)