hw/ppc/spapr_cpu_core.c

   1 /*
   2  * sPAPR CPU core device, acts as container of CPU thread devices.
   3  *
   4  * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9 #include "qemu/osdep.h"
  10 #include "hw/cpu/core.h"
  11 #include "hw/ppc/spapr_cpu_core.h"
  12 #include "target/ppc/cpu.h"
  13 #include "hw/ppc/spapr.h"
  14 #include "hw/boards.h"
  15 #include "qapi/error.h"
  16 #include "sysemu/cpus.h"
  17 #include "sysemu/kvm.h"
  18 #include "target/ppc/kvm_ppc.h"
  19 #include "hw/ppc/ppc.h"
  20 #include "target/ppc/mmu-hash64.h"
  21 #include "sysemu/numa.h"
  22 #include "sysemu/hw_accel.h"
  23 #include "qemu/error-report.h"
  24
  25 static void spapr_cpu_reset(void *opaque)
  26 {
  27     PowerPCCPU *cpu = opaque;
  28     CPUState *cs = CPU(cpu);
  29     CPUPPCState *env = &cpu->env;
  30     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
  31
  32     cpu_reset(cs);
  33
  34     /* All CPUs start halted.  CPU0 is unhalted from the machine level
  35      * reset code and the rest are explicitly started up by the guest
  36      * using an RTAS call */
  37     cs->halted = 1;
  38
  39     env->spr[SPR_HIOR] = 0;
  40
  41     /* Disable Power-saving mode Exit Cause exceptions for the CPU.
  42      * This can cause issues when rebooting the guest if a secondary
  43      * is awaken */
  44     if (cs != first_cpu) {
  45         env->spr[SPR_LPCR] &= ~pcc->lpcr_pm;
  46     }
  47 }
  48
  49 static void spapr_cpu_destroy(PowerPCCPU *cpu)
  50 {
  51     qemu_unregister_reset(spapr_cpu_reset, cpu);
  52 }
  53
  54 static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
  55                            Error **errp)
  56 {
  57     CPUPPCState *env = &cpu->env;
  58
  59     /* Set time-base frequency to 512 MHz */
  60     cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
  61
  62     /* Enable PAPR mode in TCG or KVM */
  63     cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr));
  64
  65     qemu_register_reset(spapr_cpu_reset, cpu);
  66     spapr_cpu_reset(cpu);
  67 }
  68
  69 /*
  70  * Return the sPAPR CPU core type for @model which essentially is the CPU
  71  * model specified with -cpu cmdline option.
  72  */
  73 const char *spapr_get_cpu_core_type(const char *cpu_type)
  74 {
  75     int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
  76     char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"),
  77                                       len, cpu_type);
  78     ObjectClass *oc = object_class_by_name(core_type);
  79
  80     g_free(core_type);
  81     if (!oc) {
  82         return NULL;
  83     }
  84
  85     return object_class_get_name(oc);
  86 }
  87
  88 static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp)
  89 {
  90     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
  91     CPUCore *cc = CPU_CORE(dev);
  92     int i;
  93
  94     for (i = 0; i < cc->nr_threads; i++) {
  95         Object *obj = OBJECT(sc->threads[i]);
  96         DeviceState *dev = DEVICE(obj);
  97         CPUState *cs = CPU(dev);
  98         PowerPCCPU *cpu = POWERPC_CPU(cs);
  99
 100         spapr_cpu_destroy(cpu);
 101         object_unparent(cpu->intc);
 102         cpu_remove_sync(cs);
 103         object_unparent(obj);
 104     }
 105     g_free(sc->threads);
 106 }
 107
 108 static void spapr_cpu_core_realize_child(Object *child,
 109                                          sPAPRMachineState *spapr, Error **errp)
 110 {
 111     Error *local_err = NULL;
 112     CPUState *cs = CPU(child);
 113     PowerPCCPU *cpu = POWERPC_CPU(cs);
 114
 115     object_property_set_bool(child, true, "realized", &local_err);
 116     if (local_err) {
 117         goto error;
 118     }
 119
 120     spapr_cpu_init(spapr, cpu, &local_err);
 121     if (local_err) {
 122         goto error;
 123     }
 124
 125     cpu->intc = icp_create(child, spapr->icp_type, XICS_FABRIC(spapr),
 126                            &local_err);
 127     if (local_err) {
 128         goto error;
 129     }
 130
 131     return;
 132
 133 error:
 134     error_propagate(errp, local_err);
 135 }
 136
 137 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
 138 {
 139     /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user
 140      * tries to add a sPAPR CPU core to a non-pseries machine.
 141      */
 142     sPAPRMachineState *spapr =
 143         (sPAPRMachineState *) object_dynamic_cast(qdev_get_machine(),
 144                                                   TYPE_SPAPR_MACHINE);
 145     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 146     sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
 147     CPUCore *cc = CPU_CORE(OBJECT(dev));
 148     Error *local_err = NULL;
 149     Object *obj;
 150     int i, j;
 151
 152     if (!spapr) {
 153         error_setg(errp, TYPE_SPAPR_CPU_CORE " needs a pseries machine");
 154         return;
 155     }
 156
 157     sc->threads = g_new(PowerPCCPU *, cc->nr_threads);
 158     for (i = 0; i < cc->nr_threads; i++) {
 159         char id[32];
 160         CPUState *cs;
 161         PowerPCCPU *cpu;
 162
 163         obj = object_new(scc->cpu_type);
 164
 165         cs = CPU(obj);
 166         cpu = sc->threads[i] = POWERPC_CPU(obj);
 167         cs->cpu_index = cc->core_id + i;
 168         cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i;
 169         if (kvm_enabled() && !kvm_vcpu_id_is_valid(cpu->vcpu_id)) {
 170             error_setg(&local_err, "Can't create CPU with id %d in KVM",
 171                        cpu->vcpu_id);
 172             error_append_hint(&local_err, "Adjust the number of cpus to %d "
 173                               "or try to raise the number of threads per core\n",
 174                               cpu->vcpu_id * smp_threads / spapr->vsmt);
 175             goto err;
 176         }
 177
 178
 179         /* Set NUMA node for the threads belonged to core  */
 180         cpu->node_id = sc->node_id;
 181
 182         snprintf(id, sizeof(id), "thread[%d]", i);
 183         object_property_add_child(OBJECT(sc), id, obj, &local_err);
 184         if (local_err) {
 185             goto err;
 186         }
 187         object_unref(obj);
 188     }
 189
 190     for (j = 0; j < cc->nr_threads; j++) {
 191         obj = OBJECT(sc->threads[j]);
 192
 193         spapr_cpu_core_realize_child(obj, spapr, &local_err);
 194         if (local_err) {
 195             goto err;
 196         }
 197     }
 198     return;
 199
 200 err:
 201     while (--i >= 0) {
 202         obj = OBJECT(sc->threads[i]);
 203         object_unparent(obj);
 204     }
 205     g_free(sc->threads);
 206     error_propagate(errp, local_err);
 207 }
 208
 209 static Property spapr_cpu_core_properties[] = {
 210     DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
 211     DEFINE_PROP_END_OF_LIST()
 212 };
 213
 214 static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
 215 {
 216     DeviceClass *dc = DEVICE_CLASS(oc);
 217     sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
 218
 219     dc->realize = spapr_cpu_core_realize;
 220     dc->unrealize = spapr_cpu_core_unrealizefn;
 221     dc->props = spapr_cpu_core_properties;
 222     scc->cpu_type = data;
 223 }
 224
 225 #define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
 226     {                                                   \
 227         .parent = TYPE_SPAPR_CPU_CORE,                  \
 228         .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \
 229         .class_init = spapr_cpu_core_class_init,        \
 230         .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model),    \
 231     }
 232
 233 static const TypeInfo spapr_cpu_core_type_infos[] = {
 234     {
 235         .name = TYPE_SPAPR_CPU_CORE,
 236         .parent = TYPE_CPU_CORE,
 237         .abstract = true,
 238         .instance_size = sizeof(sPAPRCPUCore),
 239         .class_size = sizeof(sPAPRCPUCoreClass),
 240     },
 241     DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
 242     DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
 243     DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
 244     DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
 245     DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
 246     DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
 247     DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
 248     DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
 249     DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
 250     DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
 251     DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
 252 #ifdef CONFIG_KVM
 253     DEFINE_SPAPR_CPU_CORE_TYPE("host"),
 254 #endif
 255 };
 256
 257 DEFINE_TYPES(spapr_cpu_core_type_infos)