2 * QEMU OldWorld PowerMac (currently ~G3 B&W) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 /* temporary frame buffer OSI calls for the video.x driver. The right
29 solution is to modify the driver to use VGA PCI I/Os */
30 /* XXX: to be removed. This is no way related to emulation */
31 static int vga_osi_call (CPUState
*env
)
33 static int vga_vbl_enabled
;
36 // printf("osi_call R5=%d\n", env->gpr[5]);
38 /* same handler as PearPC, coming from the original MOL video
43 case 28: /* set_vmode */
44 if (env
->gpr
[6] != 1 || env
->gpr
[7] != 0)
49 case 29: /* get_vmode_info */
50 if (env
->gpr
[6] != 0) {
51 if (env
->gpr
[6] != 1 || env
->gpr
[7] != 0) {
57 env
->gpr
[4] = (1 << 16) | 1; /* num_vmodes, cur_vmode */
58 env
->gpr
[5] = (1 << 16) | 0; /* num_depths, cur_depth_mode */
59 env
->gpr
[6] = (graphic_width
<< 16) | graphic_height
; /* w, h */
60 env
->gpr
[7] = 85 << 16; /* refresh rate */
61 env
->gpr
[8] = (graphic_depth
+ 7) & ~7; /* depth (round to byte) */
62 linesize
= ((graphic_depth
+ 7) >> 3) * graphic_width
;
63 linesize
= (linesize
+ 3) & ~3;
64 env
->gpr
[9] = (linesize
<< 16) | 0; /* row_bytes, offset */
66 case 31: /* set_video power */
69 case 39: /* video_ctrl */
70 if (env
->gpr
[6] == 0 || env
->gpr
[6] == 1)
71 vga_vbl_enabled
= env
->gpr
[6];
76 case 59: /* set_color */
77 /* R6 = index, R7 = RGB */
80 case 64: /* get color */
84 case 116: /* set hwcursor */
85 /* R6 = x, R7 = y, R8 = visible, R9 = data */
88 fprintf(stderr
, "unsupported OSI call R5=" REGX
"\n", env
->gpr
[5]);
92 return 1; /* osi_call handled */
95 static void ppc_heathrow_init (int ram_size
, int vga_ram_size
,
96 const char *boot_device
, DisplayState
*ds
,
97 const char **fd_filename
, int snapshot
,
98 const char *kernel_filename
,
99 const char *kernel_cmdline
,
100 const char *initrd_filename
,
101 const char *cpu_model
)
103 CPUState
*env
= NULL
, *envs
[MAX_CPUS
];
105 qemu_irq
*pic
, **heathrow_irqs
;
109 unsigned long bios_offset
, vga_bios_offset
;
110 uint32_t kernel_base
, kernel_size
, initrd_base
, initrd_size
;
112 MacIONVRAMState
*nvr
;
113 int vga_bios_size
, bios_size
;
115 int pic_mem_index
, nvram_mem_index
, dbdma_mem_index
, cuda_mem_index
;
116 int ppc_boot_device
= boot_device
[0];
118 linux_boot
= (kernel_filename
!= NULL
);
121 if (cpu_model
== NULL
)
122 cpu_model
= "default";
123 for (i
= 0; i
< smp_cpus
; i
++) {
124 env
= cpu_init(cpu_model
);
126 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
129 /* Set time-base frequency to 100 Mhz */
130 cpu_ppc_tb_init(env
, 100UL * 1000UL * 1000UL);
131 env
->osi_call
= vga_osi_call
;
132 qemu_register_reset(&cpu_ppc_reset
, env
);
133 register_savevm("cpu", 0, 3, cpu_save
, cpu_load
, env
);
136 if (env
->nip
< 0xFFF80000) {
137 /* Special test for PowerPC 601:
138 * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
139 * But the NVRAM is located at 0xFFF04000...
141 cpu_abort(env
, "G3BW Mac hardware can not handle 1 MB BIOS\n");
145 cpu_register_physical_memory(0, ram_size
, IO_MEM_RAM
);
147 /* allocate and load BIOS */
148 bios_offset
= ram_size
+ vga_ram_size
;
149 if (bios_name
== NULL
)
150 bios_name
= BIOS_FILENAME
;
151 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, bios_name
);
152 bios_size
= load_image(buf
, phys_ram_base
+ bios_offset
);
153 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
154 cpu_abort(env
, "qemu: could not load PowerPC bios '%s'\n", buf
);
157 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
158 if (bios_size
> 0x00080000) {
159 /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
160 cpu_abort(env
, "G3BW Mac hardware can not handle 1 MB BIOS\n");
162 cpu_register_physical_memory((uint32_t)(-bios_size
),
163 bios_size
, bios_offset
| IO_MEM_ROM
);
165 /* allocate and load VGA BIOS */
166 vga_bios_offset
= bios_offset
+ bios_size
;
167 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, VGABIOS_FILENAME
);
168 vga_bios_size
= load_image(buf
, phys_ram_base
+ vga_bios_offset
+ 8);
169 if (vga_bios_size
< 0) {
170 /* if no bios is present, we can still work */
171 fprintf(stderr
, "qemu: warning: could not load VGA bios '%s'\n", buf
);
174 /* set a specific header (XXX: find real Apple format for NDRV
176 phys_ram_base
[vga_bios_offset
] = 'N';
177 phys_ram_base
[vga_bios_offset
+ 1] = 'D';
178 phys_ram_base
[vga_bios_offset
+ 2] = 'R';
179 phys_ram_base
[vga_bios_offset
+ 3] = 'V';
180 cpu_to_be32w((uint32_t *)(phys_ram_base
+ vga_bios_offset
+ 4),
184 vga_bios_size
= (vga_bios_size
+ 0xfff) & ~0xfff;
187 kernel_base
= KERNEL_LOAD_ADDR
;
188 /* now we can load the kernel */
189 kernel_size
= load_image(kernel_filename
, phys_ram_base
+ kernel_base
);
190 if (kernel_size
< 0) {
191 cpu_abort(env
, "qemu: could not load kernel '%s'\n",
196 if (initrd_filename
) {
197 initrd_base
= INITRD_LOAD_ADDR
;
198 initrd_size
= load_image(initrd_filename
,
199 phys_ram_base
+ initrd_base
);
200 if (initrd_size
< 0) {
201 cpu_abort(env
, "qemu: could not load initial ram disk '%s'\n",
209 ppc_boot_device
= 'm';
217 isa_mem_base
= 0x80000000;
219 /* Register 2 MB of ISA IO space */
220 isa_mmio_init(0xfe000000, 0x00200000);
222 /* XXX: we register only 1 output pin for heathrow PIC */
223 heathrow_irqs
= qemu_mallocz(smp_cpus
* sizeof(qemu_irq
*));
225 qemu_mallocz(smp_cpus
* sizeof(qemu_irq
) * 1);
226 /* Connect the heathrow PIC outputs to the 6xx bus */
227 for (i
= 0; i
< smp_cpus
; i
++) {
228 switch (PPC_INPUT(env
)) {
229 case PPC_FLAGS_INPUT_6xx
:
230 heathrow_irqs
[i
] = heathrow_irqs
[0] + (i
* 1);
231 heathrow_irqs
[i
][0] =
232 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
235 cpu_abort(env
, "Bus model not supported on OldWorld Mac machine\n");
240 /* init basic PC hardware */
241 if (PPC_INPUT(env
) != PPC_FLAGS_INPUT_6xx
) {
242 cpu_abort(env
, "Only 6xx bus is supported on heathrow machine\n");
245 pic
= heathrow_pic_init(&pic_mem_index
, 1, heathrow_irqs
);
246 pci_bus
= pci_grackle_init(0xfec00000, pic
);
247 pci_vga_init(pci_bus
, ds
, phys_ram_base
+ ram_size
,
248 ram_size
, vga_ram_size
,
249 vga_bios_offset
, vga_bios_size
);
251 /* XXX: suppress that */
252 dummy_irq
= i8259_init(NULL
);
254 /* XXX: use Mac Serial port */
255 serial_init(0x3f8, dummy_irq
[4], serial_hds
[0]);
257 for(i
= 0; i
< nb_nics
; i
++) {
258 if (!nd_table
[i
].model
)
259 nd_table
[i
].model
= "ne2k_pci";
260 pci_nic_init(pci_bus
, &nd_table
[i
], -1);
263 pci_cmd646_ide_init(pci_bus
, &bs_table
[0], 0);
265 /* cuda also initialize ADB */
266 cuda_init(&cuda_mem_index
, pic
[0x12]);
268 adb_kbd_init(&adb_bus
);
269 adb_mouse_init(&adb_bus
);
271 nvr
= macio_nvram_init(&nvram_mem_index
, 0x2000);
272 pmac_format_nvram_partition(nvr
, 0x2000);
274 dbdma_init(&dbdma_mem_index
);
276 macio_init(pci_bus
, 0x0017, 1, pic_mem_index
, dbdma_mem_index
,
277 cuda_mem_index
, nvr
, 0, NULL
);
280 usb_ohci_init_pci(pci_bus
, 3, -1);
283 if (graphic_depth
!= 15 && graphic_depth
!= 32 && graphic_depth
!= 8)
286 m48t59
= m48t59_init(dummy_irq
[8], 0xFFF04000, 0x0074, NVRAM_SIZE
, 59);
287 nvram
.opaque
= m48t59
;
288 nvram
.read_fn
= &m48t59_read
;
289 nvram
.write_fn
= &m48t59_write
;
290 PPC_NVRAM_set_params(&nvram
, NVRAM_SIZE
, "HEATHROW", ram_size
,
291 ppc_boot_device
, kernel_base
, kernel_size
,
293 initrd_base
, initrd_size
,
294 /* XXX: need an option to load a NVRAM image */
296 graphic_width
, graphic_height
, graphic_depth
);
297 /* No PCI init: the BIOS will do it */
299 /* Special port to get debug messages from Open-Firmware */
300 register_ioport_write(0x0F00, 4, 1, &PPC_debug_write
, NULL
);
303 QEMUMachine heathrow_machine
= {
305 "Heathrow based PowerMAC",