4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "pixel_ops.h"
30 #include "qemu-timer.h"
34 //#define DEBUG_VGA_MEM
35 //#define DEBUG_VGA_REG
37 //#define DEBUG_BOCHS_VBE
39 /* force some bits to zero */
40 const uint8_t sr_mask
[8] = {
51 const uint8_t gr_mask
[16] = {
52 (uint8_t)~0xf0, /* 0x00 */
53 (uint8_t)~0xf0, /* 0x01 */
54 (uint8_t)~0xf0, /* 0x02 */
55 (uint8_t)~0xe0, /* 0x03 */
56 (uint8_t)~0xfc, /* 0x04 */
57 (uint8_t)~0x84, /* 0x05 */
58 (uint8_t)~0xf0, /* 0x06 */
59 (uint8_t)~0xf0, /* 0x07 */
60 (uint8_t)~0x00, /* 0x08 */
61 (uint8_t)~0xff, /* 0x09 */
62 (uint8_t)~0xff, /* 0x0a */
63 (uint8_t)~0xff, /* 0x0b */
64 (uint8_t)~0xff, /* 0x0c */
65 (uint8_t)~0xff, /* 0x0d */
66 (uint8_t)~0xff, /* 0x0e */
67 (uint8_t)~0xff, /* 0x0f */
70 #define cbswap_32(__x) \
72 (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
73 (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
74 (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
75 (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))
77 #ifdef WORDS_BIGENDIAN
78 #define PAT(x) cbswap_32(x)
83 #ifdef WORDS_BIGENDIAN
89 #ifdef WORDS_BIGENDIAN
90 #define GET_PLANE(data, p) (((data) >> (24 - (p) * 8)) & 0xff)
92 #define GET_PLANE(data, p) (((data) >> ((p) * 8)) & 0xff)
95 static const uint32_t mask16
[16] = {
116 #ifdef WORDS_BIGENDIAN
119 #define PAT(x) cbswap_32(x)
122 static const uint32_t dmask16
[16] = {
141 static const uint32_t dmask4
[4] = {
148 static uint32_t expand4
[256];
149 static uint16_t expand2
[256];
150 static uint8_t expand4to8
[16];
152 static void vga_screen_dump(void *opaque
, const char *filename
);
154 static void vga_dumb_update_retrace_info(VGAState
*s
)
159 static void vga_precise_update_retrace_info(VGAState
*s
)
162 int hretr_start_char
;
163 int hretr_skew_chars
;
167 int vretr_start_line
;
170 int div2
, sldiv2
, dots
;
173 const int clk_hz
[] = {25175000, 28322000, 25175000, 25175000};
174 int64_t chars_per_sec
;
175 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
177 htotal_chars
= s
->cr
[0x00] + 5;
178 hretr_start_char
= s
->cr
[0x04];
179 hretr_skew_chars
= (s
->cr
[0x05] >> 5) & 3;
180 hretr_end_char
= s
->cr
[0x05] & 0x1f;
182 vtotal_lines
= (s
->cr
[0x06]
183 | (((s
->cr
[0x07] & 1) | ((s
->cr
[0x07] >> 4) & 2)) << 8)) + 2
185 vretr_start_line
= s
->cr
[0x10]
186 | ((((s
->cr
[0x07] >> 2) & 1) | ((s
->cr
[0x07] >> 6) & 2)) << 8)
188 vretr_end_line
= s
->cr
[0x11] & 0xf;
191 div2
= (s
->cr
[0x17] >> 2) & 1;
192 sldiv2
= (s
->cr
[0x17] >> 3) & 1;
194 clocking_mode
= (s
->sr
[0x01] >> 3) & 1;
195 clock_sel
= (s
->msr
>> 2) & 3;
196 dots
= (s
->msr
& 1) ? 8 : 9;
198 chars_per_sec
= clk_hz
[clock_sel
] / dots
;
200 htotal_chars
<<= clocking_mode
;
202 r
->total_chars
= vtotal_lines
* htotal_chars
;
204 r
->ticks_per_char
= ticks_per_sec
/ (r
->total_chars
* r
->freq
);
206 r
->ticks_per_char
= ticks_per_sec
/ chars_per_sec
;
209 r
->vstart
= vretr_start_line
;
210 r
->vend
= r
->vstart
+ vretr_end_line
+ 1;
212 r
->hstart
= hretr_start_char
+ hretr_skew_chars
;
213 r
->hend
= r
->hstart
+ hretr_end_char
+ 1;
214 r
->htotal
= htotal_chars
;
226 "div2 = %d sldiv2 = %d\n"
227 "clocking_mode = %d\n"
228 "clock_sel = %d %d\n"
230 "ticks/char = %lld\n"
232 (double) ticks_per_sec
/ (r
->ticks_per_char
* r
->total_chars
),
250 static uint8_t vga_precise_retrace(VGAState
*s
)
252 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
253 uint8_t val
= s
->st01
& ~(ST01_V_RETRACE
| ST01_DISP_ENABLE
);
255 if (r
->total_chars
) {
256 int cur_line
, cur_line_char
, cur_char
;
259 cur_tick
= qemu_get_clock(vm_clock
);
261 cur_char
= (cur_tick
/ r
->ticks_per_char
) % r
->total_chars
;
262 cur_line
= cur_char
/ r
->htotal
;
264 if (cur_line
>= r
->vstart
&& cur_line
<= r
->vend
) {
265 val
|= ST01_V_RETRACE
| ST01_DISP_ENABLE
;
267 cur_line_char
= cur_char
% r
->htotal
;
268 if (cur_line_char
>= r
->hstart
&& cur_line_char
<= r
->hend
) {
269 val
|= ST01_DISP_ENABLE
;
275 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
279 static uint8_t vga_dumb_retrace(VGAState
*s
)
281 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
284 static uint32_t vga_ioport_read(void *opaque
, uint32_t addr
)
286 VGAState
*s
= opaque
;
289 /* check port range access depending on color/monochrome mode */
290 if ((addr
>= 0x3b0 && addr
<= 0x3bf && (s
->msr
& MSR_COLOR_EMULATION
)) ||
291 (addr
>= 0x3d0 && addr
<= 0x3df && !(s
->msr
& MSR_COLOR_EMULATION
))) {
296 if (s
->ar_flip_flop
== 0) {
303 index
= s
->ar_index
& 0x1f;
316 val
= s
->sr
[s
->sr_index
];
318 printf("vga: read SR%x = 0x%02x\n", s
->sr_index
, val
);
325 val
= s
->dac_write_index
;
328 val
= s
->palette
[s
->dac_read_index
* 3 + s
->dac_sub_index
];
329 if (++s
->dac_sub_index
== 3) {
330 s
->dac_sub_index
= 0;
344 val
= s
->gr
[s
->gr_index
];
346 printf("vga: read GR%x = 0x%02x\n", s
->gr_index
, val
);
355 val
= s
->cr
[s
->cr_index
];
357 printf("vga: read CR%x = 0x%02x\n", s
->cr_index
, val
);
362 /* just toggle to fool polling */
363 val
= s
->st01
= s
->retrace(s
);
371 #if defined(DEBUG_VGA)
372 printf("VGA: read addr=0x%04x data=0x%02x\n", addr
, val
);
377 static void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
379 VGAState
*s
= opaque
;
382 /* check port range access depending on color/monochrome mode */
383 if ((addr
>= 0x3b0 && addr
<= 0x3bf && (s
->msr
& MSR_COLOR_EMULATION
)) ||
384 (addr
>= 0x3d0 && addr
<= 0x3df && !(s
->msr
& MSR_COLOR_EMULATION
)))
388 printf("VGA: write addr=0x%04x data=0x%02x\n", addr
, val
);
393 if (s
->ar_flip_flop
== 0) {
397 index
= s
->ar_index
& 0x1f;
400 s
->ar
[index
] = val
& 0x3f;
403 s
->ar
[index
] = val
& ~0x10;
409 s
->ar
[index
] = val
& ~0xc0;
412 s
->ar
[index
] = val
& ~0xf0;
415 s
->ar
[index
] = val
& ~0xf0;
421 s
->ar_flip_flop
^= 1;
424 s
->msr
= val
& ~0x10;
425 s
->update_retrace_info(s
);
428 s
->sr_index
= val
& 7;
432 printf("vga: write SR%x = 0x%02x\n", s
->sr_index
, val
);
434 s
->sr
[s
->sr_index
] = val
& sr_mask
[s
->sr_index
];
435 if (s
->sr_index
== 1) s
->update_retrace_info(s
);
438 s
->dac_read_index
= val
;
439 s
->dac_sub_index
= 0;
443 s
->dac_write_index
= val
;
444 s
->dac_sub_index
= 0;
448 s
->dac_cache
[s
->dac_sub_index
] = val
;
449 if (++s
->dac_sub_index
== 3) {
450 memcpy(&s
->palette
[s
->dac_write_index
* 3], s
->dac_cache
, 3);
451 s
->dac_sub_index
= 0;
452 s
->dac_write_index
++;
456 s
->gr_index
= val
& 0x0f;
460 printf("vga: write GR%x = 0x%02x\n", s
->gr_index
, val
);
462 s
->gr
[s
->gr_index
] = val
& gr_mask
[s
->gr_index
];
471 printf("vga: write CR%x = 0x%02x\n", s
->cr_index
, val
);
473 /* handle CR0-7 protection */
474 if ((s
->cr
[0x11] & 0x80) && s
->cr_index
<= 7) {
475 /* can always write bit 4 of CR7 */
476 if (s
->cr_index
== 7)
477 s
->cr
[7] = (s
->cr
[7] & ~0x10) | (val
& 0x10);
480 switch(s
->cr_index
) {
481 case 0x01: /* horizontal display end */
486 case 0x12: /* vertical display end */
487 s
->cr
[s
->cr_index
] = val
;
490 s
->cr
[s
->cr_index
] = val
;
494 switch(s
->cr_index
) {
502 s
->update_retrace_info(s
);
513 #ifdef CONFIG_BOCHS_VBE
514 static uint32_t vbe_ioport_read_index(void *opaque
, uint32_t addr
)
516 VGAState
*s
= opaque
;
522 static uint32_t vbe_ioport_read_data(void *opaque
, uint32_t addr
)
524 VGAState
*s
= opaque
;
527 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
528 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_GETCAPS
) {
529 switch(s
->vbe_index
) {
530 /* XXX: do not hardcode ? */
531 case VBE_DISPI_INDEX_XRES
:
532 val
= VBE_DISPI_MAX_XRES
;
534 case VBE_DISPI_INDEX_YRES
:
535 val
= VBE_DISPI_MAX_YRES
;
537 case VBE_DISPI_INDEX_BPP
:
538 val
= VBE_DISPI_MAX_BPP
;
541 val
= s
->vbe_regs
[s
->vbe_index
];
545 val
= s
->vbe_regs
[s
->vbe_index
];
550 #ifdef DEBUG_BOCHS_VBE
551 printf("VBE: read index=0x%x val=0x%x\n", s
->vbe_index
, val
);
556 static void vbe_ioport_write_index(void *opaque
, uint32_t addr
, uint32_t val
)
558 VGAState
*s
= opaque
;
562 static void vbe_ioport_write_data(void *opaque
, uint32_t addr
, uint32_t val
)
564 VGAState
*s
= opaque
;
566 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
567 #ifdef DEBUG_BOCHS_VBE
568 printf("VBE: write index=0x%x val=0x%x\n", s
->vbe_index
, val
);
570 switch(s
->vbe_index
) {
571 case VBE_DISPI_INDEX_ID
:
572 if (val
== VBE_DISPI_ID0
||
573 val
== VBE_DISPI_ID1
||
574 val
== VBE_DISPI_ID2
||
575 val
== VBE_DISPI_ID3
||
576 val
== VBE_DISPI_ID4
) {
577 s
->vbe_regs
[s
->vbe_index
] = val
;
580 case VBE_DISPI_INDEX_XRES
:
581 if ((val
<= VBE_DISPI_MAX_XRES
) && ((val
& 7) == 0)) {
582 s
->vbe_regs
[s
->vbe_index
] = val
;
585 case VBE_DISPI_INDEX_YRES
:
586 if (val
<= VBE_DISPI_MAX_YRES
) {
587 s
->vbe_regs
[s
->vbe_index
] = val
;
590 case VBE_DISPI_INDEX_BPP
:
593 if (val
== 4 || val
== 8 || val
== 15 ||
594 val
== 16 || val
== 24 || val
== 32) {
595 s
->vbe_regs
[s
->vbe_index
] = val
;
598 case VBE_DISPI_INDEX_BANK
:
599 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
600 val
&= (s
->vbe_bank_mask
>> 2);
602 val
&= s
->vbe_bank_mask
;
604 s
->vbe_regs
[s
->vbe_index
] = val
;
605 s
->bank_offset
= (val
<< 16);
607 case VBE_DISPI_INDEX_ENABLE
:
608 if ((val
& VBE_DISPI_ENABLED
) &&
609 !(s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
)) {
610 int h
, shift_control
;
612 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] =
613 s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
614 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] =
615 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
616 s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
] = 0;
617 s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
] = 0;
619 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
620 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 1;
622 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] *
623 ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
624 s
->vbe_start_addr
= 0;
626 /* clear the screen (should be done in BIOS) */
627 if (!(val
& VBE_DISPI_NOCLEARMEM
)) {
628 memset(s
->vram_ptr
, 0,
629 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vbe_line_offset
);
632 /* we initialize the VGA graphic mode (should be done
634 s
->gr
[0x06] = (s
->gr
[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
635 s
->cr
[0x17] |= 3; /* no CGA modes */
636 s
->cr
[0x13] = s
->vbe_line_offset
>> 3;
638 s
->cr
[0x01] = (s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 3) - 1;
639 /* height (only meaningful if < 1024) */
640 h
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] - 1;
642 s
->cr
[0x07] = (s
->cr
[0x07] & ~0x42) |
643 ((h
>> 7) & 0x02) | ((h
>> 3) & 0x40);
644 /* line compare to 1023 */
649 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
651 s
->sr
[0x01] &= ~8; /* no double line */
654 s
->sr
[4] |= 0x08; /* set chain 4 mode */
655 s
->sr
[2] |= 0x0f; /* activate all planes */
657 s
->gr
[0x05] = (s
->gr
[0x05] & ~0x60) | (shift_control
<< 5);
658 s
->cr
[0x09] &= ~0x9f; /* no double scan */
660 /* XXX: the bios should do that */
663 s
->dac_8bit
= (val
& VBE_DISPI_8BIT_DAC
) > 0;
664 s
->vbe_regs
[s
->vbe_index
] = val
;
666 case VBE_DISPI_INDEX_VIRT_WIDTH
:
668 int w
, h
, line_offset
;
670 if (val
< s
->vbe_regs
[VBE_DISPI_INDEX_XRES
])
673 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
674 line_offset
= w
>> 1;
676 line_offset
= w
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
677 h
= s
->vram_size
/ line_offset
;
678 /* XXX: support weird bochs semantics ? */
679 if (h
< s
->vbe_regs
[VBE_DISPI_INDEX_YRES
])
681 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] = w
;
682 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] = h
;
683 s
->vbe_line_offset
= line_offset
;
686 case VBE_DISPI_INDEX_X_OFFSET
:
687 case VBE_DISPI_INDEX_Y_OFFSET
:
690 s
->vbe_regs
[s
->vbe_index
] = val
;
691 s
->vbe_start_addr
= s
->vbe_line_offset
* s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
];
692 x
= s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
];
693 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
694 s
->vbe_start_addr
+= x
>> 1;
696 s
->vbe_start_addr
+= x
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
697 s
->vbe_start_addr
>>= 2;
707 /* called for accesses between 0xa0000 and 0xc0000 */
708 uint32_t vga_mem_readb(void *opaque
, target_phys_addr_t addr
)
710 VGAState
*s
= opaque
;
711 int memory_map_mode
, plane
;
714 /* convert to VGA memory offset */
715 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
717 switch(memory_map_mode
) {
723 addr
+= s
->bank_offset
;
738 if (s
->sr
[4] & 0x08) {
739 /* chain 4 mode : simplest access */
740 ret
= s
->vram_ptr
[addr
];
741 } else if (s
->gr
[5] & 0x10) {
742 /* odd/even mode (aka text mode mapping) */
743 plane
= (s
->gr
[4] & 2) | (addr
& 1);
744 ret
= s
->vram_ptr
[((addr
& ~1) << 1) | plane
];
746 /* standard VGA latched access */
747 s
->latch
= ((uint32_t *)s
->vram_ptr
)[addr
];
749 if (!(s
->gr
[5] & 0x08)) {
752 ret
= GET_PLANE(s
->latch
, plane
);
755 ret
= (s
->latch
^ mask16
[s
->gr
[2]]) & mask16
[s
->gr
[7]];
764 static uint32_t vga_mem_readw(void *opaque
, target_phys_addr_t addr
)
767 #ifdef TARGET_WORDS_BIGENDIAN
768 v
= vga_mem_readb(opaque
, addr
) << 8;
769 v
|= vga_mem_readb(opaque
, addr
+ 1);
771 v
= vga_mem_readb(opaque
, addr
);
772 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
777 static uint32_t vga_mem_readl(void *opaque
, target_phys_addr_t addr
)
780 #ifdef TARGET_WORDS_BIGENDIAN
781 v
= vga_mem_readb(opaque
, addr
) << 24;
782 v
|= vga_mem_readb(opaque
, addr
+ 1) << 16;
783 v
|= vga_mem_readb(opaque
, addr
+ 2) << 8;
784 v
|= vga_mem_readb(opaque
, addr
+ 3);
786 v
= vga_mem_readb(opaque
, addr
);
787 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
788 v
|= vga_mem_readb(opaque
, addr
+ 2) << 16;
789 v
|= vga_mem_readb(opaque
, addr
+ 3) << 24;
794 /* called for accesses between 0xa0000 and 0xc0000 */
795 void vga_mem_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
797 VGAState
*s
= opaque
;
798 int memory_map_mode
, plane
, write_mode
, b
, func_select
, mask
;
799 uint32_t write_mask
, bit_mask
, set_mask
;
802 printf("vga: [0x%x] = 0x%02x\n", addr
, val
);
804 /* convert to VGA memory offset */
805 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
807 switch(memory_map_mode
) {
813 addr
+= s
->bank_offset
;
828 if (s
->sr
[4] & 0x08) {
829 /* chain 4 mode : simplest access */
832 if (s
->sr
[2] & mask
) {
833 s
->vram_ptr
[addr
] = val
;
835 printf("vga: chain4: [0x%x]\n", addr
);
837 s
->plane_updated
|= mask
; /* only used to detect font change */
838 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
840 } else if (s
->gr
[5] & 0x10) {
841 /* odd/even mode (aka text mode mapping) */
842 plane
= (s
->gr
[4] & 2) | (addr
& 1);
844 if (s
->sr
[2] & mask
) {
845 addr
= ((addr
& ~1) << 1) | plane
;
846 s
->vram_ptr
[addr
] = val
;
848 printf("vga: odd/even: [0x%x]\n", addr
);
850 s
->plane_updated
|= mask
; /* only used to detect font change */
851 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
854 /* standard VGA latched access */
855 write_mode
= s
->gr
[5] & 3;
861 val
= ((val
>> b
) | (val
<< (8 - b
))) & 0xff;
865 /* apply set/reset mask */
866 set_mask
= mask16
[s
->gr
[1]];
867 val
= (val
& ~set_mask
) | (mask16
[s
->gr
[0]] & set_mask
);
874 val
= mask16
[val
& 0x0f];
880 val
= (val
>> b
) | (val
<< (8 - b
));
882 bit_mask
= s
->gr
[8] & val
;
883 val
= mask16
[s
->gr
[0]];
887 /* apply logical operation */
888 func_select
= s
->gr
[3] >> 3;
889 switch(func_select
) {
909 bit_mask
|= bit_mask
<< 8;
910 bit_mask
|= bit_mask
<< 16;
911 val
= (val
& bit_mask
) | (s
->latch
& ~bit_mask
);
914 /* mask data according to sr[2] */
916 s
->plane_updated
|= mask
; /* only used to detect font change */
917 write_mask
= mask16
[mask
];
918 ((uint32_t *)s
->vram_ptr
)[addr
] =
919 (((uint32_t *)s
->vram_ptr
)[addr
] & ~write_mask
) |
922 printf("vga: latch: [0x%x] mask=0x%08x val=0x%08x\n",
923 addr
* 4, write_mask
, val
);
925 cpu_physical_memory_set_dirty(s
->vram_offset
+ (addr
<< 2));
929 static void vga_mem_writew(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
931 #ifdef TARGET_WORDS_BIGENDIAN
932 vga_mem_writeb(opaque
, addr
, (val
>> 8) & 0xff);
933 vga_mem_writeb(opaque
, addr
+ 1, val
& 0xff);
935 vga_mem_writeb(opaque
, addr
, val
& 0xff);
936 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
940 static void vga_mem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
942 #ifdef TARGET_WORDS_BIGENDIAN
943 vga_mem_writeb(opaque
, addr
, (val
>> 24) & 0xff);
944 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 16) & 0xff);
945 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 8) & 0xff);
946 vga_mem_writeb(opaque
, addr
+ 3, val
& 0xff);
948 vga_mem_writeb(opaque
, addr
, val
& 0xff);
949 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
950 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 16) & 0xff);
951 vga_mem_writeb(opaque
, addr
+ 3, (val
>> 24) & 0xff);
955 typedef void vga_draw_glyph8_func(uint8_t *d
, int linesize
,
956 const uint8_t *font_ptr
, int h
,
957 uint32_t fgcol
, uint32_t bgcol
);
958 typedef void vga_draw_glyph9_func(uint8_t *d
, int linesize
,
959 const uint8_t *font_ptr
, int h
,
960 uint32_t fgcol
, uint32_t bgcol
, int dup9
);
961 typedef void vga_draw_line_func(VGAState
*s1
, uint8_t *d
,
962 const uint8_t *s
, int width
);
965 #include "vga_template.h"
968 #include "vga_template.h"
972 #include "vga_template.h"
975 #include "vga_template.h"
979 #include "vga_template.h"
982 #include "vga_template.h"
986 #include "vga_template.h"
988 static unsigned int rgb_to_pixel8_dup(unsigned int r
, unsigned int g
, unsigned b
)
991 col
= rgb_to_pixel8(r
, g
, b
);
997 static unsigned int rgb_to_pixel15_dup(unsigned int r
, unsigned int g
, unsigned b
)
1000 col
= rgb_to_pixel15(r
, g
, b
);
1005 static unsigned int rgb_to_pixel15bgr_dup(unsigned int r
, unsigned int g
,
1009 col
= rgb_to_pixel15bgr(r
, g
, b
);
1014 static unsigned int rgb_to_pixel16_dup(unsigned int r
, unsigned int g
, unsigned b
)
1017 col
= rgb_to_pixel16(r
, g
, b
);
1022 static unsigned int rgb_to_pixel16bgr_dup(unsigned int r
, unsigned int g
,
1026 col
= rgb_to_pixel16bgr(r
, g
, b
);
1031 static unsigned int rgb_to_pixel32_dup(unsigned int r
, unsigned int g
, unsigned b
)
1034 col
= rgb_to_pixel32(r
, g
, b
);
1038 static unsigned int rgb_to_pixel32bgr_dup(unsigned int r
, unsigned int g
, unsigned b
)
1041 col
= rgb_to_pixel32bgr(r
, g
, b
);
1045 /* return true if the palette was modified */
1046 static int update_palette16(VGAState
*s
)
1049 uint32_t v
, col
, *palette
;
1052 palette
= s
->last_palette
;
1053 for(i
= 0; i
< 16; i
++) {
1055 if (s
->ar
[0x10] & 0x80)
1056 v
= ((s
->ar
[0x14] & 0xf) << 4) | (v
& 0xf);
1058 v
= ((s
->ar
[0x14] & 0xc) << 4) | (v
& 0x3f);
1060 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1061 c6_to_8(s
->palette
[v
+ 1]),
1062 c6_to_8(s
->palette
[v
+ 2]));
1063 if (col
!= palette
[i
]) {
1071 /* return true if the palette was modified */
1072 static int update_palette256(VGAState
*s
)
1075 uint32_t v
, col
, *palette
;
1078 palette
= s
->last_palette
;
1080 for(i
= 0; i
< 256; i
++) {
1082 col
= s
->rgb_to_pixel(s
->palette
[v
],
1086 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1087 c6_to_8(s
->palette
[v
+ 1]),
1088 c6_to_8(s
->palette
[v
+ 2]));
1090 if (col
!= palette
[i
]) {
1099 static void vga_get_offsets(VGAState
*s
,
1100 uint32_t *pline_offset
,
1101 uint32_t *pstart_addr
,
1102 uint32_t *pline_compare
)
1104 uint32_t start_addr
, line_offset
, line_compare
;
1105 #ifdef CONFIG_BOCHS_VBE
1106 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1107 line_offset
= s
->vbe_line_offset
;
1108 start_addr
= s
->vbe_start_addr
;
1109 line_compare
= 65535;
1113 /* compute line_offset in bytes */
1114 line_offset
= s
->cr
[0x13];
1117 /* starting address */
1118 start_addr
= s
->cr
[0x0d] | (s
->cr
[0x0c] << 8);
1121 line_compare
= s
->cr
[0x18] |
1122 ((s
->cr
[0x07] & 0x10) << 4) |
1123 ((s
->cr
[0x09] & 0x40) << 3);
1125 *pline_offset
= line_offset
;
1126 *pstart_addr
= start_addr
;
1127 *pline_compare
= line_compare
;
1130 /* update start_addr and line_offset. Return TRUE if modified */
1131 static int update_basic_params(VGAState
*s
)
1134 uint32_t start_addr
, line_offset
, line_compare
;
1138 s
->get_offsets(s
, &line_offset
, &start_addr
, &line_compare
);
1140 if (line_offset
!= s
->line_offset
||
1141 start_addr
!= s
->start_addr
||
1142 line_compare
!= s
->line_compare
) {
1143 s
->line_offset
= line_offset
;
1144 s
->start_addr
= start_addr
;
1145 s
->line_compare
= line_compare
;
1153 static inline int get_depth_index(DisplayState
*s
)
1155 switch(ds_get_bits_per_pixel(s
)) {
1168 static vga_draw_glyph8_func
*vga_draw_glyph8_table
[NB_DEPTHS
] = {
1178 static vga_draw_glyph8_func
*vga_draw_glyph16_table
[NB_DEPTHS
] = {
1180 vga_draw_glyph16_16
,
1181 vga_draw_glyph16_16
,
1182 vga_draw_glyph16_32
,
1183 vga_draw_glyph16_32
,
1184 vga_draw_glyph16_16
,
1185 vga_draw_glyph16_16
,
1188 static vga_draw_glyph9_func
*vga_draw_glyph9_table
[NB_DEPTHS
] = {
1198 static const uint8_t cursor_glyph
[32 * 4] = {
1199 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1200 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1201 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1202 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1203 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1204 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1205 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1206 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1207 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1208 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1209 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1210 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1211 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1212 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1213 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1217 static void vga_get_text_resolution(VGAState
*s
, int *pwidth
, int *pheight
,
1218 int *pcwidth
, int *pcheight
)
1220 int width
, cwidth
, height
, cheight
;
1222 /* total width & height */
1223 cheight
= (s
->cr
[9] & 0x1f) + 1;
1225 if (!(s
->sr
[1] & 0x01))
1227 if (s
->sr
[1] & 0x08)
1228 cwidth
= 16; /* NOTE: no 18 pixel wide */
1229 width
= (s
->cr
[0x01] + 1);
1230 if (s
->cr
[0x06] == 100) {
1231 /* ugly hack for CGA 160x100x16 - explain me the logic */
1234 height
= s
->cr
[0x12] |
1235 ((s
->cr
[0x07] & 0x02) << 7) |
1236 ((s
->cr
[0x07] & 0x40) << 3);
1237 height
= (height
+ 1) / cheight
;
1243 *pcheight
= cheight
;
1246 typedef unsigned int rgb_to_pixel_dup_func(unsigned int r
, unsigned int g
, unsigned b
);
1248 static rgb_to_pixel_dup_func
*rgb_to_pixel_dup_table
[NB_DEPTHS
];
1258 static void vga_draw_text(VGAState
*s
, int full_update
)
1260 int cx
, cy
, cheight
, cw
, ch
, cattr
, height
, width
, ch_attr
;
1261 int cx_min
, cx_max
, linesize
, x_incr
;
1262 uint32_t offset
, fgcol
, bgcol
, v
, cursor_offset
;
1263 uint8_t *d1
, *d
, *src
, *s1
, *dest
, *cursor_ptr
;
1264 const uint8_t *font_ptr
, *font_base
[2];
1265 int dup9
, line_offset
, depth_index
;
1267 uint32_t *ch_attr_ptr
;
1268 vga_draw_glyph8_func
*vga_draw_glyph8
;
1269 vga_draw_glyph9_func
*vga_draw_glyph9
;
1271 vga_dirty_log_stop(s
);
1273 /* compute font data address (in plane 2) */
1275 offset
= (((v
>> 4) & 1) | ((v
<< 1) & 6)) * 8192 * 4 + 2;
1276 if (offset
!= s
->font_offsets
[0]) {
1277 s
->font_offsets
[0] = offset
;
1280 font_base
[0] = s
->vram_ptr
+ offset
;
1282 offset
= (((v
>> 5) & 1) | ((v
>> 1) & 6)) * 8192 * 4 + 2;
1283 font_base
[1] = s
->vram_ptr
+ offset
;
1284 if (offset
!= s
->font_offsets
[1]) {
1285 s
->font_offsets
[1] = offset
;
1288 if (s
->plane_updated
& (1 << 2)) {
1289 /* if the plane 2 was modified since the last display, it
1290 indicates the font may have been modified */
1291 s
->plane_updated
= 0;
1294 full_update
|= update_basic_params(s
);
1296 line_offset
= s
->line_offset
;
1297 s1
= s
->vram_ptr
+ (s
->start_addr
* 4);
1299 vga_get_text_resolution(s
, &width
, &height
, &cw
, &cheight
);
1300 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1301 if ((height
* width
) > CH_ATTR_SIZE
) {
1302 /* better than nothing: exit if transient size is too big */
1306 if (width
!= s
->last_width
|| height
!= s
->last_height
||
1307 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
|| s
->last_depth
) {
1308 s
->last_scr_width
= width
* cw
;
1309 s
->last_scr_height
= height
* cheight
;
1310 qemu_console_resize(s
->ds
, s
->last_scr_width
, s
->last_scr_height
);
1312 s
->last_width
= width
;
1313 s
->last_height
= height
;
1314 s
->last_ch
= cheight
;
1319 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1320 full_update
|= update_palette16(s
);
1321 palette
= s
->last_palette
;
1322 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1324 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
1325 if (cursor_offset
!= s
->cursor_offset
||
1326 s
->cr
[0xa] != s
->cursor_start
||
1327 s
->cr
[0xb] != s
->cursor_end
) {
1328 /* if the cursor position changed, we update the old and new
1330 if (s
->cursor_offset
< CH_ATTR_SIZE
)
1331 s
->last_ch_attr
[s
->cursor_offset
] = -1;
1332 if (cursor_offset
< CH_ATTR_SIZE
)
1333 s
->last_ch_attr
[cursor_offset
] = -1;
1334 s
->cursor_offset
= cursor_offset
;
1335 s
->cursor_start
= s
->cr
[0xa];
1336 s
->cursor_end
= s
->cr
[0xb];
1338 cursor_ptr
= s
->vram_ptr
+ (s
->start_addr
+ cursor_offset
) * 4;
1340 depth_index
= get_depth_index(s
->ds
);
1342 vga_draw_glyph8
= vga_draw_glyph16_table
[depth_index
];
1344 vga_draw_glyph8
= vga_draw_glyph8_table
[depth_index
];
1345 vga_draw_glyph9
= vga_draw_glyph9_table
[depth_index
];
1347 dest
= ds_get_data(s
->ds
);
1348 linesize
= ds_get_linesize(s
->ds
);
1349 ch_attr_ptr
= s
->last_ch_attr
;
1350 for(cy
= 0; cy
< height
; cy
++) {
1355 for(cx
= 0; cx
< width
; cx
++) {
1356 ch_attr
= *(uint16_t *)src
;
1357 if (full_update
|| ch_attr
!= *ch_attr_ptr
) {
1362 *ch_attr_ptr
= ch_attr
;
1363 #ifdef WORDS_BIGENDIAN
1365 cattr
= ch_attr
& 0xff;
1367 ch
= ch_attr
& 0xff;
1368 cattr
= ch_attr
>> 8;
1370 font_ptr
= font_base
[(cattr
>> 3) & 1];
1371 font_ptr
+= 32 * 4 * ch
;
1372 bgcol
= palette
[cattr
>> 4];
1373 fgcol
= palette
[cattr
& 0x0f];
1375 vga_draw_glyph8(d1
, linesize
,
1376 font_ptr
, cheight
, fgcol
, bgcol
);
1379 if (ch
>= 0xb0 && ch
<= 0xdf && (s
->ar
[0x10] & 0x04))
1381 vga_draw_glyph9(d1
, linesize
,
1382 font_ptr
, cheight
, fgcol
, bgcol
, dup9
);
1384 if (src
== cursor_ptr
&&
1385 !(s
->cr
[0x0a] & 0x20)) {
1386 int line_start
, line_last
, h
;
1387 /* draw the cursor */
1388 line_start
= s
->cr
[0x0a] & 0x1f;
1389 line_last
= s
->cr
[0x0b] & 0x1f;
1390 /* XXX: check that */
1391 if (line_last
> cheight
- 1)
1392 line_last
= cheight
- 1;
1393 if (line_last
>= line_start
&& line_start
< cheight
) {
1394 h
= line_last
- line_start
+ 1;
1395 d
= d1
+ linesize
* line_start
;
1397 vga_draw_glyph8(d
, linesize
,
1398 cursor_glyph
, h
, fgcol
, bgcol
);
1400 vga_draw_glyph9(d
, linesize
,
1401 cursor_glyph
, h
, fgcol
, bgcol
, 1);
1411 dpy_update(s
->ds
, cx_min
* cw
, cy
* cheight
,
1412 (cx_max
- cx_min
+ 1) * cw
, cheight
);
1414 dest
+= linesize
* cheight
;
1433 static vga_draw_line_func
*vga_draw_line_table
[NB_DEPTHS
* VGA_DRAW_LINE_NB
] = {
1443 vga_draw_line2d2_16
,
1444 vga_draw_line2d2_16
,
1445 vga_draw_line2d2_32
,
1446 vga_draw_line2d2_32
,
1447 vga_draw_line2d2_16
,
1448 vga_draw_line2d2_16
,
1459 vga_draw_line4d2_16
,
1460 vga_draw_line4d2_16
,
1461 vga_draw_line4d2_32
,
1462 vga_draw_line4d2_32
,
1463 vga_draw_line4d2_16
,
1464 vga_draw_line4d2_16
,
1467 vga_draw_line8d2_16
,
1468 vga_draw_line8d2_16
,
1469 vga_draw_line8d2_32
,
1470 vga_draw_line8d2_32
,
1471 vga_draw_line8d2_16
,
1472 vga_draw_line8d2_16
,
1486 vga_draw_line15_32bgr
,
1487 vga_draw_line15_15bgr
,
1488 vga_draw_line15_16bgr
,
1494 vga_draw_line16_32bgr
,
1495 vga_draw_line16_15bgr
,
1496 vga_draw_line16_16bgr
,
1502 vga_draw_line24_32bgr
,
1503 vga_draw_line24_15bgr
,
1504 vga_draw_line24_16bgr
,
1510 vga_draw_line32_32bgr
,
1511 vga_draw_line32_15bgr
,
1512 vga_draw_line32_16bgr
,
1515 static rgb_to_pixel_dup_func
*rgb_to_pixel_dup_table
[NB_DEPTHS
] = {
1520 rgb_to_pixel32bgr_dup
,
1521 rgb_to_pixel15bgr_dup
,
1522 rgb_to_pixel16bgr_dup
,
1525 static int vga_get_bpp(VGAState
*s
)
1528 #ifdef CONFIG_BOCHS_VBE
1529 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1530 ret
= s
->vbe_regs
[VBE_DISPI_INDEX_BPP
];
1539 static void vga_get_resolution(VGAState
*s
, int *pwidth
, int *pheight
)
1543 #ifdef CONFIG_BOCHS_VBE
1544 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1545 width
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
1546 height
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
1550 width
= (s
->cr
[0x01] + 1) * 8;
1551 height
= s
->cr
[0x12] |
1552 ((s
->cr
[0x07] & 0x02) << 7) |
1553 ((s
->cr
[0x07] & 0x40) << 3);
1554 height
= (height
+ 1);
1560 void vga_invalidate_scanlines(VGAState
*s
, int y1
, int y2
)
1563 if (y1
>= VGA_MAX_HEIGHT
)
1565 if (y2
>= VGA_MAX_HEIGHT
)
1566 y2
= VGA_MAX_HEIGHT
;
1567 for(y
= y1
; y
< y2
; y
++) {
1568 s
->invalidated_y_table
[y
>> 5] |= 1 << (y
& 0x1f);
1572 static void vga_sync_dirty_bitmap(VGAState
*s
)
1575 cpu_physical_sync_dirty_bitmap(s
->map_addr
, s
->map_end
);
1577 if (s
->lfb_vram_mapped
) {
1578 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa0000, 0xa8000);
1579 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa8000, 0xb0000);
1581 vga_dirty_log_start(s
);
1587 static void vga_draw_graphic(VGAState
*s
, int full_update
)
1589 int y1
, y
, update
, page_min
, page_max
, linesize
, y_start
, double_scan
, mask
, depth
;
1590 int width
, height
, shift_control
, line_offset
, page0
, page1
, bwidth
, bits
;
1591 int disp_width
, multi_scan
, multi_run
;
1593 uint32_t v
, addr1
, addr
;
1594 vga_draw_line_func
*vga_draw_line
;
1596 full_update
|= update_basic_params(s
);
1599 vga_sync_dirty_bitmap(s
);
1601 s
->get_resolution(s
, &width
, &height
);
1604 shift_control
= (s
->gr
[0x05] >> 5) & 3;
1605 double_scan
= (s
->cr
[0x09] >> 7);
1606 if (shift_control
!= 1) {
1607 multi_scan
= (((s
->cr
[0x09] & 0x1f) + 1) << double_scan
) - 1;
1609 /* in CGA modes, multi_scan is ignored */
1610 /* XXX: is it correct ? */
1611 multi_scan
= double_scan
;
1613 multi_run
= multi_scan
;
1614 if (shift_control
!= s
->shift_control
||
1615 double_scan
!= s
->double_scan
) {
1617 s
->shift_control
= shift_control
;
1618 s
->double_scan
= double_scan
;
1621 depth
= s
->get_bpp(s
);
1622 if (s
->line_offset
!= s
->last_line_offset
||
1623 disp_width
!= s
->last_width
||
1624 height
!= s
->last_height
||
1625 s
->last_depth
!= depth
) {
1626 #if defined(WORDS_BIGENDIAN) == defined(TARGET_WORDS_BIGENDIAN)
1627 if (depth
== 16 || depth
== 32) {
1631 if (is_graphic_console()) {
1632 qemu_free_displaysurface(s
->ds
->surface
);
1633 s
->ds
->surface
= qemu_create_displaysurface_from(disp_width
, height
, depth
,
1635 s
->vram_ptr
+ (s
->start_addr
* 4));
1636 #if defined(WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
1637 s
->ds
->surface
->pf
= qemu_different_endianness_pixelformat(depth
);
1641 qemu_console_resize(s
->ds
, disp_width
, height
);
1644 qemu_console_resize(s
->ds
, disp_width
, height
);
1646 s
->last_scr_width
= disp_width
;
1647 s
->last_scr_height
= height
;
1648 s
->last_width
= disp_width
;
1649 s
->last_height
= height
;
1650 s
->last_line_offset
= s
->line_offset
;
1651 s
->last_depth
= depth
;
1653 } else if (is_graphic_console() && is_buffer_shared(s
->ds
->surface
) &&
1654 (full_update
|| s
->ds
->surface
->data
!= s
->vram_ptr
+ (s
->start_addr
* 4))) {
1655 s
->ds
->surface
->data
= s
->vram_ptr
+ (s
->start_addr
* 4);
1660 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1662 if (shift_control
== 0) {
1663 full_update
|= update_palette16(s
);
1664 if (s
->sr
[0x01] & 8) {
1665 v
= VGA_DRAW_LINE4D2
;
1671 } else if (shift_control
== 1) {
1672 full_update
|= update_palette16(s
);
1673 if (s
->sr
[0x01] & 8) {
1674 v
= VGA_DRAW_LINE2D2
;
1681 switch(s
->get_bpp(s
)) {
1684 full_update
|= update_palette256(s
);
1685 v
= VGA_DRAW_LINE8D2
;
1689 full_update
|= update_palette256(s
);
1694 v
= VGA_DRAW_LINE15
;
1698 v
= VGA_DRAW_LINE16
;
1702 v
= VGA_DRAW_LINE24
;
1706 v
= VGA_DRAW_LINE32
;
1711 vga_draw_line
= vga_draw_line_table
[v
* NB_DEPTHS
+ get_depth_index(s
->ds
)];
1713 if (!is_buffer_shared(s
->ds
->surface
) && s
->cursor_invalidate
)
1714 s
->cursor_invalidate(s
);
1716 line_offset
= s
->line_offset
;
1718 printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
1719 width
, height
, v
, line_offset
, s
->cr
[9], s
->cr
[0x17], s
->line_compare
, s
->sr
[0x01]);
1721 addr1
= (s
->start_addr
* 4);
1722 bwidth
= (width
* bits
+ 7) / 8;
1724 page_min
= 0x7fffffff;
1726 d
= ds_get_data(s
->ds
);
1727 linesize
= ds_get_linesize(s
->ds
);
1729 for(y
= 0; y
< height
; y
++) {
1731 if (!(s
->cr
[0x17] & 1)) {
1733 /* CGA compatibility handling */
1734 shift
= 14 + ((s
->cr
[0x17] >> 6) & 1);
1735 addr
= (addr
& ~(1 << shift
)) | ((y1
& 1) << shift
);
1737 if (!(s
->cr
[0x17] & 2)) {
1738 addr
= (addr
& ~0x8000) | ((y1
& 2) << 14);
1740 page0
= s
->vram_offset
+ (addr
& TARGET_PAGE_MASK
);
1741 page1
= s
->vram_offset
+ ((addr
+ bwidth
- 1) & TARGET_PAGE_MASK
);
1742 update
= full_update
|
1743 cpu_physical_memory_get_dirty(page0
, VGA_DIRTY_FLAG
) |
1744 cpu_physical_memory_get_dirty(page1
, VGA_DIRTY_FLAG
);
1745 if ((page1
- page0
) > TARGET_PAGE_SIZE
) {
1746 /* if wide line, can use another page */
1747 update
|= cpu_physical_memory_get_dirty(page0
+ TARGET_PAGE_SIZE
,
1750 /* explicit invalidation for the hardware cursor */
1751 update
|= (s
->invalidated_y_table
[y
>> 5] >> (y
& 0x1f)) & 1;
1755 if (page0
< page_min
)
1757 if (page1
> page_max
)
1759 if (!(is_buffer_shared(s
->ds
->surface
))) {
1760 vga_draw_line(s
, d
, s
->vram_ptr
+ addr
, width
);
1761 if (s
->cursor_draw_line
)
1762 s
->cursor_draw_line(s
, d
, y
);
1766 /* flush to display */
1767 dpy_update(s
->ds
, 0, y_start
,
1768 disp_width
, y
- y_start
);
1773 mask
= (s
->cr
[0x17] & 3) ^ 3;
1774 if ((y1
& mask
) == mask
)
1775 addr1
+= line_offset
;
1777 multi_run
= multi_scan
;
1781 /* line compare acts on the displayed lines */
1782 if (y
== s
->line_compare
)
1787 /* flush to display */
1788 dpy_update(s
->ds
, 0, y_start
,
1789 disp_width
, y
- y_start
);
1791 /* reset modified pages */
1792 if (page_max
!= -1) {
1793 cpu_physical_memory_reset_dirty(page_min
, page_max
+ TARGET_PAGE_SIZE
,
1796 memset(s
->invalidated_y_table
, 0, ((height
+ 31) >> 5) * 4);
1799 static void vga_draw_blank(VGAState
*s
, int full_update
)
1806 if (s
->last_scr_width
<= 0 || s
->last_scr_height
<= 0)
1808 vga_dirty_log_stop(s
);
1811 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1812 if (ds_get_bits_per_pixel(s
->ds
) == 8)
1813 val
= s
->rgb_to_pixel(0, 0, 0);
1816 w
= s
->last_scr_width
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1817 d
= ds_get_data(s
->ds
);
1818 for(i
= 0; i
< s
->last_scr_height
; i
++) {
1820 d
+= ds_get_linesize(s
->ds
);
1822 dpy_update(s
->ds
, 0, 0,
1823 s
->last_scr_width
, s
->last_scr_height
);
1826 #define GMODE_TEXT 0
1827 #define GMODE_GRAPH 1
1828 #define GMODE_BLANK 2
1830 static void vga_update_display(void *opaque
)
1832 VGAState
*s
= (VGAState
*)opaque
;
1833 int full_update
, graphic_mode
;
1835 if (ds_get_bits_per_pixel(s
->ds
) == 0) {
1839 if (!(s
->ar_index
& 0x20)) {
1840 graphic_mode
= GMODE_BLANK
;
1842 graphic_mode
= s
->gr
[6] & 1;
1844 if (graphic_mode
!= s
->graphic_mode
) {
1845 s
->graphic_mode
= graphic_mode
;
1848 switch(graphic_mode
) {
1850 vga_draw_text(s
, full_update
);
1853 vga_draw_graphic(s
, full_update
);
1857 vga_draw_blank(s
, full_update
);
1863 /* force a full display refresh */
1864 static void vga_invalidate_display(void *opaque
)
1866 VGAState
*s
= (VGAState
*)opaque
;
1869 s
->last_height
= -1;
1872 void vga_reset(void *opaque
)
1874 VGAState
*s
= (VGAState
*) opaque
;
1880 s
->lfb_vram_mapped
= 0;
1884 memset(s
->sr
, '\0', sizeof(s
->sr
));
1886 memset(s
->gr
, '\0', sizeof(s
->gr
));
1888 memset(s
->ar
, '\0', sizeof(s
->ar
));
1889 s
->ar_flip_flop
= 0;
1891 memset(s
->cr
, '\0', sizeof(s
->cr
));
1897 s
->dac_sub_index
= 0;
1898 s
->dac_read_index
= 0;
1899 s
->dac_write_index
= 0;
1900 memset(s
->dac_cache
, '\0', sizeof(s
->dac_cache
));
1902 memset(s
->palette
, '\0', sizeof(s
->palette
));
1904 #ifdef CONFIG_BOCHS_VBE
1906 memset(s
->vbe_regs
, '\0', sizeof(s
->vbe_regs
));
1907 s
->vbe_regs
[VBE_DISPI_INDEX_ID
] = VBE_DISPI_ID0
;
1908 s
->vbe_start_addr
= 0;
1909 s
->vbe_line_offset
= 0;
1910 s
->vbe_bank_mask
= (s
->vram_size
>> 16) - 1;
1912 memset(s
->font_offsets
, '\0', sizeof(s
->font_offsets
));
1913 s
->graphic_mode
= -1; /* force full update */
1914 s
->shift_control
= 0;
1917 s
->line_compare
= 0;
1919 s
->plane_updated
= 0;
1924 s
->last_scr_width
= 0;
1925 s
->last_scr_height
= 0;
1926 s
->cursor_start
= 0;
1928 s
->cursor_offset
= 0;
1929 memset(s
->invalidated_y_table
, '\0', sizeof(s
->invalidated_y_table
));
1930 memset(s
->last_palette
, '\0', sizeof(s
->last_palette
));
1931 memset(s
->last_ch_attr
, '\0', sizeof(s
->last_ch_attr
));
1932 switch (vga_retrace_method
) {
1933 case VGA_RETRACE_DUMB
:
1935 case VGA_RETRACE_PRECISE
:
1936 memset(&s
->retrace_info
, 0, sizeof (s
->retrace_info
));
1941 #define TEXTMODE_X(x) ((x) % width)
1942 #define TEXTMODE_Y(x) ((x) / width)
1943 #define VMEM2CHTYPE(v) ((v & 0xff0007ff) | \
1944 ((v & 0x00000800) << 10) | ((v & 0x00007000) >> 1))
1945 /* relay text rendering to the display driver
1946 * instead of doing a full vga_update_display() */
1947 static void vga_update_text(void *opaque
, console_ch_t
*chardata
)
1949 VGAState
*s
= (VGAState
*) opaque
;
1950 int graphic_mode
, i
, cursor_offset
, cursor_visible
;
1951 int cw
, cheight
, width
, height
, size
, c_min
, c_max
;
1953 console_ch_t
*dst
, val
;
1954 char msg_buffer
[80];
1955 int full_update
= 0;
1957 if (!(s
->ar_index
& 0x20)) {
1958 graphic_mode
= GMODE_BLANK
;
1960 graphic_mode
= s
->gr
[6] & 1;
1962 if (graphic_mode
!= s
->graphic_mode
) {
1963 s
->graphic_mode
= graphic_mode
;
1966 if (s
->last_width
== -1) {
1971 switch (graphic_mode
) {
1973 /* TODO: update palette */
1974 full_update
|= update_basic_params(s
);
1976 /* total width & height */
1977 cheight
= (s
->cr
[9] & 0x1f) + 1;
1979 if (!(s
->sr
[1] & 0x01))
1981 if (s
->sr
[1] & 0x08)
1982 cw
= 16; /* NOTE: no 18 pixel wide */
1983 width
= (s
->cr
[0x01] + 1);
1984 if (s
->cr
[0x06] == 100) {
1985 /* ugly hack for CGA 160x100x16 - explain me the logic */
1988 height
= s
->cr
[0x12] |
1989 ((s
->cr
[0x07] & 0x02) << 7) |
1990 ((s
->cr
[0x07] & 0x40) << 3);
1991 height
= (height
+ 1) / cheight
;
1994 size
= (height
* width
);
1995 if (size
> CH_ATTR_SIZE
) {
1999 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Text mode",
2004 if (width
!= s
->last_width
|| height
!= s
->last_height
||
2005 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
) {
2006 s
->last_scr_width
= width
* cw
;
2007 s
->last_scr_height
= height
* cheight
;
2008 s
->ds
->surface
->width
= width
;
2009 s
->ds
->surface
->height
= height
;
2011 s
->last_width
= width
;
2012 s
->last_height
= height
;
2013 s
->last_ch
= cheight
;
2018 /* Update "hardware" cursor */
2019 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
2020 if (cursor_offset
!= s
->cursor_offset
||
2021 s
->cr
[0xa] != s
->cursor_start
||
2022 s
->cr
[0xb] != s
->cursor_end
|| full_update
) {
2023 cursor_visible
= !(s
->cr
[0xa] & 0x20);
2024 if (cursor_visible
&& cursor_offset
< size
&& cursor_offset
>= 0)
2026 TEXTMODE_X(cursor_offset
),
2027 TEXTMODE_Y(cursor_offset
));
2029 dpy_cursor(s
->ds
, -1, -1);
2030 s
->cursor_offset
= cursor_offset
;
2031 s
->cursor_start
= s
->cr
[0xa];
2032 s
->cursor_end
= s
->cr
[0xb];
2035 src
= (uint32_t *) s
->vram_ptr
+ s
->start_addr
;
2039 for (i
= 0; i
< size
; src
++, dst
++, i
++)
2040 console_write_ch(dst
, VMEM2CHTYPE(*src
));
2042 dpy_update(s
->ds
, 0, 0, width
, height
);
2046 for (i
= 0; i
< size
; src
++, dst
++, i
++) {
2047 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2055 for (; i
< size
; src
++, dst
++, i
++) {
2056 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2063 if (c_min
<= c_max
) {
2064 i
= TEXTMODE_Y(c_min
);
2065 dpy_update(s
->ds
, 0, i
, width
, TEXTMODE_Y(c_max
) - i
+ 1);
2074 s
->get_resolution(s
, &width
, &height
);
2075 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Graphic mode",
2083 snprintf(msg_buffer
, sizeof(msg_buffer
), "VGA Blank mode");
2087 /* Display a message */
2089 s
->last_height
= height
= 3;
2090 dpy_cursor(s
->ds
, -1, -1);
2091 s
->ds
->surface
->width
= s
->last_width
;
2092 s
->ds
->surface
->height
= height
;
2095 for (dst
= chardata
, i
= 0; i
< s
->last_width
* height
; i
++)
2096 console_write_ch(dst
++, ' ');
2098 size
= strlen(msg_buffer
);
2099 width
= (s
->last_width
- size
) / 2;
2100 dst
= chardata
+ s
->last_width
+ width
;
2101 for (i
= 0; i
< size
; i
++)
2102 console_write_ch(dst
++, 0x00200100 | msg_buffer
[i
]);
2104 dpy_update(s
->ds
, 0, 0, s
->last_width
, height
);
2107 static CPUReadMemoryFunc
*vga_mem_read
[3] = {
2113 static CPUWriteMemoryFunc
*vga_mem_write
[3] = {
2119 static void vga_save(QEMUFile
*f
, void *opaque
)
2121 VGAState
*s
= opaque
;
2125 pci_device_save(s
->pci_dev
, f
);
2127 qemu_put_be32s(f
, &s
->latch
);
2128 qemu_put_8s(f
, &s
->sr_index
);
2129 qemu_put_buffer(f
, s
->sr
, 8);
2130 qemu_put_8s(f
, &s
->gr_index
);
2131 qemu_put_buffer(f
, s
->gr
, 16);
2132 qemu_put_8s(f
, &s
->ar_index
);
2133 qemu_put_buffer(f
, s
->ar
, 21);
2134 qemu_put_be32(f
, s
->ar_flip_flop
);
2135 qemu_put_8s(f
, &s
->cr_index
);
2136 qemu_put_buffer(f
, s
->cr
, 256);
2137 qemu_put_8s(f
, &s
->msr
);
2138 qemu_put_8s(f
, &s
->fcr
);
2139 qemu_put_byte(f
, s
->st00
);
2140 qemu_put_8s(f
, &s
->st01
);
2142 qemu_put_8s(f
, &s
->dac_state
);
2143 qemu_put_8s(f
, &s
->dac_sub_index
);
2144 qemu_put_8s(f
, &s
->dac_read_index
);
2145 qemu_put_8s(f
, &s
->dac_write_index
);
2146 qemu_put_buffer(f
, s
->dac_cache
, 3);
2147 qemu_put_buffer(f
, s
->palette
, 768);
2149 qemu_put_be32(f
, s
->bank_offset
);
2150 #ifdef CONFIG_BOCHS_VBE
2151 qemu_put_byte(f
, 1);
2152 qemu_put_be16s(f
, &s
->vbe_index
);
2153 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2154 qemu_put_be16s(f
, &s
->vbe_regs
[i
]);
2155 qemu_put_be32s(f
, &s
->vbe_start_addr
);
2156 qemu_put_be32s(f
, &s
->vbe_line_offset
);
2157 qemu_put_be32s(f
, &s
->vbe_bank_mask
);
2159 qemu_put_byte(f
, 0);
2163 static int vga_load(QEMUFile
*f
, void *opaque
, int version_id
)
2165 VGAState
*s
= opaque
;
2171 if (s
->pci_dev
&& version_id
>= 2) {
2172 ret
= pci_device_load(s
->pci_dev
, f
);
2177 qemu_get_be32s(f
, &s
->latch
);
2178 qemu_get_8s(f
, &s
->sr_index
);
2179 qemu_get_buffer(f
, s
->sr
, 8);
2180 qemu_get_8s(f
, &s
->gr_index
);
2181 qemu_get_buffer(f
, s
->gr
, 16);
2182 qemu_get_8s(f
, &s
->ar_index
);
2183 qemu_get_buffer(f
, s
->ar
, 21);
2184 s
->ar_flip_flop
=qemu_get_be32(f
);
2185 qemu_get_8s(f
, &s
->cr_index
);
2186 qemu_get_buffer(f
, s
->cr
, 256);
2187 qemu_get_8s(f
, &s
->msr
);
2188 qemu_get_8s(f
, &s
->fcr
);
2189 qemu_get_8s(f
, &s
->st00
);
2190 qemu_get_8s(f
, &s
->st01
);
2192 qemu_get_8s(f
, &s
->dac_state
);
2193 qemu_get_8s(f
, &s
->dac_sub_index
);
2194 qemu_get_8s(f
, &s
->dac_read_index
);
2195 qemu_get_8s(f
, &s
->dac_write_index
);
2196 qemu_get_buffer(f
, s
->dac_cache
, 3);
2197 qemu_get_buffer(f
, s
->palette
, 768);
2199 s
->bank_offset
=qemu_get_be32(f
);
2200 is_vbe
= qemu_get_byte(f
);
2201 #ifdef CONFIG_BOCHS_VBE
2204 qemu_get_be16s(f
, &s
->vbe_index
);
2205 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2206 qemu_get_be16s(f
, &s
->vbe_regs
[i
]);
2207 qemu_get_be32s(f
, &s
->vbe_start_addr
);
2208 qemu_get_be32s(f
, &s
->vbe_line_offset
);
2209 qemu_get_be32s(f
, &s
->vbe_bank_mask
);
2216 s
->graphic_mode
= -1;
2220 typedef struct PCIVGAState
{
2225 void vga_dirty_log_start(VGAState
*s
)
2227 if (kvm_enabled() && s
->map_addr
)
2228 kvm_log_start(s
->map_addr
, s
->map_end
- s
->map_addr
);
2230 if (kvm_enabled() && s
->lfb_vram_mapped
) {
2231 kvm_log_start(isa_mem_base
+ 0xa0000, 0x8000);
2232 kvm_log_start(isa_mem_base
+ 0xa8000, 0x8000);
2236 void vga_dirty_log_stop(VGAState
*s
)
2238 if (kvm_enabled() && s
->map_addr
)
2239 kvm_log_stop(s
->map_addr
, s
->map_end
- s
->map_addr
);
2241 if (kvm_enabled() && s
->lfb_vram_mapped
) {
2242 kvm_log_stop(isa_mem_base
+ 0xa0000, 0x8000);
2243 kvm_log_stop(isa_mem_base
+ 0xa8000, 0x8000);
2247 static void vga_map(PCIDevice
*pci_dev
, int region_num
,
2248 uint32_t addr
, uint32_t size
, int type
)
2250 PCIVGAState
*d
= (PCIVGAState
*)pci_dev
;
2251 VGAState
*s
= &d
->vga_state
;
2252 if (region_num
== PCI_ROM_SLOT
) {
2253 cpu_register_physical_memory(addr
, s
->bios_size
, s
->bios_offset
);
2255 cpu_register_physical_memory(addr
, s
->vram_size
, s
->vram_offset
);
2259 s
->map_end
= addr
+ VGA_RAM_SIZE
;
2261 vga_dirty_log_start(s
);
2264 void vga_common_init(VGAState
*s
, uint8_t *vga_ram_base
,
2265 ram_addr_t vga_ram_offset
, int vga_ram_size
)
2269 for(i
= 0;i
< 256; i
++) {
2271 for(j
= 0; j
< 8; j
++) {
2272 v
|= ((i
>> j
) & 1) << (j
* 4);
2277 for(j
= 0; j
< 4; j
++) {
2278 v
|= ((i
>> (2 * j
)) & 3) << (j
* 4);
2282 for(i
= 0; i
< 16; i
++) {
2284 for(j
= 0; j
< 4; j
++) {
2287 v
|= b
<< (2 * j
+ 1);
2292 s
->vram_ptr
= vga_ram_base
;
2293 s
->vram_offset
= vga_ram_offset
;
2294 s
->vram_size
= vga_ram_size
;
2295 s
->get_bpp
= vga_get_bpp
;
2296 s
->get_offsets
= vga_get_offsets
;
2297 s
->get_resolution
= vga_get_resolution
;
2298 s
->update
= vga_update_display
;
2299 s
->invalidate
= vga_invalidate_display
;
2300 s
->screen_dump
= vga_screen_dump
;
2301 s
->text_update
= vga_update_text
;
2302 switch (vga_retrace_method
) {
2303 case VGA_RETRACE_DUMB
:
2304 s
->retrace
= vga_dumb_retrace
;
2305 s
->update_retrace_info
= vga_dumb_update_retrace_info
;
2308 case VGA_RETRACE_PRECISE
:
2309 s
->retrace
= vga_precise_retrace
;
2310 s
->update_retrace_info
= vga_precise_update_retrace_info
;
2316 /* used by both ISA and PCI */
2317 void vga_init(VGAState
*s
)
2321 qemu_register_reset(vga_reset
, s
);
2322 register_savevm("vga", 0, 2, vga_save
, vga_load
, s
);
2324 register_ioport_write(0x3c0, 16, 1, vga_ioport_write
, s
);
2326 register_ioport_write(0x3b4, 2, 1, vga_ioport_write
, s
);
2327 register_ioport_write(0x3d4, 2, 1, vga_ioport_write
, s
);
2328 register_ioport_write(0x3ba, 1, 1, vga_ioport_write
, s
);
2329 register_ioport_write(0x3da, 1, 1, vga_ioport_write
, s
);
2331 register_ioport_read(0x3c0, 16, 1, vga_ioport_read
, s
);
2333 register_ioport_read(0x3b4, 2, 1, vga_ioport_read
, s
);
2334 register_ioport_read(0x3d4, 2, 1, vga_ioport_read
, s
);
2335 register_ioport_read(0x3ba, 1, 1, vga_ioport_read
, s
);
2336 register_ioport_read(0x3da, 1, 1, vga_ioport_read
, s
);
2339 #ifdef CONFIG_BOCHS_VBE
2340 #if defined (TARGET_I386)
2341 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2342 register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data
, s
);
2344 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2345 register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data
, s
);
2347 /* old Bochs IO ports */
2348 register_ioport_read(0xff80, 1, 2, vbe_ioport_read_index
, s
);
2349 register_ioport_read(0xff81, 1, 2, vbe_ioport_read_data
, s
);
2351 register_ioport_write(0xff80, 1, 2, vbe_ioport_write_index
, s
);
2352 register_ioport_write(0xff81, 1, 2, vbe_ioport_write_data
, s
);
2354 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2355 register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data
, s
);
2357 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2358 register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data
, s
);
2360 #endif /* CONFIG_BOCHS_VBE */
2362 vga_io_memory
= cpu_register_io_memory(0, vga_mem_read
, vga_mem_write
, s
);
2363 cpu_register_physical_memory(isa_mem_base
+ 0x000a0000, 0x20000,
2365 qemu_register_coalesced_mmio(isa_mem_base
+ 0x000a0000, 0x20000);
2368 /* Memory mapped interface */
2369 static uint32_t vga_mm_readb (void *opaque
, target_phys_addr_t addr
)
2371 VGAState
*s
= opaque
;
2373 return vga_ioport_read(s
, addr
>> s
->it_shift
) & 0xff;
2376 static void vga_mm_writeb (void *opaque
,
2377 target_phys_addr_t addr
, uint32_t value
)
2379 VGAState
*s
= opaque
;
2381 vga_ioport_write(s
, addr
>> s
->it_shift
, value
& 0xff);
2384 static uint32_t vga_mm_readw (void *opaque
, target_phys_addr_t addr
)
2386 VGAState
*s
= opaque
;
2388 return vga_ioport_read(s
, addr
>> s
->it_shift
) & 0xffff;
2391 static void vga_mm_writew (void *opaque
,
2392 target_phys_addr_t addr
, uint32_t value
)
2394 VGAState
*s
= opaque
;
2396 vga_ioport_write(s
, addr
>> s
->it_shift
, value
& 0xffff);
2399 static uint32_t vga_mm_readl (void *opaque
, target_phys_addr_t addr
)
2401 VGAState
*s
= opaque
;
2403 return vga_ioport_read(s
, addr
>> s
->it_shift
);
2406 static void vga_mm_writel (void *opaque
,
2407 target_phys_addr_t addr
, uint32_t value
)
2409 VGAState
*s
= opaque
;
2411 vga_ioport_write(s
, addr
>> s
->it_shift
, value
);
2414 static CPUReadMemoryFunc
*vga_mm_read_ctrl
[] = {
2420 static CPUWriteMemoryFunc
*vga_mm_write_ctrl
[] = {
2426 static void vga_mm_init(VGAState
*s
, target_phys_addr_t vram_base
,
2427 target_phys_addr_t ctrl_base
, int it_shift
)
2429 int s_ioport_ctrl
, vga_io_memory
;
2431 s
->it_shift
= it_shift
;
2432 s_ioport_ctrl
= cpu_register_io_memory(0, vga_mm_read_ctrl
, vga_mm_write_ctrl
, s
);
2433 vga_io_memory
= cpu_register_io_memory(0, vga_mem_read
, vga_mem_write
, s
);
2435 register_savevm("vga", 0, 2, vga_save
, vga_load
, s
);
2437 cpu_register_physical_memory(ctrl_base
, 0x100000, s_ioport_ctrl
);
2439 cpu_register_physical_memory(vram_base
+ 0x000a0000, 0x20000, vga_io_memory
);
2440 qemu_register_coalesced_mmio(vram_base
+ 0x000a0000, 0x20000);
2443 int isa_vga_init(uint8_t *vga_ram_base
,
2444 unsigned long vga_ram_offset
, int vga_ram_size
)
2448 s
= qemu_mallocz(sizeof(VGAState
));
2452 vga_common_init(s
, vga_ram_base
, vga_ram_offset
, vga_ram_size
);
2455 s
->ds
= graphic_console_init(s
->update
, s
->invalidate
,
2456 s
->screen_dump
, s
->text_update
, s
);
2458 #ifdef CONFIG_BOCHS_VBE
2459 /* XXX: use optimized standard vga accesses */
2460 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS
,
2461 vga_ram_size
, vga_ram_offset
);
2466 int isa_vga_mm_init(uint8_t *vga_ram_base
,
2467 unsigned long vga_ram_offset
, int vga_ram_size
,
2468 target_phys_addr_t vram_base
, target_phys_addr_t ctrl_base
,
2473 s
= qemu_mallocz(sizeof(VGAState
));
2477 vga_common_init(s
, vga_ram_base
, vga_ram_offset
, vga_ram_size
);
2478 vga_mm_init(s
, vram_base
, ctrl_base
, it_shift
);
2480 s
->ds
= graphic_console_init(s
->update
, s
->invalidate
,
2481 s
->screen_dump
, s
->text_update
, s
);
2483 #ifdef CONFIG_BOCHS_VBE
2484 /* XXX: use optimized standard vga accesses */
2485 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS
,
2486 vga_ram_size
, vga_ram_offset
);
2491 int pci_vga_init(PCIBus
*bus
, uint8_t *vga_ram_base
,
2492 unsigned long vga_ram_offset
, int vga_ram_size
,
2493 unsigned long vga_bios_offset
, int vga_bios_size
)
2499 d
= (PCIVGAState
*)pci_register_device(bus
, "VGA",
2500 sizeof(PCIVGAState
),
2506 vga_common_init(s
, vga_ram_base
, vga_ram_offset
, vga_ram_size
);
2509 s
->ds
= graphic_console_init(s
->update
, s
->invalidate
,
2510 s
->screen_dump
, s
->text_update
, s
);
2512 s
->pci_dev
= &d
->dev
;
2514 pci_conf
= d
->dev
.config
;
2515 pci_conf
[0x00] = 0x34; // dummy VGA (same as Bochs ID)
2516 pci_conf
[0x01] = 0x12;
2517 pci_conf
[0x02] = 0x11;
2518 pci_conf
[0x03] = 0x11;
2519 pci_conf
[0x0a] = 0x00; // VGA controller
2520 pci_conf
[0x0b] = 0x03;
2521 pci_conf
[0x0e] = 0x00; // header_type
2523 /* XXX: vga_ram_size must be a power of two */
2524 pci_register_io_region(&d
->dev
, 0, vga_ram_size
,
2525 PCI_ADDRESS_SPACE_MEM_PREFETCH
, vga_map
);
2526 if (vga_bios_size
!= 0) {
2527 unsigned int bios_total_size
;
2528 s
->bios_offset
= vga_bios_offset
;
2529 s
->bios_size
= vga_bios_size
;
2530 /* must be a power of two */
2531 bios_total_size
= 1;
2532 while (bios_total_size
< vga_bios_size
)
2533 bios_total_size
<<= 1;
2534 pci_register_io_region(&d
->dev
, PCI_ROM_SLOT
, bios_total_size
,
2535 PCI_ADDRESS_SPACE_MEM_PREFETCH
, vga_map
);
2540 /********************************************************/
2541 /* vga screen dump */
2543 static void vga_save_dpy_update(DisplayState
*s
,
2544 int x
, int y
, int w
, int h
)
2548 static void vga_save_dpy_resize(DisplayState
*s
)
2552 static void vga_save_dpy_refresh(DisplayState
*s
)
2556 int ppm_save(const char *filename
, struct DisplaySurface
*ds
)
2564 f
= fopen(filename
, "wb");
2567 fprintf(f
, "P6\n%d %d\n%d\n",
2568 ds
->width
, ds
->height
, 255);
2570 for(y
= 0; y
< ds
->height
; y
++) {
2572 for(x
= 0; x
< ds
->width
; x
++) {
2573 if (ds
->pf
.bits_per_pixel
== 32)
2576 v
= (uint32_t) (*(uint16_t *)d
);
2577 r
= ((v
>> ds
->pf
.rshift
) & ds
->pf
.rmax
) * 256 /
2579 g
= ((v
>> ds
->pf
.gshift
) & ds
->pf
.gmax
) * 256 /
2581 b
= ((v
>> ds
->pf
.bshift
) & ds
->pf
.bmax
) * 256 /
2586 d
+= ds
->pf
.bytes_per_pixel
;
2594 static void vga_screen_dump_blank(VGAState
*s
, const char *filename
)
2597 unsigned int y
, x
, w
, h
;
2599 w
= s
->last_scr_width
* sizeof(uint32_t);
2600 h
= s
->last_scr_height
;
2602 f
= fopen(filename
, "wb");
2605 fprintf(f
, "P6\n%d %d\n%d\n", w
, h
, 255);
2606 for (y
= 0; y
< h
; y
++) {
2607 for (x
= 0; x
< w
; x
++) {
2614 static void vga_screen_dump_common(VGAState
*s
, const char *filename
,
2617 DisplayState
*saved_ds
, ds1
, *ds
= &ds1
;
2618 DisplayChangeListener dcl
;
2620 /* XXX: this is a little hackish */
2621 vga_invalidate_display(s
);
2624 memset(ds
, 0, sizeof(DisplayState
));
2625 memset(&dcl
, 0, sizeof(DisplayChangeListener
));
2626 dcl
.dpy_update
= vga_save_dpy_update
;
2627 dcl
.dpy_resize
= vga_save_dpy_resize
;
2628 dcl
.dpy_refresh
= vga_save_dpy_refresh
;
2629 register_displaychangelistener(ds
, &dcl
);
2630 ds
->surface
= qemu_create_displaysurface(w
, h
, 32, 4 * w
);
2633 s
->graphic_mode
= -1;
2634 vga_update_display(s
);
2636 ppm_save(filename
, ds
->surface
);
2638 qemu_free_displaysurface(ds
->surface
);
2642 static void vga_screen_dump_graphic(VGAState
*s
, const char *filename
)
2646 s
->get_resolution(s
, &w
, &h
);
2647 vga_screen_dump_common(s
, filename
, w
, h
);
2650 static void vga_screen_dump_text(VGAState
*s
, const char *filename
)
2652 int w
, h
, cwidth
, cheight
;
2654 vga_get_text_resolution(s
, &w
, &h
, &cwidth
, &cheight
);
2655 vga_screen_dump_common(s
, filename
, w
* cwidth
, h
* cheight
);
2658 /* save the vga display in a PPM image even if no display is
2660 static void vga_screen_dump(void *opaque
, const char *filename
)
2662 VGAState
*s
= (VGAState
*)opaque
;
2664 if (!(s
->ar_index
& 0x20))
2665 vga_screen_dump_blank(s
, filename
);
2666 else if (s
->gr
[6] & 1)
2667 vga_screen_dump_graphic(s
, filename
);
2669 vga_screen_dump_text(s
, filename
);