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x86: merge mpspec variants
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1 #ifndef _AM_X86_MPSPEC_H
2 #define _AM_X86_MPSPEC_H
3
4 #include <asm/mpspec_def.h>
5
6 #ifdef CONFIG_X86_32
7 #include <mach_mpspec.h>
8
9 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
10 extern int mp_bus_id_to_node[MAX_MP_BUSSES];
11 extern int mp_bus_id_to_local[MAX_MP_BUSSES];
12 extern int quad_local_to_mp_bus_id[NR_CPUS/4][4];
13
14 extern unsigned int def_to_bigsmp;
15 extern int apic_version[MAX_APICS];
16 extern int pic_mode;
17
18 #else
19
20 #define MAX_MP_BUSSES 256
21 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
22 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
23
24 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
25
26 #endif
27
28 extern int mp_bus_id_to_pci_bus[MAX_MP_BUSSES];
29
30 extern unsigned int boot_cpu_physical_apicid;
31 extern int smp_found_config;
32 extern int nr_ioapics;
33 extern int mp_irq_entries;
34 extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
35 extern int mpc_default_type;
36 extern unsigned long mp_lapic_addr;
37
38 extern void find_smp_config(void);
39 extern void get_smp_config(void);
40
41 #ifdef CONFIG_ACPI
42 extern void mp_register_lapic(u8 id, u8 enabled);
43 extern void mp_register_lapic_address(u64 address);
44 extern void mp_register_ioapic(u8 id, u32 address, u32 gsi_base);
45 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
46 u32 gsi);
47 extern void mp_config_acpi_legacy_irqs(void);
48 extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
49 #endif /* CONFIG_ACPI */
50
51 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
52
53 struct physid_mask
54 {
55 unsigned long mask[PHYSID_ARRAY_SIZE];
56 };
57
58 typedef struct physid_mask physid_mask_t;
59
60 #define physid_set(physid, map) set_bit(physid, (map).mask)
61 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
62 #define physid_isset(physid, map) test_bit(physid, (map).mask)
63 #define physid_test_and_set(physid, map) \
64 test_and_set_bit(physid, (map).mask)
65
66 #define physids_and(dst, src1, src2) \
67 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
68
69 #define physids_or(dst, src1, src2) \
70 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
71
72 #define physids_clear(map) \
73 bitmap_zero((map).mask, MAX_APICS)
74
75 #define physids_complement(dst, src) \
76 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
77
78 #define physids_empty(map) \
79 bitmap_empty((map).mask, MAX_APICS)
80
81 #define physids_equal(map1, map2) \
82 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
83
84 #define physids_weight(map) \
85 bitmap_weight((map).mask, MAX_APICS)
86
87 #define physids_shift_right(d, s, n) \
88 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
89
90 #define physids_shift_left(d, s, n) \
91 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
92
93 #define physids_coerce(map) ((map).mask[0])
94
95 #define physids_promote(physids) \
96 ({ \
97 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
98 __physid_mask.mask[0] = physids; \
99 __physid_mask; \
100 })
101
102 #define physid_mask_of_physid(physid) \
103 ({ \
104 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
105 physid_set(physid, __physid_mask); \
106 __physid_mask; \
107 })
108
109 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
110 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
111
112 extern physid_mask_t phys_cpu_present_map;
113
114 #endif