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1 /*
2 * linux/include/linux/mmc/host.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Host driver specific definitions.
9 */
10 #ifndef LINUX_MMC_HOST_H
11 #define LINUX_MMC_HOST_H
12
13 #include <linux/leds.h>
14 #include <linux/mutex.h>
15 #include <linux/timer.h>
16 #include <linux/sched.h>
17 #include <linux/device.h>
18 #include <linux/fault-inject.h>
19
20 #include <linux/mmc/core.h>
21 #include <linux/mmc/card.h>
22 #include <linux/mmc/pm.h>
23
24 struct mmc_ios {
25 unsigned int clock; /* clock rate */
26 unsigned short vdd;
27
28 /* vdd stores the bit number of the selected voltage range from below. */
29
30 unsigned char bus_mode; /* command output mode */
31
32 #define MMC_BUSMODE_OPENDRAIN 1
33 #define MMC_BUSMODE_PUSHPULL 2
34
35 unsigned char chip_select; /* SPI chip select */
36
37 #define MMC_CS_DONTCARE 0
38 #define MMC_CS_HIGH 1
39 #define MMC_CS_LOW 2
40
41 unsigned char power_mode; /* power supply mode */
42
43 #define MMC_POWER_OFF 0
44 #define MMC_POWER_UP 1
45 #define MMC_POWER_ON 2
46 #define MMC_POWER_UNDEFINED 3
47
48 unsigned char bus_width; /* data bus width */
49
50 #define MMC_BUS_WIDTH_1 0
51 #define MMC_BUS_WIDTH_4 2
52 #define MMC_BUS_WIDTH_8 3
53
54 unsigned char timing; /* timing specification used */
55
56 #define MMC_TIMING_LEGACY 0
57 #define MMC_TIMING_MMC_HS 1
58 #define MMC_TIMING_SD_HS 2
59 #define MMC_TIMING_UHS_SDR12 3
60 #define MMC_TIMING_UHS_SDR25 4
61 #define MMC_TIMING_UHS_SDR50 5
62 #define MMC_TIMING_UHS_SDR104 6
63 #define MMC_TIMING_UHS_DDR50 7
64 #define MMC_TIMING_MMC_DDR52 8
65 #define MMC_TIMING_MMC_HS200 9
66 #define MMC_TIMING_MMC_HS400 10
67
68 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
69
70 #define MMC_SIGNAL_VOLTAGE_330 0
71 #define MMC_SIGNAL_VOLTAGE_180 1
72 #define MMC_SIGNAL_VOLTAGE_120 2
73
74 unsigned char drv_type; /* driver type (A, B, C, D) */
75
76 #define MMC_SET_DRIVER_TYPE_B 0
77 #define MMC_SET_DRIVER_TYPE_A 1
78 #define MMC_SET_DRIVER_TYPE_C 2
79 #define MMC_SET_DRIVER_TYPE_D 3
80 };
81
82 struct mmc_host_ops {
83 /*
84 * It is optional for the host to implement pre_req and post_req in
85 * order to support double buffering of requests (prepare one
86 * request while another request is active).
87 * pre_req() must always be followed by a post_req().
88 * To undo a call made to pre_req(), call post_req() with
89 * a nonzero err condition.
90 */
91 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
92 int err);
93 void (*pre_req)(struct mmc_host *host, struct mmc_request *req,
94 bool is_first_req);
95 void (*request)(struct mmc_host *host, struct mmc_request *req);
96 /*
97 * Avoid calling these three functions too often or in a "fast path",
98 * since underlaying controller might implement them in an expensive
99 * and/or slow way.
100 *
101 * Also note that these functions might sleep, so don't call them
102 * in the atomic contexts!
103 *
104 * Return values for the get_ro callback should be:
105 * 0 for a read/write card
106 * 1 for a read-only card
107 * -ENOSYS when not supported (equal to NULL callback)
108 * or a negative errno value when something bad happened
109 *
110 * Return values for the get_cd callback should be:
111 * 0 for a absent card
112 * 1 for a present card
113 * -ENOSYS when not supported (equal to NULL callback)
114 * or a negative errno value when something bad happened
115 */
116 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
117 int (*get_ro)(struct mmc_host *host);
118 int (*get_cd)(struct mmc_host *host);
119
120 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
121
122 /* optional callback for HC quirks */
123 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
124
125 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
126
127 /* Check if the card is pulling dat[0:3] low */
128 int (*card_busy)(struct mmc_host *host);
129
130 /* The tuning command opcode value is different for SD and eMMC cards */
131 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
132
133 /* Prepare HS400 target operating frequency depending host driver */
134 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
135 int (*select_drive_strength)(struct mmc_card *card,
136 unsigned int max_dtr, int host_drv,
137 int card_drv, int *drv_type);
138 void (*hw_reset)(struct mmc_host *host);
139 void (*card_event)(struct mmc_host *host);
140
141 /*
142 * Optional callback to support controllers with HW issues for multiple
143 * I/O. Returns the number of supported blocks for the request.
144 */
145 int (*multi_io_quirk)(struct mmc_card *card,
146 unsigned int direction, int blk_size);
147 };
148
149 struct mmc_card;
150 struct device;
151
152 struct mmc_async_req {
153 /* active mmc request */
154 struct mmc_request *mrq;
155 /*
156 * Check error status of completed mmc request.
157 * Returns 0 if success otherwise non zero.
158 */
159 int (*err_check) (struct mmc_card *, struct mmc_async_req *);
160 };
161
162 /**
163 * struct mmc_slot - MMC slot functions
164 *
165 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
166 * @handler_priv: MMC/SD-card slot context
167 *
168 * Some MMC/SD host controllers implement slot-functions like card and
169 * write-protect detection natively. However, a large number of controllers
170 * leave these functions to the CPU. This struct provides a hook to attach
171 * such slot-function drivers.
172 */
173 struct mmc_slot {
174 int cd_irq;
175 void *handler_priv;
176 };
177
178 /**
179 * mmc_context_info - synchronization details for mmc context
180 * @is_done_rcv wake up reason was done request
181 * @is_new_req wake up reason was new request
182 * @is_waiting_last_req mmc context waiting for single running request
183 * @wait wait queue
184 * @lock lock to protect data fields
185 */
186 struct mmc_context_info {
187 bool is_done_rcv;
188 bool is_new_req;
189 bool is_waiting_last_req;
190 wait_queue_head_t wait;
191 spinlock_t lock;
192 };
193
194 struct regulator;
195 struct mmc_pwrseq;
196
197 struct mmc_supply {
198 struct regulator *vmmc; /* Card power supply */
199 struct regulator *vqmmc; /* Optional Vccq supply */
200 };
201
202 struct mmc_host {
203 struct device *parent;
204 struct device class_dev;
205 int index;
206 const struct mmc_host_ops *ops;
207 struct mmc_pwrseq *pwrseq;
208 unsigned int f_min;
209 unsigned int f_max;
210 unsigned int f_init;
211 u32 ocr_avail;
212 u32 ocr_avail_sdio; /* SDIO-specific OCR */
213 u32 ocr_avail_sd; /* SD-specific OCR */
214 u32 ocr_avail_mmc; /* MMC-specific OCR */
215 #ifdef CONFIG_PM_SLEEP
216 struct notifier_block pm_notify;
217 #endif
218 u32 max_current_330;
219 u32 max_current_300;
220 u32 max_current_180;
221
222 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
223 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
224 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
225 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
226 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
227 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
228 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
229 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
230 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
231 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
232 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
233 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
234 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
235 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
236 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
237 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
238 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
239
240 u32 caps; /* Host capabilities */
241
242 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
243 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
244 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
245 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
246 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
247 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
248 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
249 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
250 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
251 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
252 #define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
253 #define MMC_CAP_1_8V_DDR (1 << 11) /* can support */
254 /* DDR mode at 1.8V */
255 #define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
256 /* DDR mode at 1.2V */
257 #define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
258 #define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
259 #define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
260 #define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
261 #define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
262 #define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
263 #define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
264 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
265 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
266 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
267 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
268 #define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
269
270 u32 caps2; /* More host capabilities */
271
272 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
273 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
274 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
275 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
276 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
277 MMC_CAP2_HS200_1_2V_SDR)
278 #define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
279 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
280 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
281 #define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */
282 #define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */
283 #define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
284 MMC_CAP2_PACKED_WR)
285 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
286 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
287 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
288 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
289 MMC_CAP2_HS400_1_2V)
290 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
291 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
292 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
293 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
294
295 mmc_pm_flag_t pm_caps; /* supported pm features */
296
297 /* host specific block data */
298 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
299 unsigned short max_segs; /* see blk_queue_max_segments */
300 unsigned short unused;
301 unsigned int max_req_size; /* maximum number of bytes in one req */
302 unsigned int max_blk_size; /* maximum size of one mmc block */
303 unsigned int max_blk_count; /* maximum number of blocks in one req */
304 unsigned int max_busy_timeout; /* max busy timeout in ms */
305
306 /* private data */
307 spinlock_t lock; /* lock for claim and bus ops */
308
309 struct mmc_ios ios; /* current io bus settings */
310
311 /* group bitfields together to minimize padding */
312 unsigned int use_spi_crc:1;
313 unsigned int claimed:1; /* host exclusively claimed */
314 unsigned int bus_dead:1; /* bus has been released */
315 #ifdef CONFIG_MMC_DEBUG
316 unsigned int removed:1; /* host is being removed */
317 #endif
318 unsigned int can_retune:1; /* re-tuning can be used */
319 unsigned int doing_retune:1; /* re-tuning in progress */
320 unsigned int retune_now:1; /* do re-tuning at next req */
321
322 int rescan_disable; /* disable card detection */
323 int rescan_entered; /* used with nonremovable devices */
324
325 int need_retune; /* re-tuning is needed */
326 int hold_retune; /* hold off re-tuning */
327 unsigned int retune_period; /* re-tuning period in secs */
328 struct timer_list retune_timer; /* for periodic re-tuning */
329
330 bool trigger_card_event; /* card_event necessary */
331
332 struct mmc_card *card; /* device attached to this host */
333
334 wait_queue_head_t wq;
335 struct task_struct *claimer; /* task that has host claimed */
336 int claim_cnt; /* "claim" nesting count */
337
338 struct delayed_work detect;
339 int detect_change; /* card detect flag */
340 struct mmc_slot slot;
341
342 const struct mmc_bus_ops *bus_ops; /* current bus driver */
343 unsigned int bus_refs; /* reference counter */
344
345 unsigned int sdio_irqs;
346 struct task_struct *sdio_irq_thread;
347 bool sdio_irq_pending;
348 atomic_t sdio_irq_thread_abort;
349
350 mmc_pm_flag_t pm_flags; /* requested pm features */
351
352 struct led_trigger *led; /* activity led */
353
354 #ifdef CONFIG_REGULATOR
355 bool regulator_enabled; /* regulator state */
356 #endif
357 struct mmc_supply supply;
358
359 struct dentry *debugfs_root;
360
361 struct mmc_async_req *areq; /* active async req */
362 struct mmc_context_info context_info; /* async synchronization info */
363
364 #ifdef CONFIG_FAIL_MMC_REQUEST
365 struct fault_attr fail_mmc_request;
366 #endif
367
368 unsigned int actual_clock; /* Actual HC clock rate */
369
370 unsigned int slotno; /* used for sdio acpi binding */
371
372 int dsr_req; /* DSR value is valid */
373 u32 dsr; /* optional driver stage (DSR) value */
374
375 unsigned long private[0] ____cacheline_aligned;
376 };
377
378 struct mmc_host *mmc_alloc_host(int extra, struct device *);
379 int mmc_add_host(struct mmc_host *);
380 void mmc_remove_host(struct mmc_host *);
381 void mmc_free_host(struct mmc_host *);
382 int mmc_of_parse(struct mmc_host *host);
383
384 static inline void *mmc_priv(struct mmc_host *host)
385 {
386 return (void *)host->private;
387 }
388
389 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
390
391 #define mmc_dev(x) ((x)->parent)
392 #define mmc_classdev(x) (&(x)->class_dev)
393 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
394
395 int mmc_power_save_host(struct mmc_host *host);
396 int mmc_power_restore_host(struct mmc_host *host);
397
398 void mmc_detect_change(struct mmc_host *, unsigned long delay);
399 void mmc_request_done(struct mmc_host *, struct mmc_request *);
400
401 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
402 {
403 host->ops->enable_sdio_irq(host, 0);
404 host->sdio_irq_pending = true;
405 if (host->sdio_irq_thread)
406 wake_up_process(host->sdio_irq_thread);
407 }
408
409 void sdio_run_irqs(struct mmc_host *host);
410
411 #ifdef CONFIG_REGULATOR
412 int mmc_regulator_get_ocrmask(struct regulator *supply);
413 int mmc_regulator_set_ocr(struct mmc_host *mmc,
414 struct regulator *supply,
415 unsigned short vdd_bit);
416 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
417 #else
418 static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
419 {
420 return 0;
421 }
422
423 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
424 struct regulator *supply,
425 unsigned short vdd_bit)
426 {
427 return 0;
428 }
429
430 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
431 struct mmc_ios *ios)
432 {
433 return -EINVAL;
434 }
435 #endif
436
437 int mmc_regulator_get_supply(struct mmc_host *mmc);
438
439 static inline int mmc_card_is_removable(struct mmc_host *host)
440 {
441 return !(host->caps & MMC_CAP_NONREMOVABLE);
442 }
443
444 static inline int mmc_card_keep_power(struct mmc_host *host)
445 {
446 return host->pm_flags & MMC_PM_KEEP_POWER;
447 }
448
449 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
450 {
451 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
452 }
453
454 static inline int mmc_host_cmd23(struct mmc_host *host)
455 {
456 return host->caps & MMC_CAP_CMD23;
457 }
458
459 static inline int mmc_boot_partition_access(struct mmc_host *host)
460 {
461 return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
462 }
463
464 static inline int mmc_host_uhs(struct mmc_host *host)
465 {
466 return host->caps &
467 (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
468 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 |
469 MMC_CAP_UHS_DDR50);
470 }
471
472 static inline int mmc_host_packed_wr(struct mmc_host *host)
473 {
474 return host->caps2 & MMC_CAP2_PACKED_WR;
475 }
476
477 static inline int mmc_card_hs(struct mmc_card *card)
478 {
479 return card->host->ios.timing == MMC_TIMING_SD_HS ||
480 card->host->ios.timing == MMC_TIMING_MMC_HS;
481 }
482
483 static inline int mmc_card_uhs(struct mmc_card *card)
484 {
485 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
486 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
487 }
488
489 static inline bool mmc_card_hs200(struct mmc_card *card)
490 {
491 return card->host->ios.timing == MMC_TIMING_MMC_HS200;
492 }
493
494 static inline bool mmc_card_ddr52(struct mmc_card *card)
495 {
496 return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
497 }
498
499 static inline bool mmc_card_hs400(struct mmc_card *card)
500 {
501 return card->host->ios.timing == MMC_TIMING_MMC_HS400;
502 }
503
504 void mmc_retune_timer_stop(struct mmc_host *host);
505
506 static inline void mmc_retune_needed(struct mmc_host *host)
507 {
508 if (host->can_retune)
509 host->need_retune = 1;
510 }
511
512 static inline void mmc_retune_recheck(struct mmc_host *host)
513 {
514 if (host->hold_retune <= 1)
515 host->retune_now = 1;
516 }
517
518 #endif /* LINUX_MMC_HOST_H */