include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include <setjmp.h>
  25 #include "hw/qdev-core.h"
  26 #include "exec/hwaddr.h"
  27 #include "qemu/queue.h"
  28 #include "qemu/thread.h"
  29 #include "qemu/tls.h"
  30 #include "qemu/typedefs.h"
  31
  32 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  33                                      void *opaque);
  34
  35 /**
  36  * vaddr:
  37  * Type wide enough to contain any #target_ulong virtual address.
  38  */
  39 typedef uint64_t vaddr;
  40 #define VADDR_PRId PRId64
  41 #define VADDR_PRIu PRIu64
  42 #define VADDR_PRIo PRIo64
  43 #define VADDR_PRIx PRIx64
  44 #define VADDR_PRIX PRIX64
  45 #define VADDR_MAX UINT64_MAX
  46
  47 /**
  48  * SECTION:cpu
  49  * @section_id: QEMU-cpu
  50  * @title: CPU Class
  51  * @short_description: Base class for all CPUs
  52  */
  53
  54 #define TYPE_CPU "cpu"
  55
  56 /* Since this macro is used a lot in hot code paths and in conjunction with
  57  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
  58  * an unchecked cast.
  59  */
  60 #define CPU(obj) ((CPUState *)(obj))
  61
  62 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  63 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  64
  65 typedef struct CPUState CPUState;
  66
  67 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  68                                     bool is_write, bool is_exec, int opaque,
  69                                     unsigned size);
  70
  71 struct TranslationBlock;
  72
  73 /**
  74  * CPUClass:
  75  * @class_by_name: Callback to map -cpu command line model name to an
  76  * instantiatable CPU type.
  77  * @parse_features: Callback to parse command line arguments.
  78  * @reset: Callback to reset the #CPUState to its initial state.
  79  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  80  * @has_work: Callback for checking if there is work to do.
  81  * @do_interrupt: Callback for interrupt handling.
  82  * @do_unassigned_access: Callback for unassigned access handling.
  83  * @do_unaligned_access: Callback for unaligned access handling, if
  84  * the target defines #ALIGNED_ONLY.
  85  * @memory_rw_debug: Callback for GDB memory access.
  86  * @dump_state: Callback for dumping state.
  87  * @dump_statistics: Callback for dumping statistics.
  88  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  89  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  90  * @get_memory_mapping: Callback for obtaining the memory mappings.
  91  * @set_pc: Callback for setting the Program Counter register.
  92  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  93  * #TranslationBlock.
  94  * @handle_mmu_fault: Callback for handling an MMU fault.
  95  * @get_phys_page_debug: Callback for obtaining a physical address.
  96  * @gdb_read_register: Callback for letting GDB read a register.
  97  * @gdb_write_register: Callback for letting GDB write a register.
  98  * @vmsd: State description for migration.
  99  * @gdb_num_core_regs: Number of core registers accessible to GDB.
 100  * @gdb_core_xml_file: File name for core registers GDB XML description.
 101  *
 102  * Represents a CPU family or model.
 103  */
 104 typedef struct CPUClass {
 105     /*< private >*/
 106     DeviceClass parent_class;
 107     /*< public >*/
 108
 109     ObjectClass *(*class_by_name)(const char *cpu_model);
 110     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 111
 112     void (*reset)(CPUState *cpu);
 113     int reset_dump_flags;
 114     bool (*has_work)(CPUState *cpu);
 115     void (*do_interrupt)(CPUState *cpu);
 116     CPUUnassignedAccess do_unassigned_access;
 117     void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
 118                                 int is_write, int is_user, uintptr_t retaddr);
 119     bool (*virtio_is_big_endian)(CPUState *cpu);
 120     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 121                            uint8_t *buf, int len, bool is_write);
 122     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 123                        int flags);
 124     void (*dump_statistics)(CPUState *cpu, FILE *f,
 125                             fprintf_function cpu_fprintf, int flags);
 126     int64_t (*get_arch_id)(CPUState *cpu);
 127     bool (*get_paging_enabled)(const CPUState *cpu);
 128     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 129                                Error **errp);
 130     void (*set_pc)(CPUState *cpu, vaddr value);
 131     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 132     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 133                             int mmu_index);
 134     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 135     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 136     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 137
 138     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 139                             int cpuid, void *opaque);
 140     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 141                                 void *opaque);
 142     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 143                             int cpuid, void *opaque);
 144     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 145                                 void *opaque);
 146
 147     const struct VMStateDescription *vmsd;
 148     int gdb_num_core_regs;
 149     const char *gdb_core_xml_file;
 150 } CPUClass;
 151
 152 #ifdef HOST_WORDS_BIGENDIAN
 153 typedef struct icount_decr_u16 {
 154     uint16_t high;
 155     uint16_t low;
 156 } icount_decr_u16;
 157 #else
 158 typedef struct icount_decr_u16 {
 159     uint16_t low;
 160     uint16_t high;
 161 } icount_decr_u16;
 162 #endif
 163
 164 typedef struct CPUBreakpoint {
 165     vaddr pc;
 166     int flags; /* BP_* */
 167     QTAILQ_ENTRY(CPUBreakpoint) entry;
 168 } CPUBreakpoint;
 169
 170 typedef struct CPUWatchpoint {
 171     vaddr vaddr;
 172     vaddr len_mask;
 173     int flags; /* BP_* */
 174     QTAILQ_ENTRY(CPUWatchpoint) entry;
 175 } CPUWatchpoint;
 176
 177 struct KVMState;
 178 struct kvm_run;
 179
 180 #define TB_JMP_CACHE_BITS 12
 181 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
 182
 183 /**
 184  * CPUState:
 185  * @cpu_index: CPU index (informative).
 186  * @nr_cores: Number of cores within this CPU package.
 187  * @nr_threads: Number of threads within this CPU.
 188  * @numa_node: NUMA node this CPU is belonging to.
 189  * @host_tid: Host thread ID.
 190  * @running: #true if CPU is currently running (usermode).
 191  * @created: Indicates whether the CPU thread has been successfully created.
 192  * @interrupt_request: Indicates a pending interrupt request.
 193  * @halted: Nonzero if the CPU is in suspended state.
 194  * @stop: Indicates a pending stop request.
 195  * @stopped: Indicates the CPU has been artificially stopped.
 196  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 197  *           CPU and return to its top level loop.
 198  * @singlestep_enabled: Flags for single-stepping.
 199  * @icount_extra: Instructions until next timer event.
 200  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 201  * This allows a single read-compare-cbranch-write sequence to test
 202  * for both decrementer underflow and exceptions.
 203  * @can_do_io: Nonzero if memory-mapped IO is safe.
 204  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 205  * @current_tb: Currently executing TB.
 206  * @gdb_regs: Additional GDB registers.
 207  * @gdb_num_regs: Number of total registers accessible to GDB.
 208  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 209  * @next_cpu: Next CPU sharing TB cache.
 210  * @opaque: User data.
 211  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 212  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 213  * @kvm_fd: vCPU file descriptor for KVM.
 214  *
 215  * State of one CPU core or thread.
 216  */
 217 struct CPUState {
 218     /*< private >*/
 219     DeviceState parent_obj;
 220     /*< public >*/
 221
 222     int nr_cores;
 223     int nr_threads;
 224     int numa_node;
 225
 226     struct QemuThread *thread;
 227 #ifdef _WIN32
 228     HANDLE hThread;
 229 #endif
 230     int thread_id;
 231     uint32_t host_tid;
 232     bool running;
 233     struct QemuCond *halt_cond;
 234     struct qemu_work_item *queued_work_first, *queued_work_last;
 235     bool thread_kicked;
 236     bool created;
 237     bool stop;
 238     bool stopped;
 239     volatile sig_atomic_t exit_request;
 240     uint32_t interrupt_request;
 241     int singlestep_enabled;
 242     int64_t icount_extra;
 243     sigjmp_buf jmp_env;
 244
 245     AddressSpace *as;
 246     MemoryListener *tcg_as_listener;
 247
 248     void *env_ptr; /* CPUArchState */
 249     struct TranslationBlock *current_tb;
 250     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
 251     struct GDBRegisterState *gdb_regs;
 252     int gdb_num_regs;
 253     int gdb_num_g_regs;
 254     QTAILQ_ENTRY(CPUState) node;
 255
 256     /* ice debug support */
 257     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
 258
 259     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
 260     CPUWatchpoint *watchpoint_hit;
 261
 262     void *opaque;
 263
 264     /* In order to avoid passing too many arguments to the MMIO helpers,
 265      * we store some rarely used information in the CPU context.
 266      */
 267     uintptr_t mem_io_pc;
 268     vaddr mem_io_vaddr;
 269
 270     int kvm_fd;
 271     bool kvm_vcpu_dirty;
 272     struct KVMState *kvm_state;
 273     struct kvm_run *kvm_run;
 274
 275     /* TODO Move common fields from CPUArchState here. */
 276     int cpu_index; /* used by alpha TCG */
 277     uint32_t halted; /* used by alpha, cris, ppc TCG */
 278     union {
 279         uint32_t u32;
 280         icount_decr_u16 u16;
 281     } icount_decr;
 282     uint32_t can_do_io;
 283     int32_t exception_index; /* used by m68k TCG */
 284
 285     /* Note that this is accessed at the start of every TB via a negative
 286        offset from AREG0.  Leave this field at the end so as to make the
 287        (absolute value) offset as small as possible.  This reduces code
 288        size, especially for hosts without large memory offsets.  */
 289     volatile sig_atomic_t tcg_exit_req;
 290 };
 291
 292 QTAILQ_HEAD(CPUTailQ, CPUState);
 293 extern struct CPUTailQ cpus;
 294 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 295 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 296 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 297     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 298 #define first_cpu QTAILQ_FIRST(&cpus)
 299
 300 DECLARE_TLS(CPUState *, current_cpu);
 301 #define current_cpu tls_var(current_cpu)
 302
 303 /**
 304  * cpu_paging_enabled:
 305  * @cpu: The CPU whose state is to be inspected.
 306  *
 307  * Returns: %true if paging is enabled, %false otherwise.
 308  */
 309 bool cpu_paging_enabled(const CPUState *cpu);
 310
 311 /**
 312  * cpu_get_memory_mapping:
 313  * @cpu: The CPU whose memory mappings are to be obtained.
 314  * @list: Where to write the memory mappings to.
 315  * @errp: Pointer for reporting an #Error.
 316  */
 317 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 318                             Error **errp);
 319
 320 /**
 321  * cpu_write_elf64_note:
 322  * @f: pointer to a function that writes memory to a file
 323  * @cpu: The CPU whose memory is to be dumped
 324  * @cpuid: ID number of the CPU
 325  * @opaque: pointer to the CPUState struct
 326  */
 327 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 328                          int cpuid, void *opaque);
 329
 330 /**
 331  * cpu_write_elf64_qemunote:
 332  * @f: pointer to a function that writes memory to a file
 333  * @cpu: The CPU whose memory is to be dumped
 334  * @cpuid: ID number of the CPU
 335  * @opaque: pointer to the CPUState struct
 336  */
 337 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 338                              void *opaque);
 339
 340 /**
 341  * cpu_write_elf32_note:
 342  * @f: pointer to a function that writes memory to a file
 343  * @cpu: The CPU whose memory is to be dumped
 344  * @cpuid: ID number of the CPU
 345  * @opaque: pointer to the CPUState struct
 346  */
 347 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 348                          int cpuid, void *opaque);
 349
 350 /**
 351  * cpu_write_elf32_qemunote:
 352  * @f: pointer to a function that writes memory to a file
 353  * @cpu: The CPU whose memory is to be dumped
 354  * @cpuid: ID number of the CPU
 355  * @opaque: pointer to the CPUState struct
 356  */
 357 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 358                              void *opaque);
 359
 360 /**
 361  * CPUDumpFlags:
 362  * @CPU_DUMP_CODE:
 363  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 364  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 365  */
 366 enum CPUDumpFlags {
 367     CPU_DUMP_CODE = 0x00010000,
 368     CPU_DUMP_FPU  = 0x00020000,
 369     CPU_DUMP_CCOP = 0x00040000,
 370 };
 371
 372 /**
 373  * cpu_dump_state:
 374  * @cpu: The CPU whose state is to be dumped.
 375  * @f: File to dump to.
 376  * @cpu_fprintf: Function to dump with.
 377  * @flags: Flags what to dump.
 378  *
 379  * Dumps CPU state.
 380  */
 381 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 382                     int flags);
 383
 384 /**
 385  * cpu_dump_statistics:
 386  * @cpu: The CPU whose state is to be dumped.
 387  * @f: File to dump to.
 388  * @cpu_fprintf: Function to dump with.
 389  * @flags: Flags what to dump.
 390  *
 391  * Dumps CPU statistics.
 392  */
 393 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 394                          int flags);
 395
 396 #ifndef CONFIG_USER_ONLY
 397 /**
 398  * cpu_get_phys_page_debug:
 399  * @cpu: The CPU to obtain the physical page address for.
 400  * @addr: The virtual address.
 401  *
 402  * Obtains the physical page corresponding to a virtual one.
 403  * Use it only for debugging because no protection checks are done.
 404  *
 405  * Returns: Corresponding physical page address or -1 if no page found.
 406  */
 407 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 408 {
 409     CPUClass *cc = CPU_GET_CLASS(cpu);
 410
 411     return cc->get_phys_page_debug(cpu, addr);
 412 }
 413 #endif
 414
 415 /**
 416  * cpu_reset:
 417  * @cpu: The CPU whose state is to be reset.
 418  */
 419 void cpu_reset(CPUState *cpu);
 420
 421 /**
 422  * cpu_class_by_name:
 423  * @typename: The CPU base type.
 424  * @cpu_model: The model string without any parameters.
 425  *
 426  * Looks up a CPU #ObjectClass matching name @cpu_model.
 427  *
 428  * Returns: A #CPUClass or %NULL if not matching class is found.
 429  */
 430 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 431
 432 /**
 433  * cpu_generic_init:
 434  * @typename: The CPU base type.
 435  * @cpu_model: The model string including optional parameters.
 436  *
 437  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 438  *
 439  * Returns: A #CPUState or %NULL if an error occurred.
 440  */
 441 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 442
 443 /**
 444  * cpu_has_work:
 445  * @cpu: The vCPU to check.
 446  *
 447  * Checks whether the CPU has work to do.
 448  *
 449  * Returns: %true if the CPU has work, %false otherwise.
 450  */
 451 static inline bool cpu_has_work(CPUState *cpu)
 452 {
 453     CPUClass *cc = CPU_GET_CLASS(cpu);
 454
 455     g_assert(cc->has_work);
 456     return cc->has_work(cpu);
 457 }
 458
 459 /**
 460  * qemu_cpu_is_self:
 461  * @cpu: The vCPU to check against.
 462  *
 463  * Checks whether the caller is executing on the vCPU thread.
 464  *
 465  * Returns: %true if called from @cpu's thread, %false otherwise.
 466  */
 467 bool qemu_cpu_is_self(CPUState *cpu);
 468
 469 /**
 470  * qemu_cpu_kick:
 471  * @cpu: The vCPU to kick.
 472  *
 473  * Kicks @cpu's thread.
 474  */
 475 void qemu_cpu_kick(CPUState *cpu);
 476
 477 /**
 478  * cpu_is_stopped:
 479  * @cpu: The CPU to check.
 480  *
 481  * Checks whether the CPU is stopped.
 482  *
 483  * Returns: %true if run state is not running or if artificially stopped;
 484  * %false otherwise.
 485  */
 486 bool cpu_is_stopped(CPUState *cpu);
 487
 488 /**
 489  * run_on_cpu:
 490  * @cpu: The vCPU to run on.
 491  * @func: The function to be executed.
 492  * @data: Data to pass to the function.
 493  *
 494  * Schedules the function @func for execution on the vCPU @cpu.
 495  */
 496 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 497
 498 /**
 499  * async_run_on_cpu:
 500  * @cpu: The vCPU to run on.
 501  * @func: The function to be executed.
 502  * @data: Data to pass to the function.
 503  *
 504  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 505  */
 506 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 507
 508 /**
 509  * qemu_get_cpu:
 510  * @index: The CPUState@cpu_index value of the CPU to obtain.
 511  *
 512  * Gets a CPU matching @index.
 513  *
 514  * Returns: The CPU or %NULL if there is no matching CPU.
 515  */
 516 CPUState *qemu_get_cpu(int index);
 517
 518 /**
 519  * cpu_exists:
 520  * @id: Guest-exposed CPU ID to lookup.
 521  *
 522  * Search for CPU with specified ID.
 523  *
 524  * Returns: %true - CPU is found, %false - CPU isn't found.
 525  */
 526 bool cpu_exists(int64_t id);
 527
 528 #ifndef CONFIG_USER_ONLY
 529
 530 typedef void (*CPUInterruptHandler)(CPUState *, int);
 531
 532 extern CPUInterruptHandler cpu_interrupt_handler;
 533
 534 /**
 535  * cpu_interrupt:
 536  * @cpu: The CPU to set an interrupt on.
 537  * @mask: The interupts to set.
 538  *
 539  * Invokes the interrupt handler.
 540  */
 541 static inline void cpu_interrupt(CPUState *cpu, int mask)
 542 {
 543     cpu_interrupt_handler(cpu, mask);
 544 }
 545
 546 #else /* USER_ONLY */
 547
 548 void cpu_interrupt(CPUState *cpu, int mask);
 549
 550 #endif /* USER_ONLY */
 551
 552 #ifdef CONFIG_SOFTMMU
 553 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 554                                          bool is_write, bool is_exec,
 555                                          int opaque, unsigned size)
 556 {
 557     CPUClass *cc = CPU_GET_CLASS(cpu);
 558
 559     if (cc->do_unassigned_access) {
 560         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 561     }
 562 }
 563
 564 static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
 565                                         int is_write, int is_user,
 566                                         uintptr_t retaddr)
 567 {
 568     CPUClass *cc = CPU_GET_CLASS(cpu);
 569
 570     return cc->do_unaligned_access(cpu, addr, is_write, is_user, retaddr);
 571 }
 572 #endif
 573
 574 /**
 575  * cpu_reset_interrupt:
 576  * @cpu: The CPU to clear the interrupt on.
 577  * @mask: The interrupt mask to clear.
 578  *
 579  * Resets interrupts on the vCPU @cpu.
 580  */
 581 void cpu_reset_interrupt(CPUState *cpu, int mask);
 582
 583 /**
 584  * cpu_exit:
 585  * @cpu: The CPU to exit.
 586  *
 587  * Requests the CPU @cpu to exit execution.
 588  */
 589 void cpu_exit(CPUState *cpu);
 590
 591 /**
 592  * cpu_resume:
 593  * @cpu: The CPU to resume.
 594  *
 595  * Resumes CPU, i.e. puts CPU into runnable state.
 596  */
 597 void cpu_resume(CPUState *cpu);
 598
 599 /**
 600  * qemu_init_vcpu:
 601  * @cpu: The vCPU to initialize.
 602  *
 603  * Initializes a vCPU.
 604  */
 605 void qemu_init_vcpu(CPUState *cpu);
 606
 607 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 608 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 609 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 610
 611 /**
 612  * cpu_single_step:
 613  * @cpu: CPU to the flags for.
 614  * @enabled: Flags to enable.
 615  *
 616  * Enables or disables single-stepping for @cpu.
 617  */
 618 void cpu_single_step(CPUState *cpu, int enabled);
 619
 620 /* Breakpoint/watchpoint flags */
 621 #define BP_MEM_READ           0x01
 622 #define BP_MEM_WRITE          0x02
 623 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 624 #define BP_STOP_BEFORE_ACCESS 0x04
 625 #define BP_WATCHPOINT_HIT     0x08
 626 #define BP_GDB                0x10
 627 #define BP_CPU                0x20
 628
 629 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 630                           CPUBreakpoint **breakpoint);
 631 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
 632 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
 633 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
 634
 635 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 636                           int flags, CPUWatchpoint **watchpoint);
 637 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
 638                           vaddr len, int flags);
 639 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
 640 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
 641
 642 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
 643     GCC_FMT_ATTR(2, 3);
 644
 645 #ifdef CONFIG_SOFTMMU
 646 extern const struct VMStateDescription vmstate_cpu_common;
 647 #else
 648 #define vmstate_cpu_common vmstate_dummy
 649 #endif
 650
 651 #define VMSTATE_CPU() {                                                     \
 652     .name = "parent_obj",                                                   \
 653     .size = sizeof(CPUState),                                               \
 654     .vmsd = &vmstate_cpu_common,                                            \
 655     .flags = VMS_STRUCT,                                                    \
 656     .offset = 0,                                                            \
 657 }
 658
 659 #endif