include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include "hw/qdev-core.h"
  25 #include "exec/hwaddr.h"
  26 #include "qemu/queue.h"
  27 #include "qemu/thread.h"
  28 #include "qemu/tls.h"
  29 #include "qemu/typedefs.h"
  30
  31 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  32                                      void *opaque);
  33
  34 /**
  35  * vaddr:
  36  * Type wide enough to contain any #target_ulong virtual address.
  37  */
  38 typedef uint64_t vaddr;
  39 #define VADDR_PRId PRId64
  40 #define VADDR_PRIu PRIu64
  41 #define VADDR_PRIo PRIo64
  42 #define VADDR_PRIx PRIx64
  43 #define VADDR_PRIX PRIX64
  44 #define VADDR_MAX UINT64_MAX
  45
  46 /**
  47  * SECTION:cpu
  48  * @section_id: QEMU-cpu
  49  * @title: CPU Class
  50  * @short_description: Base class for all CPUs
  51  */
  52
  53 #define TYPE_CPU "cpu"
  54
  55 #define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
  56 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  57 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  58
  59 typedef struct CPUState CPUState;
  60
  61 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  62                                     bool is_write, bool is_exec, int opaque,
  63                                     unsigned size);
  64
  65 struct TranslationBlock;
  66
  67 /**
  68  * CPUClass:
  69  * @class_by_name: Callback to map -cpu command line model name to an
  70  * instantiatable CPU type.
  71  * @parse_features: Callback to parse command line arguments.
  72  * @reset: Callback to reset the #CPUState to its initial state.
  73  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  74  * @has_work: Callback for checking if there is work to do.
  75  * @do_interrupt: Callback for interrupt handling.
  76  * @do_unassigned_access: Callback for unassigned access handling.
  77  * @memory_rw_debug: Callback for GDB memory access.
  78  * @dump_state: Callback for dumping state.
  79  * @dump_statistics: Callback for dumping statistics.
  80  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  81  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  82  * @get_memory_mapping: Callback for obtaining the memory mappings.
  83  * @set_pc: Callback for setting the Program Counter register.
  84  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  85  * #TranslationBlock.
  86  * @handle_mmu_fault: Callback for handling an MMU fault.
  87  * @get_phys_page_debug: Callback for obtaining a physical address.
  88  * @gdb_read_register: Callback for letting GDB read a register.
  89  * @gdb_write_register: Callback for letting GDB write a register.
  90  * @vmsd: State description for migration.
  91  * @gdb_num_core_regs: Number of core registers accessible to GDB.
  92  * @gdb_core_xml_file: File name for core registers GDB XML description.
  93  *
  94  * Represents a CPU family or model.
  95  */
  96 typedef struct CPUClass {
  97     /*< private >*/
  98     DeviceClass parent_class;
  99     /*< public >*/
 100
 101     ObjectClass *(*class_by_name)(const char *cpu_model);
 102     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 103
 104     void (*reset)(CPUState *cpu);
 105     int reset_dump_flags;
 106     bool (*has_work)(CPUState *cpu);
 107     void (*do_interrupt)(CPUState *cpu);
 108     CPUUnassignedAccess do_unassigned_access;
 109     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 110                            uint8_t *buf, int len, bool is_write);
 111     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 112                        int flags);
 113     void (*dump_statistics)(CPUState *cpu, FILE *f,
 114                             fprintf_function cpu_fprintf, int flags);
 115     int64_t (*get_arch_id)(CPUState *cpu);
 116     bool (*get_paging_enabled)(const CPUState *cpu);
 117     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 118                                Error **errp);
 119     void (*set_pc)(CPUState *cpu, vaddr value);
 120     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 121     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 122                             int mmu_index);
 123     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 124     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 125     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 126
 127     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 128                             int cpuid, void *opaque);
 129     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 130                                 void *opaque);
 131     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 132                             int cpuid, void *opaque);
 133     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 134                                 void *opaque);
 135
 136     const struct VMStateDescription *vmsd;
 137     int gdb_num_core_regs;
 138     const char *gdb_core_xml_file;
 139 } CPUClass;
 140
 141 struct KVMState;
 142 struct kvm_run;
 143
 144 /**
 145  * CPUState:
 146  * @cpu_index: CPU index (informative).
 147  * @nr_cores: Number of cores within this CPU package.
 148  * @nr_threads: Number of threads within this CPU.
 149  * @numa_node: NUMA node this CPU is belonging to.
 150  * @host_tid: Host thread ID.
 151  * @running: #true if CPU is currently running (usermode).
 152  * @created: Indicates whether the CPU thread has been successfully created.
 153  * @interrupt_request: Indicates a pending interrupt request.
 154  * @halted: Nonzero if the CPU is in suspended state.
 155  * @stop: Indicates a pending stop request.
 156  * @stopped: Indicates the CPU has been artificially stopped.
 157  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 158  *           CPU and return to its top level loop.
 159  * @singlestep_enabled: Flags for single-stepping.
 160  * @can_do_io: Nonzero if memory-mapped IO is safe.
 161  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 162  * @current_tb: Currently executing TB.
 163  * @gdb_regs: Additional GDB registers.
 164  * @gdb_num_regs: Number of total registers accessible to GDB.
 165  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 166  * @next_cpu: Next CPU sharing TB cache.
 167  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 168  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 169  * @kvm_fd: vCPU file descriptor for KVM.
 170  *
 171  * State of one CPU core or thread.
 172  */
 173 struct CPUState {
 174     /*< private >*/
 175     DeviceState parent_obj;
 176     /*< public >*/
 177
 178     int nr_cores;
 179     int nr_threads;
 180     int numa_node;
 181
 182     struct QemuThread *thread;
 183 #ifdef _WIN32
 184     HANDLE hThread;
 185 #endif
 186     int thread_id;
 187     uint32_t host_tid;
 188     bool running;
 189     struct QemuCond *halt_cond;
 190     struct qemu_work_item *queued_work_first, *queued_work_last;
 191     bool thread_kicked;
 192     bool created;
 193     bool stop;
 194     bool stopped;
 195     volatile sig_atomic_t exit_request;
 196     volatile sig_atomic_t tcg_exit_req;
 197     uint32_t interrupt_request;
 198     int singlestep_enabled;
 199
 200     AddressSpace *as;
 201     MemoryListener *tcg_as_listener;
 202
 203     void *env_ptr; /* CPUArchState */
 204     struct TranslationBlock *current_tb;
 205     struct GDBRegisterState *gdb_regs;
 206     int gdb_num_regs;
 207     int gdb_num_g_regs;
 208     QTAILQ_ENTRY(CPUState) node;
 209
 210     /* In order to avoid passing too many arguments to the MMIO helpers,
 211      * we store some rarely used information in the CPU context.
 212      */
 213     uintptr_t mem_io_pc;
 214     vaddr mem_io_vaddr;
 215
 216     int kvm_fd;
 217     bool kvm_vcpu_dirty;
 218     struct KVMState *kvm_state;
 219     struct kvm_run *kvm_run;
 220
 221     /* TODO Move common fields from CPUArchState here. */
 222     int cpu_index; /* used by alpha TCG */
 223     uint32_t halted; /* used by alpha, cris, ppc TCG */
 224     uint32_t can_do_io;
 225 };
 226
 227 QTAILQ_HEAD(CPUTailQ, CPUState);
 228 extern struct CPUTailQ cpus;
 229 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 230 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 231 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 232     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 233 #define first_cpu QTAILQ_FIRST(&cpus)
 234
 235 DECLARE_TLS(CPUState *, current_cpu);
 236 #define current_cpu tls_var(current_cpu)
 237
 238 /**
 239  * cpu_paging_enabled:
 240  * @cpu: The CPU whose state is to be inspected.
 241  *
 242  * Returns: %true if paging is enabled, %false otherwise.
 243  */
 244 bool cpu_paging_enabled(const CPUState *cpu);
 245
 246 /**
 247  * cpu_get_memory_mapping:
 248  * @cpu: The CPU whose memory mappings are to be obtained.
 249  * @list: Where to write the memory mappings to.
 250  * @errp: Pointer for reporting an #Error.
 251  */
 252 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 253                             Error **errp);
 254
 255 /**
 256  * cpu_write_elf64_note:
 257  * @f: pointer to a function that writes memory to a file
 258  * @cpu: The CPU whose memory is to be dumped
 259  * @cpuid: ID number of the CPU
 260  * @opaque: pointer to the CPUState struct
 261  */
 262 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 263                          int cpuid, void *opaque);
 264
 265 /**
 266  * cpu_write_elf64_qemunote:
 267  * @f: pointer to a function that writes memory to a file
 268  * @cpu: The CPU whose memory is to be dumped
 269  * @cpuid: ID number of the CPU
 270  * @opaque: pointer to the CPUState struct
 271  */
 272 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 273                              void *opaque);
 274
 275 /**
 276  * cpu_write_elf32_note:
 277  * @f: pointer to a function that writes memory to a file
 278  * @cpu: The CPU whose memory is to be dumped
 279  * @cpuid: ID number of the CPU
 280  * @opaque: pointer to the CPUState struct
 281  */
 282 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 283                          int cpuid, void *opaque);
 284
 285 /**
 286  * cpu_write_elf32_qemunote:
 287  * @f: pointer to a function that writes memory to a file
 288  * @cpu: The CPU whose memory is to be dumped
 289  * @cpuid: ID number of the CPU
 290  * @opaque: pointer to the CPUState struct
 291  */
 292 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 293                              void *opaque);
 294
 295 /**
 296  * CPUDumpFlags:
 297  * @CPU_DUMP_CODE:
 298  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 299  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 300  */
 301 enum CPUDumpFlags {
 302     CPU_DUMP_CODE = 0x00010000,
 303     CPU_DUMP_FPU  = 0x00020000,
 304     CPU_DUMP_CCOP = 0x00040000,
 305 };
 306
 307 /**
 308  * cpu_dump_state:
 309  * @cpu: The CPU whose state is to be dumped.
 310  * @f: File to dump to.
 311  * @cpu_fprintf: Function to dump with.
 312  * @flags: Flags what to dump.
 313  *
 314  * Dumps CPU state.
 315  */
 316 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 317                     int flags);
 318
 319 /**
 320  * cpu_dump_statistics:
 321  * @cpu: The CPU whose state is to be dumped.
 322  * @f: File to dump to.
 323  * @cpu_fprintf: Function to dump with.
 324  * @flags: Flags what to dump.
 325  *
 326  * Dumps CPU statistics.
 327  */
 328 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 329                          int flags);
 330
 331 #ifndef CONFIG_USER_ONLY
 332 /**
 333  * cpu_get_phys_page_debug:
 334  * @cpu: The CPU to obtain the physical page address for.
 335  * @addr: The virtual address.
 336  *
 337  * Obtains the physical page corresponding to a virtual one.
 338  * Use it only for debugging because no protection checks are done.
 339  *
 340  * Returns: Corresponding physical page address or -1 if no page found.
 341  */
 342 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 343 {
 344     CPUClass *cc = CPU_GET_CLASS(cpu);
 345
 346     return cc->get_phys_page_debug(cpu, addr);
 347 }
 348 #endif
 349
 350 /**
 351  * cpu_reset:
 352  * @cpu: The CPU whose state is to be reset.
 353  */
 354 void cpu_reset(CPUState *cpu);
 355
 356 /**
 357  * cpu_class_by_name:
 358  * @typename: The CPU base type.
 359  * @cpu_model: The model string without any parameters.
 360  *
 361  * Looks up a CPU #ObjectClass matching name @cpu_model.
 362  *
 363  * Returns: A #CPUClass or %NULL if not matching class is found.
 364  */
 365 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 366
 367 /**
 368  * cpu_generic_init:
 369  * @typename: The CPU base type.
 370  * @cpu_model: The model string including optional parameters.
 371  *
 372  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 373  *
 374  * Returns: A #CPUState or %NULL if an error occurred.
 375  */
 376 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 377
 378 /**
 379  * cpu_has_work:
 380  * @cpu: The vCPU to check.
 381  *
 382  * Checks whether the CPU has work to do.
 383  *
 384  * Returns: %true if the CPU has work, %false otherwise.
 385  */
 386 static inline bool cpu_has_work(CPUState *cpu)
 387 {
 388     CPUClass *cc = CPU_GET_CLASS(cpu);
 389
 390     g_assert(cc->has_work);
 391     return cc->has_work(cpu);
 392 }
 393
 394 /**
 395  * qemu_cpu_is_self:
 396  * @cpu: The vCPU to check against.
 397  *
 398  * Checks whether the caller is executing on the vCPU thread.
 399  *
 400  * Returns: %true if called from @cpu's thread, %false otherwise.
 401  */
 402 bool qemu_cpu_is_self(CPUState *cpu);
 403
 404 /**
 405  * qemu_cpu_kick:
 406  * @cpu: The vCPU to kick.
 407  *
 408  * Kicks @cpu's thread.
 409  */
 410 void qemu_cpu_kick(CPUState *cpu);
 411
 412 /**
 413  * cpu_is_stopped:
 414  * @cpu: The CPU to check.
 415  *
 416  * Checks whether the CPU is stopped.
 417  *
 418  * Returns: %true if run state is not running or if artificially stopped;
 419  * %false otherwise.
 420  */
 421 bool cpu_is_stopped(CPUState *cpu);
 422
 423 /**
 424  * run_on_cpu:
 425  * @cpu: The vCPU to run on.
 426  * @func: The function to be executed.
 427  * @data: Data to pass to the function.
 428  *
 429  * Schedules the function @func for execution on the vCPU @cpu.
 430  */
 431 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 432
 433 /**
 434  * async_run_on_cpu:
 435  * @cpu: The vCPU to run on.
 436  * @func: The function to be executed.
 437  * @data: Data to pass to the function.
 438  *
 439  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 440  */
 441 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 442
 443 /**
 444  * qemu_get_cpu:
 445  * @index: The CPUState@cpu_index value of the CPU to obtain.
 446  *
 447  * Gets a CPU matching @index.
 448  *
 449  * Returns: The CPU or %NULL if there is no matching CPU.
 450  */
 451 CPUState *qemu_get_cpu(int index);
 452
 453 /**
 454  * cpu_exists:
 455  * @id: Guest-exposed CPU ID to lookup.
 456  *
 457  * Search for CPU with specified ID.
 458  *
 459  * Returns: %true - CPU is found, %false - CPU isn't found.
 460  */
 461 bool cpu_exists(int64_t id);
 462
 463 #ifndef CONFIG_USER_ONLY
 464
 465 typedef void (*CPUInterruptHandler)(CPUState *, int);
 466
 467 extern CPUInterruptHandler cpu_interrupt_handler;
 468
 469 /**
 470  * cpu_interrupt:
 471  * @cpu: The CPU to set an interrupt on.
 472  * @mask: The interupts to set.
 473  *
 474  * Invokes the interrupt handler.
 475  */
 476 static inline void cpu_interrupt(CPUState *cpu, int mask)
 477 {
 478     cpu_interrupt_handler(cpu, mask);
 479 }
 480
 481 #else /* USER_ONLY */
 482
 483 void cpu_interrupt(CPUState *cpu, int mask);
 484
 485 #endif /* USER_ONLY */
 486
 487 #ifndef CONFIG_USER_ONLY
 488
 489 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 490                                          bool is_write, bool is_exec,
 491                                          int opaque, unsigned size)
 492 {
 493     CPUClass *cc = CPU_GET_CLASS(cpu);
 494
 495     if (cc->do_unassigned_access) {
 496         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 497     }
 498 }
 499
 500 #endif
 501
 502 /**
 503  * cpu_reset_interrupt:
 504  * @cpu: The CPU to clear the interrupt on.
 505  * @mask: The interrupt mask to clear.
 506  *
 507  * Resets interrupts on the vCPU @cpu.
 508  */
 509 void cpu_reset_interrupt(CPUState *cpu, int mask);
 510
 511 /**
 512  * cpu_exit:
 513  * @cpu: The CPU to exit.
 514  *
 515  * Requests the CPU @cpu to exit execution.
 516  */
 517 void cpu_exit(CPUState *cpu);
 518
 519 /**
 520  * cpu_resume:
 521  * @cpu: The CPU to resume.
 522  *
 523  * Resumes CPU, i.e. puts CPU into runnable state.
 524  */
 525 void cpu_resume(CPUState *cpu);
 526
 527 /**
 528  * qemu_init_vcpu:
 529  * @cpu: The vCPU to initialize.
 530  *
 531  * Initializes a vCPU.
 532  */
 533 void qemu_init_vcpu(CPUState *cpu);
 534
 535 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 536 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 537 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 538
 539 /**
 540  * cpu_single_step:
 541  * @cpu: CPU to the flags for.
 542  * @enabled: Flags to enable.
 543  *
 544  * Enables or disables single-stepping for @cpu.
 545  */
 546 void cpu_single_step(CPUState *cpu, int enabled);
 547
 548 #ifdef CONFIG_SOFTMMU
 549 extern const struct VMStateDescription vmstate_cpu_common;
 550 #else
 551 #define vmstate_cpu_common vmstate_dummy
 552 #endif
 553
 554 #define VMSTATE_CPU() {                                                     \
 555     .name = "parent_obj",                                                   \
 556     .size = sizeof(CPUState),                                               \
 557     .vmsd = &vmstate_cpu_common,                                            \
 558     .flags = VMS_STRUCT,                                                    \
 559     .offset = 0,                                                            \
 560 }
 561
 562 #endif