include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include <setjmp.h>
  25 #include "hw/qdev-core.h"
  26 #include "exec/hwaddr.h"
  27 #include "qemu/queue.h"
  28 #include "qemu/thread.h"
  29 #include "qemu/tls.h"
  30 #include "qemu/typedefs.h"
  31
  32 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  33                                      void *opaque);
  34
  35 /**
  36  * vaddr:
  37  * Type wide enough to contain any #target_ulong virtual address.
  38  */
  39 typedef uint64_t vaddr;
  40 #define VADDR_PRId PRId64
  41 #define VADDR_PRIu PRIu64
  42 #define VADDR_PRIo PRIo64
  43 #define VADDR_PRIx PRIx64
  44 #define VADDR_PRIX PRIX64
  45 #define VADDR_MAX UINT64_MAX
  46
  47 /**
  48  * SECTION:cpu
  49  * @section_id: QEMU-cpu
  50  * @title: CPU Class
  51  * @short_description: Base class for all CPUs
  52  */
  53
  54 #define TYPE_CPU "cpu"
  55
  56 #define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
  57 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  58 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  59
  60 typedef struct CPUState CPUState;
  61
  62 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  63                                     bool is_write, bool is_exec, int opaque,
  64                                     unsigned size);
  65
  66 struct TranslationBlock;
  67
  68 /**
  69  * CPUClass:
  70  * @class_by_name: Callback to map -cpu command line model name to an
  71  * instantiatable CPU type.
  72  * @parse_features: Callback to parse command line arguments.
  73  * @reset: Callback to reset the #CPUState to its initial state.
  74  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  75  * @has_work: Callback for checking if there is work to do.
  76  * @do_interrupt: Callback for interrupt handling.
  77  * @do_unassigned_access: Callback for unassigned access handling.
  78  * @memory_rw_debug: Callback for GDB memory access.
  79  * @dump_state: Callback for dumping state.
  80  * @dump_statistics: Callback for dumping statistics.
  81  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  82  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  83  * @get_memory_mapping: Callback for obtaining the memory mappings.
  84  * @set_pc: Callback for setting the Program Counter register.
  85  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  86  * #TranslationBlock.
  87  * @handle_mmu_fault: Callback for handling an MMU fault.
  88  * @get_phys_page_debug: Callback for obtaining a physical address.
  89  * @gdb_read_register: Callback for letting GDB read a register.
  90  * @gdb_write_register: Callback for letting GDB write a register.
  91  * @vmsd: State description for migration.
  92  * @gdb_num_core_regs: Number of core registers accessible to GDB.
  93  * @gdb_core_xml_file: File name for core registers GDB XML description.
  94  *
  95  * Represents a CPU family or model.
  96  */
  97 typedef struct CPUClass {
  98     /*< private >*/
  99     DeviceClass parent_class;
 100     /*< public >*/
 101
 102     ObjectClass *(*class_by_name)(const char *cpu_model);
 103     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 104
 105     void (*reset)(CPUState *cpu);
 106     int reset_dump_flags;
 107     bool (*has_work)(CPUState *cpu);
 108     void (*do_interrupt)(CPUState *cpu);
 109     CPUUnassignedAccess do_unassigned_access;
 110     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 111                            uint8_t *buf, int len, bool is_write);
 112     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 113                        int flags);
 114     void (*dump_statistics)(CPUState *cpu, FILE *f,
 115                             fprintf_function cpu_fprintf, int flags);
 116     int64_t (*get_arch_id)(CPUState *cpu);
 117     bool (*get_paging_enabled)(const CPUState *cpu);
 118     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 119                                Error **errp);
 120     void (*set_pc)(CPUState *cpu, vaddr value);
 121     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 122     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 123                             int mmu_index);
 124     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 125     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 126     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 127
 128     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 129                             int cpuid, void *opaque);
 130     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 131                                 void *opaque);
 132     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 133                             int cpuid, void *opaque);
 134     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 135                                 void *opaque);
 136
 137     const struct VMStateDescription *vmsd;
 138     int gdb_num_core_regs;
 139     const char *gdb_core_xml_file;
 140 } CPUClass;
 141
 142 #ifdef HOST_WORDS_BIGENDIAN
 143 typedef struct icount_decr_u16 {
 144     uint16_t high;
 145     uint16_t low;
 146 } icount_decr_u16;
 147 #else
 148 typedef struct icount_decr_u16 {
 149     uint16_t low;
 150     uint16_t high;
 151 } icount_decr_u16;
 152 #endif
 153
 154 typedef struct CPUBreakpoint {
 155     vaddr pc;
 156     int flags; /* BP_* */
 157     QTAILQ_ENTRY(CPUBreakpoint) entry;
 158 } CPUBreakpoint;
 159
 160 typedef struct CPUWatchpoint {
 161     vaddr vaddr;
 162     vaddr len_mask;
 163     int flags; /* BP_* */
 164     QTAILQ_ENTRY(CPUWatchpoint) entry;
 165 } CPUWatchpoint;
 166
 167 struct KVMState;
 168 struct kvm_run;
 169
 170 #define TB_JMP_CACHE_BITS 12
 171 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
 172
 173 /**
 174  * CPUState:
 175  * @cpu_index: CPU index (informative).
 176  * @nr_cores: Number of cores within this CPU package.
 177  * @nr_threads: Number of threads within this CPU.
 178  * @numa_node: NUMA node this CPU is belonging to.
 179  * @host_tid: Host thread ID.
 180  * @running: #true if CPU is currently running (usermode).
 181  * @created: Indicates whether the CPU thread has been successfully created.
 182  * @interrupt_request: Indicates a pending interrupt request.
 183  * @halted: Nonzero if the CPU is in suspended state.
 184  * @stop: Indicates a pending stop request.
 185  * @stopped: Indicates the CPU has been artificially stopped.
 186  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 187  *           CPU and return to its top level loop.
 188  * @singlestep_enabled: Flags for single-stepping.
 189  * @icount_extra: Instructions until next timer event.
 190  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 191  * This allows a single read-compare-cbranch-write sequence to test
 192  * for both decrementer underflow and exceptions.
 193  * @can_do_io: Nonzero if memory-mapped IO is safe.
 194  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 195  * @current_tb: Currently executing TB.
 196  * @gdb_regs: Additional GDB registers.
 197  * @gdb_num_regs: Number of total registers accessible to GDB.
 198  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 199  * @next_cpu: Next CPU sharing TB cache.
 200  * @opaque: User data.
 201  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 202  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 203  * @kvm_fd: vCPU file descriptor for KVM.
 204  *
 205  * State of one CPU core or thread.
 206  */
 207 struct CPUState {
 208     /*< private >*/
 209     DeviceState parent_obj;
 210     /*< public >*/
 211
 212     int nr_cores;
 213     int nr_threads;
 214     int numa_node;
 215
 216     struct QemuThread *thread;
 217 #ifdef _WIN32
 218     HANDLE hThread;
 219 #endif
 220     int thread_id;
 221     uint32_t host_tid;
 222     bool running;
 223     struct QemuCond *halt_cond;
 224     struct qemu_work_item *queued_work_first, *queued_work_last;
 225     bool thread_kicked;
 226     bool created;
 227     bool stop;
 228     bool stopped;
 229     volatile sig_atomic_t exit_request;
 230     uint32_t interrupt_request;
 231     int singlestep_enabled;
 232     int64_t icount_extra;
 233     sigjmp_buf jmp_env;
 234
 235     AddressSpace *as;
 236     MemoryListener *tcg_as_listener;
 237
 238     void *env_ptr; /* CPUArchState */
 239     struct TranslationBlock *current_tb;
 240     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
 241     struct GDBRegisterState *gdb_regs;
 242     int gdb_num_regs;
 243     int gdb_num_g_regs;
 244     QTAILQ_ENTRY(CPUState) node;
 245
 246     /* ice debug support */
 247     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
 248
 249     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
 250     CPUWatchpoint *watchpoint_hit;
 251
 252     void *opaque;
 253
 254     /* In order to avoid passing too many arguments to the MMIO helpers,
 255      * we store some rarely used information in the CPU context.
 256      */
 257     uintptr_t mem_io_pc;
 258     vaddr mem_io_vaddr;
 259
 260     int kvm_fd;
 261     bool kvm_vcpu_dirty;
 262     struct KVMState *kvm_state;
 263     struct kvm_run *kvm_run;
 264
 265     /* TODO Move common fields from CPUArchState here. */
 266     int cpu_index; /* used by alpha TCG */
 267     uint32_t halted; /* used by alpha, cris, ppc TCG */
 268     union {
 269         uint32_t u32;
 270         icount_decr_u16 u16;
 271     } icount_decr;
 272     uint32_t can_do_io;
 273     int32_t exception_index; /* used by m68k TCG */
 274
 275     /* Note that this is accessed at the start of every TB via a negative
 276        offset from AREG0.  Leave this field at the end so as to make the
 277        (absolute value) offset as small as possible.  This reduces code
 278        size, especially for hosts without large memory offsets.  */
 279     volatile sig_atomic_t tcg_exit_req;
 280 };
 281
 282 QTAILQ_HEAD(CPUTailQ, CPUState);
 283 extern struct CPUTailQ cpus;
 284 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 285 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 286 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 287     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 288 #define first_cpu QTAILQ_FIRST(&cpus)
 289
 290 DECLARE_TLS(CPUState *, current_cpu);
 291 #define current_cpu tls_var(current_cpu)
 292
 293 /**
 294  * cpu_paging_enabled:
 295  * @cpu: The CPU whose state is to be inspected.
 296  *
 297  * Returns: %true if paging is enabled, %false otherwise.
 298  */
 299 bool cpu_paging_enabled(const CPUState *cpu);
 300
 301 /**
 302  * cpu_get_memory_mapping:
 303  * @cpu: The CPU whose memory mappings are to be obtained.
 304  * @list: Where to write the memory mappings to.
 305  * @errp: Pointer for reporting an #Error.
 306  */
 307 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 308                             Error **errp);
 309
 310 /**
 311  * cpu_write_elf64_note:
 312  * @f: pointer to a function that writes memory to a file
 313  * @cpu: The CPU whose memory is to be dumped
 314  * @cpuid: ID number of the CPU
 315  * @opaque: pointer to the CPUState struct
 316  */
 317 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 318                          int cpuid, void *opaque);
 319
 320 /**
 321  * cpu_write_elf64_qemunote:
 322  * @f: pointer to a function that writes memory to a file
 323  * @cpu: The CPU whose memory is to be dumped
 324  * @cpuid: ID number of the CPU
 325  * @opaque: pointer to the CPUState struct
 326  */
 327 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 328                              void *opaque);
 329
 330 /**
 331  * cpu_write_elf32_note:
 332  * @f: pointer to a function that writes memory to a file
 333  * @cpu: The CPU whose memory is to be dumped
 334  * @cpuid: ID number of the CPU
 335  * @opaque: pointer to the CPUState struct
 336  */
 337 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 338                          int cpuid, void *opaque);
 339
 340 /**
 341  * cpu_write_elf32_qemunote:
 342  * @f: pointer to a function that writes memory to a file
 343  * @cpu: The CPU whose memory is to be dumped
 344  * @cpuid: ID number of the CPU
 345  * @opaque: pointer to the CPUState struct
 346  */
 347 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 348                              void *opaque);
 349
 350 /**
 351  * CPUDumpFlags:
 352  * @CPU_DUMP_CODE:
 353  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 354  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 355  */
 356 enum CPUDumpFlags {
 357     CPU_DUMP_CODE = 0x00010000,
 358     CPU_DUMP_FPU  = 0x00020000,
 359     CPU_DUMP_CCOP = 0x00040000,
 360 };
 361
 362 /**
 363  * cpu_dump_state:
 364  * @cpu: The CPU whose state is to be dumped.
 365  * @f: File to dump to.
 366  * @cpu_fprintf: Function to dump with.
 367  * @flags: Flags what to dump.
 368  *
 369  * Dumps CPU state.
 370  */
 371 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 372                     int flags);
 373
 374 /**
 375  * cpu_dump_statistics:
 376  * @cpu: The CPU whose state is to be dumped.
 377  * @f: File to dump to.
 378  * @cpu_fprintf: Function to dump with.
 379  * @flags: Flags what to dump.
 380  *
 381  * Dumps CPU statistics.
 382  */
 383 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 384                          int flags);
 385
 386 #ifndef CONFIG_USER_ONLY
 387 /**
 388  * cpu_get_phys_page_debug:
 389  * @cpu: The CPU to obtain the physical page address for.
 390  * @addr: The virtual address.
 391  *
 392  * Obtains the physical page corresponding to a virtual one.
 393  * Use it only for debugging because no protection checks are done.
 394  *
 395  * Returns: Corresponding physical page address or -1 if no page found.
 396  */
 397 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 398 {
 399     CPUClass *cc = CPU_GET_CLASS(cpu);
 400
 401     return cc->get_phys_page_debug(cpu, addr);
 402 }
 403 #endif
 404
 405 /**
 406  * cpu_reset:
 407  * @cpu: The CPU whose state is to be reset.
 408  */
 409 void cpu_reset(CPUState *cpu);
 410
 411 /**
 412  * cpu_class_by_name:
 413  * @typename: The CPU base type.
 414  * @cpu_model: The model string without any parameters.
 415  *
 416  * Looks up a CPU #ObjectClass matching name @cpu_model.
 417  *
 418  * Returns: A #CPUClass or %NULL if not matching class is found.
 419  */
 420 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 421
 422 /**
 423  * cpu_generic_init:
 424  * @typename: The CPU base type.
 425  * @cpu_model: The model string including optional parameters.
 426  *
 427  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 428  *
 429  * Returns: A #CPUState or %NULL if an error occurred.
 430  */
 431 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 432
 433 /**
 434  * cpu_has_work:
 435  * @cpu: The vCPU to check.
 436  *
 437  * Checks whether the CPU has work to do.
 438  *
 439  * Returns: %true if the CPU has work, %false otherwise.
 440  */
 441 static inline bool cpu_has_work(CPUState *cpu)
 442 {
 443     CPUClass *cc = CPU_GET_CLASS(cpu);
 444
 445     g_assert(cc->has_work);
 446     return cc->has_work(cpu);
 447 }
 448
 449 /**
 450  * qemu_cpu_is_self:
 451  * @cpu: The vCPU to check against.
 452  *
 453  * Checks whether the caller is executing on the vCPU thread.
 454  *
 455  * Returns: %true if called from @cpu's thread, %false otherwise.
 456  */
 457 bool qemu_cpu_is_self(CPUState *cpu);
 458
 459 /**
 460  * qemu_cpu_kick:
 461  * @cpu: The vCPU to kick.
 462  *
 463  * Kicks @cpu's thread.
 464  */
 465 void qemu_cpu_kick(CPUState *cpu);
 466
 467 /**
 468  * cpu_is_stopped:
 469  * @cpu: The CPU to check.
 470  *
 471  * Checks whether the CPU is stopped.
 472  *
 473  * Returns: %true if run state is not running or if artificially stopped;
 474  * %false otherwise.
 475  */
 476 bool cpu_is_stopped(CPUState *cpu);
 477
 478 /**
 479  * run_on_cpu:
 480  * @cpu: The vCPU to run on.
 481  * @func: The function to be executed.
 482  * @data: Data to pass to the function.
 483  *
 484  * Schedules the function @func for execution on the vCPU @cpu.
 485  */
 486 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 487
 488 /**
 489  * async_run_on_cpu:
 490  * @cpu: The vCPU to run on.
 491  * @func: The function to be executed.
 492  * @data: Data to pass to the function.
 493  *
 494  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 495  */
 496 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 497
 498 /**
 499  * qemu_get_cpu:
 500  * @index: The CPUState@cpu_index value of the CPU to obtain.
 501  *
 502  * Gets a CPU matching @index.
 503  *
 504  * Returns: The CPU or %NULL if there is no matching CPU.
 505  */
 506 CPUState *qemu_get_cpu(int index);
 507
 508 /**
 509  * cpu_exists:
 510  * @id: Guest-exposed CPU ID to lookup.
 511  *
 512  * Search for CPU with specified ID.
 513  *
 514  * Returns: %true - CPU is found, %false - CPU isn't found.
 515  */
 516 bool cpu_exists(int64_t id);
 517
 518 #ifndef CONFIG_USER_ONLY
 519
 520 typedef void (*CPUInterruptHandler)(CPUState *, int);
 521
 522 extern CPUInterruptHandler cpu_interrupt_handler;
 523
 524 /**
 525  * cpu_interrupt:
 526  * @cpu: The CPU to set an interrupt on.
 527  * @mask: The interupts to set.
 528  *
 529  * Invokes the interrupt handler.
 530  */
 531 static inline void cpu_interrupt(CPUState *cpu, int mask)
 532 {
 533     cpu_interrupt_handler(cpu, mask);
 534 }
 535
 536 #else /* USER_ONLY */
 537
 538 void cpu_interrupt(CPUState *cpu, int mask);
 539
 540 #endif /* USER_ONLY */
 541
 542 #ifndef CONFIG_USER_ONLY
 543
 544 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 545                                          bool is_write, bool is_exec,
 546                                          int opaque, unsigned size)
 547 {
 548     CPUClass *cc = CPU_GET_CLASS(cpu);
 549
 550     if (cc->do_unassigned_access) {
 551         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 552     }
 553 }
 554
 555 #endif
 556
 557 /**
 558  * cpu_reset_interrupt:
 559  * @cpu: The CPU to clear the interrupt on.
 560  * @mask: The interrupt mask to clear.
 561  *
 562  * Resets interrupts on the vCPU @cpu.
 563  */
 564 void cpu_reset_interrupt(CPUState *cpu, int mask);
 565
 566 /**
 567  * cpu_exit:
 568  * @cpu: The CPU to exit.
 569  *
 570  * Requests the CPU @cpu to exit execution.
 571  */
 572 void cpu_exit(CPUState *cpu);
 573
 574 /**
 575  * cpu_resume:
 576  * @cpu: The CPU to resume.
 577  *
 578  * Resumes CPU, i.e. puts CPU into runnable state.
 579  */
 580 void cpu_resume(CPUState *cpu);
 581
 582 /**
 583  * qemu_init_vcpu:
 584  * @cpu: The vCPU to initialize.
 585  *
 586  * Initializes a vCPU.
 587  */
 588 void qemu_init_vcpu(CPUState *cpu);
 589
 590 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 591 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 592 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 593
 594 /**
 595  * cpu_single_step:
 596  * @cpu: CPU to the flags for.
 597  * @enabled: Flags to enable.
 598  *
 599  * Enables or disables single-stepping for @cpu.
 600  */
 601 void cpu_single_step(CPUState *cpu, int enabled);
 602
 603 /* Breakpoint/watchpoint flags */
 604 #define BP_MEM_READ           0x01
 605 #define BP_MEM_WRITE          0x02
 606 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 607 #define BP_STOP_BEFORE_ACCESS 0x04
 608 #define BP_WATCHPOINT_HIT     0x08
 609 #define BP_GDB                0x10
 610 #define BP_CPU                0x20
 611
 612 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 613                           CPUBreakpoint **breakpoint);
 614 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
 615 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
 616 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
 617
 618 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 619                           int flags, CPUWatchpoint **watchpoint);
 620 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
 621                           vaddr len, int flags);
 622 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
 623 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
 624
 625 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
 626     GCC_FMT_ATTR(2, 3);
 627
 628 #ifdef CONFIG_SOFTMMU
 629 extern const struct VMStateDescription vmstate_cpu_common;
 630 #else
 631 #define vmstate_cpu_common vmstate_dummy
 632 #endif
 633
 634 #define VMSTATE_CPU() {                                                     \
 635     .name = "parent_obj",                                                   \
 636     .size = sizeof(CPUState),                                               \
 637     .vmsd = &vmstate_cpu_common,                                            \
 638     .flags = VMS_STRUCT,                                                    \
 639     .offset = 0,                                                            \
 640 }
 641
 642 #endif