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1 /*****************************************************************************\
2 * Copyright (C) 2007-2010 Lawrence Livermore National Security, LLC.
3 * Copyright (C) 2007 The Regents of the University of California.
4 * Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
5 * Written by Brian Behlendorf <behlendorf1@llnl.gov>.
8 * This file is part of the SPL, Solaris Porting Layer.
9 * For details, see <http://zfsonlinux.org/>.
11 * The SPL is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
16 * The SPL is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
21 * You should have received a copy of the GNU General Public License along
22 * with the SPL. If not, see <http://www.gnu.org/licenses/>.
23 \*****************************************************************************/
28 #include <linux/module.h>
29 #include <linux/spinlock.h>
30 #include <sys/types.h>
32 #ifndef HAVE_ATOMIC64_CMPXCHG
33 #define atomic64_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
36 #ifndef HAVE_ATOMIC64_XCHG
37 #define atomic64_xchg(v, n) (xchg(&((v)->counter), n))
41 * Two approaches to atomic operations are implemented each with its
42 * own benefits are drawbacks imposed by the Solaris API. Neither
43 * approach handles the issue of word breaking when using a 64-bit
44 * atomic variable on a 32-bit arch. The Solaris API would need to
45 * add an atomic read call to correctly support this.
47 * When ATOMIC_SPINLOCK is defined all atomic operations will be
48 * serialized through global spin locks. This is bad for performance
49 * but it does allow a simple generic implementation.
51 * When ATOMIC_SPINLOCK is not defined the Linux atomic operations
52 * are used. This is safe as long as the core Linux implementation
53 * doesn't change because we are relying on the fact that an atomic
54 * type is really just a uint32 or uint64. If this changes at some
55 * point in the future we need to fall-back to the spin approach.
57 #ifdef ATOMIC_SPINLOCK
58 extern spinlock_t atomic32_lock
;
59 extern spinlock_t atomic64_lock
;
61 static __inline__
void
62 atomic_inc_32(volatile uint32_t *target
)
64 spin_lock(&atomic32_lock
);
66 spin_unlock(&atomic32_lock
);
69 static __inline__
void
70 atomic_dec_32(volatile uint32_t *target
)
72 spin_lock(&atomic32_lock
);
74 spin_unlock(&atomic32_lock
);
77 static __inline__
void
78 atomic_add_32(volatile uint32_t *target
, int32_t delta
)
80 spin_lock(&atomic32_lock
);
82 spin_unlock(&atomic32_lock
);
85 static __inline__
void
86 atomic_sub_32(volatile uint32_t *target
, int32_t delta
)
88 spin_lock(&atomic32_lock
);
90 spin_unlock(&atomic32_lock
);
93 static __inline__
uint32_t
94 atomic_inc_32_nv(volatile uint32_t *target
)
98 spin_lock(&atomic32_lock
);
100 spin_unlock(&atomic32_lock
);
105 static __inline__
uint32_t
106 atomic_dec_32_nv(volatile uint32_t *target
)
110 spin_lock(&atomic32_lock
);
112 spin_unlock(&atomic32_lock
);
117 static __inline__
uint32_t
118 atomic_add_32_nv(volatile uint32_t *target
, uint32_t delta
)
122 spin_lock(&atomic32_lock
);
125 spin_unlock(&atomic32_lock
);
130 static __inline__
uint32_t
131 atomic_sub_32_nv(volatile uint32_t *target
, uint32_t delta
)
135 spin_lock(&atomic32_lock
);
138 spin_unlock(&atomic32_lock
);
143 static __inline__
uint32_t
144 atomic_cas_32(volatile uint32_t *target
, uint32_t cmp
,
149 spin_lock(&atomic32_lock
);
154 spin_unlock(&atomic32_lock
);
159 static __inline__
void
160 atomic_inc_64(volatile uint64_t *target
)
162 spin_lock(&atomic64_lock
);
164 spin_unlock(&atomic64_lock
);
167 static __inline__
void
168 atomic_dec_64(volatile uint64_t *target
)
170 spin_lock(&atomic64_lock
);
172 spin_unlock(&atomic64_lock
);
175 static __inline__
void
176 atomic_add_64(volatile uint64_t *target
, uint64_t delta
)
178 spin_lock(&atomic64_lock
);
180 spin_unlock(&atomic64_lock
);
183 static __inline__
void
184 atomic_sub_64(volatile uint64_t *target
, uint64_t delta
)
186 spin_lock(&atomic64_lock
);
188 spin_unlock(&atomic64_lock
);
191 static __inline__
uint64_t
192 atomic_inc_64_nv(volatile uint64_t *target
)
196 spin_lock(&atomic64_lock
);
198 spin_unlock(&atomic64_lock
);
203 static __inline__
uint64_t
204 atomic_dec_64_nv(volatile uint64_t *target
)
208 spin_lock(&atomic64_lock
);
210 spin_unlock(&atomic64_lock
);
215 static __inline__
uint64_t
216 atomic_add_64_nv(volatile uint64_t *target
, uint64_t delta
)
220 spin_lock(&atomic64_lock
);
223 spin_unlock(&atomic64_lock
);
228 static __inline__
uint64_t
229 atomic_sub_64_nv(volatile uint64_t *target
, uint64_t delta
)
233 spin_lock(&atomic64_lock
);
236 spin_unlock(&atomic64_lock
);
241 static __inline__
uint64_t
242 atomic_cas_64(volatile uint64_t *target
, uint64_t cmp
,
247 spin_lock(&atomic64_lock
);
251 spin_unlock(&atomic64_lock
);
257 #else /* ATOMIC_SPINLOCK */
259 #define atomic_inc_32(v) atomic_inc((atomic_t *)(v))
260 #define atomic_dec_32(v) atomic_dec((atomic_t *)(v))
261 #define atomic_add_32(v, i) atomic_add((i), (atomic_t *)(v))
262 #define atomic_sub_32(v, i) atomic_sub((i), (atomic_t *)(v))
263 #define atomic_inc_32_nv(v) atomic_inc_return((atomic_t *)(v))
264 #define atomic_dec_32_nv(v) atomic_dec_return((atomic_t *)(v))
265 #define atomic_add_32_nv(v, i) atomic_add_return((i), (atomic_t *)(v))
266 #define atomic_sub_32_nv(v, i) atomic_sub_return((i), (atomic_t *)(v))
267 #define atomic_cas_32(v, x, y) atomic_cmpxchg((atomic_t *)(v), x, y)
268 #define atomic_inc_64(v) atomic64_inc((atomic64_t *)(v))
269 #define atomic_dec_64(v) atomic64_dec((atomic64_t *)(v))
270 #define atomic_add_64(v, i) atomic64_add((i), (atomic64_t *)(v))
271 #define atomic_sub_64(v, i) atomic64_sub((i), (atomic64_t *)(v))
272 #define atomic_inc_64_nv(v) atomic64_inc_return((atomic64_t *)(v))
273 #define atomic_dec_64_nv(v) atomic64_dec_return((atomic64_t *)(v))
274 #define atomic_add_64_nv(v, i) atomic64_add_return((i), (atomic64_t *)(v))
275 #define atomic_sub_64_nv(v, i) atomic64_sub_return((i), (atomic64_t *)(v))
276 #define atomic_cas_64(v, x, y) atomic64_cmpxchg((atomic64_t *)(v), x, y)
278 #endif /* ATOMIC_SPINLOCK */
281 static __inline__
void *
282 atomic_cas_ptr(volatile void *target
, void *cmp
, void *newval
)
284 return (void *)atomic_cas_64((volatile uint64_t *)target
,
285 (uint64_t)cmp
, (uint64_t)newval
);
288 static __inline__
void *
289 atomic_cas_ptr(volatile void *target
, void *cmp
, void *newval
)
291 return (void *)atomic_cas_32((volatile uint32_t *)target
,
292 (uint32_t)cmp
, (uint32_t)newval
);
296 #endif /* _SPL_ATOMIC_H */