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1 /*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13 #include <linux/irq.h>
14 #include <linux/msi.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/irqdomain.h>
19
20 #include <trace/events/irq.h>
21
22 #include "internals.h"
23
24 static irqreturn_t bad_chained_irq(int irq, void *dev_id)
25 {
26 WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
27 return IRQ_NONE;
28 }
29
30 /*
31 * Chained handlers should never call action on their IRQ. This default
32 * action will emit warning if such thing happens.
33 */
34 struct irqaction chained_action = {
35 .handler = bad_chained_irq,
36 };
37
38 /**
39 * irq_set_chip - set the irq chip for an irq
40 * @irq: irq number
41 * @chip: pointer to irq chip description structure
42 */
43 int irq_set_chip(unsigned int irq, struct irq_chip *chip)
44 {
45 unsigned long flags;
46 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
47
48 if (!desc)
49 return -EINVAL;
50
51 if (!chip)
52 chip = &no_irq_chip;
53
54 desc->irq_data.chip = chip;
55 irq_put_desc_unlock(desc, flags);
56 /*
57 * For !CONFIG_SPARSE_IRQ make the irq show up in
58 * allocated_irqs.
59 */
60 irq_mark_irq(irq);
61 return 0;
62 }
63 EXPORT_SYMBOL(irq_set_chip);
64
65 /**
66 * irq_set_type - set the irq trigger type for an irq
67 * @irq: irq number
68 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
69 */
70 int irq_set_irq_type(unsigned int irq, unsigned int type)
71 {
72 unsigned long flags;
73 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
74 int ret = 0;
75
76 if (!desc)
77 return -EINVAL;
78
79 type &= IRQ_TYPE_SENSE_MASK;
80 ret = __irq_set_trigger(desc, type);
81 irq_put_desc_busunlock(desc, flags);
82 return ret;
83 }
84 EXPORT_SYMBOL(irq_set_irq_type);
85
86 /**
87 * irq_set_handler_data - set irq handler data for an irq
88 * @irq: Interrupt number
89 * @data: Pointer to interrupt specific data
90 *
91 * Set the hardware irq controller data for an irq
92 */
93 int irq_set_handler_data(unsigned int irq, void *data)
94 {
95 unsigned long flags;
96 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
97
98 if (!desc)
99 return -EINVAL;
100 desc->irq_common_data.handler_data = data;
101 irq_put_desc_unlock(desc, flags);
102 return 0;
103 }
104 EXPORT_SYMBOL(irq_set_handler_data);
105
106 /**
107 * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
108 * @irq_base: Interrupt number base
109 * @irq_offset: Interrupt number offset
110 * @entry: Pointer to MSI descriptor data
111 *
112 * Set the MSI descriptor entry for an irq at offset
113 */
114 int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
115 struct msi_desc *entry)
116 {
117 unsigned long flags;
118 struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
119
120 if (!desc)
121 return -EINVAL;
122 desc->irq_common_data.msi_desc = entry;
123 if (entry && !irq_offset)
124 entry->irq = irq_base;
125 irq_put_desc_unlock(desc, flags);
126 return 0;
127 }
128
129 /**
130 * irq_set_msi_desc - set MSI descriptor data for an irq
131 * @irq: Interrupt number
132 * @entry: Pointer to MSI descriptor data
133 *
134 * Set the MSI descriptor entry for an irq
135 */
136 int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
137 {
138 return irq_set_msi_desc_off(irq, 0, entry);
139 }
140
141 /**
142 * irq_set_chip_data - set irq chip data for an irq
143 * @irq: Interrupt number
144 * @data: Pointer to chip specific data
145 *
146 * Set the hardware irq chip data for an irq
147 */
148 int irq_set_chip_data(unsigned int irq, void *data)
149 {
150 unsigned long flags;
151 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
152
153 if (!desc)
154 return -EINVAL;
155 desc->irq_data.chip_data = data;
156 irq_put_desc_unlock(desc, flags);
157 return 0;
158 }
159 EXPORT_SYMBOL(irq_set_chip_data);
160
161 struct irq_data *irq_get_irq_data(unsigned int irq)
162 {
163 struct irq_desc *desc = irq_to_desc(irq);
164
165 return desc ? &desc->irq_data : NULL;
166 }
167 EXPORT_SYMBOL_GPL(irq_get_irq_data);
168
169 static void irq_state_clr_disabled(struct irq_desc *desc)
170 {
171 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
172 }
173
174 static void irq_state_set_disabled(struct irq_desc *desc)
175 {
176 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
177 }
178
179 static void irq_state_clr_masked(struct irq_desc *desc)
180 {
181 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
182 }
183
184 static void irq_state_set_masked(struct irq_desc *desc)
185 {
186 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
187 }
188
189 int irq_startup(struct irq_desc *desc, bool resend)
190 {
191 int ret = 0;
192
193 irq_state_clr_disabled(desc);
194 desc->depth = 0;
195
196 irq_domain_activate_irq(&desc->irq_data);
197 if (desc->irq_data.chip->irq_startup) {
198 ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
199 irq_state_clr_masked(desc);
200 } else {
201 irq_enable(desc);
202 }
203 if (resend)
204 check_irq_resend(desc);
205 return ret;
206 }
207
208 void irq_shutdown(struct irq_desc *desc)
209 {
210 irq_state_set_disabled(desc);
211 desc->depth = 1;
212 if (desc->irq_data.chip->irq_shutdown)
213 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
214 else if (desc->irq_data.chip->irq_disable)
215 desc->irq_data.chip->irq_disable(&desc->irq_data);
216 else
217 desc->irq_data.chip->irq_mask(&desc->irq_data);
218 irq_domain_deactivate_irq(&desc->irq_data);
219 irq_state_set_masked(desc);
220 }
221
222 void irq_enable(struct irq_desc *desc)
223 {
224 irq_state_clr_disabled(desc);
225 if (desc->irq_data.chip->irq_enable)
226 desc->irq_data.chip->irq_enable(&desc->irq_data);
227 else
228 desc->irq_data.chip->irq_unmask(&desc->irq_data);
229 irq_state_clr_masked(desc);
230 }
231
232 /**
233 * irq_disable - Mark interrupt disabled
234 * @desc: irq descriptor which should be disabled
235 *
236 * If the chip does not implement the irq_disable callback, we
237 * use a lazy disable approach. That means we mark the interrupt
238 * disabled, but leave the hardware unmasked. That's an
239 * optimization because we avoid the hardware access for the
240 * common case where no interrupt happens after we marked it
241 * disabled. If an interrupt happens, then the interrupt flow
242 * handler masks the line at the hardware level and marks it
243 * pending.
244 *
245 * If the interrupt chip does not implement the irq_disable callback,
246 * a driver can disable the lazy approach for a particular irq line by
247 * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
248 * be used for devices which cannot disable the interrupt at the
249 * device level under certain circumstances and have to use
250 * disable_irq[_nosync] instead.
251 */
252 void irq_disable(struct irq_desc *desc)
253 {
254 irq_state_set_disabled(desc);
255 if (desc->irq_data.chip->irq_disable) {
256 desc->irq_data.chip->irq_disable(&desc->irq_data);
257 irq_state_set_masked(desc);
258 } else if (irq_settings_disable_unlazy(desc)) {
259 mask_irq(desc);
260 }
261 }
262
263 void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
264 {
265 if (desc->irq_data.chip->irq_enable)
266 desc->irq_data.chip->irq_enable(&desc->irq_data);
267 else
268 desc->irq_data.chip->irq_unmask(&desc->irq_data);
269 cpumask_set_cpu(cpu, desc->percpu_enabled);
270 }
271
272 void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
273 {
274 if (desc->irq_data.chip->irq_disable)
275 desc->irq_data.chip->irq_disable(&desc->irq_data);
276 else
277 desc->irq_data.chip->irq_mask(&desc->irq_data);
278 cpumask_clear_cpu(cpu, desc->percpu_enabled);
279 }
280
281 static inline void mask_ack_irq(struct irq_desc *desc)
282 {
283 if (desc->irq_data.chip->irq_mask_ack)
284 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
285 else {
286 desc->irq_data.chip->irq_mask(&desc->irq_data);
287 if (desc->irq_data.chip->irq_ack)
288 desc->irq_data.chip->irq_ack(&desc->irq_data);
289 }
290 irq_state_set_masked(desc);
291 }
292
293 void mask_irq(struct irq_desc *desc)
294 {
295 if (desc->irq_data.chip->irq_mask) {
296 desc->irq_data.chip->irq_mask(&desc->irq_data);
297 irq_state_set_masked(desc);
298 }
299 }
300
301 void unmask_irq(struct irq_desc *desc)
302 {
303 if (desc->irq_data.chip->irq_unmask) {
304 desc->irq_data.chip->irq_unmask(&desc->irq_data);
305 irq_state_clr_masked(desc);
306 }
307 }
308
309 void unmask_threaded_irq(struct irq_desc *desc)
310 {
311 struct irq_chip *chip = desc->irq_data.chip;
312
313 if (chip->flags & IRQCHIP_EOI_THREADED)
314 chip->irq_eoi(&desc->irq_data);
315
316 if (chip->irq_unmask) {
317 chip->irq_unmask(&desc->irq_data);
318 irq_state_clr_masked(desc);
319 }
320 }
321
322 /*
323 * handle_nested_irq - Handle a nested irq from a irq thread
324 * @irq: the interrupt number
325 *
326 * Handle interrupts which are nested into a threaded interrupt
327 * handler. The handler function is called inside the calling
328 * threads context.
329 */
330 void handle_nested_irq(unsigned int irq)
331 {
332 struct irq_desc *desc = irq_to_desc(irq);
333 struct irqaction *action;
334 irqreturn_t action_ret;
335
336 might_sleep();
337
338 raw_spin_lock_irq(&desc->lock);
339
340 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
341
342 action = desc->action;
343 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
344 desc->istate |= IRQS_PENDING;
345 goto out_unlock;
346 }
347
348 kstat_incr_irqs_this_cpu(desc);
349 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
350 raw_spin_unlock_irq(&desc->lock);
351
352 action_ret = action->thread_fn(action->irq, action->dev_id);
353 if (!noirqdebug)
354 note_interrupt(desc, action_ret);
355
356 raw_spin_lock_irq(&desc->lock);
357 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
358
359 out_unlock:
360 raw_spin_unlock_irq(&desc->lock);
361 }
362 EXPORT_SYMBOL_GPL(handle_nested_irq);
363
364 static bool irq_check_poll(struct irq_desc *desc)
365 {
366 if (!(desc->istate & IRQS_POLL_INPROGRESS))
367 return false;
368 return irq_wait_for_poll(desc);
369 }
370
371 static bool irq_may_run(struct irq_desc *desc)
372 {
373 unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
374
375 /*
376 * If the interrupt is not in progress and is not an armed
377 * wakeup interrupt, proceed.
378 */
379 if (!irqd_has_set(&desc->irq_data, mask))
380 return true;
381
382 /*
383 * If the interrupt is an armed wakeup source, mark it pending
384 * and suspended, disable it and notify the pm core about the
385 * event.
386 */
387 if (irq_pm_check_wakeup(desc))
388 return false;
389
390 /*
391 * Handle a potential concurrent poll on a different core.
392 */
393 return irq_check_poll(desc);
394 }
395
396 /**
397 * handle_simple_irq - Simple and software-decoded IRQs.
398 * @desc: the interrupt description structure for this irq
399 *
400 * Simple interrupts are either sent from a demultiplexing interrupt
401 * handler or come from hardware, where no interrupt hardware control
402 * is necessary.
403 *
404 * Note: The caller is expected to handle the ack, clear, mask and
405 * unmask issues if necessary.
406 */
407 void handle_simple_irq(struct irq_desc *desc)
408 {
409 raw_spin_lock(&desc->lock);
410
411 if (!irq_may_run(desc))
412 goto out_unlock;
413
414 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
415
416 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
417 desc->istate |= IRQS_PENDING;
418 goto out_unlock;
419 }
420
421 kstat_incr_irqs_this_cpu(desc);
422 handle_irq_event(desc);
423
424 out_unlock:
425 raw_spin_unlock(&desc->lock);
426 }
427 EXPORT_SYMBOL_GPL(handle_simple_irq);
428
429 /**
430 * handle_untracked_irq - Simple and software-decoded IRQs.
431 * @desc: the interrupt description structure for this irq
432 *
433 * Untracked interrupts are sent from a demultiplexing interrupt
434 * handler when the demultiplexer does not know which device it its
435 * multiplexed irq domain generated the interrupt. IRQ's handled
436 * through here are not subjected to stats tracking, randomness, or
437 * spurious interrupt detection.
438 *
439 * Note: Like handle_simple_irq, the caller is expected to handle
440 * the ack, clear, mask and unmask issues if necessary.
441 */
442 void handle_untracked_irq(struct irq_desc *desc)
443 {
444 unsigned int flags = 0;
445
446 raw_spin_lock(&desc->lock);
447
448 if (!irq_may_run(desc))
449 goto out_unlock;
450
451 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
452
453 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
454 desc->istate |= IRQS_PENDING;
455 goto out_unlock;
456 }
457
458 desc->istate &= ~IRQS_PENDING;
459 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
460 raw_spin_unlock(&desc->lock);
461
462 __handle_irq_event_percpu(desc, &flags);
463
464 raw_spin_lock(&desc->lock);
465 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
466
467 out_unlock:
468 raw_spin_unlock(&desc->lock);
469 }
470 EXPORT_SYMBOL_GPL(handle_untracked_irq);
471
472 /*
473 * Called unconditionally from handle_level_irq() and only for oneshot
474 * interrupts from handle_fasteoi_irq()
475 */
476 static void cond_unmask_irq(struct irq_desc *desc)
477 {
478 /*
479 * We need to unmask in the following cases:
480 * - Standard level irq (IRQF_ONESHOT is not set)
481 * - Oneshot irq which did not wake the thread (caused by a
482 * spurious interrupt or a primary handler handling it
483 * completely).
484 */
485 if (!irqd_irq_disabled(&desc->irq_data) &&
486 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
487 unmask_irq(desc);
488 }
489
490 /**
491 * handle_level_irq - Level type irq handler
492 * @desc: the interrupt description structure for this irq
493 *
494 * Level type interrupts are active as long as the hardware line has
495 * the active level. This may require to mask the interrupt and unmask
496 * it after the associated handler has acknowledged the device, so the
497 * interrupt line is back to inactive.
498 */
499 void handle_level_irq(struct irq_desc *desc)
500 {
501 raw_spin_lock(&desc->lock);
502 mask_ack_irq(desc);
503
504 if (!irq_may_run(desc))
505 goto out_unlock;
506
507 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
508
509 /*
510 * If its disabled or no action available
511 * keep it masked and get out of here
512 */
513 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
514 desc->istate |= IRQS_PENDING;
515 goto out_unlock;
516 }
517
518 kstat_incr_irqs_this_cpu(desc);
519 handle_irq_event(desc);
520
521 cond_unmask_irq(desc);
522
523 out_unlock:
524 raw_spin_unlock(&desc->lock);
525 }
526 EXPORT_SYMBOL_GPL(handle_level_irq);
527
528 #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
529 static inline void preflow_handler(struct irq_desc *desc)
530 {
531 if (desc->preflow_handler)
532 desc->preflow_handler(&desc->irq_data);
533 }
534 #else
535 static inline void preflow_handler(struct irq_desc *desc) { }
536 #endif
537
538 static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
539 {
540 if (!(desc->istate & IRQS_ONESHOT)) {
541 chip->irq_eoi(&desc->irq_data);
542 return;
543 }
544 /*
545 * We need to unmask in the following cases:
546 * - Oneshot irq which did not wake the thread (caused by a
547 * spurious interrupt or a primary handler handling it
548 * completely).
549 */
550 if (!irqd_irq_disabled(&desc->irq_data) &&
551 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
552 chip->irq_eoi(&desc->irq_data);
553 unmask_irq(desc);
554 } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
555 chip->irq_eoi(&desc->irq_data);
556 }
557 }
558
559 /**
560 * handle_fasteoi_irq - irq handler for transparent controllers
561 * @desc: the interrupt description structure for this irq
562 *
563 * Only a single callback will be issued to the chip: an ->eoi()
564 * call when the interrupt has been serviced. This enables support
565 * for modern forms of interrupt handlers, which handle the flow
566 * details in hardware, transparently.
567 */
568 void handle_fasteoi_irq(struct irq_desc *desc)
569 {
570 struct irq_chip *chip = desc->irq_data.chip;
571
572 raw_spin_lock(&desc->lock);
573
574 if (!irq_may_run(desc))
575 goto out;
576
577 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
578
579 /*
580 * If its disabled or no action available
581 * then mask it and get out of here:
582 */
583 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
584 desc->istate |= IRQS_PENDING;
585 mask_irq(desc);
586 goto out;
587 }
588
589 kstat_incr_irqs_this_cpu(desc);
590 if (desc->istate & IRQS_ONESHOT)
591 mask_irq(desc);
592
593 preflow_handler(desc);
594 handle_irq_event(desc);
595
596 cond_unmask_eoi_irq(desc, chip);
597
598 raw_spin_unlock(&desc->lock);
599 return;
600 out:
601 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
602 chip->irq_eoi(&desc->irq_data);
603 raw_spin_unlock(&desc->lock);
604 }
605 EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
606
607 /**
608 * handle_edge_irq - edge type IRQ handler
609 * @desc: the interrupt description structure for this irq
610 *
611 * Interrupt occures on the falling and/or rising edge of a hardware
612 * signal. The occurrence is latched into the irq controller hardware
613 * and must be acked in order to be reenabled. After the ack another
614 * interrupt can happen on the same source even before the first one
615 * is handled by the associated event handler. If this happens it
616 * might be necessary to disable (mask) the interrupt depending on the
617 * controller hardware. This requires to reenable the interrupt inside
618 * of the loop which handles the interrupts which have arrived while
619 * the handler was running. If all pending interrupts are handled, the
620 * loop is left.
621 */
622 void handle_edge_irq(struct irq_desc *desc)
623 {
624 raw_spin_lock(&desc->lock);
625
626 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
627
628 if (!irq_may_run(desc)) {
629 desc->istate |= IRQS_PENDING;
630 mask_ack_irq(desc);
631 goto out_unlock;
632 }
633
634 /*
635 * If its disabled or no action available then mask it and get
636 * out of here.
637 */
638 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
639 desc->istate |= IRQS_PENDING;
640 mask_ack_irq(desc);
641 goto out_unlock;
642 }
643
644 kstat_incr_irqs_this_cpu(desc);
645
646 /* Start handling the irq */
647 desc->irq_data.chip->irq_ack(&desc->irq_data);
648
649 do {
650 if (unlikely(!desc->action)) {
651 mask_irq(desc);
652 goto out_unlock;
653 }
654
655 /*
656 * When another irq arrived while we were handling
657 * one, we could have masked the irq.
658 * Renable it, if it was not disabled in meantime.
659 */
660 if (unlikely(desc->istate & IRQS_PENDING)) {
661 if (!irqd_irq_disabled(&desc->irq_data) &&
662 irqd_irq_masked(&desc->irq_data))
663 unmask_irq(desc);
664 }
665
666 handle_irq_event(desc);
667
668 } while ((desc->istate & IRQS_PENDING) &&
669 !irqd_irq_disabled(&desc->irq_data));
670
671 out_unlock:
672 raw_spin_unlock(&desc->lock);
673 }
674 EXPORT_SYMBOL(handle_edge_irq);
675
676 #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
677 /**
678 * handle_edge_eoi_irq - edge eoi type IRQ handler
679 * @desc: the interrupt description structure for this irq
680 *
681 * Similar as the above handle_edge_irq, but using eoi and w/o the
682 * mask/unmask logic.
683 */
684 void handle_edge_eoi_irq(struct irq_desc *desc)
685 {
686 struct irq_chip *chip = irq_desc_get_chip(desc);
687
688 raw_spin_lock(&desc->lock);
689
690 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
691
692 if (!irq_may_run(desc)) {
693 desc->istate |= IRQS_PENDING;
694 goto out_eoi;
695 }
696
697 /*
698 * If its disabled or no action available then mask it and get
699 * out of here.
700 */
701 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
702 desc->istate |= IRQS_PENDING;
703 goto out_eoi;
704 }
705
706 kstat_incr_irqs_this_cpu(desc);
707
708 do {
709 if (unlikely(!desc->action))
710 goto out_eoi;
711
712 handle_irq_event(desc);
713
714 } while ((desc->istate & IRQS_PENDING) &&
715 !irqd_irq_disabled(&desc->irq_data));
716
717 out_eoi:
718 chip->irq_eoi(&desc->irq_data);
719 raw_spin_unlock(&desc->lock);
720 }
721 #endif
722
723 /**
724 * handle_percpu_irq - Per CPU local irq handler
725 * @desc: the interrupt description structure for this irq
726 *
727 * Per CPU interrupts on SMP machines without locking requirements
728 */
729 void handle_percpu_irq(struct irq_desc *desc)
730 {
731 struct irq_chip *chip = irq_desc_get_chip(desc);
732
733 kstat_incr_irqs_this_cpu(desc);
734
735 if (chip->irq_ack)
736 chip->irq_ack(&desc->irq_data);
737
738 handle_irq_event_percpu(desc);
739
740 if (chip->irq_eoi)
741 chip->irq_eoi(&desc->irq_data);
742 }
743
744 /**
745 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
746 * @desc: the interrupt description structure for this irq
747 *
748 * Per CPU interrupts on SMP machines without locking requirements. Same as
749 * handle_percpu_irq() above but with the following extras:
750 *
751 * action->percpu_dev_id is a pointer to percpu variables which
752 * contain the real device id for the cpu on which this handler is
753 * called
754 */
755 void handle_percpu_devid_irq(struct irq_desc *desc)
756 {
757 struct irq_chip *chip = irq_desc_get_chip(desc);
758 struct irqaction *action = desc->action;
759 void *dev_id = raw_cpu_ptr(action->percpu_dev_id);
760 unsigned int irq = irq_desc_get_irq(desc);
761 irqreturn_t res;
762
763 kstat_incr_irqs_this_cpu(desc);
764
765 if (chip->irq_ack)
766 chip->irq_ack(&desc->irq_data);
767
768 trace_irq_handler_entry(irq, action);
769 res = action->handler(irq, dev_id);
770 trace_irq_handler_exit(irq, action, res);
771
772 if (chip->irq_eoi)
773 chip->irq_eoi(&desc->irq_data);
774 }
775
776 void
777 __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
778 int is_chained, const char *name)
779 {
780 if (!handle) {
781 handle = handle_bad_irq;
782 } else {
783 struct irq_data *irq_data = &desc->irq_data;
784 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
785 /*
786 * With hierarchical domains we might run into a
787 * situation where the outermost chip is not yet set
788 * up, but the inner chips are there. Instead of
789 * bailing we install the handler, but obviously we
790 * cannot enable/startup the interrupt at this point.
791 */
792 while (irq_data) {
793 if (irq_data->chip != &no_irq_chip)
794 break;
795 /*
796 * Bail out if the outer chip is not set up
797 * and the interrrupt supposed to be started
798 * right away.
799 */
800 if (WARN_ON(is_chained))
801 return;
802 /* Try the parent */
803 irq_data = irq_data->parent_data;
804 }
805 #endif
806 if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
807 return;
808 }
809
810 /* Uninstall? */
811 if (handle == handle_bad_irq) {
812 if (desc->irq_data.chip != &no_irq_chip)
813 mask_ack_irq(desc);
814 irq_state_set_disabled(desc);
815 if (is_chained)
816 desc->action = NULL;
817 desc->depth = 1;
818 }
819 desc->handle_irq = handle;
820 desc->name = name;
821
822 if (handle != handle_bad_irq && is_chained) {
823 unsigned int type = irqd_get_trigger_type(&desc->irq_data);
824
825 /*
826 * We're about to start this interrupt immediately,
827 * hence the need to set the trigger configuration.
828 * But the .set_type callback may have overridden the
829 * flow handler, ignoring that we're dealing with a
830 * chained interrupt. Reset it immediately because we
831 * do know better.
832 */
833 if (type != IRQ_TYPE_NONE) {
834 __irq_set_trigger(desc, type);
835 desc->handle_irq = handle;
836 }
837
838 irq_settings_set_noprobe(desc);
839 irq_settings_set_norequest(desc);
840 irq_settings_set_nothread(desc);
841 desc->action = &chained_action;
842 irq_startup(desc, true);
843 }
844 }
845
846 void
847 __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
848 const char *name)
849 {
850 unsigned long flags;
851 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
852
853 if (!desc)
854 return;
855
856 __irq_do_set_handler(desc, handle, is_chained, name);
857 irq_put_desc_busunlock(desc, flags);
858 }
859 EXPORT_SYMBOL_GPL(__irq_set_handler);
860
861 void
862 irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
863 void *data)
864 {
865 unsigned long flags;
866 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
867
868 if (!desc)
869 return;
870
871 __irq_do_set_handler(desc, handle, 1, NULL);
872 desc->irq_common_data.handler_data = data;
873
874 irq_put_desc_busunlock(desc, flags);
875 }
876 EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
877
878 void
879 irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
880 irq_flow_handler_t handle, const char *name)
881 {
882 irq_set_chip(irq, chip);
883 __irq_set_handler(irq, handle, 0, name);
884 }
885 EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
886
887 void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
888 {
889 unsigned long flags;
890 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
891
892 if (!desc)
893 return;
894 irq_settings_clr_and_set(desc, clr, set);
895
896 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
897 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
898 if (irq_settings_has_no_balance_set(desc))
899 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
900 if (irq_settings_is_per_cpu(desc))
901 irqd_set(&desc->irq_data, IRQD_PER_CPU);
902 if (irq_settings_can_move_pcntxt(desc))
903 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
904 if (irq_settings_is_level(desc))
905 irqd_set(&desc->irq_data, IRQD_LEVEL);
906
907 irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
908
909 irq_put_desc_unlock(desc, flags);
910 }
911 EXPORT_SYMBOL_GPL(irq_modify_status);
912
913 /**
914 * irq_cpu_online - Invoke all irq_cpu_online functions.
915 *
916 * Iterate through all irqs and invoke the chip.irq_cpu_online()
917 * for each.
918 */
919 void irq_cpu_online(void)
920 {
921 struct irq_desc *desc;
922 struct irq_chip *chip;
923 unsigned long flags;
924 unsigned int irq;
925
926 for_each_active_irq(irq) {
927 desc = irq_to_desc(irq);
928 if (!desc)
929 continue;
930
931 raw_spin_lock_irqsave(&desc->lock, flags);
932
933 chip = irq_data_get_irq_chip(&desc->irq_data);
934 if (chip && chip->irq_cpu_online &&
935 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
936 !irqd_irq_disabled(&desc->irq_data)))
937 chip->irq_cpu_online(&desc->irq_data);
938
939 raw_spin_unlock_irqrestore(&desc->lock, flags);
940 }
941 }
942
943 /**
944 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
945 *
946 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
947 * for each.
948 */
949 void irq_cpu_offline(void)
950 {
951 struct irq_desc *desc;
952 struct irq_chip *chip;
953 unsigned long flags;
954 unsigned int irq;
955
956 for_each_active_irq(irq) {
957 desc = irq_to_desc(irq);
958 if (!desc)
959 continue;
960
961 raw_spin_lock_irqsave(&desc->lock, flags);
962
963 chip = irq_data_get_irq_chip(&desc->irq_data);
964 if (chip && chip->irq_cpu_offline &&
965 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
966 !irqd_irq_disabled(&desc->irq_data)))
967 chip->irq_cpu_offline(&desc->irq_data);
968
969 raw_spin_unlock_irqrestore(&desc->lock, flags);
970 }
971 }
972
973 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
974 /**
975 * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
976 * NULL)
977 * @data: Pointer to interrupt specific data
978 */
979 void irq_chip_enable_parent(struct irq_data *data)
980 {
981 data = data->parent_data;
982 if (data->chip->irq_enable)
983 data->chip->irq_enable(data);
984 else
985 data->chip->irq_unmask(data);
986 }
987
988 /**
989 * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
990 * NULL)
991 * @data: Pointer to interrupt specific data
992 */
993 void irq_chip_disable_parent(struct irq_data *data)
994 {
995 data = data->parent_data;
996 if (data->chip->irq_disable)
997 data->chip->irq_disable(data);
998 else
999 data->chip->irq_mask(data);
1000 }
1001
1002 /**
1003 * irq_chip_ack_parent - Acknowledge the parent interrupt
1004 * @data: Pointer to interrupt specific data
1005 */
1006 void irq_chip_ack_parent(struct irq_data *data)
1007 {
1008 data = data->parent_data;
1009 data->chip->irq_ack(data);
1010 }
1011 EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
1012
1013 /**
1014 * irq_chip_mask_parent - Mask the parent interrupt
1015 * @data: Pointer to interrupt specific data
1016 */
1017 void irq_chip_mask_parent(struct irq_data *data)
1018 {
1019 data = data->parent_data;
1020 data->chip->irq_mask(data);
1021 }
1022 EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
1023
1024 /**
1025 * irq_chip_unmask_parent - Unmask the parent interrupt
1026 * @data: Pointer to interrupt specific data
1027 */
1028 void irq_chip_unmask_parent(struct irq_data *data)
1029 {
1030 data = data->parent_data;
1031 data->chip->irq_unmask(data);
1032 }
1033 EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
1034
1035 /**
1036 * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
1037 * @data: Pointer to interrupt specific data
1038 */
1039 void irq_chip_eoi_parent(struct irq_data *data)
1040 {
1041 data = data->parent_data;
1042 data->chip->irq_eoi(data);
1043 }
1044 EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
1045
1046 /**
1047 * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
1048 * @data: Pointer to interrupt specific data
1049 * @dest: The affinity mask to set
1050 * @force: Flag to enforce setting (disable online checks)
1051 *
1052 * Conditinal, as the underlying parent chip might not implement it.
1053 */
1054 int irq_chip_set_affinity_parent(struct irq_data *data,
1055 const struct cpumask *dest, bool force)
1056 {
1057 data = data->parent_data;
1058 if (data->chip->irq_set_affinity)
1059 return data->chip->irq_set_affinity(data, dest, force);
1060
1061 return -ENOSYS;
1062 }
1063
1064 /**
1065 * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
1066 * @data: Pointer to interrupt specific data
1067 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
1068 *
1069 * Conditional, as the underlying parent chip might not implement it.
1070 */
1071 int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
1072 {
1073 data = data->parent_data;
1074
1075 if (data->chip->irq_set_type)
1076 return data->chip->irq_set_type(data, type);
1077
1078 return -ENOSYS;
1079 }
1080 EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
1081
1082 /**
1083 * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
1084 * @data: Pointer to interrupt specific data
1085 *
1086 * Iterate through the domain hierarchy of the interrupt and check
1087 * whether a hw retrigger function exists. If yes, invoke it.
1088 */
1089 int irq_chip_retrigger_hierarchy(struct irq_data *data)
1090 {
1091 for (data = data->parent_data; data; data = data->parent_data)
1092 if (data->chip && data->chip->irq_retrigger)
1093 return data->chip->irq_retrigger(data);
1094
1095 return 0;
1096 }
1097
1098 /**
1099 * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
1100 * @data: Pointer to interrupt specific data
1101 * @vcpu_info: The vcpu affinity information
1102 */
1103 int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
1104 {
1105 data = data->parent_data;
1106 if (data->chip->irq_set_vcpu_affinity)
1107 return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
1108
1109 return -ENOSYS;
1110 }
1111
1112 /**
1113 * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
1114 * @data: Pointer to interrupt specific data
1115 * @on: Whether to set or reset the wake-up capability of this irq
1116 *
1117 * Conditional, as the underlying parent chip might not implement it.
1118 */
1119 int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
1120 {
1121 data = data->parent_data;
1122 if (data->chip->irq_set_wake)
1123 return data->chip->irq_set_wake(data, on);
1124
1125 return -ENOSYS;
1126 }
1127 #endif
1128
1129 /**
1130 * irq_chip_compose_msi_msg - Componse msi message for a irq chip
1131 * @data: Pointer to interrupt specific data
1132 * @msg: Pointer to the MSI message
1133 *
1134 * For hierarchical domains we find the first chip in the hierarchy
1135 * which implements the irq_compose_msi_msg callback. For non
1136 * hierarchical we use the top level chip.
1137 */
1138 int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1139 {
1140 struct irq_data *pos = NULL;
1141
1142 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1143 for (; data; data = data->parent_data)
1144 #endif
1145 if (data->chip && data->chip->irq_compose_msi_msg)
1146 pos = data;
1147 if (!pos)
1148 return -ENOSYS;
1149
1150 pos->chip->irq_compose_msi_msg(pos, msg);
1151
1152 return 0;
1153 }
1154
1155 /**
1156 * irq_chip_pm_get - Enable power for an IRQ chip
1157 * @data: Pointer to interrupt specific data
1158 *
1159 * Enable the power to the IRQ chip referenced by the interrupt data
1160 * structure.
1161 */
1162 int irq_chip_pm_get(struct irq_data *data)
1163 {
1164 int retval;
1165
1166 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
1167 retval = pm_runtime_get_sync(data->chip->parent_device);
1168 if (retval < 0) {
1169 pm_runtime_put_noidle(data->chip->parent_device);
1170 return retval;
1171 }
1172 }
1173
1174 return 0;
1175 }
1176
1177 /**
1178 * irq_chip_pm_put - Disable power for an IRQ chip
1179 * @data: Pointer to interrupt specific data
1180 *
1181 * Disable the power to the IRQ chip referenced by the interrupt data
1182 * structure, belongs. Note that power will only be disabled, once this
1183 * function has been called for all IRQs that have called irq_chip_pm_get().
1184 */
1185 int irq_chip_pm_put(struct irq_data *data)
1186 {
1187 int retval = 0;
1188
1189 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
1190 retval = pm_runtime_put(data->chip->parent_device);
1191
1192 return (retval < 0) ? retval : 0;
1193 }