2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #define pr_fmt(fmt) "software IO TLB: " fmt
22 #include <linux/cache.h>
23 #include <linux/dma-mapping.h>
25 #include <linux/export.h>
26 #include <linux/spinlock.h>
27 #include <linux/string.h>
28 #include <linux/swiotlb.h>
29 #include <linux/pfn.h>
30 #include <linux/types.h>
31 #include <linux/ctype.h>
32 #include <linux/highmem.h>
33 #include <linux/gfp.h>
34 #include <linux/scatterlist.h>
35 #include <linux/mem_encrypt.h>
40 #include <linux/init.h>
41 #include <linux/bootmem.h>
42 #include <linux/iommu-helper.h>
44 #define CREATE_TRACE_POINTS
45 #include <trace/events/swiotlb.h>
47 #define OFFSET(val,align) ((unsigned long) \
48 ( (val) & ( (align) - 1)))
50 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
53 * Minimum IO TLB size to bother booting with. Systems with mainly
54 * 64bit capable cards will only lightly use the swiotlb. If we can't
55 * allocate a contiguous 1MB, we're probably in trouble anyway.
57 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
59 enum swiotlb_force swiotlb_force
;
62 * Used to do a quick range check in swiotlb_tbl_unmap_single and
63 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
66 static phys_addr_t io_tlb_start
, io_tlb_end
;
69 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
70 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
72 static unsigned long io_tlb_nslabs
;
75 * When the IOMMU overflows we return a fallback buffer. This sets the size.
77 static unsigned long io_tlb_overflow
= 32*1024;
79 static phys_addr_t io_tlb_overflow_buffer
;
82 * This is a free list describing the number of free entries available from
85 static unsigned int *io_tlb_list
;
86 static unsigned int io_tlb_index
;
89 * Max segment that we can provide which (if pages are contingous) will
90 * not be bounced (unless SWIOTLB_FORCE is set).
92 unsigned int max_segment
;
95 * We need to save away the original address corresponding to a mapped entry
96 * for the sync operations.
98 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
99 static phys_addr_t
*io_tlb_orig_addr
;
102 * Protect the above data structures in the map and unmap calls
104 static DEFINE_SPINLOCK(io_tlb_lock
);
106 static int late_alloc
;
109 setup_io_tlb_npages(char *str
)
112 io_tlb_nslabs
= simple_strtoul(str
, &str
, 0);
113 /* avoid tail segment of size < IO_TLB_SEGSIZE */
114 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
118 if (!strcmp(str
, "force")) {
119 swiotlb_force
= SWIOTLB_FORCE
;
120 } else if (!strcmp(str
, "noforce")) {
121 swiotlb_force
= SWIOTLB_NO_FORCE
;
127 early_param("swiotlb", setup_io_tlb_npages
);
128 /* make io_tlb_overflow tunable too? */
130 unsigned long swiotlb_nr_tbl(void)
132 return io_tlb_nslabs
;
134 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl
);
136 unsigned int swiotlb_max_segment(void)
140 EXPORT_SYMBOL_GPL(swiotlb_max_segment
);
142 void swiotlb_set_max_segment(unsigned int val
)
144 if (swiotlb_force
== SWIOTLB_FORCE
)
147 max_segment
= rounddown(val
, PAGE_SIZE
);
150 /* default to 64MB */
151 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
152 unsigned long swiotlb_size_or_default(void)
156 size
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
158 return size
? size
: (IO_TLB_DEFAULT_SIZE
);
161 void __weak
swiotlb_set_mem_attributes(void *vaddr
, unsigned long size
) { }
163 /* For swiotlb, clear memory encryption mask from dma addresses */
164 static dma_addr_t
swiotlb_phys_to_dma(struct device
*hwdev
,
167 return __sme_clr(phys_to_dma(hwdev
, address
));
170 /* Note that this doesn't work with highmem page */
171 static dma_addr_t
swiotlb_virt_to_bus(struct device
*hwdev
,
172 volatile void *address
)
174 return phys_to_dma(hwdev
, virt_to_phys(address
));
177 static bool no_iotlb_memory
;
179 void swiotlb_print_info(void)
181 unsigned long bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
183 if (no_iotlb_memory
) {
184 pr_warn("No low mem\n");
188 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
189 (unsigned long long)io_tlb_start
,
190 (unsigned long long)io_tlb_end
,
195 * Early SWIOTLB allocation may be too early to allow an architecture to
196 * perform the desired operations. This function allows the architecture to
197 * call SWIOTLB when the operations are possible. It needs to be called
198 * before the SWIOTLB memory is used.
200 void __init
swiotlb_update_mem_attributes(void)
205 if (no_iotlb_memory
|| late_alloc
)
208 vaddr
= phys_to_virt(io_tlb_start
);
209 bytes
= PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
);
210 swiotlb_set_mem_attributes(vaddr
, bytes
);
211 memset(vaddr
, 0, bytes
);
213 vaddr
= phys_to_virt(io_tlb_overflow_buffer
);
214 bytes
= PAGE_ALIGN(io_tlb_overflow
);
215 swiotlb_set_mem_attributes(vaddr
, bytes
);
216 memset(vaddr
, 0, bytes
);
219 int __init
swiotlb_init_with_tbl(char *tlb
, unsigned long nslabs
, int verbose
)
221 void *v_overflow_buffer
;
222 unsigned long i
, bytes
;
224 bytes
= nslabs
<< IO_TLB_SHIFT
;
226 io_tlb_nslabs
= nslabs
;
227 io_tlb_start
= __pa(tlb
);
228 io_tlb_end
= io_tlb_start
+ bytes
;
231 * Get the overflow emergency buffer
233 v_overflow_buffer
= memblock_virt_alloc_low_nopanic(
234 PAGE_ALIGN(io_tlb_overflow
),
236 if (!v_overflow_buffer
)
239 io_tlb_overflow_buffer
= __pa(v_overflow_buffer
);
242 * Allocate and initialize the free list array. This array is used
243 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
244 * between io_tlb_start and io_tlb_end.
246 io_tlb_list
= memblock_virt_alloc(
247 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)),
249 io_tlb_orig_addr
= memblock_virt_alloc(
250 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)),
252 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
253 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
254 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
259 swiotlb_print_info();
261 swiotlb_set_max_segment(io_tlb_nslabs
<< IO_TLB_SHIFT
);
266 * Statically reserve bounce buffer space and initialize bounce buffer data
267 * structures for the software IO TLB used to implement the DMA API.
270 swiotlb_init(int verbose
)
272 size_t default_size
= IO_TLB_DEFAULT_SIZE
;
273 unsigned char *vstart
;
276 if (!io_tlb_nslabs
) {
277 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
278 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
281 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
283 /* Get IO TLB memory from the low pages */
284 vstart
= memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes
), PAGE_SIZE
);
285 if (vstart
&& !swiotlb_init_with_tbl(vstart
, io_tlb_nslabs
, verbose
))
289 memblock_free_early(io_tlb_start
,
290 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
291 pr_warn("Cannot allocate buffer");
292 no_iotlb_memory
= true;
296 * Systems with larger DMA zones (those that don't support ISA) can
297 * initialize the swiotlb later using the slab allocator if needed.
298 * This should be just like above, but with some error catching.
301 swiotlb_late_init_with_default_size(size_t default_size
)
303 unsigned long bytes
, req_nslabs
= io_tlb_nslabs
;
304 unsigned char *vstart
= NULL
;
308 if (!io_tlb_nslabs
) {
309 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
310 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
314 * Get IO TLB memory from the low pages
316 order
= get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
);
317 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
318 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
320 while ((SLABS_PER_PAGE
<< order
) > IO_TLB_MIN_SLABS
) {
321 vstart
= (void *)__get_free_pages(GFP_DMA
| __GFP_NOWARN
,
329 io_tlb_nslabs
= req_nslabs
;
332 if (order
!= get_order(bytes
)) {
333 pr_warn("only able to allocate %ld MB\n",
334 (PAGE_SIZE
<< order
) >> 20);
335 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
337 rc
= swiotlb_late_init_with_tbl(vstart
, io_tlb_nslabs
);
339 free_pages((unsigned long)vstart
, order
);
345 swiotlb_late_init_with_tbl(char *tlb
, unsigned long nslabs
)
347 unsigned long i
, bytes
;
348 unsigned char *v_overflow_buffer
;
350 bytes
= nslabs
<< IO_TLB_SHIFT
;
352 io_tlb_nslabs
= nslabs
;
353 io_tlb_start
= virt_to_phys(tlb
);
354 io_tlb_end
= io_tlb_start
+ bytes
;
356 swiotlb_set_mem_attributes(tlb
, bytes
);
357 memset(tlb
, 0, bytes
);
360 * Get the overflow emergency buffer
362 v_overflow_buffer
= (void *)__get_free_pages(GFP_DMA
,
363 get_order(io_tlb_overflow
));
364 if (!v_overflow_buffer
)
367 swiotlb_set_mem_attributes(v_overflow_buffer
, io_tlb_overflow
);
368 memset(v_overflow_buffer
, 0, io_tlb_overflow
);
369 io_tlb_overflow_buffer
= virt_to_phys(v_overflow_buffer
);
372 * Allocate and initialize the free list array. This array is used
373 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
374 * between io_tlb_start and io_tlb_end.
376 io_tlb_list
= (unsigned int *)__get_free_pages(GFP_KERNEL
,
377 get_order(io_tlb_nslabs
* sizeof(int)));
381 io_tlb_orig_addr
= (phys_addr_t
*)
382 __get_free_pages(GFP_KERNEL
,
383 get_order(io_tlb_nslabs
*
384 sizeof(phys_addr_t
)));
385 if (!io_tlb_orig_addr
)
388 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
389 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
390 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
394 swiotlb_print_info();
398 swiotlb_set_max_segment(io_tlb_nslabs
<< IO_TLB_SHIFT
);
403 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
407 free_pages((unsigned long)v_overflow_buffer
,
408 get_order(io_tlb_overflow
));
409 io_tlb_overflow_buffer
= 0;
418 void __init
swiotlb_free(void)
420 if (!io_tlb_orig_addr
)
424 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer
),
425 get_order(io_tlb_overflow
));
426 free_pages((unsigned long)io_tlb_orig_addr
,
427 get_order(io_tlb_nslabs
* sizeof(phys_addr_t
)));
428 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
430 free_pages((unsigned long)phys_to_virt(io_tlb_start
),
431 get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
));
433 memblock_free_late(io_tlb_overflow_buffer
,
434 PAGE_ALIGN(io_tlb_overflow
));
435 memblock_free_late(__pa(io_tlb_orig_addr
),
436 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)));
437 memblock_free_late(__pa(io_tlb_list
),
438 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)));
439 memblock_free_late(io_tlb_start
,
440 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
446 int is_swiotlb_buffer(phys_addr_t paddr
)
448 return paddr
>= io_tlb_start
&& paddr
< io_tlb_end
;
452 * Bounce: copy the swiotlb buffer back to the original dma location
454 static void swiotlb_bounce(phys_addr_t orig_addr
, phys_addr_t tlb_addr
,
455 size_t size
, enum dma_data_direction dir
)
457 unsigned long pfn
= PFN_DOWN(orig_addr
);
458 unsigned char *vaddr
= phys_to_virt(tlb_addr
);
460 if (PageHighMem(pfn_to_page(pfn
))) {
461 /* The buffer does not have a mapping. Map it in and copy */
462 unsigned int offset
= orig_addr
& ~PAGE_MASK
;
468 sz
= min_t(size_t, PAGE_SIZE
- offset
, size
);
470 local_irq_save(flags
);
471 buffer
= kmap_atomic(pfn_to_page(pfn
));
472 if (dir
== DMA_TO_DEVICE
)
473 memcpy(vaddr
, buffer
+ offset
, sz
);
475 memcpy(buffer
+ offset
, vaddr
, sz
);
476 kunmap_atomic(buffer
);
477 local_irq_restore(flags
);
484 } else if (dir
== DMA_TO_DEVICE
) {
485 memcpy(vaddr
, phys_to_virt(orig_addr
), size
);
487 memcpy(phys_to_virt(orig_addr
), vaddr
, size
);
491 phys_addr_t
swiotlb_tbl_map_single(struct device
*hwdev
,
492 dma_addr_t tbl_dma_addr
,
493 phys_addr_t orig_addr
, size_t size
,
494 enum dma_data_direction dir
,
498 phys_addr_t tlb_addr
;
499 unsigned int nslots
, stride
, index
, wrap
;
502 unsigned long offset_slots
;
503 unsigned long max_slots
;
506 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
508 if (mem_encrypt_active())
509 pr_warn_once("%s is active and system is using DMA bounce buffers\n",
510 sme_active() ? "SME" : "SEV");
512 mask
= dma_get_seg_boundary(hwdev
);
514 tbl_dma_addr
&= mask
;
516 offset_slots
= ALIGN(tbl_dma_addr
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
519 * Carefully handle integer overflow which can occur when mask == ~0UL.
522 ? ALIGN(mask
+ 1, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
523 : 1UL << (BITS_PER_LONG
- IO_TLB_SHIFT
);
526 * For mappings greater than or equal to a page, we limit the stride
527 * (and hence alignment) to a page size.
529 nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
530 if (size
>= PAGE_SIZE
)
531 stride
= (1 << (PAGE_SHIFT
- IO_TLB_SHIFT
));
538 * Find suitable number of IO TLB entries size that will fit this
539 * request and allocate a buffer from that IO TLB pool.
541 spin_lock_irqsave(&io_tlb_lock
, flags
);
542 index
= ALIGN(io_tlb_index
, stride
);
543 if (index
>= io_tlb_nslabs
)
548 while (iommu_is_span_boundary(index
, nslots
, offset_slots
,
551 if (index
>= io_tlb_nslabs
)
558 * If we find a slot that indicates we have 'nslots' number of
559 * contiguous buffers, we allocate the buffers from that slot
560 * and mark the entries as '0' indicating unavailable.
562 if (io_tlb_list
[index
] >= nslots
) {
565 for (i
= index
; i
< (int) (index
+ nslots
); i
++)
567 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
- 1) && io_tlb_list
[i
]; i
--)
568 io_tlb_list
[i
] = ++count
;
569 tlb_addr
= io_tlb_start
+ (index
<< IO_TLB_SHIFT
);
572 * Update the indices to avoid searching in the next
575 io_tlb_index
= ((index
+ nslots
) < io_tlb_nslabs
576 ? (index
+ nslots
) : 0);
581 if (index
>= io_tlb_nslabs
)
583 } while (index
!= wrap
);
586 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
587 if (!(attrs
& DMA_ATTR_NO_WARN
) && printk_ratelimit())
588 dev_warn(hwdev
, "swiotlb buffer is full (sz: %zd bytes)\n", size
);
589 return SWIOTLB_MAP_ERROR
;
591 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
594 * Save away the mapping from the original address to the DMA address.
595 * This is needed when we sync the memory. Then we sync the buffer if
598 for (i
= 0; i
< nslots
; i
++)
599 io_tlb_orig_addr
[index
+i
] = orig_addr
+ (i
<< IO_TLB_SHIFT
);
600 if (!(attrs
& DMA_ATTR_SKIP_CPU_SYNC
) &&
601 (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
602 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_TO_DEVICE
);
606 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single
);
609 * Allocates bounce buffer and returns its kernel virtual address.
613 map_single(struct device
*hwdev
, phys_addr_t phys
, size_t size
,
614 enum dma_data_direction dir
, unsigned long attrs
)
616 dma_addr_t start_dma_addr
;
618 if (swiotlb_force
== SWIOTLB_NO_FORCE
) {
619 dev_warn_ratelimited(hwdev
, "Cannot do DMA to address %pa\n",
621 return SWIOTLB_MAP_ERROR
;
624 start_dma_addr
= swiotlb_phys_to_dma(hwdev
, io_tlb_start
);
625 return swiotlb_tbl_map_single(hwdev
, start_dma_addr
, phys
, size
,
630 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
632 void swiotlb_tbl_unmap_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
633 size_t size
, enum dma_data_direction dir
,
637 int i
, count
, nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
638 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
639 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
642 * First, sync the memory before unmapping the entry
644 if (orig_addr
!= INVALID_PHYS_ADDR
&&
645 !(attrs
& DMA_ATTR_SKIP_CPU_SYNC
) &&
646 ((dir
== DMA_FROM_DEVICE
) || (dir
== DMA_BIDIRECTIONAL
)))
647 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_FROM_DEVICE
);
650 * Return the buffer to the free list by setting the corresponding
651 * entries to indicate the number of contiguous entries available.
652 * While returning the entries to the free list, we merge the entries
653 * with slots below and above the pool being returned.
655 spin_lock_irqsave(&io_tlb_lock
, flags
);
657 count
= ((index
+ nslots
) < ALIGN(index
+ 1, IO_TLB_SEGSIZE
) ?
658 io_tlb_list
[index
+ nslots
] : 0);
660 * Step 1: return the slots to the free list, merging the
661 * slots with superceeding slots
663 for (i
= index
+ nslots
- 1; i
>= index
; i
--) {
664 io_tlb_list
[i
] = ++count
;
665 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
668 * Step 2: merge the returned slots with the preceding slots,
669 * if available (non zero)
671 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
672 io_tlb_list
[i
] = ++count
;
674 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
676 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single
);
678 void swiotlb_tbl_sync_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
679 size_t size
, enum dma_data_direction dir
,
680 enum dma_sync_target target
)
682 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
683 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
685 if (orig_addr
== INVALID_PHYS_ADDR
)
687 orig_addr
+= (unsigned long)tlb_addr
& ((1 << IO_TLB_SHIFT
) - 1);
691 if (likely(dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
692 swiotlb_bounce(orig_addr
, tlb_addr
,
693 size
, DMA_FROM_DEVICE
);
695 BUG_ON(dir
!= DMA_TO_DEVICE
);
697 case SYNC_FOR_DEVICE
:
698 if (likely(dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
699 swiotlb_bounce(orig_addr
, tlb_addr
,
700 size
, DMA_TO_DEVICE
);
702 BUG_ON(dir
!= DMA_FROM_DEVICE
);
708 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single
);
711 swiotlb_alloc_coherent(struct device
*hwdev
, size_t size
,
712 dma_addr_t
*dma_handle
, gfp_t flags
)
714 bool warn
= !(flags
& __GFP_NOWARN
);
717 int order
= get_order(size
);
718 u64 dma_mask
= DMA_BIT_MASK(32);
720 if (hwdev
&& hwdev
->coherent_dma_mask
)
721 dma_mask
= hwdev
->coherent_dma_mask
;
723 ret
= (void *)__get_free_pages(flags
, order
);
725 dev_addr
= swiotlb_virt_to_bus(hwdev
, ret
);
726 if (dev_addr
+ size
- 1 > dma_mask
) {
728 * The allocated memory isn't reachable by the device.
730 free_pages((unsigned long) ret
, order
);
736 * We are either out of memory or the device can't DMA to
737 * GFP_DMA memory; fall back on map_single(), which
738 * will grab memory from the lowest available address range.
740 phys_addr_t paddr
= map_single(hwdev
, 0, size
, DMA_FROM_DEVICE
,
741 warn
? 0 : DMA_ATTR_NO_WARN
);
742 if (paddr
== SWIOTLB_MAP_ERROR
)
745 ret
= phys_to_virt(paddr
);
746 dev_addr
= swiotlb_phys_to_dma(hwdev
, paddr
);
748 /* Confirm address can be DMA'd by device */
749 if (dev_addr
+ size
- 1 > dma_mask
) {
750 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
751 (unsigned long long)dma_mask
,
752 (unsigned long long)dev_addr
);
755 * DMA_TO_DEVICE to avoid memcpy in unmap_single.
756 * The DMA_ATTR_SKIP_CPU_SYNC is optional.
758 swiotlb_tbl_unmap_single(hwdev
, paddr
,
760 DMA_ATTR_SKIP_CPU_SYNC
);
765 *dma_handle
= dev_addr
;
766 memset(ret
, 0, size
);
771 if (warn
&& printk_ratelimit()) {
772 pr_warn("coherent allocation failed for device %s size=%zu\n",
773 dev_name(hwdev
), size
);
779 EXPORT_SYMBOL(swiotlb_alloc_coherent
);
782 swiotlb_free_coherent(struct device
*hwdev
, size_t size
, void *vaddr
,
785 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
787 WARN_ON(irqs_disabled());
788 if (!is_swiotlb_buffer(paddr
))
789 free_pages((unsigned long)vaddr
, get_order(size
));
792 * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single.
793 * DMA_ATTR_SKIP_CPU_SYNC is optional.
795 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, DMA_TO_DEVICE
,
796 DMA_ATTR_SKIP_CPU_SYNC
);
798 EXPORT_SYMBOL(swiotlb_free_coherent
);
801 swiotlb_full(struct device
*dev
, size_t size
, enum dma_data_direction dir
,
804 if (swiotlb_force
== SWIOTLB_NO_FORCE
)
808 * Ran out of IOMMU space for this operation. This is very bad.
809 * Unfortunately the drivers cannot handle this operation properly.
810 * unless they check for dma_mapping_error (most don't)
811 * When the mapping is small enough return a static buffer to limit
812 * the damage, or panic when the transfer is too big.
814 dev_err_ratelimited(dev
, "DMA: Out of SW-IOMMU space for %zu bytes\n",
817 if (size
<= io_tlb_overflow
|| !do_panic
)
820 if (dir
== DMA_BIDIRECTIONAL
)
821 panic("DMA: Random memory could be DMA accessed\n");
822 if (dir
== DMA_FROM_DEVICE
)
823 panic("DMA: Random memory could be DMA written\n");
824 if (dir
== DMA_TO_DEVICE
)
825 panic("DMA: Random memory could be DMA read\n");
829 * Map a single buffer of the indicated size for DMA in streaming mode. The
830 * physical address to use is returned.
832 * Once the device is given the dma address, the device owns this memory until
833 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
835 dma_addr_t
swiotlb_map_page(struct device
*dev
, struct page
*page
,
836 unsigned long offset
, size_t size
,
837 enum dma_data_direction dir
,
840 phys_addr_t map
, phys
= page_to_phys(page
) + offset
;
841 dma_addr_t dev_addr
= phys_to_dma(dev
, phys
);
843 BUG_ON(dir
== DMA_NONE
);
845 * If the address happens to be in the device's DMA window,
846 * we can safely return the device addr and not worry about bounce
849 if (dma_capable(dev
, dev_addr
, size
) && swiotlb_force
!= SWIOTLB_FORCE
)
852 trace_swiotlb_bounced(dev
, dev_addr
, size
, swiotlb_force
);
854 /* Oh well, have to allocate and map a bounce buffer. */
855 map
= map_single(dev
, phys
, size
, dir
, attrs
);
856 if (map
== SWIOTLB_MAP_ERROR
) {
857 swiotlb_full(dev
, size
, dir
, 1);
858 return swiotlb_phys_to_dma(dev
, io_tlb_overflow_buffer
);
861 dev_addr
= swiotlb_phys_to_dma(dev
, map
);
863 /* Ensure that the address returned is DMA'ble */
864 if (dma_capable(dev
, dev_addr
, size
))
867 attrs
|= DMA_ATTR_SKIP_CPU_SYNC
;
868 swiotlb_tbl_unmap_single(dev
, map
, size
, dir
, attrs
);
870 return swiotlb_phys_to_dma(dev
, io_tlb_overflow_buffer
);
872 EXPORT_SYMBOL_GPL(swiotlb_map_page
);
875 * Unmap a single streaming mode DMA translation. The dma_addr and size must
876 * match what was provided for in a previous swiotlb_map_page call. All
877 * other usages are undefined.
879 * After this call, reads by the cpu to the buffer are guaranteed to see
880 * whatever the device wrote there.
882 static void unmap_single(struct device
*hwdev
, dma_addr_t dev_addr
,
883 size_t size
, enum dma_data_direction dir
,
886 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
888 BUG_ON(dir
== DMA_NONE
);
890 if (is_swiotlb_buffer(paddr
)) {
891 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, dir
, attrs
);
895 if (dir
!= DMA_FROM_DEVICE
)
899 * phys_to_virt doesn't work with hihgmem page but we could
900 * call dma_mark_clean() with hihgmem page here. However, we
901 * are fine since dma_mark_clean() is null on POWERPC. We can
902 * make dma_mark_clean() take a physical address if necessary.
904 dma_mark_clean(phys_to_virt(paddr
), size
);
907 void swiotlb_unmap_page(struct device
*hwdev
, dma_addr_t dev_addr
,
908 size_t size
, enum dma_data_direction dir
,
911 unmap_single(hwdev
, dev_addr
, size
, dir
, attrs
);
913 EXPORT_SYMBOL_GPL(swiotlb_unmap_page
);
916 * Make physical memory consistent for a single streaming mode DMA translation
919 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
920 * using the cpu, yet do not wish to teardown the dma mapping, you must
921 * call this function before doing so. At the next point you give the dma
922 * address back to the card, you must first perform a
923 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
926 swiotlb_sync_single(struct device
*hwdev
, dma_addr_t dev_addr
,
927 size_t size
, enum dma_data_direction dir
,
928 enum dma_sync_target target
)
930 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
932 BUG_ON(dir
== DMA_NONE
);
934 if (is_swiotlb_buffer(paddr
)) {
935 swiotlb_tbl_sync_single(hwdev
, paddr
, size
, dir
, target
);
939 if (dir
!= DMA_FROM_DEVICE
)
942 dma_mark_clean(phys_to_virt(paddr
), size
);
946 swiotlb_sync_single_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
947 size_t size
, enum dma_data_direction dir
)
949 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_CPU
);
951 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu
);
954 swiotlb_sync_single_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
955 size_t size
, enum dma_data_direction dir
)
957 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_DEVICE
);
959 EXPORT_SYMBOL(swiotlb_sync_single_for_device
);
962 * Map a set of buffers described by scatterlist in streaming mode for DMA.
963 * This is the scatter-gather version of the above swiotlb_map_page
964 * interface. Here the scatter gather list elements are each tagged with the
965 * appropriate dma address and length. They are obtained via
966 * sg_dma_{address,length}(SG).
968 * NOTE: An implementation may be able to use a smaller number of
969 * DMA address/length pairs than there are SG table elements.
970 * (for example via virtual mapping capabilities)
971 * The routine returns the number of addr/length pairs actually
972 * used, at most nents.
974 * Device ownership issues as mentioned above for swiotlb_map_page are the
978 swiotlb_map_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
979 enum dma_data_direction dir
, unsigned long attrs
)
981 struct scatterlist
*sg
;
984 BUG_ON(dir
== DMA_NONE
);
986 for_each_sg(sgl
, sg
, nelems
, i
) {
987 phys_addr_t paddr
= sg_phys(sg
);
988 dma_addr_t dev_addr
= phys_to_dma(hwdev
, paddr
);
990 if (swiotlb_force
== SWIOTLB_FORCE
||
991 !dma_capable(hwdev
, dev_addr
, sg
->length
)) {
992 phys_addr_t map
= map_single(hwdev
, sg_phys(sg
),
993 sg
->length
, dir
, attrs
);
994 if (map
== SWIOTLB_MAP_ERROR
) {
995 /* Don't panic here, we expect map_sg users
996 to do proper error handling. */
997 swiotlb_full(hwdev
, sg
->length
, dir
, 0);
998 attrs
|= DMA_ATTR_SKIP_CPU_SYNC
;
999 swiotlb_unmap_sg_attrs(hwdev
, sgl
, i
, dir
,
1001 sg_dma_len(sgl
) = 0;
1004 sg
->dma_address
= swiotlb_phys_to_dma(hwdev
, map
);
1006 sg
->dma_address
= dev_addr
;
1007 sg_dma_len(sg
) = sg
->length
;
1011 EXPORT_SYMBOL(swiotlb_map_sg_attrs
);
1014 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
1015 * concerning calls here are the same as for swiotlb_unmap_page() above.
1018 swiotlb_unmap_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
,
1019 int nelems
, enum dma_data_direction dir
,
1020 unsigned long attrs
)
1022 struct scatterlist
*sg
;
1025 BUG_ON(dir
== DMA_NONE
);
1027 for_each_sg(sgl
, sg
, nelems
, i
)
1028 unmap_single(hwdev
, sg
->dma_address
, sg_dma_len(sg
), dir
,
1031 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs
);
1034 * Make physical memory consistent for a set of streaming mode DMA translations
1037 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
1041 swiotlb_sync_sg(struct device
*hwdev
, struct scatterlist
*sgl
,
1042 int nelems
, enum dma_data_direction dir
,
1043 enum dma_sync_target target
)
1045 struct scatterlist
*sg
;
1048 for_each_sg(sgl
, sg
, nelems
, i
)
1049 swiotlb_sync_single(hwdev
, sg
->dma_address
,
1050 sg_dma_len(sg
), dir
, target
);
1054 swiotlb_sync_sg_for_cpu(struct device
*hwdev
, struct scatterlist
*sg
,
1055 int nelems
, enum dma_data_direction dir
)
1057 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_CPU
);
1059 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu
);
1062 swiotlb_sync_sg_for_device(struct device
*hwdev
, struct scatterlist
*sg
,
1063 int nelems
, enum dma_data_direction dir
)
1065 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_DEVICE
);
1067 EXPORT_SYMBOL(swiotlb_sync_sg_for_device
);
1070 swiotlb_dma_mapping_error(struct device
*hwdev
, dma_addr_t dma_addr
)
1072 return (dma_addr
== swiotlb_phys_to_dma(hwdev
, io_tlb_overflow_buffer
));
1074 EXPORT_SYMBOL(swiotlb_dma_mapping_error
);
1077 * Return whether the given device DMA address mask can be supported
1078 * properly. For example, if your device can only drive the low 24-bits
1079 * during bus mastering, then you would pass 0x00ffffff as the mask to
1083 swiotlb_dma_supported(struct device
*hwdev
, u64 mask
)
1085 return swiotlb_phys_to_dma(hwdev
, io_tlb_end
- 1) <= mask
;
1087 EXPORT_SYMBOL(swiotlb_dma_supported
);