library/stdarch/crates/core_arch/src/x86_64/avx512f.rs

   1 //use crate::{
   2 //
   3 //    core_arch::{simd::*, simd_llvm::*, x86::*},
   4 //    mem::transmute,
   5 //};
   6
   7 #[cfg(test)]
   8 mod tests {
   9
  10     use stdarch_test::simd_test;
  11
  12     use crate::core_arch::x86::*;
  13     use crate::core_arch::x86_64::*;
  14     use crate::hint::black_box;
  15
  16     #[simd_test(enable = "avx512f")]
  17     unsafe fn test_mm512_abs_epi64() {
  18         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
  19         let r = _mm512_abs_epi64(a);
  20         let e = _mm512_setr_epi64(0, 1, 1, i64::MAX, i64::MAX.wrapping_add(1), 100, 100, 32);
  21         assert_eq_m512i(r, e);
  22     }
  23
  24     #[simd_test(enable = "avx512f")]
  25     unsafe fn test_mm512_mask_abs_epi64() {
  26         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
  27         let r = _mm512_mask_abs_epi64(a, 0, a);
  28         assert_eq_m512i(r, a);
  29         let r = _mm512_mask_abs_epi64(a, 0b00001111, a);
  30         let e = _mm512_setr_epi64(0, 1, 1, i64::MAX, i64::MIN, 100, -100, -32);
  31         assert_eq_m512i(r, e);
  32     }
  33
  34     #[simd_test(enable = "avx512f")]
  35     unsafe fn test_mm512_maskz_abs_epi64() {
  36         #[rustfmt::skip]
  37         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
  38         let r = _mm512_maskz_abs_epi64(0, a);
  39         assert_eq_m512i(r, _mm512_setzero_si512());
  40         let r = _mm512_maskz_abs_epi64(0b00001111, a);
  41         let e = _mm512_setr_epi64(0, 1, 1, i64::MAX, 0, 0, 0, 0);
  42         assert_eq_m512i(r, e);
  43     }
  44
  45     #[simd_test(enable = "avx512f")]
  46     unsafe fn test_mm512_abs_pd() {
  47         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
  48         let r = _mm512_abs_pd(a);
  49         let e = _mm512_setr_pd(0., 1., 1., f64::MAX, f64::MAX, 100., 100., 32.);
  50         assert_eq_m512d(r, e);
  51     }
  52
  53     #[simd_test(enable = "avx512f")]
  54     unsafe fn test_mm512_mask_abs_pd() {
  55         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
  56         let r = _mm512_mask_abs_pd(a, 0, a);
  57         assert_eq_m512d(r, a);
  58         let r = _mm512_mask_abs_pd(a, 0b00001111, a);
  59         let e = _mm512_setr_pd(0., 1., 1., f64::MAX, f64::MIN, 100., -100., -32.);
  60         assert_eq_m512d(r, e);
  61     }
  62
  63     #[simd_test(enable = "avx512f")]
  64     unsafe fn test_mm512_add_epi64() {
  65         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
  66         let b = _mm512_set1_epi64(1);
  67         let r = _mm512_add_epi64(a, b);
  68         let e = _mm512_setr_epi64(1, 2, 0, i64::MIN, i64::MIN + 1, 101, -99, -31);
  69         assert_eq_m512i(r, e);
  70     }
  71
  72     #[simd_test(enable = "avx512f")]
  73     unsafe fn test_mm512_mask_mov_epi64() {
  74         let src = _mm512_set1_epi64(1);
  75         let a = _mm512_set1_epi64(2);
  76         let r = _mm512_mask_mov_epi64(src, 0, a);
  77         assert_eq_m512i(r, src);
  78         let r = _mm512_mask_mov_epi64(src, 0b11111111, a);
  79         assert_eq_m512i(r, a);
  80     }
  81
  82     #[simd_test(enable = "avx512f")]
  83     unsafe fn test_mm512_maskz_mov_epi64() {
  84         let a = _mm512_set1_epi64(2);
  85         let r = _mm512_maskz_mov_epi64(0, a);
  86         assert_eq_m512i(r, _mm512_setzero_si512());
  87         let r = _mm512_maskz_mov_epi64(0b11111111, a);
  88         assert_eq_m512i(r, a);
  89     }
  90
  91     #[simd_test(enable = "avx512f")]
  92     unsafe fn test_mm512_mask_mov_pd() {
  93         let src = _mm512_set1_pd(1.);
  94         let a = _mm512_set1_pd(2.);
  95         let r = _mm512_mask_mov_pd(src, 0, a);
  96         assert_eq_m512d(r, src);
  97         let r = _mm512_mask_mov_pd(src, 0b11111111, a);
  98         assert_eq_m512d(r, a);
  99     }
 100
 101     #[simd_test(enable = "avx512f")]
 102     unsafe fn test_mm512_maskz_mov_pd() {
 103         let a = _mm512_set1_pd(2.);
 104         let r = _mm512_maskz_mov_pd(0, a);
 105         assert_eq_m512d(r, _mm512_setzero_pd());
 106         let r = _mm512_maskz_mov_pd(0b11111111, a);
 107         assert_eq_m512d(r, a);
 108     }
 109
 110     #[simd_test(enable = "avx512f")]
 111     unsafe fn test_mm512_mask_add_epi64() {
 112         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
 113         let b = _mm512_set1_epi64(1);
 114         let r = _mm512_mask_add_epi64(a, 0, a, b);
 115         assert_eq_m512i(r, a);
 116         let r = _mm512_mask_add_epi64(a, 0b00001111, a, b);
 117         let e = _mm512_setr_epi64(1, 2, 0, i64::MIN, i64::MIN, 100, -100, -32);
 118         assert_eq_m512i(r, e);
 119     }
 120
 121     #[simd_test(enable = "avx512f")]
 122     unsafe fn test_mm512_maskz_add_epi64() {
 123         #[rustfmt::skip]
 124         let a = _mm512_setr_epi64(
 125             0, 1, -1, i64::MAX,
 126             i64::MIN, 100, -100, -32
 127         );
 128         let b = _mm512_set1_epi64(1);
 129         let r = _mm512_maskz_add_epi64(0, a, b);
 130         assert_eq_m512i(r, _mm512_setzero_si512());
 131         let r = _mm512_maskz_add_epi64(0b00001111, a, b);
 132         let e = _mm512_setr_epi64(1, 2, 0, i64::MIN, 0, 0, 0, 0);
 133         assert_eq_m512i(r, e);
 134     }
 135
 136     #[simd_test(enable = "avx512f")]
 137     unsafe fn test_mm512_add_pd() {
 138         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
 139         let b = _mm512_set1_pd(1.);
 140         let r = _mm512_add_pd(a, b);
 141         let e = _mm512_setr_pd(1., 2., 0., f64::MAX, f64::MIN + 1., 101., -99., -31.);
 142         assert_eq_m512d(r, e);
 143     }
 144
 145     #[simd_test(enable = "avx512f")]
 146     unsafe fn test_mm512_mask_add_pd() {
 147         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
 148         let b = _mm512_set1_pd(1.);
 149         let r = _mm512_mask_add_pd(a, 0, a, b);
 150         assert_eq_m512d(r, a);
 151         let r = _mm512_mask_add_pd(a, 0b00001111, a, b);
 152         let e = _mm512_setr_pd(1., 2., 0., f64::MAX, f64::MIN, 100., -100., -32.);
 153         assert_eq_m512d(r, e);
 154     }
 155
 156     #[simd_test(enable = "avx512f")]
 157     unsafe fn test_mm512_maskz_add_pd() {
 158         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
 159         let b = _mm512_set1_pd(1.);
 160         let r = _mm512_maskz_add_pd(0, a, b);
 161         assert_eq_m512d(r, _mm512_setzero_pd());
 162         let r = _mm512_maskz_add_pd(0b00001111, a, b);
 163         let e = _mm512_setr_pd(1., 2., 0., f64::MAX, 0., 0., 0., 0.);
 164         assert_eq_m512d(r, e);
 165     }
 166
 167     #[simd_test(enable = "avx512f")]
 168     unsafe fn test_mm512_sub_epi64() {
 169         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
 170         let b = _mm512_set1_epi64(1);
 171         let r = _mm512_sub_epi64(a, b);
 172         let e = _mm512_setr_epi64(-1, 0, -2, i64::MAX - 1, i64::MAX, 99, -101, -33);
 173         assert_eq_m512i(r, e);
 174     }
 175
 176     #[simd_test(enable = "avx512f")]
 177     unsafe fn test_mm512_mask_sub_epi64() {
 178         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
 179         let b = _mm512_set1_epi64(1);
 180         let r = _mm512_mask_sub_epi64(a, 0, a, b);
 181         assert_eq_m512i(r, a);
 182         let r = _mm512_mask_sub_epi64(a, 0b00001111, a, b);
 183         let e = _mm512_setr_epi64(-1, 0, -2, i64::MAX - 1, i64::MIN, 100, -100, -32);
 184         assert_eq_m512i(r, e);
 185     }
 186
 187     #[simd_test(enable = "avx512f")]
 188     unsafe fn test_mm512_maskz_sub_epi64() {
 189         let a = _mm512_setr_epi64(0, 1, -1, i64::MAX, i64::MIN, 100, -100, -32);
 190         let b = _mm512_set1_epi64(1);
 191         let r = _mm512_maskz_sub_epi64(0, a, b);
 192         assert_eq_m512i(r, _mm512_setzero_si512());
 193         let r = _mm512_maskz_sub_epi64(0b00001111, a, b);
 194         let e = _mm512_setr_epi64(-1, 0, -2, i64::MAX - 1, 0, 0, 0, 0);
 195         assert_eq_m512i(r, e);
 196     }
 197
 198     #[simd_test(enable = "avx512f")]
 199     unsafe fn test_mm512_sub_pd() {
 200         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
 201         let b = _mm512_set1_pd(1.);
 202         let r = _mm512_sub_pd(a, b);
 203         let e = _mm512_setr_pd(-1., 0., -2., f64::MAX - 1., f64::MIN, 99., -101., -33.);
 204         assert_eq_m512d(r, e);
 205     }
 206
 207     #[simd_test(enable = "avx512f")]
 208     unsafe fn test_mm512_mask_sub_pd() {
 209         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
 210         let b = _mm512_set1_pd(1.);
 211         let r = _mm512_mask_sub_pd(a, 0, a, b);
 212         assert_eq_m512d(r, a);
 213         let r = _mm512_mask_sub_pd(a, 0b00001111, a, b);
 214         let e = _mm512_setr_pd(-1., 0., -2., f64::MAX - 1., f64::MIN, 100., -100., -32.);
 215         assert_eq_m512d(r, e);
 216     }
 217
 218     #[simd_test(enable = "avx512f")]
 219     unsafe fn test_mm512_maskz_sub_pd() {
 220         let a = _mm512_setr_pd(0., 1., -1., f64::MAX, f64::MIN, 100., -100., -32.);
 221         let b = _mm512_set1_pd(1.);
 222         let r = _mm512_maskz_sub_pd(0, a, b);
 223         assert_eq_m512d(r, _mm512_setzero_pd());
 224         let r = _mm512_maskz_sub_pd(0b00001111, a, b);
 225         let e = _mm512_setr_pd(-1., 0., -2., f64::MAX - 1., 0., 0., 0., 0.);
 226         assert_eq_m512d(r, e);
 227     }
 228
 229     #[simd_test(enable = "avx512f")]
 230     unsafe fn test_mm512_mul_epi32() {
 231         let a = _mm512_setr_epi32(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
 232         let b = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
 233         let r = _mm512_mul_epi32(a, b);
 234         let e = _mm512_set_epi64(15, 13, 11, 9, 7, 5, 3, 1);
 235         assert_eq_m512i(r, e);
 236     }
 237
 238     #[simd_test(enable = "avx512f")]
 239     unsafe fn test_mm512_mask_mul_epi32() {
 240         let a = _mm512_setr_epi32(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
 241         let b = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
 242         let r = _mm512_mask_mul_epi32(a, 0, a, b);
 243         assert_eq_m512i(r, a);
 244         let r = _mm512_mask_mul_epi32(a, 0b00001111, a, b);
 245         let e = _mm512_set_epi64(
 246             1 | 1 << 32,
 247             1 | 1 << 32,
 248             1 | 1 << 32,
 249             1 | 1 << 32,
 250             7,
 251             5,
 252             3,
 253             1,
 254         );
 255         assert_eq_m512i(r, e);
 256     }
 257
 258     #[simd_test(enable = "avx512f")]
 259     unsafe fn test_mm512_maskz_mul_epi32() {
 260         let a = _mm512_setr_epi32(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
 261         let b = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
 262         let r = _mm512_maskz_mul_epi32(0, a, b);
 263         assert_eq_m512i(r, _mm512_setzero_si512());
 264         let r = _mm512_maskz_mul_epi32(0b00001111, a, b);
 265         let e = _mm512_set_epi64(0, 0, 0, 0, 7, 5, 3, 1);
 266         assert_eq_m512i(r, e);
 267     }
 268
 269     #[simd_test(enable = "avx512f")]
 270     unsafe fn test_mm512_mul_epu32() {
 271         let a = _mm512_setr_epi32(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
 272         let b = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
 273         let r = _mm512_mul_epu32(a, b);
 274         let e = _mm512_set_epi64(15, 13, 11, 9, 7, 5, 3, 1);
 275         assert_eq_m512i(r, e);
 276     }
 277
 278     #[simd_test(enable = "avx512f")]
 279     unsafe fn test_mm512_mask_mul_epu32() {
 280         let a = _mm512_setr_epi32(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
 281         let b = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
 282         let r = _mm512_mask_mul_epu32(a, 0, a, b);
 283         assert_eq_m512i(r, a);
 284         let r = _mm512_mask_mul_epu32(a, 0b00001111, a, b);
 285         let e = _mm512_set_epi64(
 286             1 | 1 << 32,
 287             1 | 1 << 32,
 288             1 | 1 << 32,
 289             1 | 1 << 32,
 290             7,
 291             5,
 292             3,
 293             1,
 294         );
 295         assert_eq_m512i(r, e);
 296     }
 297
 298     #[simd_test(enable = "avx512f")]
 299     unsafe fn test_mm512_maskz_mul_epu32() {
 300         let a = _mm512_setr_epi32(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
 301         let b = _mm512_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
 302         let r = _mm512_maskz_mul_epu32(0, a, b);
 303         assert_eq_m512i(r, _mm512_setzero_si512());
 304         let r = _mm512_maskz_mul_epu32(0b00001111, a, b);
 305         let e = _mm512_set_epi64(0, 0, 0, 0, 7, 5, 3, 1);
 306         assert_eq_m512i(r, e);
 307     }
 308
 309     #[simd_test(enable = "avx512f")]
 310     unsafe fn test_mm512_mullox_epi64() {
 311         let a = _mm512_setr_epi64(0, 1, i64::MAX, i64::MIN, i64::MAX, 100, -100, -32);
 312         let b = _mm512_set1_epi64(2);
 313         let r = _mm512_mullox_epi64(a, b);
 314         let e = _mm512_setr_epi64(0, 2, -2, 0, -2, 200, -200, -64);
 315         assert_eq_m512i(r, e);
 316     }
 317
 318     #[simd_test(enable = "avx512f")]
 319     unsafe fn test_mm512_mask_mullox_epi64() {
 320         let a = _mm512_setr_epi64(0, 1, i64::MAX, i64::MIN, i64::MAX, 100, -100, -32);
 321         let b = _mm512_set1_epi64(2);
 322         let r = _mm512_mask_mullox_epi64(a, 0, a, b);
 323         assert_eq_m512i(r, a);
 324         let r = _mm512_mask_mullox_epi64(a, 0b00001111, a, b);
 325         let e = _mm512_setr_epi64(0, 2, -2, 0, i64::MAX, 100, -100, -32);
 326         assert_eq_m512i(r, e);
 327     }
 328
 329     #[simd_test(enable = "avx512f")]
 330     unsafe fn test_mm512_mul_pd() {
 331         let a = _mm512_setr_pd(0., 1., f64::MAX, f64::MIN, f64::MAX, f64::MIN, -100., -32.);
 332         let b = _mm512_set1_pd(2.);
 333         let r = _mm512_mul_pd(a, b);
 334         let e = _mm512_setr_pd(
 335             0.,
 336             2.,
 337             f64::INFINITY,
 338             f64::NEG_INFINITY,
 339             f64::INFINITY,
 340             f64::NEG_INFINITY,
 341             -200.,
 342             -64.,
 343         );
 344         assert_eq_m512d(r, e);
 345     }
 346
 347     #[simd_test(enable = "avx512f")]
 348     unsafe fn test_mm512_mask_mul_pd() {
 349         let a = _mm512_setr_pd(0., 1., f64::MAX, f64::MIN, f64::MAX, f64::MIN, -100., -32.);
 350         let b = _mm512_set1_pd(2.);
 351         let r = _mm512_mask_mul_pd(a, 0, a, b);
 352         assert_eq_m512d(r, a);
 353         let r = _mm512_mask_mul_pd(a, 0b00001111, a, b);
 354         let e = _mm512_setr_pd(
 355             0.,
 356             2.,
 357             f64::INFINITY,
 358             f64::NEG_INFINITY,
 359             f64::MAX,
 360             f64::MIN,
 361             -100.,
 362             -32.,
 363         );
 364         assert_eq_m512d(r, e);
 365     }
 366
 367     #[simd_test(enable = "avx512f")]
 368     unsafe fn test_mm512_maskz_mul_pd() {
 369         let a = _mm512_setr_pd(0., 1., f64::MAX, f64::MIN, f64::MAX, f64::MIN, -100., -32.);
 370         let b = _mm512_set1_pd(2.);
 371         let r = _mm512_maskz_mul_pd(0, a, b);
 372         assert_eq_m512d(r, _mm512_setzero_pd());
 373         let r = _mm512_maskz_mul_pd(0b00001111, a, b);
 374         let e = _mm512_setr_pd(0., 2., f64::INFINITY, f64::NEG_INFINITY, 0., 0., 0., 0.);
 375         assert_eq_m512d(r, e);
 376     }
 377
 378     #[simd_test(enable = "avx512f")]
 379     unsafe fn test_mm512_div_pd() {
 380         let a = _mm512_setr_pd(0., 1., f64::MAX, f64::MIN, f64::MAX, f64::MIN, -100., -32.);
 381         let b = _mm512_setr_pd(2., 2., 0., 0., 0., 0., 2., 2.);
 382         let r = _mm512_div_pd(a, b);
 383         let e = _mm512_setr_pd(
 384             0.,
 385             0.5,
 386             f64::INFINITY,
 387             f64::NEG_INFINITY,
 388             f64::INFINITY,
 389             f64::NEG_INFINITY,
 390             -50.,
 391             -16.,
 392         );
 393         assert_eq_m512d(r, e);
 394     }
 395
 396     #[simd_test(enable = "avx512f")]
 397     unsafe fn test_mm512_mask_div_pd() {
 398         let a = _mm512_setr_pd(0., 1., f64::MAX, f64::MIN, f64::MAX, f64::MIN, -100., -32.);
 399         let b = _mm512_setr_pd(2., 2., 0., 0., 0., 0., 2., 2.);
 400         let r = _mm512_mask_div_pd(a, 0, a, b);
 401         assert_eq_m512d(r, a);
 402         let r = _mm512_mask_div_pd(a, 0b00001111, a, b);
 403         let e = _mm512_setr_pd(
 404             0.,
 405             0.5,
 406             f64::INFINITY,
 407             f64::NEG_INFINITY,
 408             f64::MAX,
 409             f64::MIN,
 410             -100.,
 411             -32.,
 412         );
 413         assert_eq_m512d(r, e);
 414     }
 415
 416     #[simd_test(enable = "avx512f")]
 417     unsafe fn test_mm512_maskz_div_pd() {
 418         let a = _mm512_setr_pd(0., 1., f64::MAX, f64::MIN, f64::MAX, f64::MIN, -100., -32.);
 419         let b = _mm512_setr_pd(2., 2., 0., 0., 0., 0., 2., 2.);
 420         let r = _mm512_maskz_div_pd(0, a, b);
 421         assert_eq_m512d(r, _mm512_setzero_pd());
 422         let r = _mm512_maskz_div_pd(0b00001111, a, b);
 423         let e = _mm512_setr_pd(0., 0.5, f64::INFINITY, f64::NEG_INFINITY, 0., 0., 0., 0.);
 424         assert_eq_m512d(r, e);
 425     }
 426
 427     #[simd_test(enable = "avx512f")]
 428     unsafe fn test_mm512_max_epi64() {
 429         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 430         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 431         let r = _mm512_max_epi64(a, b);
 432         let e = _mm512_setr_epi64(7, 6, 5, 4, 4, 5, 6, 7);
 433         assert_eq_m512i(r, e);
 434     }
 435
 436     #[simd_test(enable = "avx512f")]
 437     unsafe fn test_mm512_mask_max_epi64() {
 438         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 439         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 440         let r = _mm512_mask_max_epi64(a, 0, a, b);
 441         assert_eq_m512i(r, a);
 442         let r = _mm512_mask_max_epi64(a, 0b00001111, a, b);
 443         let e = _mm512_setr_epi64(7, 6, 5, 4, 4, 5, 6, 7);
 444         assert_eq_m512i(r, e);
 445     }
 446
 447     #[simd_test(enable = "avx512f")]
 448     unsafe fn test_mm512_maskz_max_epi64() {
 449         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 450         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 451         let r = _mm512_maskz_max_epi64(0, a, b);
 452         assert_eq_m512i(r, _mm512_setzero_si512());
 453         let r = _mm512_maskz_max_epi64(0b00001111, a, b);
 454         let e = _mm512_setr_epi64(7, 6, 5, 4, 0, 0, 0, 0);
 455         assert_eq_m512i(r, e);
 456     }
 457
 458     #[simd_test(enable = "avx512f")]
 459     unsafe fn test_mm512_max_pd() {
 460         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 461         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
 462         let r = _mm512_max_pd(a, b);
 463         let e = _mm512_setr_pd(7., 6., 5., 4., 4., 5., 6., 7.);
 464         assert_eq_m512d(r, e);
 465     }
 466
 467     #[simd_test(enable = "avx512f")]
 468     unsafe fn test_mm512_mask_max_pd() {
 469         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 470         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
 471         let r = _mm512_mask_max_pd(a, 0, a, b);
 472         assert_eq_m512d(r, a);
 473         let r = _mm512_mask_max_pd(a, 0b00001111, a, b);
 474         let e = _mm512_setr_pd(7., 6., 5., 4., 4., 5., 6., 7.);
 475         assert_eq_m512d(r, e);
 476     }
 477
 478     #[simd_test(enable = "avx512f")]
 479     unsafe fn test_mm512_maskz_max_pd() {
 480         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 481         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
 482         let r = _mm512_maskz_max_pd(0, a, b);
 483         assert_eq_m512d(r, _mm512_setzero_pd());
 484         let r = _mm512_maskz_max_pd(0b00001111, a, b);
 485         let e = _mm512_setr_pd(7., 6., 5., 4., 0., 0., 0., 0.);
 486         assert_eq_m512d(r, e);
 487     }
 488
 489     #[simd_test(enable = "avx512f")]
 490     unsafe fn test_mm512_max_epu64() {
 491         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 492         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 493         let r = _mm512_max_epu64(a, b);
 494         let e = _mm512_setr_epi64(7, 6, 5, 4, 4, 5, 6, 7);
 495         assert_eq_m512i(r, e);
 496     }
 497
 498     #[simd_test(enable = "avx512f")]
 499     unsafe fn test_mm512_mask_max_epu64() {
 500         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 501         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 502         let r = _mm512_mask_max_epu64(a, 0, a, b);
 503         assert_eq_m512i(r, a);
 504         let r = _mm512_mask_max_epu64(a, 0b00001111, a, b);
 505         let e = _mm512_setr_epi64(7, 6, 5, 4, 4, 5, 6, 7);
 506         assert_eq_m512i(r, e);
 507     }
 508
 509     #[simd_test(enable = "avx512f")]
 510     unsafe fn test_mm512_maskz_max_epu64() {
 511         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 512         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 513         let r = _mm512_maskz_max_epu64(0, a, b);
 514         assert_eq_m512i(r, _mm512_setzero_si512());
 515         let r = _mm512_maskz_max_epu64(0b00001111, a, b);
 516         let e = _mm512_setr_epi64(7, 6, 5, 4, 0, 0, 0, 0);
 517         assert_eq_m512i(r, e);
 518     }
 519
 520     #[simd_test(enable = "avx512f")]
 521     unsafe fn test_mm512_min_epi64() {
 522         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 523         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 524         let r = _mm512_min_epi64(a, b);
 525         let e = _mm512_setr_epi64(0, 1, 2, 3, 3, 2, 1, 0);
 526         assert_eq_m512i(r, e);
 527     }
 528
 529     #[simd_test(enable = "avx512f")]
 530     unsafe fn test_mm512_mask_min_epi64() {
 531         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 532         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 533         let r = _mm512_mask_min_epi64(a, 0, a, b);
 534         assert_eq_m512i(r, a);
 535         let r = _mm512_mask_min_epi64(a, 0b00001111, a, b);
 536         let e = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 537         assert_eq_m512i(r, e);
 538     }
 539
 540     #[simd_test(enable = "avx512f")]
 541     unsafe fn test_mm512_maskz_min_epi64() {
 542         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 543         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 544         let r = _mm512_maskz_min_epi64(0, a, b);
 545         assert_eq_m512i(r, _mm512_setzero_si512());
 546         let r = _mm512_maskz_min_epi64(0b00001111, a, b);
 547         let e = _mm512_setr_epi64(0, 1, 2, 3, 0, 0, 0, 0);
 548         assert_eq_m512i(r, e);
 549     }
 550
 551     #[simd_test(enable = "avx512f")]
 552     unsafe fn test_mm512_min_pd() {
 553         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 554         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
 555         let r = _mm512_min_pd(a, b);
 556         let e = _mm512_setr_pd(0., 1., 2., 3., 3., 2., 1., 0.);
 557         assert_eq_m512d(r, e);
 558     }
 559
 560     #[simd_test(enable = "avx512f")]
 561     unsafe fn test_mm512_mask_min_pd() {
 562         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 563         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
 564         let r = _mm512_mask_min_pd(a, 0, a, b);
 565         assert_eq_m512d(r, a);
 566         let r = _mm512_mask_min_pd(a, 0b00001111, a, b);
 567         let e = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 568         assert_eq_m512d(r, e);
 569     }
 570
 571     #[simd_test(enable = "avx512f")]
 572     unsafe fn test_mm512_maskz_min_pd() {
 573         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 574         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
 575         let r = _mm512_maskz_min_pd(0, a, b);
 576         assert_eq_m512d(r, _mm512_setzero_pd());
 577         let r = _mm512_maskz_min_pd(0b00001111, a, b);
 578         let e = _mm512_setr_pd(0., 1., 2., 3., 0., 0., 0., 0.);
 579         assert_eq_m512d(r, e);
 580     }
 581
 582     #[simd_test(enable = "avx512f")]
 583     unsafe fn test_mm512_min_epu64() {
 584         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 585         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 586         let r = _mm512_min_epu64(a, b);
 587         let e = _mm512_setr_epi64(0, 1, 2, 3, 3, 2, 1, 0);
 588         assert_eq_m512i(r, e);
 589     }
 590
 591     #[simd_test(enable = "avx512f")]
 592     unsafe fn test_mm512_mask_min_epu64() {
 593         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 594         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 595         let r = _mm512_mask_min_epu64(a, 0, a, b);
 596         assert_eq_m512i(r, a);
 597         let r = _mm512_mask_min_epu64(a, 0b00001111, a, b);
 598         let e = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 599         assert_eq_m512i(r, e);
 600     }
 601
 602     #[simd_test(enable = "avx512f")]
 603     unsafe fn test_mm512_maskz_min_epu64() {
 604         let a = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
 605         let b = _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0);
 606         let r = _mm512_maskz_min_epu64(0, a, b);
 607         assert_eq_m512i(r, _mm512_setzero_si512());
 608         let r = _mm512_maskz_min_epu64(0b00001111, a, b);
 609         let e = _mm512_setr_epi64(0, 1, 2, 3, 0, 0, 0, 0);
 610         assert_eq_m512i(r, e);
 611     }
 612
 613     #[simd_test(enable = "avx512f")]
 614     unsafe fn test_mm512_sqrt_pd() {
 615         let a = _mm512_setr_pd(0., 1., 4., 9., 16., 25., 36., 49.);
 616         let r = _mm512_sqrt_pd(a);
 617         let e = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 618         assert_eq_m512d(r, e);
 619     }
 620
 621     #[simd_test(enable = "avx512f")]
 622     unsafe fn test_mm512_mask_sqrt_pd() {
 623         let a = _mm512_setr_pd(0., 1., 4., 9., 16., 25., 36., 49.);
 624         let r = _mm512_mask_sqrt_pd(a, 0, a);
 625         assert_eq_m512d(r, a);
 626         let r = _mm512_mask_sqrt_pd(a, 0b00001111, a);
 627         let e = _mm512_setr_pd(0., 1., 2., 3., 16., 25., 36., 49.);
 628         assert_eq_m512d(r, e);
 629     }
 630
 631     #[simd_test(enable = "avx512f")]
 632     unsafe fn test_mm512_maskz_sqrt_pd() {
 633         let a = _mm512_setr_pd(0., 1., 4., 9., 16., 25., 36., 49.);
 634         let r = _mm512_maskz_sqrt_pd(0, a);
 635         assert_eq_m512d(r, _mm512_setzero_pd());
 636         let r = _mm512_maskz_sqrt_pd(0b00001111, a);
 637         let e = _mm512_setr_pd(0., 1., 2., 3., 0., 0., 0., 0.);
 638         assert_eq_m512d(r, e);
 639     }
 640
 641     #[simd_test(enable = "avx512f")]
 642     unsafe fn test_mm512_fmadd_pd() {
 643         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 644         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 645         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 646         let r = _mm512_fmadd_pd(a, b, c);
 647         let e = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
 648         assert_eq_m512d(r, e);
 649     }
 650
 651     #[simd_test(enable = "avx512f")]
 652     unsafe fn test_mm512_mask_fmadd_pd() {
 653         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 654         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 655         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 656         let r = _mm512_mask_fmadd_pd(a, 0, b, c);
 657         assert_eq_m512d(r, a);
 658         let r = _mm512_mask_fmadd_pd(a, 0b00001111, b, c);
 659         let e = _mm512_setr_pd(1., 2., 3., 4., 1., 1., 1., 1.);
 660         assert_eq_m512d(r, e);
 661     }
 662
 663     #[simd_test(enable = "avx512f")]
 664     unsafe fn test_mm512_maskz_fmadd_pd() {
 665         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 666         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 667         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 668         let r = _mm512_maskz_fmadd_pd(0, a, b, c);
 669         assert_eq_m512d(r, _mm512_setzero_pd());
 670         let r = _mm512_maskz_fmadd_pd(0b00001111, a, b, c);
 671         let e = _mm512_setr_pd(1., 2., 3., 4., 0., 0., 0., 0.);
 672         assert_eq_m512d(r, e);
 673     }
 674
 675     #[simd_test(enable = "avx512f")]
 676     unsafe fn test_mm512_mask3_fmadd_pd() {
 677         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 678         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 679         let c = _mm512_setr_pd(1., 1., 1., 1., 2., 2., 2., 2.);
 680         let r = _mm512_mask3_fmadd_pd(a, b, c, 0);
 681         assert_eq_m512d(r, c);
 682         let r = _mm512_mask3_fmadd_pd(a, b, c, 0b00001111);
 683         let e = _mm512_setr_pd(1., 2., 3., 4., 2., 2., 2., 2.);
 684         assert_eq_m512d(r, e);
 685     }
 686
 687     #[simd_test(enable = "avx512f")]
 688     unsafe fn test_mm512_fmsub_pd() {
 689         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 690         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 691         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 692         let r = _mm512_fmsub_pd(a, b, c);
 693         let e = _mm512_setr_pd(-1., 0., 1., 2., 3., 4., 5., 6.);
 694         assert_eq_m512d(r, e);
 695     }
 696
 697     #[simd_test(enable = "avx512f")]
 698     unsafe fn test_mm512_mask_fmsub_pd() {
 699         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 700         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 701         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 702         let r = _mm512_mask_fmsub_pd(a, 0, b, c);
 703         assert_eq_m512d(r, a);
 704         let r = _mm512_mask_fmsub_pd(a, 0b00001111, b, c);
 705         let e = _mm512_setr_pd(-1., 0., 1., 2., 1., 1., 1., 1.);
 706         assert_eq_m512d(r, e);
 707     }
 708
 709     #[simd_test(enable = "avx512f")]
 710     unsafe fn test_mm512_maskz_fmsub_pd() {
 711         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 712         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 713         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 714         let r = _mm512_maskz_fmsub_pd(0, a, b, c);
 715         assert_eq_m512d(r, _mm512_setzero_pd());
 716         let r = _mm512_maskz_fmsub_pd(0b00001111, a, b, c);
 717         let e = _mm512_setr_pd(-1., 0., 1., 2., 0., 0., 0., 0.);
 718         assert_eq_m512d(r, e);
 719     }
 720
 721     #[simd_test(enable = "avx512f")]
 722     unsafe fn test_mm512_mask3_fmsub_pd() {
 723         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 724         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 725         let c = _mm512_setr_pd(1., 1., 1., 1., 2., 2., 2., 2.);
 726         let r = _mm512_mask3_fmsub_pd(a, b, c, 0);
 727         assert_eq_m512d(r, c);
 728         let r = _mm512_mask3_fmsub_pd(a, b, c, 0b00001111);
 729         let e = _mm512_setr_pd(-1., 0., 1., 2., 2., 2., 2., 2.);
 730         assert_eq_m512d(r, e);
 731     }
 732
 733     #[simd_test(enable = "avx512f")]
 734     unsafe fn test_mm512_fmaddsub_pd() {
 735         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 736         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 737         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 738         let r = _mm512_fmaddsub_pd(a, b, c);
 739         let e = _mm512_setr_pd(-1., 2., 1., 4., 3., 6., 5., 8.);
 740         assert_eq_m512d(r, e);
 741     }
 742
 743     #[simd_test(enable = "avx512f")]
 744     unsafe fn test_mm512_mask_fmaddsub_pd() {
 745         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 746         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 747         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 748         let r = _mm512_mask_fmaddsub_pd(a, 0, b, c);
 749         assert_eq_m512d(r, a);
 750         let r = _mm512_mask_fmaddsub_pd(a, 0b00001111, b, c);
 751         let e = _mm512_setr_pd(-1., 2., 1., 4., 1., 1., 1., 1.);
 752         assert_eq_m512d(r, e);
 753     }
 754
 755     #[simd_test(enable = "avx512f")]
 756     unsafe fn test_mm512_maskz_fmaddsub_pd() {
 757         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 758         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 759         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 760         let r = _mm512_maskz_fmaddsub_pd(0, a, b, c);
 761         assert_eq_m512d(r, _mm512_setzero_pd());
 762         let r = _mm512_maskz_fmaddsub_pd(0b00001111, a, b, c);
 763         let e = _mm512_setr_pd(-1., 2., 1., 4., 0., 0., 0., 0.);
 764         assert_eq_m512d(r, e);
 765     }
 766
 767     #[simd_test(enable = "avx512f")]
 768     unsafe fn test_mm512_mask3_fmaddsub_pd() {
 769         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 770         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 771         let c = _mm512_setr_pd(1., 1., 1., 1., 2., 2., 2., 2.);
 772         let r = _mm512_mask3_fmaddsub_pd(a, b, c, 0);
 773         assert_eq_m512d(r, c);
 774         let r = _mm512_mask3_fmaddsub_pd(a, b, c, 0b00001111);
 775         let e = _mm512_setr_pd(-1., 2., 1., 4., 2., 2., 2., 2.);
 776         assert_eq_m512d(r, e);
 777     }
 778
 779     #[simd_test(enable = "avx512f")]
 780     unsafe fn test_mm512_fmsubadd_pd() {
 781         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 782         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 783         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 784         let r = _mm512_fmsubadd_pd(a, b, c);
 785         let e = _mm512_setr_pd(1., 0., 3., 2., 5., 4., 7., 6.);
 786         assert_eq_m512d(r, e);
 787     }
 788
 789     #[simd_test(enable = "avx512f")]
 790     unsafe fn test_mm512_mask_fmsubadd_pd() {
 791         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 792         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 793         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 794         let r = _mm512_mask_fmsubadd_pd(a, 0, b, c);
 795         assert_eq_m512d(r, a);
 796         let r = _mm512_mask_fmsubadd_pd(a, 0b00001111, b, c);
 797         let e = _mm512_setr_pd(1., 0., 3., 2., 1., 1., 1., 1.);
 798         assert_eq_m512d(r, e);
 799     }
 800
 801     #[simd_test(enable = "avx512f")]
 802     unsafe fn test_mm512_maskz_fmsubadd_pd() {
 803         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 804         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 805         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 806         let r = _mm512_maskz_fmsubadd_pd(0, a, b, c);
 807         assert_eq_m512d(r, _mm512_setzero_pd());
 808         let r = _mm512_maskz_fmsubadd_pd(0b00001111, a, b, c);
 809         let e = _mm512_setr_pd(1., 0., 3., 2., 0., 0., 0., 0.);
 810         assert_eq_m512d(r, e);
 811     }
 812
 813     #[simd_test(enable = "avx512f")]
 814     unsafe fn test_mm512_mask3_fmsubadd_pd() {
 815         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 816         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 817         let c = _mm512_setr_pd(1., 1., 1., 1., 2., 2., 2., 2.);
 818         let r = _mm512_mask3_fmsubadd_pd(a, b, c, 0);
 819         assert_eq_m512d(r, c);
 820         let r = _mm512_mask3_fmsubadd_pd(a, b, c, 0b00001111);
 821         let e = _mm512_setr_pd(1., 0., 3., 2., 2., 2., 2., 2.);
 822         assert_eq_m512d(r, e);
 823     }
 824
 825     #[simd_test(enable = "avx512f")]
 826     unsafe fn test_mm512_fnmadd_pd() {
 827         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 828         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 829         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 830         let r = _mm512_fnmadd_pd(a, b, c);
 831         let e = _mm512_setr_pd(1., 0., -1., -2., -3., -4., -5., -6.);
 832         assert_eq_m512d(r, e);
 833     }
 834
 835     #[simd_test(enable = "avx512f")]
 836     unsafe fn test_mm512_mask_fnmadd_pd() {
 837         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 838         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 839         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 840         let r = _mm512_mask_fnmadd_pd(a, 0, b, c);
 841         assert_eq_m512d(r, a);
 842         let r = _mm512_mask_fnmadd_pd(a, 0b00001111, b, c);
 843         let e = _mm512_setr_pd(1., 0., -1., -2., 1., 1., 1., 1.);
 844         assert_eq_m512d(r, e);
 845     }
 846
 847     #[simd_test(enable = "avx512f")]
 848     unsafe fn test_mm512_maskz_fnmadd_pd() {
 849         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 850         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 851         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 852         let r = _mm512_maskz_fnmadd_pd(0, a, b, c);
 853         assert_eq_m512d(r, _mm512_setzero_pd());
 854         let r = _mm512_maskz_fnmadd_pd(0b00001111, a, b, c);
 855         let e = _mm512_setr_pd(1., 0., -1., -2., 0., 0., 0., 0.);
 856         assert_eq_m512d(r, e);
 857     }
 858
 859     #[simd_test(enable = "avx512f")]
 860     unsafe fn test_mm512_mask3_fnmadd_pd() {
 861         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 862         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 863         let c = _mm512_setr_pd(1., 1., 1., 1., 2., 2., 2., 2.);
 864         let r = _mm512_mask3_fnmadd_pd(a, b, c, 0);
 865         assert_eq_m512d(r, c);
 866         let r = _mm512_mask3_fnmadd_pd(a, b, c, 0b00001111);
 867         let e = _mm512_setr_pd(1., 0., -1., -2., 2., 2., 2., 2.);
 868         assert_eq_m512d(r, e);
 869     }
 870
 871     #[simd_test(enable = "avx512f")]
 872     unsafe fn test_mm512_fnmsub_pd() {
 873         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 874         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 875         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 876         let r = _mm512_fnmsub_pd(a, b, c);
 877         let e = _mm512_setr_pd(-1., -2., -3., -4., -5., -6., -7., -8.);
 878         assert_eq_m512d(r, e);
 879     }
 880
 881     #[simd_test(enable = "avx512f")]
 882     unsafe fn test_mm512_mask_fnmsub_pd() {
 883         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 884         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 885         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 886         let r = _mm512_mask_fnmsub_pd(a, 0, b, c);
 887         assert_eq_m512d(r, a);
 888         let r = _mm512_mask_fnmsub_pd(a, 0b00001111, b, c);
 889         let e = _mm512_setr_pd(-1., -2., -3., -4., 1., 1., 1., 1.);
 890         assert_eq_m512d(r, e);
 891     }
 892
 893     #[simd_test(enable = "avx512f")]
 894     unsafe fn test_mm512_maskz_fnmsub_pd() {
 895         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 896         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 897         let c = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 898         let r = _mm512_maskz_fnmsub_pd(0, a, b, c);
 899         assert_eq_m512d(r, _mm512_setzero_pd());
 900         let r = _mm512_maskz_fnmsub_pd(0b00001111, a, b, c);
 901         let e = _mm512_setr_pd(-1., -2., -3., -4., 0., 0., 0., 0.);
 902         assert_eq_m512d(r, e);
 903     }
 904
 905     #[simd_test(enable = "avx512f")]
 906     unsafe fn test_mm512_mask3_fnmsub_pd() {
 907         let a = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
 908         let b = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
 909         let c = _mm512_setr_pd(1., 1., 1., 1., 2., 2., 2., 2.);
 910         let r = _mm512_mask3_fnmsub_pd(a, b, c, 0);
 911         assert_eq_m512d(r, c);
 912         let r = _mm512_mask3_fnmsub_pd(a, b, c, 0b00001111);
 913         let e = _mm512_setr_pd(-1., -2., -3., -4., 2., 2., 2., 2.);
 914         assert_eq_m512d(r, e);
 915     }
 916
 917     #[simd_test(enable = "avx512f")]
 918     unsafe fn test_mm512_rcp14_pd() {
 919         let a = _mm512_set1_pd(3.);
 920         let r = _mm512_rcp14_pd(a);
 921         let e = _mm512_set1_pd(0.3333320617675781);
 922         assert_eq_m512d(r, e);
 923     }
 924
 925     #[simd_test(enable = "avx512f")]
 926     unsafe fn test_mm512_mask_rcp14_pd() {
 927         let a = _mm512_set1_pd(3.);
 928         let r = _mm512_mask_rcp14_pd(a, 0, a);
 929         assert_eq_m512d(r, a);
 930         let r = _mm512_mask_rcp14_pd(a, 0b11110000, a);
 931         let e = _mm512_setr_pd(
 932             3.,
 933             3.,
 934             3.,
 935             3.,
 936             0.3333320617675781,
 937             0.3333320617675781,
 938             0.3333320617675781,
 939             0.3333320617675781,
 940         );
 941         assert_eq_m512d(r, e);
 942     }
 943
 944     #[simd_test(enable = "avx512f")]
 945     unsafe fn test_mm512_maskz_rcp14_pd() {
 946         let a = _mm512_set1_pd(3.);
 947         let r = _mm512_maskz_rcp14_pd(0, a);
 948         assert_eq_m512d(r, _mm512_setzero_pd());
 949         let r = _mm512_maskz_rcp14_pd(0b11110000, a);
 950         let e = _mm512_setr_pd(
 951             0.,
 952             0.,
 953             0.,
 954             0.,
 955             0.3333320617675781,
 956             0.3333320617675781,
 957             0.3333320617675781,
 958             0.3333320617675781,
 959         );
 960         assert_eq_m512d(r, e);
 961     }
 962
 963     #[simd_test(enable = "avx512f")]
 964     unsafe fn test_mm512_rsqrt14_pd() {
 965         let a = _mm512_set1_pd(3.);
 966         let r = _mm512_rsqrt14_pd(a);
 967         let e = _mm512_set1_pd(0.5773391723632813);
 968         assert_eq_m512d(r, e);
 969     }
 970
 971     #[simd_test(enable = "avx512f")]
 972     unsafe fn test_mm512_mask_rsqrt14_pd() {
 973         let a = _mm512_set1_pd(3.);
 974         let r = _mm512_mask_rsqrt14_pd(a, 0, a);
 975         assert_eq_m512d(r, a);
 976         let r = _mm512_mask_rsqrt14_pd(a, 0b11110000, a);
 977         let e = _mm512_setr_pd(
 978             3.,
 979             3.,
 980             3.,
 981             3.,
 982             0.5773391723632813,
 983             0.5773391723632813,
 984             0.5773391723632813,
 985             0.5773391723632813,
 986         );
 987         assert_eq_m512d(r, e);
 988     }
 989
 990     #[simd_test(enable = "avx512f")]
 991     unsafe fn test_mm512_maskz_rsqrt14_pd() {
 992         let a = _mm512_set1_pd(3.);
 993         let r = _mm512_maskz_rsqrt14_pd(0, a);
 994         assert_eq_m512d(r, _mm512_setzero_pd());
 995         let r = _mm512_maskz_rsqrt14_pd(0b11110000, a);
 996         let e = _mm512_setr_pd(
 997             0.,
 998             0.,
 999             0.,
1000             0.,
1001             0.5773391723632813,
1002             0.5773391723632813,
1003             0.5773391723632813,
1004             0.5773391723632813,
1005         );
1006         assert_eq_m512d(r, e);
1007     }
1008
1009     #[simd_test(enable = "avx512f")]
1010     unsafe fn test_mm512_getexp_pd() {
1011         let a = _mm512_set1_pd(3.);
1012         let r = _mm512_getexp_pd(a);
1013         let e = _mm512_set1_pd(1.);
1014         assert_eq_m512d(r, e);
1015     }
1016
1017     #[simd_test(enable = "avx512f")]
1018     unsafe fn test_mm512_mask_getexp_pd() {
1019         let a = _mm512_set1_pd(3.);
1020         let r = _mm512_mask_getexp_pd(a, 0, a);
1021         assert_eq_m512d(r, a);
1022         let r = _mm512_mask_getexp_pd(a, 0b11110000, a);
1023         let e = _mm512_setr_pd(3., 3., 3., 3., 1., 1., 1., 1.);
1024         assert_eq_m512d(r, e);
1025     }
1026
1027     #[simd_test(enable = "avx512f")]
1028     unsafe fn test_mm512_maskz_getexp_pd() {
1029         let a = _mm512_set1_pd(3.);
1030         let r = _mm512_maskz_getexp_pd(0, a);
1031         assert_eq_m512d(r, _mm512_setzero_pd());
1032         let r = _mm512_maskz_getexp_pd(0b11110000, a);
1033         let e = _mm512_setr_pd(0., 0., 0., 0., 1., 1., 1., 1.);
1034         assert_eq_m512d(r, e);
1035     }
1036
1037     #[simd_test(enable = "avx512f")]
1038     unsafe fn test_mm512_roundscale_pd() {
1039         let a = _mm512_set1_pd(1.1);
1040         let r = _mm512_roundscale_pd(a, 0);
1041         let e = _mm512_set1_pd(1.0);
1042         assert_eq_m512d(r, e);
1043     }
1044
1045     #[simd_test(enable = "avx512f")]
1046     unsafe fn test_mm512_mask_roundscale_pd() {
1047         let a = _mm512_set1_pd(1.1);
1048         let r = _mm512_mask_roundscale_pd(a, 0, a, 0);
1049         let e = _mm512_set1_pd(1.1);
1050         assert_eq_m512d(r, e);
1051         let r = _mm512_mask_roundscale_pd(a, 0b11111111, a, 0);
1052         let e = _mm512_set1_pd(1.0);
1053         assert_eq_m512d(r, e);
1054     }
1055
1056     #[simd_test(enable = "avx512f")]
1057     unsafe fn test_mm512_maskz_roundscale_pd() {
1058         let a = _mm512_set1_pd(1.1);
1059         let r = _mm512_maskz_roundscale_pd(0, a, 0);
1060         assert_eq_m512d(r, _mm512_setzero_pd());
1061         let r = _mm512_maskz_roundscale_pd(0b11111111, a, 0);
1062         let e = _mm512_set1_pd(1.0);
1063         assert_eq_m512d(r, e);
1064     }
1065
1066     #[simd_test(enable = "avx512f")]
1067     unsafe fn test_mm512_scalef_pd() {
1068         let a = _mm512_set1_pd(1.);
1069         let b = _mm512_set1_pd(3.);
1070         let r = _mm512_scalef_pd(a, b);
1071         let e = _mm512_set1_pd(8.);
1072         assert_eq_m512d(r, e);
1073     }
1074
1075     #[simd_test(enable = "avx512f")]
1076     unsafe fn test_mm512_mask_scalef_pd() {
1077         let a = _mm512_set1_pd(1.);
1078         let b = _mm512_set1_pd(3.);
1079         let r = _mm512_mask_scalef_pd(a, 0, a, b);
1080         assert_eq_m512d(r, a);
1081         let r = _mm512_mask_scalef_pd(a, 0b11110000, a, b);
1082         let e = _mm512_set_pd(8., 8., 8., 8., 1., 1., 1., 1.);
1083         assert_eq_m512d(r, e);
1084     }
1085
1086     #[simd_test(enable = "avx512f")]
1087     unsafe fn test_mm512_maskz_scalef_pd() {
1088         let a = _mm512_set1_pd(1.);
1089         let b = _mm512_set1_pd(3.);
1090         let r = _mm512_maskz_scalef_pd(0, a, b);
1091         assert_eq_m512d(r, _mm512_setzero_pd());
1092         let r = _mm512_maskz_scalef_pd(0b11110000, a, b);
1093         let e = _mm512_set_pd(8., 8., 8., 8., 0., 0., 0., 0.);
1094         assert_eq_m512d(r, e);
1095     }
1096
1097     #[simd_test(enable = "avx512f")]
1098     unsafe fn test_mm512_fixupimm_pd() {
1099         let a = _mm512_set1_pd(f64::NAN);
1100         let b = _mm512_set1_pd(f64::MAX);
1101         let c = _mm512_set1_epi64(i32::MAX as i64);
1102         let r = _mm512_fixupimm_pd(a, b, c, 5);
1103         let e = _mm512_set1_pd(0.0);
1104         assert_eq_m512d(r, e);
1105     }
1106
1107     #[simd_test(enable = "avx512f")]
1108     unsafe fn test_mm512_mask_fixupimm_pd() {
1109         let a = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, 1., 1., 1., 1.);
1110         let b = _mm512_set1_pd(f64::MAX);
1111         let c = _mm512_set1_epi64(i32::MAX as i64);
1112         let r = _mm512_mask_fixupimm_pd(a, 0b11110000, b, c, 5);
1113         let e = _mm512_set_pd(0., 0., 0., 0., 1., 1., 1., 1.);
1114         assert_eq_m512d(r, e);
1115     }
1116
1117     #[simd_test(enable = "avx512f")]
1118     unsafe fn test_mm512_maskz_fixupimm_pd() {
1119         let a = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, 1., 1., 1., 1.);
1120         let b = _mm512_set1_pd(f64::MAX);
1121         let c = _mm512_set1_epi64(i32::MAX as i64);
1122         let r = _mm512_maskz_fixupimm_pd(0b11110000, a, b, c, 5);
1123         let e = _mm512_set_pd(0., 0., 0., 0., 0., 0., 0., 0.);
1124         assert_eq_m512d(r, e);
1125     }
1126
1127     #[simd_test(enable = "avx512f")]
1128     unsafe fn test_mm512_ternarylogic_epi64() {
1129         let a = _mm512_set1_epi64(1 << 2);
1130         let b = _mm512_set1_epi64(1 << 1);
1131         let c = _mm512_set1_epi64(1 << 0);
1132         let r = _mm512_ternarylogic_epi64(a, b, c, 8);
1133         let e = _mm512_set1_epi64(0);
1134         assert_eq_m512i(r, e);
1135     }
1136
1137     #[simd_test(enable = "avx512f")]
1138     unsafe fn test_mm512_mask_ternarylogic_epi64() {
1139         let src = _mm512_set1_epi64(1 << 2);
1140         let a = _mm512_set1_epi64(1 << 1);
1141         let b = _mm512_set1_epi64(1 << 0);
1142         let r = _mm512_mask_ternarylogic_epi64(src, 0, a, b, 8);
1143         assert_eq_m512i(r, src);
1144         let r = _mm512_mask_ternarylogic_epi64(src, 0b11111111, a, b, 8);
1145         let e = _mm512_set1_epi64(0);
1146         assert_eq_m512i(r, e);
1147     }
1148
1149     #[simd_test(enable = "avx512f")]
1150     unsafe fn test_mm512_maskz_ternarylogic_epi64() {
1151         let a = _mm512_set1_epi64(1 << 2);
1152         let b = _mm512_set1_epi64(1 << 1);
1153         let c = _mm512_set1_epi64(1 << 0);
1154         let r = _mm512_maskz_ternarylogic_epi64(0, a, b, c, 9);
1155         assert_eq_m512i(r, _mm512_setzero_si512());
1156         let r = _mm512_maskz_ternarylogic_epi64(0b11111111, a, b, c, 8);
1157         let e = _mm512_set1_epi64(0);
1158         assert_eq_m512i(r, e);
1159     }
1160
1161     #[simd_test(enable = "avx512f")]
1162     unsafe fn test_mm512_getmant_pd() {
1163         let a = _mm512_set1_pd(10.);
1164         let r = _mm512_getmant_pd(a, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_SRC);
1165         let e = _mm512_set1_pd(1.25);
1166         assert_eq_m512d(r, e);
1167     }
1168
1169     #[simd_test(enable = "avx512f")]
1170     unsafe fn test_mm512_mask_getmant_pd() {
1171         let a = _mm512_set1_pd(10.);
1172         let r = _mm512_mask_getmant_pd(a, 0, a, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_SRC);
1173         assert_eq_m512d(r, a);
1174         let r = _mm512_mask_getmant_pd(a, 0b11110000, a, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_SRC);
1175         let e = _mm512_setr_pd(10., 10., 10., 10., 1.25, 1.25, 1.25, 1.25);
1176         assert_eq_m512d(r, e);
1177     }
1178
1179     #[simd_test(enable = "avx512f")]
1180     unsafe fn test_mm512_maskz_getmant_pd() {
1181         let a = _mm512_set1_pd(10.);
1182         let r = _mm512_maskz_getmant_pd(0, a, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_SRC);
1183         assert_eq_m512d(r, _mm512_setzero_pd());
1184         let r = _mm512_maskz_getmant_pd(0b11110000, a, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_SRC);
1185         let e = _mm512_setr_pd(0., 0., 0., 0., 1.25, 1.25, 1.25, 1.25);
1186         assert_eq_m512d(r, e);
1187     }
1188
1189     #[simd_test(enable = "avx512f")]
1190     unsafe fn test_mm512_cvtps_pd() {
1191         let a = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1192         let r = _mm512_cvtps_pd(a);
1193         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1194         assert_eq_m512d(r, e);
1195     }
1196
1197     #[simd_test(enable = "avx512f")]
1198     unsafe fn test_mm512_mask_cvtps_pd() {
1199         let a = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1200         let src = _mm512_set1_pd(0.);
1201         let r = _mm512_mask_cvtps_pd(src, 0, a);
1202         assert_eq_m512d(r, src);
1203         let r = _mm512_mask_cvtps_pd(src, 0b00001111, a);
1204         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
1205         assert_eq_m512d(r, e);
1206     }
1207
1208     #[simd_test(enable = "avx512f")]
1209     unsafe fn test_mm512_maskz_cvtps_pd() {
1210         let a = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1211         let r = _mm512_maskz_cvtps_pd(0, a);
1212         assert_eq_m512d(r, _mm512_setzero_pd());
1213         let r = _mm512_maskz_cvtps_pd(0b00001111, a);
1214         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
1215         assert_eq_m512d(r, e);
1216     }
1217
1218     #[simd_test(enable = "avx512f")]
1219     unsafe fn test_mm512_cvtpslo_pd() {
1220         let v2 = _mm512_setr_ps(
1221             0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5, 100., 100., 100., 100., 100., 100., 100., 100.,
1222         );
1223         let r = _mm512_cvtpslo_pd(v2);
1224         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1225         assert_eq_m512d(r, e);
1226     }
1227
1228     #[simd_test(enable = "avx512f")]
1229     unsafe fn test_mm512_mask_cvtpslo_pd() {
1230         let v2 = _mm512_setr_ps(
1231             0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5, 100., 100., 100., 100., 100., 100., 100., 100.,
1232         );
1233         let src = _mm512_set1_pd(0.);
1234         let r = _mm512_mask_cvtpslo_pd(src, 0, v2);
1235         assert_eq_m512d(r, src);
1236         let r = _mm512_mask_cvtpslo_pd(src, 0b00001111, v2);
1237         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
1238         assert_eq_m512d(r, e);
1239     }
1240
1241     #[simd_test(enable = "avx512f")]
1242     unsafe fn test_mm512_cvtpd_ps() {
1243         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1244         let r = _mm512_cvtpd_ps(a);
1245         let e = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1246         assert_eq_m256(r, e);
1247     }
1248
1249     #[simd_test(enable = "avx512f")]
1250     unsafe fn test_mm512_mask_cvtpd_ps() {
1251         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1252         let src = _mm256_set1_ps(0.);
1253         let r = _mm512_mask_cvtpd_ps(src, 0, a);
1254         assert_eq_m256(r, src);
1255         let r = _mm512_mask_cvtpd_ps(src, 0b00001111, a);
1256         let e = _mm256_setr_ps(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
1257         assert_eq_m256(r, e);
1258     }
1259
1260     #[simd_test(enable = "avx512f")]
1261     unsafe fn test_mm512_maskz_cvtpd_ps() {
1262         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1263         let r = _mm512_maskz_cvtpd_ps(0, a);
1264         assert_eq_m256(r, _mm256_setzero_ps());
1265         let r = _mm512_maskz_cvtpd_ps(0b00001111, a);
1266         let e = _mm256_setr_ps(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
1267         assert_eq_m256(r, e);
1268     }
1269
1270     #[simd_test(enable = "avx512f")]
1271     unsafe fn test_mm512_cvtpd_pslo() {
1272         let v2 = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1273         let r = _mm512_cvtpd_pslo(v2);
1274         let e = _mm512_setr_ps(
1275             0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5, 0., 0., 0., 0., 0., 0., 0., 0.,
1276         );
1277         assert_eq_m512(r, e);
1278     }
1279
1280     #[simd_test(enable = "avx512f")]
1281     unsafe fn test_mm512_mask_cvtpd_pslo() {
1282         let v2 = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1283         let src = _mm512_set1_ps(0.);
1284         let r = _mm512_mask_cvtpd_pslo(src, 0, v2);
1285         assert_eq_m512(r, src);
1286         let r = _mm512_mask_cvtpd_pslo(src, 0b00001111, v2);
1287         let e = _mm512_setr_ps(
1288             0., -1.5, 2., -3.5, 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.,
1289         );
1290         assert_eq_m512(r, e);
1291     }
1292
1293     #[simd_test(enable = "avx512f")]
1294     unsafe fn test_mm512_cvtepi8_epi64() {
1295         let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1296         let r = _mm512_cvtepi8_epi64(a);
1297         let e = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1298         assert_eq_m512i(r, e);
1299     }
1300
1301     #[simd_test(enable = "avx512f")]
1302     unsafe fn test_mm512_mask_cvtepi8_epi64() {
1303         let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1304         let src = _mm512_set1_epi64(-1);
1305         let r = _mm512_mask_cvtepi8_epi64(src, 0, a);
1306         assert_eq_m512i(r, src);
1307         let r = _mm512_mask_cvtepi8_epi64(src, 0b00001111, a);
1308         let e = _mm512_set_epi64(-1, -1, -1, -1, 12, 13, 14, 15);
1309         assert_eq_m512i(r, e);
1310     }
1311
1312     #[simd_test(enable = "avx512f")]
1313     unsafe fn test_mm512_maskz_cvtepi8_epi64() {
1314         let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1315         let r = _mm512_maskz_cvtepi8_epi64(0, a);
1316         assert_eq_m512i(r, _mm512_setzero_si512());
1317         let r = _mm512_maskz_cvtepi8_epi64(0b00001111, a);
1318         let e = _mm512_set_epi64(0, 0, 0, 0, 12, 13, 14, 15);
1319         assert_eq_m512i(r, e);
1320     }
1321
1322     #[simd_test(enable = "avx512f")]
1323     unsafe fn test_mm512_cvtepu8_epi64() {
1324         let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1325         let r = _mm512_cvtepu8_epi64(a);
1326         let e = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1327         assert_eq_m512i(r, e);
1328     }
1329
1330     #[simd_test(enable = "avx512f")]
1331     unsafe fn test_mm512_mask_cvtepu8_epi64() {
1332         let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1333         let src = _mm512_set1_epi64(-1);
1334         let r = _mm512_mask_cvtepu8_epi64(src, 0, a);
1335         assert_eq_m512i(r, src);
1336         let r = _mm512_mask_cvtepu8_epi64(src, 0b00001111, a);
1337         let e = _mm512_set_epi64(-1, -1, -1, -1, 12, 13, 14, 15);
1338         assert_eq_m512i(r, e);
1339     }
1340
1341     #[simd_test(enable = "avx512f")]
1342     unsafe fn test_mm512_maskz_cvtepu8_epi64() {
1343         let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1344         let r = _mm512_maskz_cvtepu8_epi64(0, a);
1345         assert_eq_m512i(r, _mm512_setzero_si512());
1346         let r = _mm512_maskz_cvtepu8_epi64(0b00001111, a);
1347         let e = _mm512_set_epi64(0, 0, 0, 0, 12, 13, 14, 15);
1348         assert_eq_m512i(r, e);
1349     }
1350
1351     #[simd_test(enable = "avx512f")]
1352     unsafe fn test_mm512_cvtepi16_epi64() {
1353         let a = _mm_set_epi16(8, 9, 10, 11, 12, 13, 14, 15);
1354         let r = _mm512_cvtepi16_epi64(a);
1355         let e = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1356         assert_eq_m512i(r, e);
1357     }
1358
1359     #[simd_test(enable = "avx512f")]
1360     unsafe fn test_mm512_mask_cvtepi16_epi64() {
1361         let a = _mm_set_epi16(8, 9, 10, 11, 12, 13, 14, 15);
1362         let src = _mm512_set1_epi64(-1);
1363         let r = _mm512_mask_cvtepi16_epi64(src, 0, a);
1364         assert_eq_m512i(r, src);
1365         let r = _mm512_mask_cvtepi16_epi64(src, 0b00001111, a);
1366         let e = _mm512_set_epi64(-1, -1, -1, -1, 12, 13, 14, 15);
1367         assert_eq_m512i(r, e);
1368     }
1369
1370     #[simd_test(enable = "avx512f")]
1371     unsafe fn test_mm512_maskz_cvtepi16_epi64() {
1372         let a = _mm_set_epi16(8, 9, 10, 11, 12, 13, 14, 15);
1373         let r = _mm512_maskz_cvtepi16_epi64(0, a);
1374         assert_eq_m512i(r, _mm512_setzero_si512());
1375         let r = _mm512_maskz_cvtepi16_epi64(0b00001111, a);
1376         let e = _mm512_set_epi64(0, 0, 0, 0, 12, 13, 14, 15);
1377         assert_eq_m512i(r, e);
1378     }
1379
1380     #[simd_test(enable = "avx512f")]
1381     unsafe fn test_mm512_cvtepu16_epi64() {
1382         let a = _mm_set_epi16(8, 9, 10, 11, 12, 13, 14, 15);
1383         let r = _mm512_cvtepu16_epi64(a);
1384         let e = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1385         assert_eq_m512i(r, e);
1386     }
1387
1388     #[simd_test(enable = "avx512f")]
1389     unsafe fn test_mm512_mask_cvtepu16_epi64() {
1390         let a = _mm_set_epi16(8, 9, 10, 11, 12, 13, 14, 15);
1391         let src = _mm512_set1_epi64(-1);
1392         let r = _mm512_mask_cvtepu16_epi64(src, 0, a);
1393         assert_eq_m512i(r, src);
1394         let r = _mm512_mask_cvtepu16_epi64(src, 0b00001111, a);
1395         let e = _mm512_set_epi64(-1, -1, -1, -1, 12, 13, 14, 15);
1396         assert_eq_m512i(r, e);
1397     }
1398
1399     #[simd_test(enable = "avx512f")]
1400     unsafe fn test_mm512_maskz_cvtepu16_epi64() {
1401         let a = _mm_set_epi16(8, 9, 10, 11, 12, 13, 14, 15);
1402         let r = _mm512_maskz_cvtepu16_epi64(0, a);
1403         assert_eq_m512i(r, _mm512_setzero_si512());
1404         let r = _mm512_maskz_cvtepu16_epi64(0b00001111, a);
1405         let e = _mm512_set_epi64(0, 0, 0, 0, 12, 13, 14, 15);
1406         assert_eq_m512i(r, e);
1407     }
1408
1409     #[simd_test(enable = "avx512f")]
1410     unsafe fn test_mm512_cvtepi32_epi64() {
1411         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1412         let r = _mm512_cvtepi32_epi64(a);
1413         let e = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1414         assert_eq_m512i(r, e);
1415     }
1416
1417     #[simd_test(enable = "avx512f")]
1418     unsafe fn test_mm512_mask_cvtepi32_epi64() {
1419         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1420         let src = _mm512_set1_epi64(-1);
1421         let r = _mm512_mask_cvtepi32_epi64(src, 0, a);
1422         assert_eq_m512i(r, src);
1423         let r = _mm512_mask_cvtepi32_epi64(src, 0b00001111, a);
1424         let e = _mm512_set_epi64(-1, -1, -1, -1, 12, 13, 14, 15);
1425         assert_eq_m512i(r, e);
1426     }
1427
1428     #[simd_test(enable = "avx512f")]
1429     unsafe fn test_mm512_maskz_cvtepi32_epi64() {
1430         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1431         let r = _mm512_maskz_cvtepi32_epi64(0, a);
1432         assert_eq_m512i(r, _mm512_setzero_si512());
1433         let r = _mm512_maskz_cvtepi32_epi64(0b00001111, a);
1434         let e = _mm512_set_epi64(0, 0, 0, 0, 12, 13, 14, 15);
1435         assert_eq_m512i(r, e);
1436     }
1437
1438     #[simd_test(enable = "avx512f")]
1439     unsafe fn test_mm512_cvtepu32_epi64() {
1440         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1441         let r = _mm512_cvtepu32_epi64(a);
1442         let e = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1443         assert_eq_m512i(r, e);
1444     }
1445
1446     #[simd_test(enable = "avx512f")]
1447     unsafe fn test_mm512_mask_cvtepu32_epi64() {
1448         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1449         let src = _mm512_set1_epi64(-1);
1450         let r = _mm512_mask_cvtepu32_epi64(src, 0, a);
1451         assert_eq_m512i(r, src);
1452         let r = _mm512_mask_cvtepu32_epi64(src, 0b00001111, a);
1453         let e = _mm512_set_epi64(-1, -1, -1, -1, 12, 13, 14, 15);
1454         assert_eq_m512i(r, e);
1455     }
1456
1457     #[simd_test(enable = "avx512f")]
1458     unsafe fn test_mm512_maskz_cvtepu32_epi64() {
1459         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1460         let r = _mm512_maskz_cvtepu32_epi64(0, a);
1461         assert_eq_m512i(r, _mm512_setzero_si512());
1462         let r = _mm512_maskz_cvtepu32_epi64(0b00001111, a);
1463         let e = _mm512_set_epi64(0, 0, 0, 0, 12, 13, 14, 15);
1464         assert_eq_m512i(r, e);
1465     }
1466
1467     #[simd_test(enable = "avx512f")]
1468     unsafe fn test_mm512_cvtepi32_pd() {
1469         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1470         let r = _mm512_cvtepi32_pd(a);
1471         let e = _mm512_set_pd(8., 9., 10., 11., 12., 13., 14., 15.);
1472         assert_eq_m512d(r, e);
1473     }
1474
1475     #[simd_test(enable = "avx512f")]
1476     unsafe fn test_mm512_mask_cvtepi32_pd() {
1477         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1478         let src = _mm512_set1_pd(-1.);
1479         let r = _mm512_mask_cvtepi32_pd(src, 0, a);
1480         assert_eq_m512d(r, src);
1481         let r = _mm512_mask_cvtepi32_pd(src, 0b00001111, a);
1482         let e = _mm512_set_pd(-1., -1., -1., -1., 12., 13., 14., 15.);
1483         assert_eq_m512d(r, e);
1484     }
1485
1486     #[simd_test(enable = "avx512f")]
1487     unsafe fn test_mm512_maskz_cvtepi32_pd() {
1488         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1489         let r = _mm512_maskz_cvtepi32_pd(0, a);
1490         assert_eq_m512d(r, _mm512_setzero_pd());
1491         let r = _mm512_maskz_cvtepi32_pd(0b00001111, a);
1492         let e = _mm512_set_pd(0., 0., 0., 0., 12., 13., 14., 15.);
1493         assert_eq_m512d(r, e);
1494     }
1495
1496     #[simd_test(enable = "avx512f")]
1497     unsafe fn test_mm512_cvtepu32_pd() {
1498         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1499         let r = _mm512_cvtepu32_pd(a);
1500         let e = _mm512_set_pd(8., 9., 10., 11., 12., 13., 14., 15.);
1501         assert_eq_m512d(r, e);
1502     }
1503
1504     #[simd_test(enable = "avx512f")]
1505     unsafe fn test_mm512_mask_cvtepu32_pd() {
1506         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1507         let src = _mm512_set1_pd(-1.);
1508         let r = _mm512_mask_cvtepu32_pd(src, 0, a);
1509         assert_eq_m512d(r, src);
1510         let r = _mm512_mask_cvtepu32_pd(src, 0b00001111, a);
1511         let e = _mm512_set_pd(-1., -1., -1., -1., 12., 13., 14., 15.);
1512         assert_eq_m512d(r, e);
1513     }
1514
1515     #[simd_test(enable = "avx512f")]
1516     unsafe fn test_mm512_maskz_cvtepu32_pd() {
1517         let a = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1518         let r = _mm512_maskz_cvtepu32_pd(0, a);
1519         assert_eq_m512d(r, _mm512_setzero_pd());
1520         let r = _mm512_maskz_cvtepu32_pd(0b00001111, a);
1521         let e = _mm512_set_pd(0., 0., 0., 0., 12., 13., 14., 15.);
1522         assert_eq_m512d(r, e);
1523     }
1524
1525     #[simd_test(enable = "avx512f")]
1526     unsafe fn test_mm512_cvtepi32lo_pd() {
1527         let a = _mm512_set_epi32(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1528         let r = _mm512_cvtepi32lo_pd(a);
1529         let e = _mm512_set_pd(8., 9., 10., 11., 12., 13., 14., 15.);
1530         assert_eq_m512d(r, e);
1531     }
1532
1533     #[simd_test(enable = "avx512f")]
1534     unsafe fn test_mm512_mask_cvtepi32lo_pd() {
1535         let a = _mm512_set_epi32(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1536         let src = _mm512_set1_pd(-1.);
1537         let r = _mm512_mask_cvtepi32lo_pd(src, 0, a);
1538         assert_eq_m512d(r, src);
1539         let r = _mm512_mask_cvtepi32lo_pd(src, 0b00001111, a);
1540         let e = _mm512_set_pd(-1., -1., -1., -1., 12., 13., 14., 15.);
1541         assert_eq_m512d(r, e);
1542     }
1543
1544     #[simd_test(enable = "avx512f")]
1545     unsafe fn test_mm512_cvtepu32lo_pd() {
1546         let a = _mm512_set_epi32(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1547         let r = _mm512_cvtepu32lo_pd(a);
1548         let e = _mm512_set_pd(8., 9., 10., 11., 12., 13., 14., 15.);
1549         assert_eq_m512d(r, e);
1550     }
1551
1552     #[simd_test(enable = "avx512f")]
1553     unsafe fn test_mm512_mask_cvtepu32lo_pd() {
1554         let a = _mm512_set_epi32(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
1555         let src = _mm512_set1_pd(-1.);
1556         let r = _mm512_mask_cvtepu32lo_pd(src, 0, a);
1557         assert_eq_m512d(r, src);
1558         let r = _mm512_mask_cvtepu32lo_pd(src, 0b00001111, a);
1559         let e = _mm512_set_pd(-1., -1., -1., -1., 12., 13., 14., 15.);
1560         assert_eq_m512d(r, e);
1561     }
1562
1563     #[simd_test(enable = "avx512f")]
1564     unsafe fn test_mm512_cvtepi64_epi32() {
1565         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1566         let r = _mm512_cvtepi64_epi32(a);
1567         let e = _mm256_set_epi32(8, 9, 10, 11, 12, 13, 14, 15);
1568         assert_eq_m256i(r, e);
1569     }
1570
1571     #[simd_test(enable = "avx512f")]
1572     unsafe fn test_mm512_mask_cvtepi64_epi32() {
1573         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1574         let src = _mm256_set1_epi32(-1);
1575         let r = _mm512_mask_cvtepi64_epi32(src, 0, a);
1576         assert_eq_m256i(r, src);
1577         let r = _mm512_mask_cvtepi64_epi32(src, 0b00001111, a);
1578         let e = _mm256_set_epi32(-1, -1, -1, -1, 12, 13, 14, 15);
1579         assert_eq_m256i(r, e);
1580     }
1581
1582     #[simd_test(enable = "avx512f")]
1583     unsafe fn test_mm512_maskz_cvtepi64_epi32() {
1584         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1585         let r = _mm512_maskz_cvtepi64_epi32(0, a);
1586         assert_eq_m256i(r, _mm256_setzero_si256());
1587         let r = _mm512_maskz_cvtepi64_epi32(0b00001111, a);
1588         let e = _mm256_set_epi32(0, 0, 0, 0, 12, 13, 14, 15);
1589         assert_eq_m256i(r, e);
1590     }
1591
1592     #[simd_test(enable = "avx512f")]
1593     unsafe fn test_mm512_cvtepi64_epi16() {
1594         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1595         let r = _mm512_cvtepi64_epi16(a);
1596         let e = _mm_set_epi16(8, 9, 10, 11, 12, 13, 14, 15);
1597         assert_eq_m128i(r, e);
1598     }
1599
1600     #[simd_test(enable = "avx512f")]
1601     unsafe fn test_mm512_mask_cvtepi64_epi16() {
1602         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1603         let src = _mm_set1_epi16(-1);
1604         let r = _mm512_mask_cvtepi64_epi16(src, 0, a);
1605         assert_eq_m128i(r, src);
1606         let r = _mm512_mask_cvtepi64_epi16(src, 0b00001111, a);
1607         let e = _mm_set_epi16(-1, -1, -1, -1, 12, 13, 14, 15);
1608         assert_eq_m128i(r, e);
1609     }
1610
1611     #[simd_test(enable = "avx512f")]
1612     unsafe fn test_mm512_maskz_cvtepi64_epi16() {
1613         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1614         let r = _mm512_maskz_cvtepi64_epi16(0, a);
1615         assert_eq_m128i(r, _mm_setzero_si128());
1616         let r = _mm512_maskz_cvtepi64_epi16(0b00001111, a);
1617         let e = _mm_set_epi16(0, 0, 0, 0, 12, 13, 14, 15);
1618         assert_eq_m128i(r, e);
1619     }
1620
1621     #[simd_test(enable = "avx512f")]
1622     unsafe fn test_mm512_cvtepi64_epi8() {
1623         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1624         let r = _mm512_cvtepi64_epi8(a);
1625         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 8, 9, 10, 11, 12, 13, 14, 15);
1626         assert_eq_m128i(r, e);
1627     }
1628
1629     #[simd_test(enable = "avx512f")]
1630     unsafe fn test_mm512_mask_cvtepi64_epi8() {
1631         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1632         let src = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1, -1, -1);
1633         let r = _mm512_mask_cvtepi64_epi8(src, 0, a);
1634         assert_eq_m128i(r, src);
1635         let r = _mm512_mask_cvtepi64_epi8(src, 0b00001111, a);
1636         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, 12, 13, 14, 15);
1637         assert_eq_m128i(r, e);
1638     }
1639
1640     #[simd_test(enable = "avx512f")]
1641     unsafe fn test_mm512_maskz_cvtepi64_epi8() {
1642         let a = _mm512_set_epi64(8, 9, 10, 11, 12, 13, 14, 15);
1643         let r = _mm512_maskz_cvtepi64_epi8(0, a);
1644         assert_eq_m128i(r, _mm_setzero_si128());
1645         let r = _mm512_maskz_cvtepi64_epi8(0b00001111, a);
1646         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 13, 14, 15);
1647         assert_eq_m128i(r, e);
1648     }
1649
1650     #[simd_test(enable = "avx512f")]
1651     unsafe fn test_mm512_cvtsepi64_epi32() {
1652         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1653         let r = _mm512_cvtsepi64_epi32(a);
1654         let e = _mm256_set_epi32(0, 1, 2, 3, 4, 5, i32::MIN, i32::MAX);
1655         assert_eq_m256i(r, e);
1656     }
1657
1658     #[simd_test(enable = "avx512f")]
1659     unsafe fn test_mm512_mask_cvtsepi64_epi32() {
1660         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1661         let src = _mm256_set1_epi32(-1);
1662         let r = _mm512_mask_cvtsepi64_epi32(src, 0, a);
1663         assert_eq_m256i(r, src);
1664         let r = _mm512_mask_cvtsepi64_epi32(src, 0b00001111, a);
1665         let e = _mm256_set_epi32(-1, -1, -1, -1, 4, 5, i32::MIN, i32::MAX);
1666         assert_eq_m256i(r, e);
1667     }
1668
1669     #[simd_test(enable = "avx512f")]
1670     unsafe fn test_mm512_maskz_cvtsepi64_epi32() {
1671         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1672         let r = _mm512_maskz_cvtsepi64_epi32(0, a);
1673         assert_eq_m256i(r, _mm256_setzero_si256());
1674         let r = _mm512_maskz_cvtsepi64_epi32(0b00001111, a);
1675         let e = _mm256_set_epi32(0, 0, 0, 0, 4, 5, i32::MIN, i32::MAX);
1676         assert_eq_m256i(r, e);
1677     }
1678
1679     #[simd_test(enable = "avx512f")]
1680     unsafe fn test_mm512_cvtsepi64_epi16() {
1681         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1682         let r = _mm512_cvtsepi64_epi16(a);
1683         let e = _mm_set_epi16(0, 1, 2, 3, 4, 5, i16::MIN, i16::MAX);
1684         assert_eq_m128i(r, e);
1685     }
1686
1687     #[simd_test(enable = "avx512f")]
1688     unsafe fn test_mm512_mask_cvtsepi64_epi16() {
1689         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1690         let src = _mm_set1_epi16(-1);
1691         let r = _mm512_mask_cvtsepi64_epi16(src, 0, a);
1692         assert_eq_m128i(r, src);
1693         let r = _mm512_mask_cvtsepi64_epi16(src, 0b00001111, a);
1694         let e = _mm_set_epi16(-1, -1, -1, -1, 4, 5, i16::MIN, i16::MAX);
1695         assert_eq_m128i(r, e);
1696     }
1697
1698     #[simd_test(enable = "avx512f")]
1699     unsafe fn test_mm512_maskz_cvtsepi64_epi16() {
1700         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1701         let r = _mm512_maskz_cvtsepi64_epi16(0, a);
1702         assert_eq_m128i(r, _mm_setzero_si128());
1703         let r = _mm512_maskz_cvtsepi64_epi16(0b00001111, a);
1704         let e = _mm_set_epi16(0, 0, 0, 0, 4, 5, i16::MIN, i16::MAX);
1705         assert_eq_m128i(r, e);
1706     }
1707
1708     #[simd_test(enable = "avx512f")]
1709     unsafe fn test_mm512_cvtsepi64_epi8() {
1710         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1711         let r = _mm512_cvtsepi64_epi8(a);
1712         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 5, i8::MIN, i8::MAX);
1713         assert_eq_m128i(r, e);
1714     }
1715
1716     #[simd_test(enable = "avx512f")]
1717     unsafe fn test_mm512_mask_cvtsepi64_epi8() {
1718         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1719         let src = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1, -1, -1);
1720         let r = _mm512_mask_cvtsepi64_epi8(src, 0, a);
1721         assert_eq_m128i(r, src);
1722         let r = _mm512_mask_cvtsepi64_epi8(src, 0b00001111, a);
1723         let e = _mm_set_epi8(
1724             0,
1725             0,
1726             0,
1727             0,
1728             0,
1729             0,
1730             0,
1731             0,
1732             -1,
1733             -1,
1734             -1,
1735             -1,
1736             4,
1737             5,
1738             i8::MIN,
1739             i8::MAX,
1740         );
1741         assert_eq_m128i(r, e);
1742     }
1743
1744     #[simd_test(enable = "avx512f")]
1745     unsafe fn test_mm512_maskz_cvtsepi64_epi8() {
1746         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MAX);
1747         let r = _mm512_maskz_cvtsepi64_epi8(0, a);
1748         assert_eq_m128i(r, _mm_setzero_si128());
1749         let r = _mm512_maskz_cvtsepi64_epi8(0b00001111, a);
1750         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 5, i8::MIN, i8::MAX);
1751         assert_eq_m128i(r, e);
1752     }
1753
1754     #[simd_test(enable = "avx512f")]
1755     unsafe fn test_mm512_cvtusepi64_epi32() {
1756         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1757         let r = _mm512_cvtusepi64_epi32(a);
1758         let e = _mm256_set_epi32(0, 1, 2, 3, 4, 5, -1, -1);
1759         assert_eq_m256i(r, e);
1760     }
1761
1762     #[simd_test(enable = "avx512f")]
1763     unsafe fn test_mm512_mask_cvtusepi64_epi32() {
1764         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1765         let src = _mm256_set1_epi32(-1);
1766         let r = _mm512_mask_cvtusepi64_epi32(src, 0, a);
1767         assert_eq_m256i(r, src);
1768         let r = _mm512_mask_cvtusepi64_epi32(src, 0b00001111, a);
1769         let e = _mm256_set_epi32(-1, -1, -1, -1, 4, 5, -1, -1);
1770         assert_eq_m256i(r, e);
1771     }
1772
1773     #[simd_test(enable = "avx512f")]
1774     unsafe fn test_mm512_maskz_cvtusepi64_epi32() {
1775         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1776         let r = _mm512_maskz_cvtusepi64_epi32(0, a);
1777         assert_eq_m256i(r, _mm256_setzero_si256());
1778         let r = _mm512_maskz_cvtusepi64_epi32(0b00001111, a);
1779         let e = _mm256_set_epi32(0, 0, 0, 0, 4, 5, -1, -1);
1780         assert_eq_m256i(r, e);
1781     }
1782
1783     #[simd_test(enable = "avx512f")]
1784     unsafe fn test_mm512_cvtusepi64_epi16() {
1785         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1786         let r = _mm512_cvtusepi64_epi16(a);
1787         let e = _mm_set_epi16(0, 1, 2, 3, 4, 5, -1, -1);
1788         assert_eq_m128i(r, e);
1789     }
1790
1791     #[simd_test(enable = "avx512f")]
1792     unsafe fn test_mm512_mask_cvtusepi64_epi16() {
1793         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1794         let src = _mm_set1_epi16(-1);
1795         let r = _mm512_mask_cvtusepi64_epi16(src, 0, a);
1796         assert_eq_m128i(r, src);
1797         let r = _mm512_mask_cvtusepi64_epi16(src, 0b00001111, a);
1798         let e = _mm_set_epi16(-1, -1, -1, -1, 4, 5, -1, -1);
1799         assert_eq_m128i(r, e);
1800     }
1801
1802     #[simd_test(enable = "avx512f")]
1803     unsafe fn test_mm512_maskz_cvtusepi64_epi16() {
1804         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1805         let r = _mm512_maskz_cvtusepi64_epi16(0, a);
1806         assert_eq_m128i(r, _mm_setzero_si128());
1807         let r = _mm512_maskz_cvtusepi64_epi16(0b00001111, a);
1808         let e = _mm_set_epi16(0, 0, 0, 0, 4, 5, -1, -1);
1809         assert_eq_m128i(r, e);
1810     }
1811
1812     #[simd_test(enable = "avx512f")]
1813     unsafe fn test_mm512_cvtusepi64_epi8() {
1814         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1815         let r = _mm512_cvtusepi64_epi8(a);
1816         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 5, -1, -1);
1817         assert_eq_m128i(r, e);
1818     }
1819
1820     #[simd_test(enable = "avx512f")]
1821     unsafe fn test_mm512_mask_cvtusepi64_epi8() {
1822         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1823         let src = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1, -1, -1);
1824         let r = _mm512_mask_cvtusepi64_epi8(src, 0, a);
1825         assert_eq_m128i(r, src);
1826         let r = _mm512_mask_cvtusepi64_epi8(src, 0b00001111, a);
1827         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, 4, 5, -1, -1);
1828         assert_eq_m128i(r, e);
1829     }
1830
1831     #[simd_test(enable = "avx512f")]
1832     unsafe fn test_mm512_maskz_cvtusepi64_epi8() {
1833         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, i64::MIN, i64::MIN);
1834         let r = _mm512_maskz_cvtusepi64_epi8(0, a);
1835         assert_eq_m128i(r, _mm_setzero_si128());
1836         let r = _mm512_maskz_cvtusepi64_epi8(0b00001111, a);
1837         let e = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 5, -1, -1);
1838         assert_eq_m128i(r, e);
1839     }
1840
1841     #[simd_test(enable = "avx512f")]
1842     unsafe fn test_mm512_cvtt_roundpd_epi32() {
1843         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1844         let r = _mm512_cvtt_roundpd_epi32(a, _MM_FROUND_NO_EXC);
1845         let e = _mm256_setr_epi32(0, -1, 2, -3, 4, -5, 6, -7);
1846         assert_eq_m256i(r, e);
1847     }
1848
1849     #[simd_test(enable = "avx512f")]
1850     unsafe fn test_mm512_mask_cvtt_roundpd_epi32() {
1851         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1852         let src = _mm256_set1_epi32(0);
1853         let r = _mm512_mask_cvtt_roundpd_epi32(src, 0, a, _MM_FROUND_NO_EXC);
1854         assert_eq_m256i(r, src);
1855         let r = _mm512_mask_cvtt_roundpd_epi32(src, 0b00001111, a, _MM_FROUND_NO_EXC);
1856         let e = _mm256_setr_epi32(0, -1, 2, -3, 0, 0, 0, 0);
1857         assert_eq_m256i(r, e);
1858     }
1859
1860     #[simd_test(enable = "avx512f")]
1861     unsafe fn test_mm512_maskz_cvtt_roundpd_epi32() {
1862         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1863         let r = _mm512_maskz_cvtt_roundpd_epi32(0, a, _MM_FROUND_NO_EXC);
1864         assert_eq_m256i(r, _mm256_setzero_si256());
1865         let r = _mm512_maskz_cvtt_roundpd_epi32(0b00001111, a, _MM_FROUND_NO_EXC);
1866         let e = _mm256_setr_epi32(0, -1, 2, -3, 0, 0, 0, 0);
1867         assert_eq_m256i(r, e);
1868     }
1869
1870     #[simd_test(enable = "avx512f")]
1871     unsafe fn test_mm512_cvtt_roundpd_epu32() {
1872         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1873         let r = _mm512_cvtt_roundpd_epu32(a, _MM_FROUND_NO_EXC);
1874         let e = _mm256_setr_epi32(0, -1, 2, -1, 4, -1, 6, -1);
1875         assert_eq_m256i(r, e);
1876     }
1877
1878     #[simd_test(enable = "avx512f")]
1879     unsafe fn test_mm512_mask_cvtt_roundpd_epu32() {
1880         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1881         let src = _mm256_set1_epi32(0);
1882         let r = _mm512_mask_cvtt_roundpd_epu32(src, 0, a, _MM_FROUND_NO_EXC);
1883         assert_eq_m256i(r, src);
1884         let r = _mm512_mask_cvtt_roundpd_epu32(src, 0b00001111, a, _MM_FROUND_NO_EXC);
1885         let e = _mm256_setr_epi32(0, -1, 2, -1, 0, 0, 0, 0);
1886         assert_eq_m256i(r, e);
1887     }
1888
1889     #[simd_test(enable = "avx512f")]
1890     unsafe fn test_mm512_maskz_cvtt_roundpd_epu32() {
1891         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1892         let r = _mm512_maskz_cvtt_roundpd_epu32(0, a, _MM_FROUND_NO_EXC);
1893         assert_eq_m256i(r, _mm256_setzero_si256());
1894         let r = _mm512_maskz_cvtt_roundpd_epu32(0b00001111, a, _MM_FROUND_NO_EXC);
1895         let e = _mm256_setr_epi32(0, -1, 2, -1, 0, 0, 0, 0);
1896         assert_eq_m256i(r, e);
1897     }
1898
1899     #[simd_test(enable = "avx512f")]
1900     unsafe fn test_mm512_cvttpd_epi32() {
1901         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1902         let r = _mm512_cvttpd_epi32(a);
1903         let e = _mm256_setr_epi32(0, -1, 2, -3, 4, -5, 6, -7);
1904         assert_eq_m256i(r, e);
1905     }
1906
1907     #[simd_test(enable = "avx512f")]
1908     unsafe fn test_mm512_mask_cvttpd_epi32() {
1909         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1910         let src = _mm256_set1_epi32(0);
1911         let r = _mm512_mask_cvttpd_epi32(src, 0, a);
1912         assert_eq_m256i(r, src);
1913         let r = _mm512_mask_cvttpd_epi32(src, 0b00001111, a);
1914         let e = _mm256_setr_epi32(0, -1, 2, -3, 0, 0, 0, 0);
1915         assert_eq_m256i(r, e);
1916     }
1917
1918     #[simd_test(enable = "avx512f")]
1919     unsafe fn test_mm512_maskz_cvttpd_epi32() {
1920         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1921         let r = _mm512_maskz_cvttpd_epi32(0, a);
1922         assert_eq_m256i(r, _mm256_setzero_si256());
1923         let r = _mm512_maskz_cvttpd_epi32(0b00001111, a);
1924         let e = _mm256_setr_epi32(0, -1, 2, -3, 0, 0, 0, 0);
1925         assert_eq_m256i(r, e);
1926     }
1927
1928     #[simd_test(enable = "avx512f")]
1929     unsafe fn test_mm512_cvttpd_epu32() {
1930         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1931         let r = _mm512_cvttpd_epu32(a);
1932         let e = _mm256_setr_epi32(0, -1, 2, -1, 4, -1, 6, -1);
1933         assert_eq_m256i(r, e);
1934     }
1935
1936     #[simd_test(enable = "avx512f")]
1937     unsafe fn test_mm512_mask_cvttpd_epu32() {
1938         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1939         let src = _mm256_set1_epi32(0);
1940         let r = _mm512_mask_cvttpd_epu32(src, 0, a);
1941         assert_eq_m256i(r, src);
1942         let r = _mm512_mask_cvttpd_epu32(src, 0b00001111, a);
1943         let e = _mm256_setr_epi32(0, -1, 2, -1, 0, 0, 0, 0);
1944         assert_eq_m256i(r, e);
1945     }
1946
1947     #[simd_test(enable = "avx512f")]
1948     unsafe fn test_mm512_maskz_cvttpd_epu32() {
1949         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
1950         let r = _mm512_maskz_cvttpd_epu32(0, a);
1951         assert_eq_m256i(r, _mm256_setzero_si256());
1952         let r = _mm512_maskz_cvttpd_epu32(0b00001111, a);
1953         let e = _mm256_setr_epi32(0, -1, 2, -1, 0, 0, 0, 0);
1954         assert_eq_m256i(r, e);
1955     }
1956
1957     #[simd_test(enable = "avx512f")]
1958     unsafe fn test_mm512_add_round_pd() {
1959         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.000000000000000007);
1960         let b = _mm512_set1_pd(-1.);
1961         let r = _mm512_add_round_pd(a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
1962         let e = _mm512_setr_pd(7., 8.5, 9., 10.5, 11., 12.5, 13., -1.0);
1963         assert_eq_m512d(r, e);
1964         let r = _mm512_add_round_pd(a, b, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
1965         let e = _mm512_setr_pd(7., 8.5, 9., 10.5, 11., 12.5, 13., -0.9999999999999999);
1966         assert_eq_m512d(r, e);
1967     }
1968
1969     #[simd_test(enable = "avx512f")]
1970     unsafe fn test_mm512_mask_add_round_pd() {
1971         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.000000000000000007);
1972         let b = _mm512_set1_pd(-1.);
1973         let r = _mm512_mask_add_round_pd(a, 0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
1974         assert_eq_m512d(r, a);
1975         let r = _mm512_mask_add_round_pd(
1976             a,
1977             0b11110000,
1978             a,
1979             b,
1980             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
1981         );
1982         let e = _mm512_setr_pd(8., 9.5, 10., 11.5, 11., 12.5, 13., -1.0);
1983         assert_eq_m512d(r, e);
1984     }
1985
1986     #[simd_test(enable = "avx512f")]
1987     unsafe fn test_mm512_maskz_add_round_pd() {
1988         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.000000000000000007);
1989         let b = _mm512_set1_pd(-1.);
1990         let r = _mm512_maskz_add_round_pd(0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
1991         assert_eq_m512d(r, _mm512_setzero_pd());
1992         let r = _mm512_maskz_add_round_pd(
1993             0b11110000,
1994             a,
1995             b,
1996             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
1997         );
1998         let e = _mm512_setr_pd(0., 0., 0., 0., 11., 12.5, 13., -1.0);
1999         assert_eq_m512d(r, e);
2000     }
2001
2002     #[simd_test(enable = "avx512f")]
2003     unsafe fn test_mm512_sub_round_pd() {
2004         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.000000000000000007);
2005         let b = _mm512_set1_pd(1.);
2006         let r = _mm512_sub_round_pd(a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2007         let e = _mm512_setr_pd(7., 8.5, 9., 10.5, 11., 12.5, 13., -1.0);
2008         assert_eq_m512d(r, e);
2009         let r = _mm512_sub_round_pd(a, b, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2010         let e = _mm512_setr_pd(7., 8.5, 9., 10.5, 11., 12.5, 13., -0.9999999999999999);
2011         assert_eq_m512d(r, e);
2012     }
2013
2014     #[simd_test(enable = "avx512f")]
2015     unsafe fn test_mm512_mask_sub_round_pd() {
2016         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.000000000000000007);
2017         let b = _mm512_set1_pd(1.);
2018         let r = _mm512_mask_sub_round_pd(a, 0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2019         assert_eq_m512d(r, a);
2020         let r = _mm512_mask_sub_round_pd(
2021             a,
2022             0b11110000,
2023             a,
2024             b,
2025             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2026         );
2027         let e = _mm512_setr_pd(8., 9.5, 10., 11.5, 11., 12.5, 13., -1.0);
2028         assert_eq_m512d(r, e);
2029     }
2030
2031     #[simd_test(enable = "avx512f")]
2032     unsafe fn test_mm512_maskz_sub_round_pd() {
2033         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.000000000000000007);
2034         let b = _mm512_set1_pd(1.);
2035         let r = _mm512_maskz_sub_round_pd(0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2036         assert_eq_m512d(r, _mm512_setzero_pd());
2037         let r = _mm512_maskz_sub_round_pd(
2038             0b11110000,
2039             a,
2040             b,
2041             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2042         );
2043         let e = _mm512_setr_pd(0., 0., 0., 0., 11., 12.5, 13., -1.0);
2044         assert_eq_m512d(r, e);
2045     }
2046
2047     #[simd_test(enable = "avx512f")]
2048     unsafe fn test_mm512_mul_round_pd() {
2049         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.);
2050         let b = _mm512_set1_pd(0.1);
2051         let r = _mm512_mul_round_pd(a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2052         let e = _mm512_setr_pd(
2053             0.8,
2054             0.9500000000000001,
2055             1.,
2056             1.1500000000000001,
2057             1.2000000000000002,
2058             1.35,
2059             1.4000000000000001,
2060             0.,
2061         );
2062         assert_eq_m512d(r, e);
2063         let r = _mm512_mul_round_pd(a, b, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2064         let e = _mm512_setr_pd(0.8, 0.95, 1.0, 1.15, 1.2, 1.3499999999999999, 1.4, 0.0);
2065         assert_eq_m512d(r, e);
2066     }
2067
2068     #[simd_test(enable = "avx512f")]
2069     unsafe fn test_mm512_mask_mul_round_pd() {
2070         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.);
2071         let b = _mm512_set1_pd(0.1);
2072         let r = _mm512_mask_mul_round_pd(a, 0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2073         assert_eq_m512d(r, a);
2074         let r = _mm512_mask_mul_round_pd(
2075             a,
2076             0b11110000,
2077             a,
2078             b,
2079             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2080         );
2081         let e = _mm512_setr_pd(
2082             8.,
2083             9.5,
2084             10.,
2085             11.5,
2086             1.2000000000000002,
2087             1.35,
2088             1.4000000000000001,
2089             0.,
2090         );
2091         assert_eq_m512d(r, e);
2092     }
2093
2094     #[simd_test(enable = "avx512f")]
2095     unsafe fn test_mm512_maskz_mul_round_pd() {
2096         let a = _mm512_setr_pd(8., 9.5, 10., 11.5, 12., 13.5, 14., 0.);
2097         let b = _mm512_set1_pd(0.1);
2098         let r = _mm512_maskz_mul_round_pd(0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2099         assert_eq_m512d(r, _mm512_setzero_pd());
2100         let r = _mm512_maskz_mul_round_pd(
2101             0b11110000,
2102             a,
2103             b,
2104             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2105         );
2106         let e = _mm512_setr_pd(
2107             0.,
2108             0.,
2109             0.,
2110             0.,
2111             1.2000000000000002,
2112             1.35,
2113             1.4000000000000001,
2114             0.,
2115         );
2116         assert_eq_m512d(r, e);
2117     }
2118
2119     #[simd_test(enable = "avx512f")]
2120     unsafe fn test_mm512_div_round_pd() {
2121         let a = _mm512_set1_pd(1.);
2122         let b = _mm512_set1_pd(3.);
2123         let r = _mm512_div_round_pd(a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2124         let e = _mm512_set1_pd(0.3333333333333333);
2125         assert_eq_m512d(r, e);
2126         let r = _mm512_div_round_pd(a, b, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2127         let e = _mm512_set1_pd(0.3333333333333333);
2128         assert_eq_m512d(r, e);
2129     }
2130
2131     #[simd_test(enable = "avx512f")]
2132     unsafe fn test_mm512_mask_div_round_pd() {
2133         let a = _mm512_set1_pd(1.);
2134         let b = _mm512_set1_pd(3.);
2135         let r = _mm512_mask_div_round_pd(a, 0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2136         assert_eq_m512d(r, a);
2137         let r = _mm512_mask_div_round_pd(
2138             a,
2139             0b11110000,
2140             a,
2141             b,
2142             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2143         );
2144         let e = _mm512_setr_pd(
2145             1.,
2146             1.,
2147             1.,
2148             1.,
2149             0.3333333333333333,
2150             0.3333333333333333,
2151             0.3333333333333333,
2152             0.3333333333333333,
2153         );
2154         assert_eq_m512d(r, e);
2155     }
2156
2157     #[simd_test(enable = "avx512f")]
2158     unsafe fn test_mm512_maskz_div_round_pd() {
2159         let a = _mm512_set1_pd(1.);
2160         let b = _mm512_set1_pd(3.);
2161         let r = _mm512_maskz_div_round_pd(0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2162         assert_eq_m512d(r, _mm512_setzero_pd());
2163         let r = _mm512_maskz_div_round_pd(
2164             0b11110000,
2165             a,
2166             b,
2167             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2168         );
2169         let e = _mm512_setr_pd(
2170             0.,
2171             0.,
2172             0.,
2173             0.,
2174             0.3333333333333333,
2175             0.3333333333333333,
2176             0.3333333333333333,
2177             0.3333333333333333,
2178         );
2179         assert_eq_m512d(r, e);
2180     }
2181
2182     #[simd_test(enable = "avx512f")]
2183     unsafe fn test_mm512_sqrt_round_pd() {
2184         let a = _mm512_set1_pd(3.);
2185         let r = _mm512_sqrt_round_pd(a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2186         let e = _mm512_set1_pd(1.7320508075688772);
2187         assert_eq_m512d(r, e);
2188         let r = _mm512_sqrt_round_pd(a, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
2189         let e = _mm512_set1_pd(1.7320508075688774);
2190         assert_eq_m512d(r, e);
2191     }
2192
2193     #[simd_test(enable = "avx512f")]
2194     unsafe fn test_mm512_mask_sqrt_round_pd() {
2195         let a = _mm512_set1_pd(3.);
2196         let r = _mm512_mask_sqrt_round_pd(a, 0, a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2197         assert_eq_m512d(r, a);
2198         let r = _mm512_mask_sqrt_round_pd(
2199             a,
2200             0b11110000,
2201             a,
2202             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2203         );
2204         let e = _mm512_setr_pd(
2205             3.,
2206             3.,
2207             3.,
2208             3.,
2209             1.7320508075688772,
2210             1.7320508075688772,
2211             1.7320508075688772,
2212             1.7320508075688772,
2213         );
2214         assert_eq_m512d(r, e);
2215     }
2216
2217     #[simd_test(enable = "avx512f")]
2218     unsafe fn test_mm512_maskz_sqrt_round_pd() {
2219         let a = _mm512_set1_pd(3.);
2220         let r = _mm512_maskz_sqrt_round_pd(0, a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2221         assert_eq_m512d(r, _mm512_setzero_pd());
2222         let r = _mm512_maskz_sqrt_round_pd(
2223             0b11110000,
2224             a,
2225             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2226         );
2227         let e = _mm512_setr_pd(
2228             0.,
2229             0.,
2230             0.,
2231             0.,
2232             1.7320508075688772,
2233             1.7320508075688772,
2234             1.7320508075688772,
2235             1.7320508075688772,
2236         );
2237         assert_eq_m512d(r, e);
2238     }
2239
2240     #[simd_test(enable = "avx512f")]
2241     unsafe fn test_mm512_fmadd_round_pd() {
2242         let a = _mm512_set1_pd(0.000000000000000007);
2243         let b = _mm512_set1_pd(1.);
2244         let c = _mm512_set1_pd(-1.);
2245         let r = _mm512_fmadd_round_pd(a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2246         let e = _mm512_set1_pd(-1.);
2247         assert_eq_m512d(r, e);
2248         let r = _mm512_fmadd_round_pd(a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2249         let e = _mm512_set1_pd(-0.9999999999999999);
2250         assert_eq_m512d(r, e);
2251     }
2252
2253     #[simd_test(enable = "avx512f")]
2254     unsafe fn test_mm512_mask_fmadd_round_pd() {
2255         let a = _mm512_set1_pd(0.000000000000000007);
2256         let b = _mm512_set1_pd(1.);
2257         let c = _mm512_set1_pd(-1.);
2258         let r =
2259             _mm512_mask_fmadd_round_pd(a, 0, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2260         assert_eq_m512d(r, a);
2261         let r = _mm512_mask_fmadd_round_pd(
2262             a,
2263             0b00001111,
2264             b,
2265             c,
2266             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2267         );
2268         let e = _mm512_setr_pd(
2269             -1.,
2270             -1.,
2271             -1.,
2272             -1.,
2273             0.000000000000000007,
2274             0.000000000000000007,
2275             0.000000000000000007,
2276             0.000000000000000007,
2277         );
2278         assert_eq_m512d(r, e);
2279     }
2280
2281     #[simd_test(enable = "avx512f")]
2282     unsafe fn test_mm512_maskz_fmadd_round_pd() {
2283         let a = _mm512_set1_pd(0.000000000000000007);
2284         let b = _mm512_set1_pd(1.);
2285         let c = _mm512_set1_pd(-1.);
2286         let r =
2287             _mm512_maskz_fmadd_round_pd(0, a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2288         assert_eq_m512d(r, _mm512_setzero_pd());
2289         let r = _mm512_maskz_fmadd_round_pd(
2290             0b00001111,
2291             a,
2292             b,
2293             c,
2294             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2295         );
2296         let e = _mm512_setr_pd(-1., -1., -1., -1., 0., 0., 0., 0.);
2297         assert_eq_m512d(r, e);
2298     }
2299
2300     #[simd_test(enable = "avx512f")]
2301     unsafe fn test_mm512_mask3_fmadd_round_pd() {
2302         let a = _mm512_set1_pd(0.000000000000000007);
2303         let b = _mm512_set1_pd(1.);
2304         let c = _mm512_set1_pd(-1.);
2305         let r =
2306             _mm512_mask3_fmadd_round_pd(a, b, c, 0, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2307         assert_eq_m512d(r, c);
2308         let r = _mm512_mask3_fmadd_round_pd(
2309             a,
2310             b,
2311             c,
2312             0b00001111,
2313             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2314         );
2315         let e = _mm512_setr_pd(-1., -1., -1., -1., -1., -1., -1., -1.);
2316         assert_eq_m512d(r, e);
2317     }
2318
2319     #[simd_test(enable = "avx512f")]
2320     unsafe fn test_mm512_fmsub_round_pd() {
2321         let a = _mm512_set1_pd(0.000000000000000007);
2322         let b = _mm512_set1_pd(1.);
2323         let c = _mm512_set1_pd(1.);
2324         let r = _mm512_fmsub_round_pd(a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2325         let e = _mm512_set1_pd(-1.);
2326         assert_eq_m512d(r, e);
2327         let r = _mm512_fmsub_round_pd(a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2328         let e = _mm512_set1_pd(-0.9999999999999999);
2329         assert_eq_m512d(r, e);
2330     }
2331
2332     #[simd_test(enable = "avx512f")]
2333     unsafe fn test_mm512_mask_fmsub_round_pd() {
2334         let a = _mm512_set1_pd(0.000000000000000007);
2335         let b = _mm512_set1_pd(1.);
2336         let c = _mm512_set1_pd(1.);
2337         let r =
2338             _mm512_mask_fmsub_round_pd(a, 0, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2339         assert_eq_m512d(r, a);
2340         let r = _mm512_mask_fmsub_round_pd(
2341             a,
2342             0b00001111,
2343             b,
2344             c,
2345             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2346         );
2347         let e = _mm512_setr_pd(
2348             -1.,
2349             -1.,
2350             -1.,
2351             -1.,
2352             0.000000000000000007,
2353             0.000000000000000007,
2354             0.000000000000000007,
2355             0.000000000000000007,
2356         );
2357         assert_eq_m512d(r, e);
2358     }
2359
2360     #[simd_test(enable = "avx512f")]
2361     unsafe fn test_mm512_maskz_fmsub_round_pd() {
2362         let a = _mm512_set1_pd(0.000000000000000007);
2363         let b = _mm512_set1_pd(1.);
2364         let c = _mm512_set1_pd(1.);
2365         let r =
2366             _mm512_maskz_fmsub_round_pd(0, a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2367         assert_eq_m512d(r, _mm512_setzero_pd());
2368         let r = _mm512_maskz_fmsub_round_pd(
2369             0b00001111,
2370             a,
2371             b,
2372             c,
2373             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2374         );
2375         let e = _mm512_setr_pd(-1., -1., -1., -1., 0., 0., 0., 0.);
2376         assert_eq_m512d(r, e);
2377     }
2378
2379     #[simd_test(enable = "avx512f")]
2380     unsafe fn test_mm512_mask3_fmsub_round_pd() {
2381         let a = _mm512_set1_pd(0.000000000000000007);
2382         let b = _mm512_set1_pd(1.);
2383         let c = _mm512_set1_pd(1.);
2384         let r =
2385             _mm512_mask3_fmsub_round_pd(a, b, c, 0, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2386         assert_eq_m512d(r, c);
2387         let r = _mm512_mask3_fmsub_round_pd(
2388             a,
2389             b,
2390             c,
2391             0b00001111,
2392             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2393         );
2394         let e = _mm512_setr_pd(-1., -1., -1., -1., 1., 1., 1., 1.);
2395         assert_eq_m512d(r, e);
2396     }
2397
2398     #[simd_test(enable = "avx512f")]
2399     unsafe fn test_mm512_fmaddsub_round_pd() {
2400         let a = _mm512_set1_pd(0.000000000000000007);
2401         let b = _mm512_set1_pd(1.);
2402         let c = _mm512_set1_pd(-1.);
2403         let r = _mm512_fmaddsub_round_pd(a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2404         let e = _mm512_setr_pd(1., -1., 1., -1., 1., -1., 1., -1.);
2405         assert_eq_m512d(r, e);
2406         let r = _mm512_fmaddsub_round_pd(a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2407         let e = _mm512_setr_pd(
2408             1.,
2409             -0.9999999999999999,
2410             1.,
2411             -0.9999999999999999,
2412             1.,
2413             -0.9999999999999999,
2414             1.,
2415             -0.9999999999999999,
2416         );
2417         assert_eq_m512d(r, e);
2418     }
2419
2420     #[simd_test(enable = "avx512f")]
2421     unsafe fn test_mm512_mask_fmaddsub_round_pd() {
2422         let a = _mm512_set1_pd(0.000000000000000007);
2423         let b = _mm512_set1_pd(1.);
2424         let c = _mm512_set1_pd(-1.);
2425         let r = _mm512_mask_fmaddsub_round_pd(
2426             a,
2427             0,
2428             b,
2429             c,
2430             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2431         );
2432         assert_eq_m512d(r, a);
2433         let r = _mm512_mask_fmaddsub_round_pd(
2434             a,
2435             0b00001111,
2436             b,
2437             c,
2438             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2439         );
2440         let e = _mm512_setr_pd(
2441             1.,
2442             -1.,
2443             1.,
2444             -1.,
2445             0.000000000000000007,
2446             0.000000000000000007,
2447             0.000000000000000007,
2448             0.000000000000000007,
2449         );
2450         assert_eq_m512d(r, e);
2451     }
2452
2453     #[simd_test(enable = "avx512f")]
2454     unsafe fn test_mm512_maskz_fmaddsub_round_pd() {
2455         let a = _mm512_set1_pd(0.000000000000000007);
2456         let b = _mm512_set1_pd(1.);
2457         let c = _mm512_set1_pd(-1.);
2458         let r = _mm512_maskz_fmaddsub_round_pd(
2459             0,
2460             a,
2461             b,
2462             c,
2463             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2464         );
2465         assert_eq_m512d(r, _mm512_setzero_pd());
2466         let r = _mm512_maskz_fmaddsub_round_pd(
2467             0b00001111,
2468             a,
2469             b,
2470             c,
2471             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2472         );
2473         let e = _mm512_setr_pd(1., -1., 1., -1., 0., 0., 0., 0.);
2474         assert_eq_m512d(r, e);
2475     }
2476
2477     #[simd_test(enable = "avx512f")]
2478     unsafe fn test_mm512_mask3_fmaddsub_round_pd() {
2479         let a = _mm512_set1_pd(0.000000000000000007);
2480         let b = _mm512_set1_pd(1.);
2481         let c = _mm512_set1_pd(-1.);
2482         let r = _mm512_mask3_fmaddsub_round_pd(
2483             a,
2484             b,
2485             c,
2486             0,
2487             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2488         );
2489         assert_eq_m512d(r, c);
2490         let r = _mm512_mask3_fmaddsub_round_pd(
2491             a,
2492             b,
2493             c,
2494             0b00001111,
2495             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2496         );
2497         let e = _mm512_setr_pd(1., -1., 1., -1., -1., -1., -1., -1.);
2498         assert_eq_m512d(r, e);
2499     }
2500
2501     #[simd_test(enable = "avx512f")]
2502     unsafe fn test_mm512_fmsubadd_round_pd() {
2503         let a = _mm512_set1_pd(0.000000000000000007);
2504         let b = _mm512_set1_pd(1.);
2505         let c = _mm512_set1_pd(-1.);
2506         let r = _mm512_fmsubadd_round_pd(a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2507         let e = _mm512_setr_pd(-1., 1., -1., 1., -1., 1., -1., 1.);
2508         assert_eq_m512d(r, e);
2509         let r = _mm512_fmsubadd_round_pd(a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2510         let e = _mm512_setr_pd(
2511             -0.9999999999999999,
2512             1.,
2513             -0.9999999999999999,
2514             1.,
2515             -0.9999999999999999,
2516             1.,
2517             -0.9999999999999999,
2518             1.,
2519         );
2520         assert_eq_m512d(r, e);
2521     }
2522
2523     #[simd_test(enable = "avx512f")]
2524     unsafe fn test_mm512_mask_fmsubadd_round_pd() {
2525         let a = _mm512_set1_pd(0.000000000000000007);
2526         let b = _mm512_set1_pd(1.);
2527         let c = _mm512_set1_pd(-1.);
2528         let r = _mm512_mask_fmsubadd_round_pd(
2529             a,
2530             0,
2531             b,
2532             c,
2533             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2534         );
2535         assert_eq_m512d(r, a);
2536         let r = _mm512_mask_fmsubadd_round_pd(
2537             a,
2538             0b00001111,
2539             b,
2540             c,
2541             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2542         );
2543         let e = _mm512_setr_pd(
2544             -1.,
2545             1.,
2546             -1.,
2547             1.,
2548             0.000000000000000007,
2549             0.000000000000000007,
2550             0.000000000000000007,
2551             0.000000000000000007,
2552         );
2553         assert_eq_m512d(r, e);
2554     }
2555
2556     #[simd_test(enable = "avx512f")]
2557     unsafe fn test_mm512_maskz_fmsubadd_round_pd() {
2558         let a = _mm512_set1_pd(0.000000000000000007);
2559         let b = _mm512_set1_pd(1.);
2560         let c = _mm512_set1_pd(-1.);
2561         let r = _mm512_maskz_fmsubadd_round_pd(
2562             0,
2563             a,
2564             b,
2565             c,
2566             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2567         );
2568         assert_eq_m512d(r, _mm512_setzero_pd());
2569         let r = _mm512_maskz_fmsubadd_round_pd(
2570             0b00001111,
2571             a,
2572             b,
2573             c,
2574             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2575         );
2576         let e = _mm512_setr_pd(-1., 1., -1., 1., 0., 0., 0., 0.);
2577         assert_eq_m512d(r, e);
2578     }
2579
2580     #[simd_test(enable = "avx512f")]
2581     unsafe fn test_mm512_mask3_fmsubadd_round_pd() {
2582         let a = _mm512_set1_pd(0.000000000000000007);
2583         let b = _mm512_set1_pd(1.);
2584         let c = _mm512_set1_pd(-1.);
2585         let r = _mm512_mask3_fmsubadd_round_pd(
2586             a,
2587             b,
2588             c,
2589             0,
2590             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2591         );
2592         assert_eq_m512d(r, c);
2593         let r = _mm512_mask3_fmsubadd_round_pd(
2594             a,
2595             b,
2596             c,
2597             0b00001111,
2598             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2599         );
2600         let e = _mm512_setr_pd(-1., 1., -1., 1., -1., -1., -1., -1.);
2601         assert_eq_m512d(r, e);
2602     }
2603
2604     #[simd_test(enable = "avx512f")]
2605     unsafe fn test_mm512_fnmadd_round_pd() {
2606         let a = _mm512_set1_pd(0.000000000000000007);
2607         let b = _mm512_set1_pd(1.);
2608         let c = _mm512_set1_pd(1.);
2609         let r = _mm512_fnmadd_round_pd(a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2610         let e = _mm512_set1_pd(1.);
2611         assert_eq_m512d(r, e);
2612         let r = _mm512_fnmadd_round_pd(a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2613         let e = _mm512_set1_pd(0.9999999999999999);
2614         assert_eq_m512d(r, e);
2615     }
2616
2617     #[simd_test(enable = "avx512f")]
2618     unsafe fn test_mm512_mask_fnmadd_round_pd() {
2619         let a = _mm512_set1_pd(0.000000000000000007);
2620         let b = _mm512_set1_pd(1.);
2621         let c = _mm512_set1_pd(1.);
2622         let r =
2623             _mm512_mask_fnmadd_round_pd(a, 0, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2624         assert_eq_m512d(r, a);
2625         let r = _mm512_mask_fnmadd_round_pd(
2626             a,
2627             0b00001111,
2628             b,
2629             c,
2630             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2631         );
2632         let e = _mm512_setr_pd(
2633             1.,
2634             1.,
2635             1.,
2636             1.,
2637             0.000000000000000007,
2638             0.000000000000000007,
2639             0.000000000000000007,
2640             0.000000000000000007,
2641         );
2642         assert_eq_m512d(r, e);
2643     }
2644
2645     #[simd_test(enable = "avx512f")]
2646     unsafe fn test_mm512_maskz_fnmadd_round_pd() {
2647         let a = _mm512_set1_pd(0.000000000000000007);
2648         let b = _mm512_set1_pd(1.);
2649         let c = _mm512_set1_pd(1.);
2650         let r =
2651             _mm512_maskz_fnmadd_round_pd(0, a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2652         assert_eq_m512d(r, _mm512_setzero_pd());
2653         let r = _mm512_maskz_fnmadd_round_pd(
2654             0b00001111,
2655             a,
2656             b,
2657             c,
2658             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2659         );
2660         let e = _mm512_setr_pd(1., 1., 1., 1., 0., 0., 0., 0.);
2661         assert_eq_m512d(r, e);
2662     }
2663
2664     #[simd_test(enable = "avx512f")]
2665     unsafe fn test_mm512_mask3_fnmadd_round_pd() {
2666         let a = _mm512_set1_pd(0.000000000000000007);
2667         let b = _mm512_set1_pd(1.);
2668         let c = _mm512_set1_pd(1.);
2669         let r =
2670             _mm512_mask3_fnmadd_round_pd(a, b, c, 0, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2671         assert_eq_m512d(r, c);
2672         let r = _mm512_mask3_fnmadd_round_pd(
2673             a,
2674             b,
2675             c,
2676             0b00001111,
2677             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2678         );
2679         let e = _mm512_setr_pd(1., 1., 1., 1., 1., 1., 1., 1.);
2680         assert_eq_m512d(r, e);
2681     }
2682
2683     #[simd_test(enable = "avx512f")]
2684     unsafe fn test_mm512_fnmsub_round_pd() {
2685         let a = _mm512_set1_pd(0.000000000000000007);
2686         let b = _mm512_set1_pd(1.);
2687         let c = _mm512_set1_pd(-1.);
2688         let r = _mm512_fnmsub_round_pd(a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2689         let e = _mm512_set1_pd(1.);
2690         assert_eq_m512d(r, e);
2691         let r = _mm512_fnmsub_round_pd(a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
2692         let e = _mm512_set1_pd(0.9999999999999999);
2693         assert_eq_m512d(r, e);
2694     }
2695
2696     #[simd_test(enable = "avx512f")]
2697     unsafe fn test_mm512_mask_fnmsub_round_pd() {
2698         let a = _mm512_set1_pd(0.000000000000000007);
2699         let b = _mm512_set1_pd(1.);
2700         let c = _mm512_set1_pd(-1.);
2701         let r =
2702             _mm512_mask_fnmsub_round_pd(a, 0, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2703         assert_eq_m512d(r, a);
2704         let r = _mm512_mask_fnmsub_round_pd(
2705             a,
2706             0b00001111,
2707             b,
2708             c,
2709             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2710         );
2711         let e = _mm512_setr_pd(
2712             1.,
2713             1.,
2714             1.,
2715             1.,
2716             0.000000000000000007,
2717             0.000000000000000007,
2718             0.000000000000000007,
2719             0.000000000000000007,
2720         );
2721         assert_eq_m512d(r, e);
2722     }
2723
2724     #[simd_test(enable = "avx512f")]
2725     unsafe fn test_mm512_maskz_fnmsub_round_pd() {
2726         let a = _mm512_set1_pd(0.000000000000000007);
2727         let b = _mm512_set1_pd(1.);
2728         let c = _mm512_set1_pd(-1.);
2729         let r =
2730             _mm512_maskz_fnmsub_round_pd(0, a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2731         assert_eq_m512d(r, _mm512_setzero_pd());
2732         let r = _mm512_maskz_fnmsub_round_pd(
2733             0b00001111,
2734             a,
2735             b,
2736             c,
2737             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2738         );
2739         let e = _mm512_setr_pd(1., 1., 1., 1., 0., 0., 0., 0.);
2740         assert_eq_m512d(r, e);
2741     }
2742
2743     #[simd_test(enable = "avx512f")]
2744     unsafe fn test_mm512_mask3_fnmsub_round_pd() {
2745         let a = _mm512_set1_pd(0.000000000000000007);
2746         let b = _mm512_set1_pd(1.);
2747         let c = _mm512_set1_pd(-1.);
2748         let r =
2749             _mm512_mask3_fnmsub_round_pd(a, b, c, 0, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2750         assert_eq_m512d(r, c);
2751         let r = _mm512_mask3_fnmsub_round_pd(
2752             a,
2753             b,
2754             c,
2755             0b00001111,
2756             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2757         );
2758         let e = _mm512_setr_pd(1., 1., 1., 1., -1., -1., -1., -1.);
2759         assert_eq_m512d(r, e);
2760     }
2761
2762     #[simd_test(enable = "avx512f")]
2763     unsafe fn test_mm512_max_round_pd() {
2764         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
2765         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
2766         let r = _mm512_max_round_pd(a, b, _MM_FROUND_CUR_DIRECTION);
2767         let e = _mm512_setr_pd(7., 6., 5., 4., 4., 5., 6., 7.);
2768         assert_eq_m512d(r, e);
2769     }
2770
2771     #[simd_test(enable = "avx512f")]
2772     unsafe fn test_mm512_mask_max_round_pd() {
2773         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
2774         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
2775         let r = _mm512_mask_max_round_pd(a, 0, a, b, _MM_FROUND_CUR_DIRECTION);
2776         assert_eq_m512d(r, a);
2777         let r = _mm512_mask_max_round_pd(a, 0b00001111, a, b, _MM_FROUND_CUR_DIRECTION);
2778         let e = _mm512_setr_pd(7., 6., 5., 4., 4., 5., 6., 7.);
2779         assert_eq_m512d(r, e);
2780     }
2781
2782     #[simd_test(enable = "avx512f")]
2783     unsafe fn test_mm512_maskz_max_round_pd() {
2784         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
2785         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
2786         let r = _mm512_maskz_max_round_pd(0, a, b, _MM_FROUND_CUR_DIRECTION);
2787         assert_eq_m512d(r, _mm512_setzero_pd());
2788         let r = _mm512_maskz_max_round_pd(0b00001111, a, b, _MM_FROUND_CUR_DIRECTION);
2789         let e = _mm512_setr_pd(7., 6., 5., 4., 0., 0., 0., 0.);
2790         assert_eq_m512d(r, e);
2791     }
2792
2793     #[simd_test(enable = "avx512f")]
2794     unsafe fn test_mm512_min_round_pd() {
2795         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
2796         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
2797         let r = _mm512_min_round_pd(a, b, _MM_FROUND_CUR_DIRECTION);
2798         let e = _mm512_setr_pd(0., 1., 2., 3., 3., 2., 1., 0.);
2799         assert_eq_m512d(r, e);
2800     }
2801
2802     #[simd_test(enable = "avx512f")]
2803     unsafe fn test_mm512_mask_min_round_pd() {
2804         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
2805         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
2806         let r = _mm512_mask_min_round_pd(a, 0, a, b, _MM_FROUND_CUR_DIRECTION);
2807         assert_eq_m512d(r, a);
2808         let r = _mm512_mask_min_round_pd(a, 0b00001111, a, b, _MM_FROUND_CUR_DIRECTION);
2809         let e = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
2810         assert_eq_m512d(r, e);
2811     }
2812
2813     #[simd_test(enable = "avx512f")]
2814     unsafe fn test_mm512_maskz_min_round_pd() {
2815         let a = _mm512_setr_pd(0., 1., 2., 3., 4., 5., 6., 7.);
2816         let b = _mm512_setr_pd(7., 6., 5., 4., 3., 2., 1., 0.);
2817         let r = _mm512_maskz_min_round_pd(0, a, b, _MM_FROUND_CUR_DIRECTION);
2818         assert_eq_m512d(r, _mm512_setzero_pd());
2819         let r = _mm512_maskz_min_round_pd(0b00001111, a, b, _MM_FROUND_CUR_DIRECTION);
2820         let e = _mm512_setr_pd(0., 1., 2., 3., 0., 0., 0., 0.);
2821         assert_eq_m512d(r, e);
2822     }
2823
2824     #[simd_test(enable = "avx512f")]
2825     unsafe fn test_mm512_getexp_round_pd() {
2826         let a = _mm512_set1_pd(3.);
2827         let r = _mm512_getexp_round_pd(a, _MM_FROUND_CUR_DIRECTION);
2828         let e = _mm512_set1_pd(1.);
2829         assert_eq_m512d(r, e);
2830     }
2831
2832     #[simd_test(enable = "avx512f")]
2833     unsafe fn test_mm512_mask_getexp_round_pd() {
2834         let a = _mm512_set1_pd(3.);
2835         let r = _mm512_mask_getexp_round_pd(a, 0, a, _MM_FROUND_CUR_DIRECTION);
2836         assert_eq_m512d(r, a);
2837         let r = _mm512_mask_getexp_round_pd(a, 0b11110000, a, _MM_FROUND_CUR_DIRECTION);
2838         let e = _mm512_setr_pd(3., 3., 3., 3., 1., 1., 1., 1.);
2839         assert_eq_m512d(r, e);
2840     }
2841
2842     #[simd_test(enable = "avx512f")]
2843     unsafe fn test_mm512_maskz_getexp_round_pd() {
2844         let a = _mm512_set1_pd(3.);
2845         let r = _mm512_maskz_getexp_round_pd(0, a, _MM_FROUND_CUR_DIRECTION);
2846         assert_eq_m512d(r, _mm512_setzero_pd());
2847         let r = _mm512_maskz_getexp_round_pd(0b11110000, a, _MM_FROUND_CUR_DIRECTION);
2848         let e = _mm512_setr_pd(0., 0., 0., 0., 1., 1., 1., 1.);
2849         assert_eq_m512d(r, e);
2850     }
2851
2852     #[simd_test(enable = "avx512f")]
2853     unsafe fn test_mm512_roundscale_round_pd() {
2854         let a = _mm512_set1_pd(1.1);
2855         let r = _mm512_roundscale_round_pd(a, 0, _MM_FROUND_CUR_DIRECTION);
2856         let e = _mm512_set1_pd(1.0);
2857         assert_eq_m512d(r, e);
2858     }
2859
2860     #[simd_test(enable = "avx512f")]
2861     unsafe fn test_mm512_mask_roundscale_round_pd() {
2862         let a = _mm512_set1_pd(1.1);
2863         let r = _mm512_mask_roundscale_round_pd(a, 0, a, 0, _MM_FROUND_CUR_DIRECTION);
2864         let e = _mm512_set1_pd(1.1);
2865         assert_eq_m512d(r, e);
2866         let r = _mm512_mask_roundscale_round_pd(a, 0b11111111, a, 0, _MM_FROUND_CUR_DIRECTION);
2867         let e = _mm512_set1_pd(1.0);
2868         assert_eq_m512d(r, e);
2869     }
2870
2871     #[simd_test(enable = "avx512f")]
2872     unsafe fn test_mm512_maskz_roundscale_round_pd() {
2873         let a = _mm512_set1_pd(1.1);
2874         let r = _mm512_maskz_roundscale_round_pd(0, a, 0, _MM_FROUND_CUR_DIRECTION);
2875         assert_eq_m512d(r, _mm512_setzero_pd());
2876         let r = _mm512_maskz_roundscale_round_pd(0b11111111, a, 0, _MM_FROUND_CUR_DIRECTION);
2877         let e = _mm512_set1_pd(1.0);
2878         assert_eq_m512d(r, e);
2879     }
2880
2881     #[simd_test(enable = "avx512f")]
2882     unsafe fn test_mm512_scalef_round_pd() {
2883         let a = _mm512_set1_pd(1.);
2884         let b = _mm512_set1_pd(3.);
2885         let r = _mm512_scalef_round_pd(a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2886         let e = _mm512_set1_pd(8.);
2887         assert_eq_m512d(r, e);
2888     }
2889
2890     #[simd_test(enable = "avx512f")]
2891     unsafe fn test_mm512_mask_scalef_round_pd() {
2892         let a = _mm512_set1_pd(1.);
2893         let b = _mm512_set1_pd(3.);
2894         let r =
2895             _mm512_mask_scalef_round_pd(a, 0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2896         assert_eq_m512d(r, a);
2897         let r = _mm512_mask_scalef_round_pd(
2898             a,
2899             0b11110000,
2900             a,
2901             b,
2902             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2903         );
2904         let e = _mm512_set_pd(8., 8., 8., 8., 1., 1., 1., 1.);
2905         assert_eq_m512d(r, e);
2906     }
2907
2908     #[simd_test(enable = "avx512f")]
2909     unsafe fn test_mm512_maskz_scalef_round_pd() {
2910         let a = _mm512_set1_pd(1.);
2911         let b = _mm512_set1_pd(3.);
2912         let r =
2913             _mm512_maskz_scalef_round_pd(0, a, b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
2914         assert_eq_m512d(r, _mm512_setzero_pd());
2915         let r = _mm512_maskz_scalef_round_pd(
2916             0b11110000,
2917             a,
2918             b,
2919             _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC,
2920         );
2921         let e = _mm512_set_pd(8., 8., 8., 8., 0., 0., 0., 0.);
2922         assert_eq_m512d(r, e);
2923     }
2924
2925     #[simd_test(enable = "avx512f")]
2926     unsafe fn test_mm512_fixupimm_round_pd() {
2927         let a = _mm512_set1_pd(f64::NAN);
2928         let b = _mm512_set1_pd(f64::MAX);
2929         let c = _mm512_set1_epi64(i32::MAX as i64);
2930         let r = _mm512_fixupimm_round_pd(a, b, c, 5, _MM_FROUND_CUR_DIRECTION);
2931         let e = _mm512_set1_pd(0.0);
2932         assert_eq_m512d(r, e);
2933     }
2934
2935     #[simd_test(enable = "avx512f")]
2936     unsafe fn test_mm512_mask_fixupimm_round_pd() {
2937         let a = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, 1., 1., 1., 1.);
2938         let b = _mm512_set1_pd(f64::MAX);
2939         let c = _mm512_set1_epi64(i32::MAX as i64);
2940         let r = _mm512_mask_fixupimm_round_pd(a, 0b11110000, b, c, 5, _MM_FROUND_CUR_DIRECTION);
2941         let e = _mm512_set_pd(0., 0., 0., 0., 1., 1., 1., 1.);
2942         assert_eq_m512d(r, e);
2943     }
2944
2945     #[simd_test(enable = "avx512f")]
2946     unsafe fn test_mm512_maskz_fixupimm_round_pd() {
2947         let a = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, 1., 1., 1., 1.);
2948         let b = _mm512_set1_pd(f64::MAX);
2949         let c = _mm512_set1_epi64(i32::MAX as i64);
2950         let r = _mm512_maskz_fixupimm_round_pd(0b11110000, a, b, c, 5, _MM_FROUND_CUR_DIRECTION);
2951         let e = _mm512_set_pd(0., 0., 0., 0., 0., 0., 0., 0.);
2952         assert_eq_m512d(r, e);
2953     }
2954
2955     #[simd_test(enable = "avx512f")]
2956     unsafe fn test_mm512_getmant_round_pd() {
2957         let a = _mm512_set1_pd(10.);
2958         let r = _mm512_getmant_round_pd(
2959             a,
2960             _MM_MANT_NORM_1_2,
2961             _MM_MANT_SIGN_SRC,
2962             _MM_FROUND_CUR_DIRECTION,
2963         );
2964         let e = _mm512_set1_pd(1.25);
2965         assert_eq_m512d(r, e);
2966     }
2967
2968     #[simd_test(enable = "avx512f")]
2969     unsafe fn test_mm512_mask_getmant_round_pd() {
2970         let a = _mm512_set1_pd(10.);
2971         let r = _mm512_mask_getmant_round_pd(
2972             a,
2973             0,
2974             a,
2975             _MM_MANT_NORM_1_2,
2976             _MM_MANT_SIGN_SRC,
2977             _MM_FROUND_CUR_DIRECTION,
2978         );
2979         assert_eq_m512d(r, a);
2980         let r = _mm512_mask_getmant_round_pd(
2981             a,
2982             0b11110000,
2983             a,
2984             _MM_MANT_NORM_1_2,
2985             _MM_MANT_SIGN_SRC,
2986             _MM_FROUND_CUR_DIRECTION,
2987         );
2988         let e = _mm512_setr_pd(10., 10., 10., 10., 1.25, 1.25, 1.25, 1.25);
2989         assert_eq_m512d(r, e);
2990     }
2991
2992     #[simd_test(enable = "avx512f")]
2993     unsafe fn test_mm512_maskz_getmant_round_pd() {
2994         let a = _mm512_set1_pd(10.);
2995         let r = _mm512_maskz_getmant_round_pd(
2996             0,
2997             a,
2998             _MM_MANT_NORM_1_2,
2999             _MM_MANT_SIGN_SRC,
3000             _MM_FROUND_CUR_DIRECTION,
3001         );
3002         assert_eq_m512d(r, _mm512_setzero_pd());
3003         let r = _mm512_maskz_getmant_round_pd(
3004             0b11110000,
3005             a,
3006             _MM_MANT_NORM_1_2,
3007             _MM_MANT_SIGN_SRC,
3008             _MM_FROUND_CUR_DIRECTION,
3009         );
3010         let e = _mm512_setr_pd(0., 0., 0., 0., 1.25, 1.25, 1.25, 1.25);
3011         assert_eq_m512d(r, e);
3012     }
3013
3014     #[simd_test(enable = "avx512f")]
3015     unsafe fn test_mm512_cvt_roundps_pd() {
3016         let a = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3017         let r = _mm512_cvt_roundps_pd(a, _MM_FROUND_CUR_DIRECTION);
3018         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3019         assert_eq_m512d(r, e);
3020     }
3021
3022     #[simd_test(enable = "avx512f")]
3023     unsafe fn test_mm512_mask_cvt_roundps_pd() {
3024         let a = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3025         let src = _mm512_set1_pd(0.);
3026         let r = _mm512_mask_cvt_roundps_pd(src, 0, a, _MM_FROUND_CUR_DIRECTION);
3027         assert_eq_m512d(r, src);
3028         let r = _mm512_mask_cvt_roundps_pd(src, 0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3029         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
3030         assert_eq_m512d(r, e);
3031     }
3032
3033     #[simd_test(enable = "avx512f")]
3034     unsafe fn test_mm512_maskz_cvt_roundps_pd() {
3035         let a = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3036         let r = _mm512_maskz_cvt_roundps_pd(0, a, _MM_FROUND_CUR_DIRECTION);
3037         assert_eq_m512d(r, _mm512_setzero_pd());
3038         let r = _mm512_maskz_cvt_roundps_pd(0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3039         let e = _mm512_setr_pd(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
3040         assert_eq_m512d(r, e);
3041     }
3042
3043     #[simd_test(enable = "avx512f")]
3044     unsafe fn test_mm512_cvt_roundpd_ps() {
3045         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3046         let r = _mm512_cvt_roundpd_ps(a, _MM_FROUND_CUR_DIRECTION);
3047         let e = _mm256_setr_ps(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3048         assert_eq_m256(r, e);
3049     }
3050
3051     #[simd_test(enable = "avx512f")]
3052     unsafe fn test_mm512_mask_cvt_roundpd_ps() {
3053         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3054         let src = _mm256_set1_ps(0.);
3055         let r = _mm512_mask_cvt_roundpd_ps(src, 0, a, _MM_FROUND_CUR_DIRECTION);
3056         assert_eq_m256(r, src);
3057         let r = _mm512_mask_cvt_roundpd_ps(src, 0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3058         let e = _mm256_setr_ps(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
3059         assert_eq_m256(r, e);
3060     }
3061
3062     #[simd_test(enable = "avx512f")]
3063     unsafe fn test_mm512_maskz_cvt_roundpd_ps() {
3064         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3065         let r = _mm512_maskz_cvt_roundpd_ps(0, a, _MM_FROUND_CUR_DIRECTION);
3066         assert_eq_m256(r, _mm256_setzero_ps());
3067         let r = _mm512_maskz_cvt_roundpd_ps(0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3068         let e = _mm256_setr_ps(0., -1.5, 2., -3.5, 0., 0., 0., 0.);
3069         assert_eq_m256(r, e);
3070     }
3071
3072     #[simd_test(enable = "avx512f")]
3073     unsafe fn test_mm512_cvt_roundpd_epi32() {
3074         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3075         let r = _mm512_cvt_roundpd_epi32(a, _MM_FROUND_CUR_DIRECTION);
3076         let e = _mm256_setr_epi32(0, -2, 2, -4, 4, -6, 6, -8);
3077         assert_eq_m256i(r, e);
3078     }
3079
3080     #[simd_test(enable = "avx512f")]
3081     unsafe fn test_mm512_mask_cvt_roundpd_epi32() {
3082         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3083         let src = _mm256_set1_epi32(0);
3084         let r = _mm512_mask_cvt_roundpd_epi32(src, 0, a, _MM_FROUND_CUR_DIRECTION);
3085         assert_eq_m256i(r, src);
3086         let r = _mm512_mask_cvt_roundpd_epi32(src, 0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3087         let e = _mm256_setr_epi32(0, -2, 2, -4, 0, 0, 0, 0);
3088         assert_eq_m256i(r, e);
3089     }
3090
3091     #[simd_test(enable = "avx512f")]
3092     unsafe fn test_mm512_maskz_cvt_roundpd_epi32() {
3093         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3094         let r = _mm512_maskz_cvt_roundpd_epi32(0, a, _MM_FROUND_CUR_DIRECTION);
3095         assert_eq_m256i(r, _mm256_setzero_si256());
3096         let r = _mm512_maskz_cvt_roundpd_epi32(0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3097         let e = _mm256_setr_epi32(0, -2, 2, -4, 0, 0, 0, 0);
3098         assert_eq_m256i(r, e);
3099     }
3100
3101     #[simd_test(enable = "avx512f")]
3102     unsafe fn test_mm512_cvt_roundpd_epu32() {
3103         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3104         let r = _mm512_cvt_roundpd_epu32(a, _MM_FROUND_CUR_DIRECTION);
3105         let e = _mm256_setr_epi32(0, -1, 2, -1, 4, -1, 6, -1);
3106         assert_eq_m256i(r, e);
3107     }
3108
3109     #[simd_test(enable = "avx512f")]
3110     unsafe fn test_mm512_mask_cvt_roundpd_epu32() {
3111         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3112         let src = _mm256_set1_epi32(0);
3113         let r = _mm512_mask_cvt_roundpd_epu32(src, 0, a, _MM_FROUND_CUR_DIRECTION);
3114         assert_eq_m256i(r, src);
3115         let r = _mm512_mask_cvt_roundpd_epu32(src, 0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3116         let e = _mm256_setr_epi32(0, -1, 2, -1, 0, 0, 0, 0);
3117         assert_eq_m256i(r, e);
3118     }
3119
3120     #[simd_test(enable = "avx512f")]
3121     unsafe fn test_mm512_maskz_cvt_roundpd_epu32() {
3122         let a = _mm512_setr_pd(0., -1.5, 2., -3.5, 4., -5.5, 6., -7.5);
3123         let r = _mm512_maskz_cvt_roundpd_epu32(0, a, _MM_FROUND_CUR_DIRECTION);
3124         assert_eq_m256i(r, _mm256_setzero_si256());
3125         let r = _mm512_maskz_cvt_roundpd_epu32(0b00001111, a, _MM_FROUND_CUR_DIRECTION);
3126         let e = _mm256_setr_epi32(0, -1, 2, -1, 0, 0, 0, 0);
3127         assert_eq_m256i(r, e);
3128     }
3129
3130     #[simd_test(enable = "avx512f")]
3131     unsafe fn test_mm512_setzero_pd() {
3132         assert_eq_m512d(_mm512_setzero_pd(), _mm512_set1_pd(0.));
3133     }
3134
3135     unsafe fn test_mm512_set1_epi64() {
3136         let r = _mm512_set_epi64(2, 2, 2, 2, 2, 2, 2, 2);
3137         assert_eq_m512i(r, _mm512_set1_epi64(2));
3138     }
3139
3140     #[simd_test(enable = "avx512f")]
3141     unsafe fn test_mm512_set1_pd() {
3142         let expected = _mm512_set_pd(2., 2., 2., 2., 2., 2., 2., 2.);
3143         assert_eq_m512d(expected, _mm512_set1_pd(2.));
3144     }
3145
3146     unsafe fn test_mm512_set4_epi64() {
3147         let r = _mm512_set_epi64(4, 3, 2, 1, 4, 3, 2, 1);
3148         assert_eq_m512i(r, _mm512_set4_epi64(4, 3, 2, 1));
3149     }
3150
3151     #[simd_test(enable = "avx512f")]
3152     unsafe fn test_mm512_set4_pd() {
3153         let r = _mm512_set_pd(4., 3., 2., 1., 4., 3., 2., 1.);
3154         assert_eq_m512d(r, _mm512_set4_pd(4., 3., 2., 1.));
3155     }
3156
3157     unsafe fn test_mm512_setr4_epi64() {
3158         let r = _mm512_set_epi64(4, 3, 2, 1, 4, 3, 2, 1);
3159         assert_eq_m512i(r, _mm512_setr4_epi64(1, 2, 3, 4));
3160     }
3161
3162     #[simd_test(enable = "avx512f")]
3163     unsafe fn test_mm512_setr4_pd() {
3164         let r = _mm512_set_pd(4., 3., 2., 1., 4., 3., 2., 1.);
3165         assert_eq_m512d(r, _mm512_setr4_pd(1., 2., 3., 4.));
3166     }
3167
3168     #[simd_test(enable = "avx512f")]
3169     unsafe fn test_mm512_cmplt_pd_mask() {
3170         #[rustfmt::skip]
3171         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3172         let b = _mm512_set1_pd(-1.);
3173         let m = _mm512_cmplt_pd_mask(a, b);
3174         assert_eq!(m, 0b00000101);
3175     }
3176
3177     #[simd_test(enable = "avx512f")]
3178     unsafe fn test_mm512_mask_cmplt_pd_mask() {
3179         #[rustfmt::skip]
3180         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3181         let b = _mm512_set1_pd(-1.);
3182         let mask = 0b01100110;
3183         let r = _mm512_mask_cmplt_pd_mask(mask, a, b);
3184         assert_eq!(r, 0b00000100);
3185     }
3186
3187     #[simd_test(enable = "avx512f")]
3188     unsafe fn test_mm512_cmpnlt_pd_mask() {
3189         #[rustfmt::skip]
3190         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3191         let b = _mm512_set1_pd(-1.);
3192         assert_eq!(_mm512_cmpnlt_pd_mask(a, b), !_mm512_cmplt_pd_mask(a, b));
3193     }
3194
3195     #[simd_test(enable = "avx512f")]
3196     unsafe fn test_mm512_mask_cmpnlt_pd_mask() {
3197         #[rustfmt::skip]
3198         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3199         let b = _mm512_set1_pd(-1.);
3200         let mask = 0b01111010;
3201         assert_eq!(_mm512_mask_cmpnlt_pd_mask(mask, a, b), 0b01111010);
3202     }
3203
3204     #[simd_test(enable = "avx512f")]
3205     unsafe fn test_mm512_cmple_pd_mask() {
3206         #[rustfmt::skip]
3207         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3208         let b = _mm512_set1_pd(-1.);
3209         assert_eq!(_mm512_cmple_pd_mask(a, b), 0b00100101);
3210     }
3211
3212     #[simd_test(enable = "avx512f")]
3213     unsafe fn test_mm512_mask_cmple_pd_mask() {
3214         #[rustfmt::skip]
3215         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3216         let b = _mm512_set1_pd(-1.);
3217         let mask = 0b01111010;
3218         assert_eq!(_mm512_mask_cmple_pd_mask(mask, a, b), 0b00100000);
3219     }
3220
3221     #[simd_test(enable = "avx512f")]
3222     unsafe fn test_mm512_cmpnle_pd_mask() {
3223         #[rustfmt::skip]
3224         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3225         let b = _mm512_set1_pd(-1.);
3226         let m = _mm512_cmpnle_pd_mask(b, a);
3227         assert_eq!(m, 0b00001101);
3228     }
3229
3230     #[simd_test(enable = "avx512f")]
3231     unsafe fn test_mm512_mask_cmpnle_pd_mask() {
3232         #[rustfmt::skip]
3233         let a = _mm512_set_pd(0., 1., -1., f64::MAX, f64::NAN, f64::MIN, 100., -100.);
3234         let b = _mm512_set1_pd(-1.);
3235         let mask = 0b01100110;
3236         let r = _mm512_mask_cmpnle_pd_mask(mask, b, a);
3237         assert_eq!(r, 0b00000100);
3238     }
3239
3240     #[simd_test(enable = "avx512f")]
3241     unsafe fn test_mm512_cmpeq_pd_mask() {
3242         #[rustfmt::skip]
3243         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, f64::NAN, -100.);
3244         #[rustfmt::skip]
3245         let b = _mm512_set_pd(0., 1., 13., 42., f64::MAX, f64::MIN, f64::NAN, -100.);
3246         let m = _mm512_cmpeq_pd_mask(b, a);
3247         assert_eq!(m, 0b11001101);
3248     }
3249
3250     #[simd_test(enable = "avx512f")]
3251     unsafe fn test_mm512_mask_cmpeq_pd_mask() {
3252         #[rustfmt::skip]
3253         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, f64::NAN, -100.);
3254         #[rustfmt::skip]
3255         let b = _mm512_set_pd(0., 1., 13., 42., f64::MAX, f64::MIN, f64::NAN, -100.);
3256         let mask = 0b01111010;
3257         let r = _mm512_mask_cmpeq_pd_mask(mask, b, a);
3258         assert_eq!(r, 0b01001000);
3259     }
3260
3261     #[simd_test(enable = "avx512f")]
3262     unsafe fn test_mm512_cmpneq_pd_mask() {
3263         #[rustfmt::skip]
3264         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, f64::NAN, -100.);
3265         #[rustfmt::skip]
3266         let b = _mm512_set_pd(0., 1., 13., 42., f64::MAX, f64::MIN, f64::NAN, -100.);
3267         let m = _mm512_cmpneq_pd_mask(b, a);
3268         assert_eq!(m, 0b00110010);
3269     }
3270
3271     #[simd_test(enable = "avx512f")]
3272     unsafe fn test_mm512_mask_cmpneq_pd_mask() {
3273         #[rustfmt::skip]
3274         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, f64::NAN, -100.);
3275         #[rustfmt::skip]
3276         let b = _mm512_set_pd(0., 1., 13., 42., f64::MAX, f64::MIN, f64::NAN, -100.);
3277         let mask = 0b01111010;
3278         let r = _mm512_mask_cmpneq_pd_mask(mask, b, a);
3279         assert_eq!(r, 0b00110010)
3280     }
3281
3282     #[simd_test(enable = "avx512f")]
3283     unsafe fn test_mm512_cmp_pd_mask() {
3284         #[rustfmt::skip]
3285         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, 100., -100.);
3286         let b = _mm512_set1_pd(-1.);
3287         let m = _mm512_cmp_pd_mask(a, b, _CMP_LT_OQ);
3288         assert_eq!(m, 0b00000101);
3289     }
3290
3291     #[simd_test(enable = "avx512f")]
3292     unsafe fn test_mm512_mask_cmp_pd_mask() {
3293         #[rustfmt::skip]
3294         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, 100., -100.);
3295         let b = _mm512_set1_pd(-1.);
3296         let mask = 0b01100110;
3297         let r = _mm512_mask_cmp_pd_mask(mask, a, b, _CMP_LT_OQ);
3298         assert_eq!(r, 0b00000100);
3299     }
3300
3301     #[simd_test(enable = "avx512f")]
3302     unsafe fn test_mm512_cmp_round_pd_mask() {
3303         #[rustfmt::skip]
3304         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, 100., -100.);
3305         let b = _mm512_set1_pd(-1.);
3306         let m = _mm512_cmp_round_pd_mask(a, b, _CMP_LT_OQ, _MM_FROUND_CUR_DIRECTION);
3307         assert_eq!(m, 0b00000101);
3308     }
3309
3310     #[simd_test(enable = "avx512f")]
3311     unsafe fn test_mm512_mask_cmp_round_pd_mask() {
3312         #[rustfmt::skip]
3313         let a = _mm512_set_pd(0., 1., -1., 13., f64::MAX, f64::MIN, 100., -100.);
3314         let b = _mm512_set1_pd(-1.);
3315         let mask = 0b01100110;
3316         let r = _mm512_mask_cmp_round_pd_mask(mask, a, b, _CMP_LT_OQ, _MM_FROUND_CUR_DIRECTION);
3317         assert_eq!(r, 0b00000100);
3318     }
3319
3320     #[simd_test(enable = "avx512f")]
3321     unsafe fn test_mm512_cmpord_pd_mask() {
3322         #[rustfmt::skip]
3323         let a = _mm512_set_pd(f64::NAN, f64::MAX, f64::NAN, f64::MIN, f64::NAN, -1., f64::NAN, 0.);
3324         #[rustfmt::skip]
3325         let b = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, f64::MIN, f64::MAX, -1., 0.);
3326         let m = _mm512_cmpord_pd_mask(a, b);
3327         assert_eq!(m, 0b00000101);
3328     }
3329
3330     #[simd_test(enable = "avx512f")]
3331     unsafe fn test_mm512_mask_cmpord_pd_mask() {
3332         #[rustfmt::skip]
3333         let a = _mm512_set_pd(f64::NAN, f64::MAX, f64::NAN, f64::MIN, f64::NAN, -1., f64::NAN, 0.);
3334         #[rustfmt::skip]
3335         let b = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, f64::MIN, f64::MAX, -1., 0.);
3336         let mask = 0b11000011;
3337         let m = _mm512_mask_cmpord_pd_mask(mask, a, b);
3338         assert_eq!(m, 0b00000001);
3339     }
3340
3341     #[simd_test(enable = "avx512f")]
3342     unsafe fn test_mm512_cmpunord_pd_mask() {
3343         #[rustfmt::skip]
3344         let a = _mm512_set_pd(f64::NAN, f64::MAX, f64::NAN, f64::MIN, f64::NAN, -1., f64::NAN, 0.);
3345         #[rustfmt::skip]
3346         let b = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, f64::MIN, f64::MAX, -1., 0.);
3347         let m = _mm512_cmpunord_pd_mask(a, b);
3348
3349         assert_eq!(m, 0b11111010);
3350     }
3351
3352     #[simd_test(enable = "avx512f")]
3353     unsafe fn test_mm512_mask_cmpunord_pd_mask() {
3354         #[rustfmt::skip]
3355         let a = _mm512_set_pd(f64::NAN, f64::MAX, f64::NAN, f64::MIN, f64::NAN, -1., f64::NAN, 0.);
3356         #[rustfmt::skip]
3357         let b = _mm512_set_pd(f64::NAN, f64::NAN, f64::NAN, f64::NAN, f64::MIN, f64::MAX, -1., 0.);
3358         let mask = 0b00001111;
3359         let m = _mm512_mask_cmpunord_pd_mask(mask, a, b);
3360         assert_eq!(m, 0b000001010);
3361     }
3362
3363     #[simd_test(enable = "avx512f")]
3364     unsafe fn test_mm512_cmplt_epu64_mask() {
3365         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3366         let b = _mm512_set1_epi64(-1);
3367         let m = _mm512_cmplt_epu64_mask(a, b);
3368         assert_eq!(m, 0b11001111);
3369     }
3370
3371     #[simd_test(enable = "avx512f")]
3372     unsafe fn test_mm512_mask_cmplt_epu64_mask() {
3373         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3374         let b = _mm512_set1_epi64(-1);
3375         let mask = 0b01111010;
3376         let r = _mm512_mask_cmplt_epu64_mask(mask, a, b);
3377         assert_eq!(r, 0b01001010);
3378     }
3379
3380     #[simd_test(enable = "avx512f")]
3381     unsafe fn test_mm512_cmpgt_epu64_mask() {
3382         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3383         let b = _mm512_set1_epi64(-1);
3384         let m = _mm512_cmpgt_epu64_mask(b, a);
3385         assert_eq!(m, 0b11001111);
3386     }
3387
3388     #[simd_test(enable = "avx512f")]
3389     unsafe fn test_mm512_mask_cmpgt_epu64_mask() {
3390         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3391         let b = _mm512_set1_epi64(-1);
3392         let mask = 0b01111010;
3393         let r = _mm512_mask_cmpgt_epu64_mask(mask, b, a);
3394         assert_eq!(r, 0b01001010);
3395     }
3396
3397     #[simd_test(enable = "avx512f")]
3398     unsafe fn test_mm512_cmple_epu64_mask() {
3399         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3400         let b = _mm512_set1_epi64(-1);
3401         assert_eq!(
3402             _mm512_cmple_epu64_mask(a, b),
3403             !_mm512_cmpgt_epu64_mask(a, b)
3404         )
3405     }
3406
3407     #[simd_test(enable = "avx512f")]
3408     unsafe fn test_mm512_mask_cmple_epu64_mask() {
3409         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3410         let b = _mm512_set1_epi64(-1);
3411         let mask = 0b01111010;
3412         assert_eq!(_mm512_mask_cmple_epu64_mask(mask, a, b), 0b01111010);
3413     }
3414
3415     #[simd_test(enable = "avx512f")]
3416     unsafe fn test_mm512_cmpge_epu64_mask() {
3417         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3418         let b = _mm512_set1_epi64(-1);
3419         assert_eq!(
3420             _mm512_cmpge_epu64_mask(a, b),
3421             !_mm512_cmplt_epu64_mask(a, b)
3422         );
3423     }
3424
3425     #[simd_test(enable = "avx512f")]
3426     unsafe fn test_mm512_mask_cmpge_epu64_mask() {
3427         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3428         let b = _mm512_set1_epi64(-1);
3429         let mask = 0b01111010;
3430         assert_eq!(_mm512_mask_cmpge_epu64_mask(mask, a, b), 0b01111010);
3431     }
3432
3433     #[simd_test(enable = "avx512f")]
3434     unsafe fn test_mm512_cmpeq_epu64_mask() {
3435         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3436         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3437         let m = _mm512_cmpeq_epu64_mask(b, a);
3438         assert_eq!(m, 0b11001111);
3439     }
3440
3441     #[simd_test(enable = "avx512f")]
3442     unsafe fn test_mm512_mask_cmpeq_epu64_mask() {
3443         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3444         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3445         let mask = 0b01111010;
3446         let r = _mm512_mask_cmpeq_epu64_mask(mask, b, a);
3447         assert_eq!(r, 0b01001010);
3448     }
3449
3450     #[simd_test(enable = "avx512f")]
3451     unsafe fn test_mm512_cmpneq_epu64_mask() {
3452         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3453         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3454         let m = _mm512_cmpneq_epu64_mask(b, a);
3455         assert_eq!(m, !_mm512_cmpeq_epu64_mask(b, a));
3456     }
3457
3458     #[simd_test(enable = "avx512f")]
3459     unsafe fn test_mm512_mask_cmpneq_epu64_mask() {
3460         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, -100, 100);
3461         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3462         let mask = 0b01111010;
3463         let r = _mm512_mask_cmpneq_epu64_mask(mask, b, a);
3464         assert_eq!(r, 0b00110010);
3465     }
3466
3467     #[simd_test(enable = "avx512f")]
3468     unsafe fn test_mm512_cmp_epu64_mask() {
3469         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3470         let b = _mm512_set1_epi64(-1);
3471         let m = _mm512_cmp_epu64_mask(a, b, _MM_CMPINT_LT);
3472         assert_eq!(m, 0b11001111);
3473     }
3474
3475     #[simd_test(enable = "avx512f")]
3476     unsafe fn test_mm512_mask_cmp_epu64_mask() {
3477         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3478         let b = _mm512_set1_epi64(-1);
3479         let mask = 0b01111010;
3480         let r = _mm512_mask_cmp_epu64_mask(mask, a, b, _MM_CMPINT_LT);
3481         assert_eq!(r, 0b01001010);
3482     }
3483
3484     #[simd_test(enable = "avx512f")]
3485     unsafe fn test_mm512_cmplt_epi64_mask() {
3486         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3487         let b = _mm512_set1_epi64(-1);
3488         let m = _mm512_cmplt_epi64_mask(a, b);
3489         assert_eq!(m, 0b00000101);
3490     }
3491
3492     #[simd_test(enable = "avx512f")]
3493     unsafe fn test_mm512_mask_cmplt_epi64_mask() {
3494         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3495         let b = _mm512_set1_epi64(-1);
3496         let mask = 0b01100110;
3497         let r = _mm512_mask_cmplt_epi64_mask(mask, a, b);
3498         assert_eq!(r, 0b00000100);
3499     }
3500
3501     #[simd_test(enable = "avx512f")]
3502     unsafe fn test_mm512_cmpgt_epi64_mask() {
3503         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3504         let b = _mm512_set1_epi64(-1);
3505         let m = _mm512_cmpgt_epi64_mask(b, a);
3506         assert_eq!(m, 0b00000101);
3507     }
3508
3509     #[simd_test(enable = "avx512f")]
3510     unsafe fn test_mm512_mask_cmpgt_epi64_mask() {
3511         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3512         let b = _mm512_set1_epi64(-1);
3513         let mask = 0b01100110;
3514         let r = _mm512_mask_cmpgt_epi64_mask(mask, b, a);
3515         assert_eq!(r, 0b00000100);
3516     }
3517
3518     #[simd_test(enable = "avx512f")]
3519     unsafe fn test_mm512_cmple_epi64_mask() {
3520         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3521         let b = _mm512_set1_epi64(-1);
3522         assert_eq!(
3523             _mm512_cmple_epi64_mask(a, b),
3524             !_mm512_cmpgt_epi64_mask(a, b)
3525         )
3526     }
3527
3528     #[simd_test(enable = "avx512f")]
3529     unsafe fn test_mm512_mask_cmple_epi64_mask() {
3530         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3531         let b = _mm512_set1_epi64(-1);
3532         let mask = 0b01111010;
3533         assert_eq!(_mm512_mask_cmple_epi64_mask(mask, a, b), 0b00110000);
3534     }
3535
3536     #[simd_test(enable = "avx512f")]
3537     unsafe fn test_mm512_cmpge_epi64_mask() {
3538         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3539         let b = _mm512_set1_epi64(-1);
3540         assert_eq!(
3541             _mm512_cmpge_epi64_mask(a, b),
3542             !_mm512_cmplt_epi64_mask(a, b)
3543         )
3544     }
3545
3546     #[simd_test(enable = "avx512f")]
3547     unsafe fn test_mm512_mask_cmpge_epi64_mask() {
3548         let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
3549         let b = _mm512_set1_epi64(-1);
3550         let mask = 0b01111010;
3551         assert_eq!(_mm512_mask_cmpge_epi64_mask(mask, a, b), 0b0110000);
3552     }
3553
3554     #[simd_test(enable = "avx512f")]
3555     unsafe fn test_mm512_cmpeq_epi64_mask() {
3556         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3557         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3558         let m = _mm512_cmpeq_epi64_mask(b, a);
3559         assert_eq!(m, 0b11001111);
3560     }
3561
3562     #[simd_test(enable = "avx512f")]
3563     unsafe fn test_mm512_mask_cmpeq_epi64_mask() {
3564         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3565         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3566         let mask = 0b01111010;
3567         let r = _mm512_mask_cmpeq_epi64_mask(mask, b, a);
3568         assert_eq!(r, 0b01001010);
3569     }
3570
3571     #[simd_test(enable = "avx512f")]
3572     unsafe fn test_mm512_set_epi64() {
3573         let r = _mm512_setr_epi64(0, 1, 2, 3, 4, 5, 6, 7);
3574         assert_eq_m512i(r, _mm512_set_epi64(7, 6, 5, 4, 3, 2, 1, 0))
3575     }
3576
3577     #[simd_test(enable = "avx512f")]
3578     unsafe fn test_mm512_setr_epi64() {
3579         let r = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
3580         assert_eq_m512i(r, _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0))
3581     }
3582
3583     unsafe fn test_mm512_cmpneq_epi64_mask() {
3584         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3585         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3586         let m = _mm512_cmpneq_epi64_mask(b, a);
3587         assert_eq!(m, !_mm512_cmpeq_epi64_mask(b, a));
3588     }
3589
3590     #[simd_test(enable = "avx512f")]
3591     unsafe fn test_mm512_mask_cmpneq_epi64_mask() {
3592         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, -100, 100);
3593         let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
3594         let mask = 0b01111010;
3595         let r = _mm512_mask_cmpneq_epi64_mask(mask, b, a);
3596         assert_eq!(r, 0b00110010)
3597     }
3598
3599     #[simd_test(enable = "avx512f")]
3600     unsafe fn test_mm512_cmp_epi64_mask() {
3601         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3602         let b = _mm512_set1_epi64(-1);
3603         let m = _mm512_cmp_epi64_mask(a, b, _MM_CMPINT_LT);
3604         assert_eq!(m, 0b00000101);
3605     }
3606
3607     #[simd_test(enable = "avx512f")]
3608     unsafe fn test_mm512_mask_cmp_epi64_mask() {
3609         let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
3610         let b = _mm512_set1_epi64(-1);
3611         let mask = 0b01100110;
3612         let r = _mm512_mask_cmp_epi64_mask(mask, a, b, _MM_CMPINT_LT);
3613         assert_eq!(r, 0b00000100);
3614     }
3615
3616     #[simd_test(enable = "avx512f")]
3617     unsafe fn test_mm512_i32gather_pd() {
3618         let mut arr = [0f64; 128];
3619         for i in 0..128 {
3620             arr[i] = i as f64;
3621         }
3622         // A multiplier of 8 is word-addressing
3623         #[rustfmt::skip]
3624         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3625         let r = _mm512_i32gather_pd(index, arr.as_ptr() as *const u8, 8);
3626         assert_eq_m512d(r, _mm512_setr_pd(0., 16., 32., 48., 64., 80., 96., 112.));
3627     }
3628
3629     #[simd_test(enable = "avx512f")]
3630     unsafe fn test_mm512_mask_i32gather_pd() {
3631         let mut arr = [0f64; 128];
3632         for i in 0..128 {
3633             arr[i] = i as f64;
3634         }
3635         let src = _mm512_set1_pd(2.);
3636         let mask = 0b10101010;
3637         #[rustfmt::skip]
3638         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3639         // A multiplier of 8 is word-addressing
3640         let r = _mm512_mask_i32gather_pd(src, mask, index, arr.as_ptr() as *const u8, 8);
3641         assert_eq_m512d(r, _mm512_setr_pd(2., 16., 2., 48., 2., 80., 2., 112.));
3642     }
3643
3644     #[simd_test(enable = "avx512f")]
3645     unsafe fn test_mm512_i64gather_pd() {
3646         let mut arr = [0f64; 128];
3647         for i in 0..128 {
3648             arr[i] = i as f64;
3649         }
3650         // A multiplier of 8 is word-addressing
3651         #[rustfmt::skip]
3652         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3653         let r = _mm512_i64gather_pd(index, arr.as_ptr() as *const u8, 8);
3654         assert_eq_m512d(r, _mm512_setr_pd(0., 16., 32., 48., 64., 80., 96., 112.));
3655     }
3656
3657     #[simd_test(enable = "avx512f")]
3658     unsafe fn test_mm512_mask_i64gather_pd() {
3659         let mut arr = [0f64; 128];
3660         for i in 0..128 {
3661             arr[i] = i as f64;
3662         }
3663         let src = _mm512_set1_pd(2.);
3664         let mask = 0b10101010;
3665         #[rustfmt::skip]
3666         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3667         // A multiplier of 8 is word-addressing
3668         let r = _mm512_mask_i64gather_pd(src, mask, index, arr.as_ptr() as *const u8, 8);
3669         assert_eq_m512d(r, _mm512_setr_pd(2., 16., 2., 48., 2., 80., 2., 112.));
3670     }
3671
3672     #[simd_test(enable = "avx512f")]
3673     unsafe fn test_mm512_i64gather_ps() {
3674         let mut arr = [0f32; 128];
3675         for i in 0..128 {
3676             arr[i] = i as f32;
3677         }
3678         // A multiplier of 4 is word-addressing
3679         #[rustfmt::skip]
3680         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3681         let r = _mm512_i64gather_ps(index, arr.as_ptr() as *const u8, 4);
3682         assert_eq_m256(r, _mm256_setr_ps(0., 16., 32., 48., 64., 80., 96., 112.));
3683     }
3684
3685     #[simd_test(enable = "avx512f")]
3686     unsafe fn test_mm512_mask_i64gather_ps() {
3687         let mut arr = [0f32; 128];
3688         for i in 0..128 {
3689             arr[i] = i as f32;
3690         }
3691         let src = _mm256_set1_ps(2.);
3692         let mask = 0b10101010;
3693         #[rustfmt::skip]
3694         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3695         // A multiplier of 4 is word-addressing
3696         let r = _mm512_mask_i64gather_ps(src, mask, index, arr.as_ptr() as *const u8, 4);
3697         assert_eq_m256(r, _mm256_setr_ps(2., 16., 2., 48., 2., 80., 2., 112.));
3698     }
3699
3700     #[simd_test(enable = "avx512f")]
3701     unsafe fn test_mm512_i32gather_epi64() {
3702         let mut arr = [0i64; 128];
3703         for i in 0..128i64 {
3704             arr[i as usize] = i;
3705         }
3706         // A multiplier of 8 is word-addressing
3707         #[rustfmt::skip]
3708         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3709         let r = _mm512_i32gather_epi64(index, arr.as_ptr() as *const u8, 8);
3710         assert_eq_m512i(r, _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112));
3711     }
3712
3713     #[simd_test(enable = "avx512f")]
3714     unsafe fn test_mm512_mask_i32gather_epi64() {
3715         let mut arr = [0i64; 128];
3716         for i in 0..128i64 {
3717             arr[i as usize] = i;
3718         }
3719         let src = _mm512_set1_epi64(2);
3720         let mask = 0b10101010;
3721         #[rustfmt::skip]
3722         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3723         // A multiplier of 8 is word-addressing
3724         let r = _mm512_mask_i32gather_epi64(src, mask, index, arr.as_ptr() as *const u8, 8);
3725         assert_eq_m512i(r, _mm512_setr_epi64(2, 16, 2, 48, 2, 80, 2, 112));
3726     }
3727
3728     #[simd_test(enable = "avx512f")]
3729     unsafe fn test_mm512_i64gather_epi64() {
3730         let mut arr = [0i64; 128];
3731         for i in 0..128i64 {
3732             arr[i as usize] = i;
3733         }
3734         // A multiplier of 8 is word-addressing
3735         #[rustfmt::skip]
3736         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3737         let r = _mm512_i64gather_epi64(index, arr.as_ptr() as *const u8, 8);
3738         assert_eq_m512i(r, _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112));
3739     }
3740
3741     #[simd_test(enable = "avx512f")]
3742     unsafe fn test_mm512_mask_i64gather_epi64() {
3743         let mut arr = [0i64; 128];
3744         for i in 0..128i64 {
3745             arr[i as usize] = i;
3746         }
3747         let src = _mm512_set1_epi64(2);
3748         let mask = 0b10101010;
3749         #[rustfmt::skip]
3750         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3751         // A multiplier of 8 is word-addressing
3752         let r = _mm512_mask_i64gather_epi64(src, mask, index, arr.as_ptr() as *const u8, 8);
3753         assert_eq_m512i(r, _mm512_setr_epi64(2, 16, 2, 48, 2, 80, 2, 112));
3754     }
3755
3756     #[simd_test(enable = "avx512f")]
3757     unsafe fn test_mm512_i64gather_epi32() {
3758         let mut arr = [0i64; 128];
3759         for i in 0..128i64 {
3760             arr[i as usize] = i;
3761         }
3762         // A multiplier of 8 is word-addressing
3763         #[rustfmt::skip]
3764         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3765         let r = _mm512_i64gather_epi32(index, arr.as_ptr() as *const u8, 8);
3766         assert_eq_m256i(r, _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112));
3767     }
3768
3769     #[simd_test(enable = "avx512f")]
3770     unsafe fn test_mm512_mask_i64gather_epi32() {
3771         let mut arr = [0i64; 128];
3772         for i in 0..128i64 {
3773             arr[i as usize] = i;
3774         }
3775         let src = _mm256_set1_epi32(2);
3776         let mask = 0b10101010;
3777         #[rustfmt::skip]
3778         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3779         // A multiplier of 8 is word-addressing
3780         let r = _mm512_mask_i64gather_epi32(src, mask, index, arr.as_ptr() as *const u8, 8);
3781         assert_eq_m256i(r, _mm256_setr_epi32(2, 16, 2, 48, 2, 80, 2, 112));
3782     }
3783
3784     #[simd_test(enable = "avx512f")]
3785     unsafe fn test_mm512_i32scatter_pd() {
3786         let mut arr = [0f64; 128];
3787         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3788         let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
3789         // A multiplier of 8 is word-addressing
3790         _mm512_i32scatter_pd(arr.as_mut_ptr() as *mut u8, index, src, 8);
3791         let mut expected = [0f64; 128];
3792         for i in 0..8 {
3793             expected[i * 16] = (i + 1) as f64;
3794         }
3795         assert_eq!(&arr[..], &expected[..],);
3796     }
3797
3798     #[simd_test(enable = "avx512f")]
3799     unsafe fn test_mm512_mask_i32scatter_pd() {
3800         let mut arr = [0f64; 128];
3801         let mask = 0b10101010;
3802         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3803         let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
3804         // A multiplier of 8 is word-addressing
3805         _mm512_mask_i32scatter_pd(arr.as_mut_ptr() as *mut u8, mask, index, src, 8);
3806         let mut expected = [0f64; 128];
3807         for i in 0..4 {
3808             expected[i * 32 + 16] = 2. * (i + 1) as f64;
3809         }
3810         assert_eq!(&arr[..], &expected[..],);
3811     }
3812
3813     #[simd_test(enable = "avx512f")]
3814     unsafe fn test_mm512_i64scatter_pd() {
3815         let mut arr = [0f64; 128];
3816         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3817         let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
3818         // A multiplier of 8 is word-addressing
3819         _mm512_i64scatter_pd(arr.as_mut_ptr() as *mut u8, index, src, 8);
3820         let mut expected = [0f64; 128];
3821         for i in 0..8 {
3822             expected[i * 16] = (i + 1) as f64;
3823         }
3824         assert_eq!(&arr[..], &expected[..],);
3825     }
3826
3827     #[simd_test(enable = "avx512f")]
3828     unsafe fn test_mm512_mask_i64scatter_pd() {
3829         let mut arr = [0f64; 128];
3830         let mask = 0b10101010;
3831         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3832         let src = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
3833         // A multiplier of 8 is word-addressing
3834         _mm512_mask_i64scatter_pd(arr.as_mut_ptr() as *mut u8, mask, index, src, 8);
3835         let mut expected = [0f64; 128];
3836         for i in 0..4 {
3837             expected[i * 32 + 16] = 2. * (i + 1) as f64;
3838         }
3839         assert_eq!(&arr[..], &expected[..],);
3840     }
3841
3842     #[simd_test(enable = "avx512f")]
3843     unsafe fn test_mm512_i64scatter_ps() {
3844         let mut arr = [0f32; 128];
3845         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3846         let src = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.);
3847         // A multiplier of 4 is word-addressing
3848         _mm512_i64scatter_ps(arr.as_mut_ptr() as *mut u8, index, src, 4);
3849         let mut expected = [0f32; 128];
3850         for i in 0..8 {
3851             expected[i * 16] = (i + 1) as f32;
3852         }
3853         assert_eq!(&arr[..], &expected[..],);
3854     }
3855
3856     #[simd_test(enable = "avx512f")]
3857     unsafe fn test_mm512_mask_i64scatter_ps() {
3858         let mut arr = [0f32; 128];
3859         let mask = 0b10101010;
3860         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3861         let src = _mm256_setr_ps(1., 2., 3., 4., 5., 6., 7., 8.);
3862         // A multiplier of 4 is word-addressing
3863         _mm512_mask_i64scatter_ps(arr.as_mut_ptr() as *mut u8, mask, index, src, 4);
3864         let mut expected = [0f32; 128];
3865         for i in 0..4 {
3866             expected[i * 32 + 16] = 2. * (i + 1) as f32;
3867         }
3868         assert_eq!(&arr[..], &expected[..],);
3869     }
3870
3871     #[simd_test(enable = "avx512f")]
3872     unsafe fn test_mm512_i32scatter_epi64() {
3873         let mut arr = [0i64; 128];
3874         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3875         let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
3876         // A multiplier of 8 is word-addressing
3877         _mm512_i32scatter_epi64(arr.as_mut_ptr() as *mut u8, index, src, 8);
3878         let mut expected = [0i64; 128];
3879         for i in 0..8 {
3880             expected[i * 16] = (i + 1) as i64;
3881         }
3882         assert_eq!(&arr[..], &expected[..],);
3883     }
3884
3885     #[simd_test(enable = "avx512f")]
3886     unsafe fn test_mm512_mask_i32scatter_epi64() {
3887         let mut arr = [0i64; 128];
3888         let mask = 0b10101010;
3889         let index = _mm256_setr_epi32(0, 16, 32, 48, 64, 80, 96, 112);
3890         let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
3891         // A multiplier of 8 is word-addressing
3892         _mm512_mask_i32scatter_epi64(arr.as_mut_ptr() as *mut u8, mask, index, src, 8);
3893         let mut expected = [0i64; 128];
3894         for i in 0..4 {
3895             expected[i * 32 + 16] = 2 * (i + 1) as i64;
3896         }
3897         assert_eq!(&arr[..], &expected[..],);
3898     }
3899
3900     #[simd_test(enable = "avx512f")]
3901     unsafe fn test_mm512_i64scatter_epi64() {
3902         let mut arr = [0i64; 128];
3903         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3904         let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
3905         // A multiplier of 8 is word-addressing
3906         _mm512_i64scatter_epi64(arr.as_mut_ptr() as *mut u8, index, src, 8);
3907         let mut expected = [0i64; 128];
3908         for i in 0..8 {
3909             expected[i * 16] = (i + 1) as i64;
3910         }
3911         assert_eq!(&arr[..], &expected[..],);
3912     }
3913
3914     #[simd_test(enable = "avx512f")]
3915     unsafe fn test_mm512_mask_i64scatter_epi64() {
3916         let mut arr = [0i64; 128];
3917         let mask = 0b10101010;
3918         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3919         let src = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
3920         // A multiplier of 8 is word-addressing
3921         _mm512_mask_i64scatter_epi64(arr.as_mut_ptr() as *mut u8, mask, index, src, 8);
3922         let mut expected = [0i64; 128];
3923         for i in 0..4 {
3924             expected[i * 32 + 16] = 2 * (i + 1) as i64;
3925         }
3926         assert_eq!(&arr[..], &expected[..],);
3927     }
3928
3929     #[simd_test(enable = "avx512f")]
3930     unsafe fn test_mm512_i64scatter_epi32() {
3931         let mut arr = [0i32; 128];
3932         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3933         let src = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8);
3934         // A multiplier of 4 is word-addressing
3935         _mm512_i64scatter_epi32(arr.as_mut_ptr() as *mut u8, index, src, 4);
3936         let mut expected = [0i32; 128];
3937         for i in 0..8 {
3938             expected[i * 16] = (i + 1) as i32;
3939         }
3940         assert_eq!(&arr[..], &expected[..],);
3941     }
3942
3943     #[simd_test(enable = "avx512f")]
3944     unsafe fn test_mm512_mask_i64scatter_epi32() {
3945         let mut arr = [0i32; 128];
3946         let mask = 0b10101010;
3947         let index = _mm512_setr_epi64(0, 16, 32, 48, 64, 80, 96, 112);
3948         let src = _mm256_setr_epi32(1, 2, 3, 4, 5, 6, 7, 8);
3949         // A multiplier of 4 is word-addressing
3950         _mm512_mask_i64scatter_epi32(arr.as_mut_ptr() as *mut u8, mask, index, src, 4);
3951         let mut expected = [0i32; 128];
3952         for i in 0..4 {
3953             expected[i * 32 + 16] = 2 * (i + 1) as i32;
3954         }
3955         assert_eq!(&arr[..], &expected[..],);
3956     }
3957
3958     #[simd_test(enable = "avx512f")]
3959     unsafe fn test_mm512_rol_epi64() {
3960         let a = _mm512_set_epi64(
3961             1 << 63,
3962             1 << 32,
3963             1 << 32,
3964             1 << 32,
3965             1 << 32,
3966             1 << 32,
3967             1 << 32,
3968             1 << 32,
3969         );
3970         let r = _mm512_rol_epi64(a, 1);
3971         let e = _mm512_set_epi64(
3972             1 << 0,
3973             1 << 33,
3974             1 << 33,
3975             1 << 33,
3976             1 << 33,
3977             1 << 33,
3978             1 << 33,
3979             1 << 33,
3980         );
3981         assert_eq_m512i(r, e);
3982     }
3983
3984     #[simd_test(enable = "avx512f")]
3985     unsafe fn test_mm512_mask_rol_epi64() {
3986         let a = _mm512_set_epi64(
3987             1 << 63,
3988             1 << 32,
3989             1 << 32,
3990             1 << 32,
3991             1 << 32,
3992             1 << 32,
3993             1 << 32,
3994             1 << 32,
3995         );
3996         let r = _mm512_mask_rol_epi64(a, 0, a, 1);
3997         assert_eq_m512i(r, a);
3998
3999         let r = _mm512_mask_rol_epi64(a, 0b11111111, a, 1);
4000         let e = _mm512_set_epi64(
4001             1 << 0,
4002             1 << 33,
4003             1 << 33,
4004             1 << 33,
4005             1 << 33,
4006             1 << 33,
4007             1 << 33,
4008             1 << 33,
4009         );
4010         assert_eq_m512i(r, e);
4011     }
4012
4013     #[simd_test(enable = "avx512f")]
4014     unsafe fn test_mm512_maskz_rol_epi64() {
4015         let a = _mm512_set_epi64(
4016             1 << 32,
4017             1 << 32,
4018             1 << 32,
4019             1 << 32,
4020             1 << 32,
4021             1 << 32,
4022             1 << 32,
4023             1 << 63,
4024         );
4025         let r = _mm512_maskz_rol_epi64(0, a, 1);
4026         assert_eq_m512i(r, _mm512_setzero_si512());
4027
4028         let r = _mm512_maskz_rol_epi64(0b00001111, a, 1);
4029         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 33, 1 << 33, 1 << 33, 1 << 0);
4030         assert_eq_m512i(r, e);
4031     }
4032
4033     #[simd_test(enable = "avx512f")]
4034     unsafe fn test_mm512_ror_epi64() {
4035         let a = _mm512_set_epi64(
4036             1 << 0,
4037             1 << 32,
4038             1 << 32,
4039             1 << 32,
4040             1 << 32,
4041             1 << 32,
4042             1 << 32,
4043             1 << 32,
4044         );
4045         let r = _mm512_ror_epi64(a, 1);
4046         let e = _mm512_set_epi64(
4047             1 << 63,
4048             1 << 31,
4049             1 << 31,
4050             1 << 31,
4051             1 << 31,
4052             1 << 31,
4053             1 << 31,
4054             1 << 31,
4055         );
4056         assert_eq_m512i(r, e);
4057     }
4058
4059     #[simd_test(enable = "avx512f")]
4060     unsafe fn test_mm512_mask_ror_epi64() {
4061         let a = _mm512_set_epi64(
4062             1 << 0,
4063             1 << 32,
4064             1 << 32,
4065             1 << 32,
4066             1 << 32,
4067             1 << 32,
4068             1 << 32,
4069             1 << 32,
4070         );
4071         let r = _mm512_mask_ror_epi64(a, 0, a, 1);
4072         assert_eq_m512i(r, a);
4073
4074         let r = _mm512_mask_ror_epi64(a, 0b11111111, a, 1);
4075         let e = _mm512_set_epi64(
4076             1 << 63,
4077             1 << 31,
4078             1 << 31,
4079             1 << 31,
4080             1 << 31,
4081             1 << 31,
4082             1 << 31,
4083             1 << 31,
4084         );
4085         assert_eq_m512i(r, e);
4086     }
4087
4088     #[simd_test(enable = "avx512f")]
4089     unsafe fn test_mm512_maskz_ror_epi64() {
4090         let a = _mm512_set_epi64(
4091             1 << 32,
4092             1 << 32,
4093             1 << 32,
4094             1 << 32,
4095             1 << 32,
4096             1 << 32,
4097             1 << 32,
4098             1 << 0,
4099         );
4100         let r = _mm512_maskz_ror_epi64(0, a, 1);
4101         assert_eq_m512i(r, _mm512_setzero_si512());
4102
4103         let r = _mm512_maskz_ror_epi64(0b00001111, a, 1);
4104         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 31, 1 << 31, 1 << 31, 1 << 63);
4105         assert_eq_m512i(r, e);
4106     }
4107
4108     #[simd_test(enable = "avx512f")]
4109     unsafe fn test_mm512_slli_epi64() {
4110         let a = _mm512_set_epi64(
4111             1 << 63,
4112             1 << 32,
4113             1 << 32,
4114             1 << 32,
4115             1 << 32,
4116             1 << 32,
4117             1 << 32,
4118             1 << 32,
4119         );
4120         let r = _mm512_slli_epi64(a, 1);
4121         let e = _mm512_set_epi64(
4122             0,
4123             1 << 33,
4124             1 << 33,
4125             1 << 33,
4126             1 << 33,
4127             1 << 33,
4128             1 << 33,
4129             1 << 33,
4130         );
4131         assert_eq_m512i(r, e);
4132     }
4133
4134     #[simd_test(enable = "avx512f")]
4135     unsafe fn test_mm512_mask_slli_epi64() {
4136         let a = _mm512_set_epi64(
4137             1 << 63,
4138             1 << 32,
4139             1 << 32,
4140             1 << 32,
4141             1 << 32,
4142             1 << 32,
4143             1 << 32,
4144             1 << 32,
4145         );
4146         let r = _mm512_mask_slli_epi64(a, 0, a, 1);
4147         assert_eq_m512i(r, a);
4148
4149         let r = _mm512_mask_slli_epi64(a, 0b11111111, a, 1);
4150         let e = _mm512_set_epi64(
4151             0,
4152             1 << 33,
4153             1 << 33,
4154             1 << 33,
4155             1 << 33,
4156             1 << 33,
4157             1 << 33,
4158             1 << 33,
4159         );
4160         assert_eq_m512i(r, e);
4161     }
4162
4163     #[simd_test(enable = "avx512f")]
4164     unsafe fn test_mm512_maskz_slli_epi64() {
4165         let a = _mm512_set_epi64(
4166             1 << 32,
4167             1 << 32,
4168             1 << 32,
4169             1 << 32,
4170             1 << 32,
4171             1 << 32,
4172             1 << 32,
4173             1 << 63,
4174         );
4175         let r = _mm512_maskz_slli_epi64(0, a, 1);
4176         assert_eq_m512i(r, _mm512_setzero_si512());
4177
4178         let r = _mm512_maskz_slli_epi64(0b00001111, a, 1);
4179         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 33, 1 << 33, 1 << 33, 0);
4180         assert_eq_m512i(r, e);
4181     }
4182
4183     #[simd_test(enable = "avx512f")]
4184     unsafe fn test_mm512_srli_epi64() {
4185         let a = _mm512_set_epi64(
4186             1 << 0,
4187             1 << 32,
4188             1 << 32,
4189             1 << 32,
4190             1 << 32,
4191             1 << 32,
4192             1 << 32,
4193             1 << 32,
4194         );
4195         let r = _mm512_srli_epi64(a, 1);
4196         let e = _mm512_set_epi64(
4197             0,
4198             1 << 31,
4199             1 << 31,
4200             1 << 31,
4201             1 << 31,
4202             1 << 31,
4203             1 << 31,
4204             1 << 31,
4205         );
4206         assert_eq_m512i(r, e);
4207     }
4208
4209     #[simd_test(enable = "avx512f")]
4210     unsafe fn test_mm512_mask_srli_epi64() {
4211         let a = _mm512_set_epi64(
4212             1 << 0,
4213             1 << 32,
4214             1 << 32,
4215             1 << 32,
4216             1 << 32,
4217             1 << 32,
4218             1 << 32,
4219             1 << 32,
4220         );
4221         let r = _mm512_mask_srli_epi64(a, 0, a, 1);
4222         assert_eq_m512i(r, a);
4223
4224         let r = _mm512_mask_srli_epi64(a, 0b11111111, a, 1);
4225         let e = _mm512_set_epi64(
4226             0,
4227             1 << 31,
4228             1 << 31,
4229             1 << 31,
4230             1 << 31,
4231             1 << 31,
4232             1 << 31,
4233             1 << 31,
4234         );
4235         assert_eq_m512i(r, e);
4236     }
4237
4238     #[simd_test(enable = "avx512f")]
4239     unsafe fn test_mm512_maskz_srli_epi64() {
4240         let a = _mm512_set_epi64(
4241             1 << 32,
4242             1 << 32,
4243             1 << 32,
4244             1 << 32,
4245             1 << 32,
4246             1 << 32,
4247             1 << 32,
4248             1 << 0,
4249         );
4250         let r = _mm512_maskz_srli_epi64(0, a, 1);
4251         assert_eq_m512i(r, _mm512_setzero_si512());
4252
4253         let r = _mm512_maskz_srli_epi64(0b00001111, a, 1);
4254         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 31, 1 << 31, 1 << 31, 0);
4255         assert_eq_m512i(r, e);
4256     }
4257
4258     #[simd_test(enable = "avx512f")]
4259     unsafe fn test_mm512_rolv_epi64() {
4260         let a = _mm512_set_epi64(
4261             1 << 32,
4262             1 << 63,
4263             1 << 32,
4264             1 << 32,
4265             1 << 32,
4266             1 << 32,
4267             1 << 32,
4268             1 << 32,
4269         );
4270         let b = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4271         let r = _mm512_rolv_epi64(a, b);
4272         let e = _mm512_set_epi64(
4273             1 << 32,
4274             1 << 0,
4275             1 << 34,
4276             1 << 35,
4277             1 << 36,
4278             1 << 37,
4279             1 << 38,
4280             1 << 39,
4281         );
4282         assert_eq_m512i(r, e);
4283     }
4284
4285     #[simd_test(enable = "avx512f")]
4286     unsafe fn test_mm512_mask_rolv_epi64() {
4287         let a = _mm512_set_epi64(
4288             1 << 32,
4289             1 << 63,
4290             1 << 32,
4291             1 << 32,
4292             1 << 32,
4293             1 << 32,
4294             1 << 32,
4295             1 << 32,
4296         );
4297         let b = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4298         let r = _mm512_mask_rolv_epi64(a, 0, a, b);
4299         assert_eq_m512i(r, a);
4300
4301         let r = _mm512_mask_rolv_epi64(a, 0b11111111, a, b);
4302         let e = _mm512_set_epi64(
4303             1 << 32,
4304             1 << 0,
4305             1 << 34,
4306             1 << 35,
4307             1 << 36,
4308             1 << 37,
4309             1 << 38,
4310             1 << 39,
4311         );
4312         assert_eq_m512i(r, e);
4313     }
4314
4315     #[simd_test(enable = "avx512f")]
4316     unsafe fn test_mm512_maskz_rolv_epi64() {
4317         let a = _mm512_set_epi64(
4318             1 << 32,
4319             1 << 32,
4320             1 << 32,
4321             1 << 32,
4322             1 << 32,
4323             1 << 32,
4324             1 << 32,
4325             1 << 62,
4326         );
4327         let b = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 2);
4328         let r = _mm512_maskz_rolv_epi64(0, a, b);
4329         assert_eq_m512i(r, _mm512_setzero_si512());
4330
4331         let r = _mm512_maskz_rolv_epi64(0b00001111, a, b);
4332         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 36, 1 << 37, 1 << 38, 1 << 0);
4333         assert_eq_m512i(r, e);
4334     }
4335
4336     #[simd_test(enable = "avx512f")]
4337     unsafe fn test_mm512_rorv_epi64() {
4338         let a = _mm512_set_epi64(
4339             1 << 32,
4340             1 << 0,
4341             1 << 32,
4342             1 << 32,
4343             1 << 32,
4344             1 << 32,
4345             1 << 32,
4346             1 << 32,
4347         );
4348         let b = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4349         let r = _mm512_rorv_epi64(a, b);
4350         let e = _mm512_set_epi64(
4351             1 << 32,
4352             1 << 63,
4353             1 << 30,
4354             1 << 29,
4355             1 << 28,
4356             1 << 27,
4357             1 << 26,
4358             1 << 25,
4359         );
4360         assert_eq_m512i(r, e);
4361     }
4362
4363     #[simd_test(enable = "avx512f")]
4364     unsafe fn test_mm512_mask_rorv_epi64() {
4365         let a = _mm512_set_epi64(
4366             1 << 32,
4367             1 << 0,
4368             1 << 32,
4369             1 << 32,
4370             1 << 32,
4371             1 << 32,
4372             1 << 32,
4373             1 << 32,
4374         );
4375         let b = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4376         let r = _mm512_mask_rorv_epi64(a, 0, a, b);
4377         assert_eq_m512i(r, a);
4378
4379         let r = _mm512_mask_rorv_epi64(a, 0b11111111, a, b);
4380         let e = _mm512_set_epi64(
4381             1 << 32,
4382             1 << 63,
4383             1 << 30,
4384             1 << 29,
4385             1 << 28,
4386             1 << 27,
4387             1 << 26,
4388             1 << 25,
4389         );
4390         assert_eq_m512i(r, e);
4391     }
4392
4393     #[simd_test(enable = "avx512f")]
4394     unsafe fn test_mm512_maskz_rorv_epi64() {
4395         let a = _mm512_set_epi64(
4396             1 << 32,
4397             1 << 32,
4398             1 << 32,
4399             1 << 32,
4400             1 << 32,
4401             1 << 32,
4402             1 << 32,
4403             1 << 0,
4404         );
4405         let b = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 2);
4406         let r = _mm512_maskz_rorv_epi64(0, a, b);
4407         assert_eq_m512i(r, _mm512_setzero_si512());
4408
4409         let r = _mm512_maskz_rorv_epi64(0b00001111, a, b);
4410         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 28, 1 << 27, 1 << 26, 1 << 62);
4411         assert_eq_m512i(r, e);
4412     }
4413
4414     #[simd_test(enable = "avx512f")]
4415     unsafe fn test_mm512_sllv_epi64() {
4416         let a = _mm512_set_epi64(
4417             1 << 32,
4418             1 << 63,
4419             1 << 32,
4420             1 << 32,
4421             1 << 32,
4422             1 << 32,
4423             1 << 32,
4424             1 << 32,
4425         );
4426         let count = _mm512_set_epi64(0, 2, 2, 3, 4, 5, 6, 7);
4427         let r = _mm512_sllv_epi64(a, count);
4428         let e = _mm512_set_epi64(
4429             1 << 32,
4430             0,
4431             1 << 34,
4432             1 << 35,
4433             1 << 36,
4434             1 << 37,
4435             1 << 38,
4436             1 << 39,
4437         );
4438         assert_eq_m512i(r, e);
4439     }
4440
4441     #[simd_test(enable = "avx512f")]
4442     unsafe fn test_mm512_mask_sllv_epi64() {
4443         let a = _mm512_set_epi64(
4444             1 << 32,
4445             1 << 32,
4446             1 << 63,
4447             1 << 32,
4448             1 << 32,
4449             1 << 32,
4450             1 << 32,
4451             1 << 32,
4452         );
4453         let count = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4454         let r = _mm512_mask_sllv_epi64(a, 0, a, count);
4455         assert_eq_m512i(r, a);
4456
4457         let r = _mm512_mask_sllv_epi64(a, 0b11111111, a, count);
4458         let e = _mm512_set_epi64(
4459             1 << 32,
4460             1 << 33,
4461             0,
4462             1 << 35,
4463             1 << 36,
4464             1 << 37,
4465             1 << 38,
4466             1 << 39,
4467         );
4468         assert_eq_m512i(r, e);
4469     }
4470
4471     #[simd_test(enable = "avx512f")]
4472     unsafe fn test_mm512_maskz_sllv_epi64() {
4473         let a = _mm512_set_epi64(
4474             1 << 32,
4475             1 << 32,
4476             1 << 32,
4477             1 << 32,
4478             1 << 32,
4479             1 << 32,
4480             1 << 32,
4481             1 << 63,
4482         );
4483         let count = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 1);
4484         let r = _mm512_maskz_sllv_epi64(0, a, count);
4485         assert_eq_m512i(r, _mm512_setzero_si512());
4486
4487         let r = _mm512_maskz_sllv_epi64(0b00001111, a, count);
4488         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 36, 1 << 37, 1 << 38, 0);
4489         assert_eq_m512i(r, e);
4490     }
4491
4492     #[simd_test(enable = "avx512f")]
4493     unsafe fn test_mm512_srlv_epi64() {
4494         let a = _mm512_set_epi64(
4495             1 << 32,
4496             1 << 0,
4497             1 << 32,
4498             1 << 32,
4499             1 << 32,
4500             1 << 32,
4501             1 << 32,
4502             1 << 32,
4503         );
4504         let count = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4505         let r = _mm512_srlv_epi64(a, count);
4506         let e = _mm512_set_epi64(
4507             1 << 32,
4508             0,
4509             1 << 30,
4510             1 << 29,
4511             1 << 28,
4512             1 << 27,
4513             1 << 26,
4514             1 << 25,
4515         );
4516         assert_eq_m512i(r, e);
4517     }
4518
4519     #[simd_test(enable = "avx512f")]
4520     unsafe fn test_mm512_mask_srlv_epi64() {
4521         let a = _mm512_set_epi64(
4522             1 << 32,
4523             1 << 0,
4524             1 << 32,
4525             1 << 32,
4526             1 << 32,
4527             1 << 32,
4528             1 << 32,
4529             1 << 32,
4530         );
4531         let count = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4532         let r = _mm512_mask_srlv_epi64(a, 0, a, count);
4533         assert_eq_m512i(r, a);
4534
4535         let r = _mm512_mask_srlv_epi64(a, 0b11111111, a, count);
4536         let e = _mm512_set_epi64(
4537             1 << 32,
4538             0,
4539             1 << 30,
4540             1 << 29,
4541             1 << 28,
4542             1 << 27,
4543             1 << 26,
4544             1 << 25,
4545         );
4546         assert_eq_m512i(r, e);
4547     }
4548
4549     #[simd_test(enable = "avx512f")]
4550     unsafe fn test_mm512_maskz_srlv_epi64() {
4551         let a = _mm512_set_epi64(
4552             1 << 32,
4553             1 << 32,
4554             1 << 32,
4555             1 << 32,
4556             1 << 32,
4557             1 << 32,
4558             1 << 32,
4559             1 << 0,
4560         );
4561         let count = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4562         let r = _mm512_maskz_srlv_epi64(0, a, count);
4563         assert_eq_m512i(r, _mm512_setzero_si512());
4564
4565         let r = _mm512_maskz_srlv_epi64(0b00001111, a, count);
4566         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 28, 1 << 27, 1 << 26, 0);
4567         assert_eq_m512i(r, e);
4568     }
4569
4570     #[simd_test(enable = "avx512f")]
4571     unsafe fn test_mm512_sll_epi64() {
4572         let a = _mm512_set_epi64(
4573             1 << 63,
4574             1 << 32,
4575             1 << 32,
4576             1 << 32,
4577             1 << 32,
4578             1 << 32,
4579             1 << 32,
4580             1 << 32,
4581         );
4582         let count = _mm_set_epi64x(0, 1);
4583         let r = _mm512_sll_epi64(a, count);
4584         let e = _mm512_set_epi64(
4585             0,
4586             1 << 33,
4587             1 << 33,
4588             1 << 33,
4589             1 << 33,
4590             1 << 33,
4591             1 << 33,
4592             1 << 33,
4593         );
4594         assert_eq_m512i(r, e);
4595
4596         let count = _mm_set_epi64x(1, 0);
4597         let r = _mm512_sll_epi64(a, count);
4598         assert_eq_m512i(r, a);
4599     }
4600
4601     #[simd_test(enable = "avx512f")]
4602     unsafe fn test_mm512_mask_sll_epi64() {
4603         let a = _mm512_set_epi64(
4604             1 << 63,
4605             1 << 32,
4606             1 << 32,
4607             1 << 32,
4608             1 << 32,
4609             1 << 32,
4610             1 << 32,
4611             1 << 32,
4612         );
4613         let count = _mm_set_epi64x(0, 1);
4614         let r = _mm512_mask_sll_epi64(a, 0, a, count);
4615         assert_eq_m512i(r, a);
4616
4617         let r = _mm512_mask_sll_epi64(a, 0b11111111, a, count);
4618         let e = _mm512_set_epi64(
4619             0,
4620             1 << 33,
4621             1 << 33,
4622             1 << 33,
4623             1 << 33,
4624             1 << 33,
4625             1 << 33,
4626             1 << 33,
4627         );
4628         assert_eq_m512i(r, e);
4629     }
4630
4631     #[simd_test(enable = "avx512f")]
4632     unsafe fn test_mm512_maskz_sll_epi64() {
4633         let a = _mm512_set_epi64(
4634             1 << 32,
4635             1 << 32,
4636             1 << 32,
4637             1 << 32,
4638             1 << 32,
4639             1 << 32,
4640             1 << 32,
4641             1 << 63,
4642         );
4643         let count = _mm_set_epi64x(0, 1);
4644         let r = _mm512_maskz_sll_epi64(0, a, count);
4645         assert_eq_m512i(r, _mm512_setzero_si512());
4646
4647         let r = _mm512_maskz_sll_epi64(0b00001111, a, count);
4648         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 33, 1 << 33, 1 << 33, 0);
4649         assert_eq_m512i(r, e);
4650     }
4651
4652     #[simd_test(enable = "avx512f")]
4653     unsafe fn test_mm512_srl_epi64() {
4654         let a = _mm512_set_epi64(
4655             1 << 0,
4656             1 << 32,
4657             1 << 32,
4658             1 << 32,
4659             1 << 32,
4660             1 << 32,
4661             1 << 32,
4662             1 << 32,
4663         );
4664         let count = _mm_set_epi64x(0, 1);
4665         let r = _mm512_srl_epi64(a, count);
4666         let e = _mm512_set_epi64(
4667             0,
4668             1 << 31,
4669             1 << 31,
4670             1 << 31,
4671             1 << 31,
4672             1 << 31,
4673             1 << 31,
4674             1 << 31,
4675         );
4676         assert_eq_m512i(r, e);
4677     }
4678
4679     #[simd_test(enable = "avx512f")]
4680     unsafe fn test_mm512_mask_srl_epi64() {
4681         let a = _mm512_set_epi64(
4682             1 << 0,
4683             1 << 32,
4684             1 << 32,
4685             1 << 32,
4686             1 << 32,
4687             1 << 32,
4688             1 << 32,
4689             1 << 32,
4690         );
4691         let count = _mm_set_epi64x(0, 1);
4692         let r = _mm512_mask_srl_epi64(a, 0, a, count);
4693         assert_eq_m512i(r, a);
4694
4695         let r = _mm512_mask_srl_epi64(a, 0b11111111, a, count);
4696         let e = _mm512_set_epi64(
4697             0,
4698             1 << 31,
4699             1 << 31,
4700             1 << 31,
4701             1 << 31,
4702             1 << 31,
4703             1 << 31,
4704             1 << 31,
4705         );
4706         assert_eq_m512i(r, e);
4707     }
4708
4709     #[simd_test(enable = "avx512f")]
4710     unsafe fn test_mm512_maskz_srl_epi64() {
4711         let a = _mm512_set_epi64(
4712             1 << 32,
4713             1 << 32,
4714             1 << 32,
4715             1 << 32,
4716             1 << 32,
4717             1 << 32,
4718             1 << 32,
4719             1 << 0,
4720         );
4721         let count = _mm_set_epi64x(0, 1);
4722         let r = _mm512_maskz_srl_epi64(0, a, count);
4723         assert_eq_m512i(r, _mm512_setzero_si512());
4724
4725         let r = _mm512_maskz_srl_epi64(0b00001111, a, count);
4726         let e = _mm512_set_epi64(0, 0, 0, 0, 1 << 31, 1 << 31, 1 << 31, 0);
4727         assert_eq_m512i(r, e);
4728     }
4729
4730     #[simd_test(enable = "avx512f")]
4731     unsafe fn test_mm512_sra_epi64() {
4732         let a = _mm512_set_epi64(1, -8, 0, 0, 0, 0, 15, -16);
4733         let count = _mm_set_epi64x(0, 2);
4734         let r = _mm512_sra_epi64(a, count);
4735         let e = _mm512_set_epi64(0, -2, 0, 0, 0, 0, 3, -4);
4736         assert_eq_m512i(r, e);
4737     }
4738
4739     #[simd_test(enable = "avx512f")]
4740     unsafe fn test_mm512_mask_sra_epi64() {
4741         let a = _mm512_set_epi64(1, -8, 0, 0, 0, 0, 15, -16);
4742         let count = _mm_set_epi64x(0, 2);
4743         let r = _mm512_mask_sra_epi64(a, 0, a, count);
4744         assert_eq_m512i(r, a);
4745
4746         let r = _mm512_mask_sra_epi64(a, 0b11111111, a, count);
4747         let e = _mm512_set_epi64(0, -2, 0, 0, 0, 0, 3, -4);
4748         assert_eq_m512i(r, e);
4749     }
4750
4751     #[simd_test(enable = "avx512f")]
4752     unsafe fn test_mm512_maskz_sra_epi64() {
4753         let a = _mm512_set_epi64(1, -8, 0, 0, 0, 0, 15, -16);
4754         let count = _mm_set_epi64x(0, 2);
4755         let r = _mm512_maskz_sra_epi64(0, a, count);
4756         assert_eq_m512i(r, _mm512_setzero_si512());
4757
4758         let r = _mm512_maskz_sra_epi64(0b00001111, a, count);
4759         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 3, -4);
4760         assert_eq_m512i(r, e);
4761     }
4762
4763     #[simd_test(enable = "avx512f")]
4764     unsafe fn test_mm512_srav_epi64() {
4765         let a = _mm512_set_epi64(1, -8, 0, 0, 0, 0, 15, -16);
4766         let count = _mm512_set_epi64(2, 2, 0, 0, 0, 0, 2, 1);
4767         let r = _mm512_srav_epi64(a, count);
4768         let e = _mm512_set_epi64(0, -2, 0, 0, 0, 0, 3, -8);
4769         assert_eq_m512i(r, e);
4770     }
4771
4772     #[simd_test(enable = "avx512f")]
4773     unsafe fn test_mm512_mask_srav_epi64() {
4774         let a = _mm512_set_epi64(1, -8, 0, 0, 0, 0, 15, -16);
4775         let count = _mm512_set_epi64(2, 2, 0, 0, 0, 0, 2, 1);
4776         let r = _mm512_mask_srav_epi64(a, 0, a, count);
4777         assert_eq_m512i(r, a);
4778
4779         let r = _mm512_mask_srav_epi64(a, 0b11111111, a, count);
4780         let e = _mm512_set_epi64(0, -2, 0, 0, 0, 0, 3, -8);
4781         assert_eq_m512i(r, e);
4782     }
4783
4784     #[simd_test(enable = "avx512f")]
4785     unsafe fn test_mm512_maskz_srav_epi64() {
4786         let a = _mm512_set_epi64(1, -8, 0, 0, 0, 0, 15, -16);
4787         let count = _mm512_set_epi64(2, 2, 0, 0, 0, 0, 2, 1);
4788         let r = _mm512_maskz_srav_epi64(0, a, count);
4789         assert_eq_m512i(r, _mm512_setzero_si512());
4790
4791         let r = _mm512_maskz_srav_epi64(0b00001111, a, count);
4792         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 3, -8);
4793         assert_eq_m512i(r, e);
4794     }
4795
4796     #[simd_test(enable = "avx512f")]
4797     unsafe fn test_mm512_srai_epi64() {
4798         let a = _mm512_set_epi64(1, -4, 15, 0, 0, 0, 0, -16);
4799         let r = _mm512_srai_epi64(a, 2);
4800         let e = _mm512_set_epi64(0, -1, 3, 0, 0, 0, 0, -4);
4801         assert_eq_m512i(r, e);
4802     }
4803
4804     #[simd_test(enable = "avx512f")]
4805     unsafe fn test_mm512_mask_srai_epi64() {
4806         let a = _mm512_set_epi64(1, -4, 15, 0, 0, 0, 0, -16);
4807         let r = _mm512_mask_srai_epi64(a, 0, a, 2);
4808         assert_eq_m512i(r, a);
4809
4810         let r = _mm512_mask_srai_epi64(a, 0b11111111, a, 2);
4811         let e = _mm512_set_epi64(0, -1, 3, 0, 0, 0, 0, -4);
4812         assert_eq_m512i(r, e);
4813     }
4814
4815     #[simd_test(enable = "avx512f")]
4816     unsafe fn test_mm512_maskz_srai_epi64() {
4817         let a = _mm512_set_epi64(1, -4, 15, 0, 0, 0, 0, -16);
4818         let r = _mm512_maskz_srai_epi64(0, a, 2);
4819         assert_eq_m512i(r, _mm512_setzero_si512());
4820
4821         let r = _mm512_maskz_srai_epi64(0b00001111, a, 2);
4822         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, -4);
4823         assert_eq_m512i(r, e);
4824     }
4825
4826     #[simd_test(enable = "avx512f")]
4827     unsafe fn test_mm512_permute_pd() {
4828         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4829         let r = _mm512_permute_pd(a, 1);
4830         let e = _mm512_set_pd(1., 1., 3., 3., 5., 5., 7., 7.);
4831         assert_eq_m512d(r, e);
4832     }
4833
4834     #[simd_test(enable = "avx512f")]
4835     unsafe fn test_mm512_mask_permute_pd() {
4836         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4837         let r = _mm512_mask_permute_pd(a, 0, a, 1);
4838         assert_eq_m512d(r, a);
4839         let r = _mm512_mask_permute_pd(a, 0b11111111, a, 1);
4840         let e = _mm512_set_pd(1., 1., 3., 3., 5., 5., 7., 7.);
4841         assert_eq_m512d(r, e);
4842     }
4843
4844     #[simd_test(enable = "avx512f")]
4845     unsafe fn test_mm512_maskz_permute_pd() {
4846         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4847         let r = _mm512_maskz_permute_pd(0, a, 1);
4848         assert_eq_m512d(r, _mm512_setzero_pd());
4849         let r = _mm512_maskz_permute_pd(0b00001111, a, 1);
4850         let e = _mm512_set_pd(0., 0., 0., 0., 5., 5., 7., 7.);
4851         assert_eq_m512d(r, e);
4852     }
4853
4854     #[simd_test(enable = "avx512f")]
4855     unsafe fn test_mm512_permutex_epi64() {
4856         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4857         let r = _mm512_permutex_epi64(a, 1);
4858         let e = _mm512_set_epi64(6, 6, 6, 6, 6, 6, 6, 6);
4859         assert_eq_m512i(r, e);
4860     }
4861
4862     #[simd_test(enable = "avx512f")]
4863     unsafe fn test_mm512_mask_permutex_epi64() {
4864         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4865         let r = _mm512_mask_permutex_epi64(a, 0, a, 1);
4866         assert_eq_m512i(r, a);
4867         let r = _mm512_mask_permutex_epi64(a, 0b11111111, a, 1);
4868         let e = _mm512_set_epi64(6, 6, 6, 6, 6, 6, 6, 6);
4869         assert_eq_m512i(r, e);
4870     }
4871
4872     #[simd_test(enable = "avx512f")]
4873     unsafe fn test_mm512_maskz_permutex_epi64() {
4874         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4875         let r = _mm512_maskz_permutex_epi64(0, a, 1);
4876         assert_eq_m512i(r, _mm512_setzero_si512());
4877         let r = _mm512_maskz_permutex_epi64(0b00001111, a, 1);
4878         let e = _mm512_set_epi64(0, 0, 0, 0, 6, 6, 6, 6);
4879         assert_eq_m512i(r, e);
4880     }
4881
4882     #[simd_test(enable = "avx512f")]
4883     unsafe fn test_mm512_permutex_pd() {
4884         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4885         let r = _mm512_permutex_pd(a, 1);
4886         let e = _mm512_set_pd(6., 6., 6., 6., 6., 6., 6., 6.);
4887         assert_eq_m512d(r, e);
4888     }
4889
4890     #[simd_test(enable = "avx512f")]
4891     unsafe fn test_mm512_mask_permutex_pd() {
4892         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4893         let r = _mm512_mask_permutex_pd(a, 0, a, 1);
4894         assert_eq_m512d(r, a);
4895         let r = _mm512_mask_permutex_pd(a, 0b11111111, a, 1);
4896         let e = _mm512_set_pd(6., 6., 6., 6., 6., 6., 6., 6.);
4897         assert_eq_m512d(r, e);
4898     }
4899
4900     #[simd_test(enable = "avx512f")]
4901     unsafe fn test_mm512_maskz_permutex_pd() {
4902         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4903         let r = _mm512_maskz_permutex_pd(0, a, 1);
4904         assert_eq_m512d(r, _mm512_setzero_pd());
4905         let r = _mm512_maskz_permutex_pd(0b00001111, a, 1);
4906         let e = _mm512_set_pd(0., 0., 0., 0., 6., 6., 6., 6.);
4907         assert_eq_m512d(r, e);
4908     }
4909
4910     #[simd_test(enable = "avx512f")]
4911     unsafe fn test_mm512_permutevar_pd() {
4912         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4913         let b = _mm512_set1_epi64(1);
4914         let r = _mm512_permutevar_pd(a, b);
4915         let e = _mm512_set_pd(1., 1., 3., 3., 5., 5., 7., 7.);
4916         assert_eq_m512d(r, e);
4917     }
4918
4919     #[simd_test(enable = "avx512f")]
4920     unsafe fn test_mm512_mask_permutevar_pd() {
4921         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4922         let b = _mm512_set1_epi64(1);
4923         let r = _mm512_mask_permutevar_pd(a, 0, a, b);
4924         assert_eq_m512d(r, a);
4925         let r = _mm512_mask_permutevar_pd(a, 0b11111111, a, b);
4926         let e = _mm512_set_pd(1., 1., 3., 3., 5., 5., 7., 7.);
4927         assert_eq_m512d(r, e);
4928     }
4929
4930     #[simd_test(enable = "avx512f")]
4931     unsafe fn test_mm512_maskz_permutevar_pd() {
4932         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4933         let b = _mm512_set1_epi64(1);
4934         let r = _mm512_maskz_permutevar_pd(0, a, b);
4935         assert_eq_m512d(r, _mm512_setzero_pd());
4936         let r = _mm512_maskz_permutevar_pd(0b00001111, a, b);
4937         let e = _mm512_set_pd(0., 0., 0., 0., 5., 5., 7., 7.);
4938         assert_eq_m512d(r, e);
4939     }
4940
4941     #[simd_test(enable = "avx512f")]
4942     unsafe fn test_mm512_permutexvar_epi64() {
4943         let idx = _mm512_set1_epi64(1);
4944         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4945         let r = _mm512_permutexvar_epi64(idx, a);
4946         let e = _mm512_set1_epi64(6);
4947         assert_eq_m512i(r, e);
4948     }
4949
4950     #[simd_test(enable = "avx512f")]
4951     unsafe fn test_mm512_mask_permutexvar_epi64() {
4952         let idx = _mm512_set1_epi64(1);
4953         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4954         let r = _mm512_mask_permutexvar_epi64(a, 0, idx, a);
4955         assert_eq_m512i(r, a);
4956         let r = _mm512_mask_permutexvar_epi64(a, 0b11111111, idx, a);
4957         let e = _mm512_set1_epi64(6);
4958         assert_eq_m512i(r, e);
4959     }
4960
4961     #[simd_test(enable = "avx512f")]
4962     unsafe fn test_mm512_maskz_permutexvar_epi64() {
4963         let idx = _mm512_set1_epi64(1);
4964         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
4965         let r = _mm512_maskz_permutexvar_epi64(0, idx, a);
4966         assert_eq_m512i(r, _mm512_setzero_si512());
4967         let r = _mm512_maskz_permutexvar_epi64(0b00001111, idx, a);
4968         let e = _mm512_set_epi64(0, 0, 0, 0, 6, 6, 6, 6);
4969         assert_eq_m512i(r, e);
4970     }
4971
4972     #[simd_test(enable = "avx512f")]
4973     unsafe fn test_mm512_permutexvar_pd() {
4974         let idx = _mm512_set1_epi64(1);
4975         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4976         let r = _mm512_permutexvar_pd(idx, a);
4977         let e = _mm512_set1_pd(6.);
4978         assert_eq_m512d(r, e);
4979     }
4980
4981     #[simd_test(enable = "avx512f")]
4982     unsafe fn test_mm512_mask_permutexvar_pd() {
4983         let idx = _mm512_set1_epi64(1);
4984         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4985         let r = _mm512_mask_permutexvar_pd(a, 0, idx, a);
4986         assert_eq_m512d(r, a);
4987         let r = _mm512_mask_permutexvar_pd(a, 0b11111111, idx, a);
4988         let e = _mm512_set1_pd(6.);
4989         assert_eq_m512d(r, e);
4990     }
4991
4992     #[simd_test(enable = "avx512f")]
4993     unsafe fn test_mm512_maskz_permutexvar_pd() {
4994         let idx = _mm512_set1_epi64(1);
4995         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
4996         let r = _mm512_maskz_permutexvar_pd(0, idx, a);
4997         assert_eq_m512d(r, _mm512_setzero_pd());
4998         let r = _mm512_maskz_permutexvar_pd(0b00001111, idx, a);
4999         let e = _mm512_set_pd(0., 0., 0., 0., 6., 6., 6., 6.);
5000         assert_eq_m512d(r, e);
5001     }
5002
5003     #[simd_test(enable = "avx512f")]
5004     unsafe fn test_mm512_permutex2var_epi64() {
5005         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
5006         let idx = _mm512_set_epi64(1, 1 << 3, 2, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5007         let b = _mm512_set1_epi64(100);
5008         let r = _mm512_permutex2var_epi64(a, idx, b);
5009         let e = _mm512_set_epi64(6, 100, 5, 100, 4, 100, 3, 100);
5010         assert_eq_m512i(r, e);
5011     }
5012
5013     #[simd_test(enable = "avx512f")]
5014     unsafe fn test_mm512_mask_permutex2var_epi64() {
5015         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
5016         let idx = _mm512_set_epi64(1, 1 << 3, 2, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5017         let b = _mm512_set1_epi64(100);
5018         let r = _mm512_mask_permutex2var_epi64(a, 0, idx, b);
5019         assert_eq_m512i(r, a);
5020         let r = _mm512_mask_permutex2var_epi64(a, 0b11111111, idx, b);
5021         let e = _mm512_set_epi64(6, 100, 5, 100, 4, 100, 3, 100);
5022         assert_eq_m512i(r, e);
5023     }
5024
5025     #[simd_test(enable = "avx512f")]
5026     unsafe fn test_mm512_maskz_permutex2var_epi64() {
5027         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
5028         let idx = _mm512_set_epi64(1, 1 << 3, 2, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5029         let b = _mm512_set1_epi64(100);
5030         let r = _mm512_maskz_permutex2var_epi64(0, a, idx, b);
5031         assert_eq_m512i(r, _mm512_setzero_si512());
5032         let r = _mm512_maskz_permutex2var_epi64(0b00001111, a, idx, b);
5033         let e = _mm512_set_epi64(0, 0, 0, 0, 4, 100, 3, 100);
5034         assert_eq_m512i(r, e);
5035     }
5036
5037     #[simd_test(enable = "avx512f")]
5038     unsafe fn test_mm512_mask2_permutex2var_epi64() {
5039         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
5040         let idx = _mm512_set_epi64(1000, 1 << 3, 2000, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5041         let b = _mm512_set1_epi64(100);
5042         let r = _mm512_mask2_permutex2var_epi64(a, idx, 0, b);
5043         assert_eq_m512i(r, idx);
5044         let r = _mm512_mask2_permutex2var_epi64(a, idx, 0b00001111, b);
5045         let e = _mm512_set_epi64(1000, 1 << 3, 2000, 1 << 3, 4, 100, 3, 100);
5046         assert_eq_m512i(r, e);
5047     }
5048
5049     #[simd_test(enable = "avx512f")]
5050     unsafe fn test_mm512_permutex2var_pd() {
5051         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
5052         let idx = _mm512_set_epi64(1, 1 << 3, 2, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5053         let b = _mm512_set1_pd(100.);
5054         let r = _mm512_permutex2var_pd(a, idx, b);
5055         let e = _mm512_set_pd(6., 100., 5., 100., 4., 100., 3., 100.);
5056         assert_eq_m512d(r, e);
5057     }
5058
5059     #[simd_test(enable = "avx512f")]
5060     unsafe fn test_mm512_mask_permutex2var_pd() {
5061         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
5062         let idx = _mm512_set_epi64(1, 1 << 3, 2, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5063         let b = _mm512_set1_pd(100.);
5064         let r = _mm512_mask_permutex2var_pd(a, 0, idx, b);
5065         assert_eq_m512d(r, a);
5066         let r = _mm512_mask_permutex2var_pd(a, 0b11111111, idx, b);
5067         let e = _mm512_set_pd(6., 100., 5., 100., 4., 100., 3., 100.);
5068         assert_eq_m512d(r, e);
5069     }
5070
5071     #[simd_test(enable = "avx512f")]
5072     unsafe fn test_mm512_maskz_permutex2var_pd() {
5073         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
5074         let idx = _mm512_set_epi64(1, 1 << 3, 2, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5075         let b = _mm512_set1_pd(100.);
5076         let r = _mm512_maskz_permutex2var_pd(0, a, idx, b);
5077         assert_eq_m512d(r, _mm512_setzero_pd());
5078         let r = _mm512_maskz_permutex2var_pd(0b00001111, a, idx, b);
5079         let e = _mm512_set_pd(0., 0., 0., 0., 4., 100., 3., 100.);
5080         assert_eq_m512d(r, e);
5081     }
5082
5083     #[simd_test(enable = "avx512f")]
5084     unsafe fn test_mm512_mask2_permutex2var_pd() {
5085         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
5086         let idx = _mm512_set_epi64(1, 1 << 3, 2, 1 << 3, 3, 1 << 3, 4, 1 << 3);
5087         let b = _mm512_set1_pd(100.);
5088         let r = _mm512_mask2_permutex2var_pd(a, idx, 0, b);
5089         assert_eq_m512d(r, _mm512_setzero_pd());
5090         let r = _mm512_mask2_permutex2var_pd(a, idx, 0b00001111, b);
5091         let e = _mm512_set_pd(0., 0., 0., 0., 4., 100., 3., 100.);
5092         assert_eq_m512d(r, e);
5093     }
5094
5095     #[simd_test(enable = "avx512f")]
5096     unsafe fn test_mm512_shuffle_pd() {
5097         let a = _mm512_setr_pd(1., 4., 5., 8., 1., 4., 5., 8.);
5098         let b = _mm512_setr_pd(2., 3., 6., 7., 2., 3., 6., 7.);
5099         let r = _mm512_shuffle_pd(
5100             a,
5101             b,
5102             1 << 0 | 1 << 1 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 5 | 1 << 6 | 1 << 7,
5103         );
5104         let e = _mm512_setr_pd(4., 3., 8., 7., 4., 3., 8., 7.);
5105         assert_eq_m512d(r, e);
5106     }
5107
5108     #[simd_test(enable = "avx512f")]
5109     unsafe fn test_mm512_mask_shuffle_pd() {
5110         let a = _mm512_setr_pd(1., 4., 5., 8., 1., 4., 5., 8.);
5111         let b = _mm512_setr_pd(2., 3., 6., 7., 2., 3., 6., 7.);
5112         let r = _mm512_mask_shuffle_pd(
5113             a,
5114             0,
5115             a,
5116             b,
5117             1 << 0 | 1 << 1 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 5 | 1 << 6 | 1 << 7,
5118         );
5119         assert_eq_m512d(r, a);
5120         let r = _mm512_mask_shuffle_pd(
5121             a,
5122             0b11111111,
5123             a,
5124             b,
5125             1 << 0 | 1 << 1 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 5 | 1 << 6 | 1 << 7,
5126         );
5127         let e = _mm512_setr_pd(4., 3., 8., 7., 4., 3., 8., 7.);
5128         assert_eq_m512d(r, e);
5129     }
5130
5131     #[simd_test(enable = "avx512f")]
5132     unsafe fn test_mm512_maskz_shuffle_pd() {
5133         let a = _mm512_setr_pd(1., 4., 5., 8., 1., 4., 5., 8.);
5134         let b = _mm512_setr_pd(2., 3., 6., 7., 2., 3., 6., 7.);
5135         let r = _mm512_maskz_shuffle_pd(
5136             0,
5137             a,
5138             b,
5139             1 << 0 | 1 << 1 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 5 | 1 << 6 | 1 << 7,
5140         );
5141         assert_eq_m512d(r, _mm512_setzero_pd());
5142         let r = _mm512_maskz_shuffle_pd(
5143             0b00001111,
5144             a,
5145             b,
5146             1 << 0 | 1 << 1 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 5 | 1 << 6 | 1 << 7,
5147         );
5148         let e = _mm512_setr_pd(4., 3., 8., 7., 0., 0., 0., 0.);
5149         assert_eq_m512d(r, e);
5150     }
5151
5152     #[simd_test(enable = "avx512f")]
5153     unsafe fn test_mm512_shuffle_i64x2() {
5154         let a = _mm512_setr_epi64(1, 4, 5, 8, 9, 12, 13, 16);
5155         let b = _mm512_setr_epi64(2, 3, 6, 7, 10, 11, 14, 15);
5156         let r = _mm512_shuffle_i64x2(a, b, 0b00000000);
5157         let e = _mm512_setr_epi64(1, 4, 1, 4, 2, 3, 2, 3);
5158         assert_eq_m512i(r, e);
5159     }
5160
5161     #[simd_test(enable = "avx512f")]
5162     unsafe fn test_mm512_mask_shuffle_i64x2() {
5163         let a = _mm512_setr_epi64(1, 4, 5, 8, 9, 12, 13, 16);
5164         let b = _mm512_setr_epi64(2, 3, 6, 7, 10, 11, 14, 15);
5165         let r = _mm512_mask_shuffle_i64x2(a, 0, a, b, 0b00000000);
5166         assert_eq_m512i(r, a);
5167         let r = _mm512_mask_shuffle_i64x2(a, 0b11111111, a, b, 0b00000000);
5168         let e = _mm512_setr_epi64(1, 4, 1, 4, 2, 3, 2, 3);
5169         assert_eq_m512i(r, e);
5170     }
5171
5172     #[simd_test(enable = "avx512f")]
5173     unsafe fn test_mm512_maskz_shuffle_i64x2() {
5174         let a = _mm512_setr_epi64(1, 4, 5, 8, 9, 12, 13, 16);
5175         let b = _mm512_setr_epi64(2, 3, 6, 7, 10, 11, 14, 15);
5176         let r = _mm512_maskz_shuffle_i64x2(0, a, b, 0b00000000);
5177         assert_eq_m512i(r, _mm512_setzero_si512());
5178         let r = _mm512_maskz_shuffle_i64x2(0b00001111, a, b, 0b00000000);
5179         let e = _mm512_setr_epi64(1, 4, 1, 4, 0, 0, 0, 0);
5180         assert_eq_m512i(r, e);
5181     }
5182
5183     #[simd_test(enable = "avx512f")]
5184     unsafe fn test_mm512_shuffle_f64x2() {
5185         let a = _mm512_setr_pd(1., 4., 5., 8., 9., 12., 13., 16.);
5186         let b = _mm512_setr_pd(2., 3., 6., 7., 10., 11., 14., 15.);
5187         let r = _mm512_shuffle_f64x2(a, b, 0b00000000);
5188         let e = _mm512_setr_pd(1., 4., 1., 4., 2., 3., 2., 3.);
5189         assert_eq_m512d(r, e);
5190     }
5191
5192     #[simd_test(enable = "avx512f")]
5193     unsafe fn test_mm512_mask_shuffle_f64x2() {
5194         let a = _mm512_setr_pd(1., 4., 5., 8., 9., 12., 13., 16.);
5195         let b = _mm512_setr_pd(2., 3., 6., 7., 10., 11., 14., 15.);
5196         let r = _mm512_mask_shuffle_f64x2(a, 0, a, b, 0b00000000);
5197         assert_eq_m512d(r, a);
5198         let r = _mm512_mask_shuffle_f64x2(a, 0b11111111, a, b, 0b00000000);
5199         let e = _mm512_setr_pd(1., 4., 1., 4., 2., 3., 2., 3.);
5200         assert_eq_m512d(r, e);
5201     }
5202
5203     #[simd_test(enable = "avx512f")]
5204     unsafe fn test_mm512_maskz_shuffle_f64x2() {
5205         let a = _mm512_setr_pd(1., 4., 5., 8., 9., 12., 13., 16.);
5206         let b = _mm512_setr_pd(2., 3., 6., 7., 10., 11., 14., 15.);
5207         let r = _mm512_maskz_shuffle_f64x2(0, a, b, 0b00000000);
5208         assert_eq_m512d(r, _mm512_setzero_pd());
5209         let r = _mm512_maskz_shuffle_f64x2(0b00001111, a, b, 0b00000000);
5210         let e = _mm512_setr_pd(1., 4., 1., 4., 0., 0., 0., 0.);
5211         assert_eq_m512d(r, e);
5212     }
5213
5214     #[simd_test(enable = "avx512f")]
5215     unsafe fn test_mm512_movedup_pd() {
5216         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5217         let r = _mm512_movedup_pd(a);
5218         let e = _mm512_setr_pd(1., 1., 3., 3., 5., 5., 7., 7.);
5219         assert_eq_m512d(r, e);
5220     }
5221
5222     #[simd_test(enable = "avx512f")]
5223     unsafe fn test_mm512_mask_movedup_pd() {
5224         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5225         let r = _mm512_mask_movedup_pd(a, 0, a);
5226         assert_eq_m512d(r, a);
5227         let r = _mm512_mask_movedup_pd(a, 0b11111111, a);
5228         let e = _mm512_setr_pd(1., 1., 3., 3., 5., 5., 7., 7.);
5229         assert_eq_m512d(r, e);
5230     }
5231
5232     #[simd_test(enable = "avx512f")]
5233     unsafe fn test_mm512_maskz_movedup_pd() {
5234         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5235         let r = _mm512_maskz_movedup_pd(0, a);
5236         assert_eq_m512d(r, _mm512_setzero_pd());
5237         let r = _mm512_maskz_movedup_pd(0b00001111, a);
5238         let e = _mm512_setr_pd(1., 1., 3., 3., 0., 0., 0., 0.);
5239         assert_eq_m512d(r, e);
5240     }
5241
5242     #[simd_test(enable = "avx512f")]
5243     unsafe fn test_mm512_inserti64x4() {
5244         let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5245         let b = _mm256_setr_epi64x(17, 18, 19, 20);
5246         let r = _mm512_inserti64x4(a, b, 1);
5247         let e = _mm512_setr_epi64(1, 2, 3, 4, 17, 18, 19, 20);
5248         assert_eq_m512i(r, e);
5249     }
5250
5251     #[simd_test(enable = "avx512f")]
5252     unsafe fn test_mm512_mask_inserti64x4() {
5253         let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5254         let b = _mm256_setr_epi64x(17, 18, 19, 20);
5255         let r = _mm512_mask_inserti64x4(a, 0, a, b, 1);
5256         assert_eq_m512i(r, a);
5257         let r = _mm512_mask_inserti64x4(a, 0b11111111, a, b, 1);
5258         let e = _mm512_setr_epi64(1, 2, 3, 4, 17, 18, 19, 20);
5259         assert_eq_m512i(r, e);
5260     }
5261
5262     #[simd_test(enable = "avx512f")]
5263     unsafe fn test_mm512_maskz_inserti64x4() {
5264         let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5265         let b = _mm256_setr_epi64x(17, 18, 19, 20);
5266         let r = _mm512_maskz_inserti64x4(0, a, b, 1);
5267         assert_eq_m512i(r, _mm512_setzero_si512());
5268         let r = _mm512_maskz_inserti64x4(0b00001111, a, b, 1);
5269         let e = _mm512_setr_epi64(1, 2, 3, 4, 0, 0, 0, 0);
5270         assert_eq_m512i(r, e);
5271     }
5272
5273     #[simd_test(enable = "avx512f")]
5274     unsafe fn test_mm512_insertf64x4() {
5275         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5276         let b = _mm256_setr_pd(17., 18., 19., 20.);
5277         let r = _mm512_insertf64x4(a, b, 1);
5278         let e = _mm512_setr_pd(1., 2., 3., 4., 17., 18., 19., 20.);
5279         assert_eq_m512d(r, e);
5280     }
5281
5282     #[simd_test(enable = "avx512f")]
5283     unsafe fn test_mm512_mask_insertf64x4() {
5284         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5285         let b = _mm256_setr_pd(17., 18., 19., 20.);
5286         let r = _mm512_mask_insertf64x4(a, 0, a, b, 1);
5287         assert_eq_m512d(r, a);
5288         let r = _mm512_mask_insertf64x4(a, 0b11111111, a, b, 1);
5289         let e = _mm512_setr_pd(1., 2., 3., 4., 17., 18., 19., 20.);
5290         assert_eq_m512d(r, e);
5291     }
5292
5293     #[simd_test(enable = "avx512f")]
5294     unsafe fn test_mm512_maskz_insertf64x4() {
5295         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5296         let b = _mm256_setr_pd(17., 18., 19., 20.);
5297         let r = _mm512_maskz_insertf64x4(0, a, b, 1);
5298         assert_eq_m512d(r, _mm512_setzero_pd());
5299         let r = _mm512_maskz_insertf64x4(0b00001111, a, b, 1);
5300         let e = _mm512_setr_pd(1., 2., 3., 4., 0., 0., 0., 0.);
5301         assert_eq_m512d(r, e);
5302     }
5303
5304     #[simd_test(enable = "avx512f")]
5305     unsafe fn test_mm512_castpd128_pd512() {
5306         let a = _mm_setr_pd(17., 18.);
5307         let r = _mm512_castpd128_pd512(a);
5308         let e = _mm512_setr_pd(17., 18., -1., -1., -1., -1., -1., -1.);
5309         assert_eq_m512d(r, e);
5310     }
5311
5312     #[simd_test(enable = "avx512f")]
5313     unsafe fn test_mm512_castpd256_pd512() {
5314         let a = _mm256_setr_pd(17., 18., 19., 20.);
5315         let r = _mm512_castpd256_pd512(a);
5316         let e = _mm512_setr_pd(17., 18., 19., 20., -1., -1., -1., -1.);
5317         assert_eq_m512d(r, e);
5318     }
5319
5320     #[simd_test(enable = "avx512f")]
5321     unsafe fn test_mm512_zextpd128_pd512() {
5322         let a = _mm_setr_pd(17., 18.);
5323         let r = _mm512_zextpd128_pd512(a);
5324         let e = _mm512_setr_pd(17., 18., 0., 0., 0., 0., 0., 0.);
5325         assert_eq_m512d(r, e);
5326     }
5327
5328     #[simd_test(enable = "avx512f")]
5329     unsafe fn test_mm512_zextpd256_pd512() {
5330         let a = _mm256_setr_pd(17., 18., 19., 20.);
5331         let r = _mm512_zextpd256_pd512(a);
5332         let e = _mm512_setr_pd(17., 18., 19., 20., 0., 0., 0., 0.);
5333         assert_eq_m512d(r, e);
5334     }
5335
5336     #[simd_test(enable = "avx512f")]
5337     unsafe fn test_mm512_castpd512_pd128() {
5338         let a = _mm512_setr_pd(17., 18., -1., -1., -1., -1., -1., -1.);
5339         let r = _mm512_castpd512_pd128(a);
5340         let e = _mm_setr_pd(17., 18.);
5341         assert_eq_m128d(r, e);
5342     }
5343
5344     #[simd_test(enable = "avx512f")]
5345     unsafe fn test_mm512_castpd512_pd256() {
5346         let a = _mm512_setr_pd(17., 18., 19., 20., -1., -1., -1., -1.);
5347         let r = _mm512_castpd512_pd256(a);
5348         let e = _mm256_setr_pd(17., 18., 19., 20.);
5349         assert_eq_m256d(r, e);
5350     }
5351
5352     #[simd_test(enable = "avx512f")]
5353     unsafe fn test_mm512_castpd_ps() {
5354         let a = _mm512_set1_pd(1.);
5355         let r = _mm512_castpd_ps(a);
5356         let e = _mm512_set_ps(
5357             1.875, 0.0, 1.875, 0.0, 1.875, 0.0, 1.875, 0.0, 1.875, 0.0, 1.875, 0.0, 1.875, 0.0,
5358             1.875, 0.0,
5359         );
5360         assert_eq_m512(r, e);
5361     }
5362
5363     #[simd_test(enable = "avx512f")]
5364     unsafe fn test_mm512_castpd_si512() {
5365         let a = _mm512_set1_pd(1.);
5366         let r = _mm512_castpd_si512(a);
5367         let e = _mm512_set_epi32(
5368             1072693248, 0, 1072693248, 0, 1072693248, 0, 1072693248, 0, 1072693248, 0, 1072693248,
5369             0, 1072693248, 0, 1072693248, 0,
5370         );
5371         assert_eq_m512i(r, e);
5372     }
5373
5374     #[simd_test(enable = "avx512f")]
5375     unsafe fn test_mm512_castsi128_si512() {
5376         let a = _mm_setr_epi64x(17, 18);
5377         let r = _mm512_castsi128_si512(a);
5378         let e = _mm512_setr_epi64(17, 18, -1, -1, -1, -1, -1, -1);
5379         assert_eq_m512i(r, e);
5380     }
5381
5382     #[simd_test(enable = "avx512f")]
5383     unsafe fn test_mm512_castsi256_si512() {
5384         let a = _mm256_setr_epi64x(17, 18, 19, 20);
5385         let r = _mm512_castsi256_si512(a);
5386         let e = _mm512_setr_epi64(17, 18, 19, 20, -1, -1, -1, -1);
5387         assert_eq_m512i(r, e);
5388     }
5389
5390     #[simd_test(enable = "avx512f")]
5391     unsafe fn test_mm512_zextsi128_si512() {
5392         let a = _mm_setr_epi64x(17, 18);
5393         let r = _mm512_zextsi128_si512(a);
5394         let e = _mm512_setr_epi64(17, 18, 0, 0, 0, 0, 0, 0);
5395         assert_eq_m512i(r, e);
5396     }
5397
5398     #[simd_test(enable = "avx512f")]
5399     unsafe fn test_mm512_zextsi256_si512() {
5400         let a = _mm256_setr_epi64x(17, 18, 19, 20);
5401         let r = _mm512_zextsi256_si512(a);
5402         let e = _mm512_setr_epi64(17, 18, 19, 20, 0, 0, 0, 0);
5403         assert_eq_m512i(r, e);
5404     }
5405
5406     #[simd_test(enable = "avx512f")]
5407     unsafe fn test_mm512_castsi512_si128() {
5408         let a = _mm512_setr_epi64(17, 18, -1, -1, -1, -1, -1, -1);
5409         let r = _mm512_castsi512_si128(a);
5410         let e = _mm_setr_epi64x(17, 18);
5411         assert_eq_m128i(r, e);
5412     }
5413
5414     #[simd_test(enable = "avx512f")]
5415     unsafe fn test_mm512_castsi512_si256() {
5416         let a = _mm512_setr_epi64(17, 18, 19, 20, -1, -1, -1, -1);
5417         let r = _mm512_castsi512_si256(a);
5418         let e = _mm256_setr_epi64x(17, 18, 19, 20);
5419         assert_eq_m256i(r, e);
5420     }
5421
5422     #[simd_test(enable = "avx512f")]
5423     unsafe fn test_mm512_castsi512_ps() {
5424         let a = _mm512_set1_epi64(1 << 62);
5425         let r = _mm512_castsi512_ps(a);
5426         let e = _mm512_set_ps(
5427             2., 0., 2., 0., 2., 0., 2., 0., 2., 0., 2., 0., 2., 0., 2., 0.,
5428         );
5429         assert_eq_m512(r, e);
5430     }
5431
5432     #[simd_test(enable = "avx512f")]
5433     unsafe fn test_mm512_castsi512_pd() {
5434         let a = _mm512_set1_epi64(1 << 62);
5435         let r = _mm512_castsi512_pd(a);
5436         let e = _mm512_set_pd(2., 2., 2., 2., 2., 2., 2., 2.);
5437         assert_eq_m512d(r, e);
5438     }
5439
5440     #[simd_test(enable = "avx512f")]
5441     unsafe fn test_mm512_broadcastq_epi64() {
5442         let a = _mm_setr_epi64x(17, 18);
5443         let r = _mm512_broadcastq_epi64(a);
5444         let e = _mm512_set1_epi64(17);
5445         assert_eq_m512i(r, e);
5446     }
5447
5448     #[simd_test(enable = "avx512f")]
5449     unsafe fn test_mm512_mask_broadcastq_epi64() {
5450         let src = _mm512_set1_epi64(18);
5451         let a = _mm_setr_epi64x(17, 18);
5452         let r = _mm512_mask_broadcastq_epi64(src, 0, a);
5453         assert_eq_m512i(r, src);
5454         let r = _mm512_mask_broadcastq_epi64(src, 0b11111111, a);
5455         let e = _mm512_set1_epi64(17);
5456         assert_eq_m512i(r, e);
5457     }
5458
5459     #[simd_test(enable = "avx512f")]
5460     unsafe fn test_mm512_maskz_broadcastq_epi64() {
5461         let a = _mm_setr_epi64x(17, 18);
5462         let r = _mm512_maskz_broadcastq_epi64(0, a);
5463         assert_eq_m512i(r, _mm512_setzero_si512());
5464         let r = _mm512_maskz_broadcastq_epi64(0b00001111, a);
5465         let e = _mm512_set_epi64(0, 0, 0, 0, 17, 17, 17, 17);
5466         assert_eq_m512i(r, e);
5467     }
5468
5469     #[simd_test(enable = "avx512f")]
5470     unsafe fn test_mm512_broadcastsd_pd() {
5471         let a = _mm_setr_pd(17., 18.);
5472         let r = _mm512_broadcastsd_pd(a);
5473         let e = _mm512_set1_pd(18.);
5474         assert_eq_m512d(r, e);
5475     }
5476
5477     #[simd_test(enable = "avx512f")]
5478     unsafe fn test_mm512_mask_broadcastsd_pd() {
5479         let src = _mm512_set1_pd(18.);
5480         let a = _mm_setr_pd(17., 18.);
5481         let r = _mm512_mask_broadcastsd_pd(src, 0, a);
5482         assert_eq_m512d(r, src);
5483         let r = _mm512_mask_broadcastsd_pd(src, 0b01111111, a);
5484         let e = _mm512_set1_pd(18.);
5485         assert_eq_m512d(r, e);
5486     }
5487
5488     #[simd_test(enable = "avx512f")]
5489     unsafe fn test_mm512_maskz_broadcastsd_pd() {
5490         let a = _mm_setr_pd(17., 18.);
5491         let r = _mm512_maskz_broadcastsd_pd(0, a);
5492         assert_eq_m512d(r, _mm512_setzero_pd());
5493         let r = _mm512_maskz_broadcastsd_pd(0b00001111, a);
5494         let e = _mm512_set_pd(0., 0., 0., 0., 18., 18., 18., 18.);
5495         assert_eq_m512d(r, e);
5496     }
5497
5498     #[simd_test(enable = "avx512f")]
5499     unsafe fn test_mm512_broadcast_i64x4() {
5500         let a = _mm256_set_epi64x(17, 18, 19, 20);
5501         let r = _mm512_broadcast_i64x4(a);
5502         let e = _mm512_set_epi64(17, 18, 19, 20, 17, 18, 19, 20);
5503         assert_eq_m512i(r, e);
5504     }
5505
5506     #[simd_test(enable = "avx512f")]
5507     unsafe fn test_mm512_mask_broadcast_i64x4() {
5508         let src = _mm512_set1_epi64(18);
5509         let a = _mm256_set_epi64x(17, 18, 19, 20);
5510         let r = _mm512_mask_broadcast_i64x4(src, 0, a);
5511         assert_eq_m512i(r, src);
5512         let r = _mm512_mask_broadcast_i64x4(src, 0b11111111, a);
5513         let e = _mm512_set_epi64(17, 18, 19, 20, 17, 18, 19, 20);
5514         assert_eq_m512i(r, e);
5515     }
5516
5517     #[simd_test(enable = "avx512f")]
5518     unsafe fn test_mm512_maskz_broadcast_i64x4() {
5519         let a = _mm256_set_epi64x(17, 18, 19, 20);
5520         let r = _mm512_maskz_broadcast_i64x4(0, a);
5521         assert_eq_m512i(r, _mm512_setzero_si512());
5522         let r = _mm512_maskz_broadcast_i64x4(0b00001111, a);
5523         let e = _mm512_set_epi64(0, 0, 0, 0, 17, 18, 19, 20);
5524         assert_eq_m512i(r, e);
5525     }
5526
5527     #[simd_test(enable = "avx512f")]
5528     unsafe fn test_mm512_broadcast_f64x4() {
5529         let a = _mm256_set_pd(17., 18., 19., 20.);
5530         let r = _mm512_broadcast_f64x4(a);
5531         let e = _mm512_set_pd(17., 18., 19., 20., 17., 18., 19., 20.);
5532         assert_eq_m512d(r, e);
5533     }
5534
5535     #[simd_test(enable = "avx512f")]
5536     unsafe fn test_mm512_mask_broadcast_f64x4() {
5537         let src = _mm512_set1_pd(18.);
5538         let a = _mm256_set_pd(17., 18., 19., 20.);
5539         let r = _mm512_mask_broadcast_f64x4(src, 0, a);
5540         assert_eq_m512d(r, src);
5541         let r = _mm512_mask_broadcast_f64x4(src, 0b11111111, a);
5542         let e = _mm512_set_pd(17., 18., 19., 20., 17., 18., 19., 20.);
5543         assert_eq_m512d(r, e);
5544     }
5545
5546     #[simd_test(enable = "avx512f")]
5547     unsafe fn test_mm512_maskz_broadcast_f64x4() {
5548         let a = _mm256_set_pd(17., 18., 19., 20.);
5549         let r = _mm512_maskz_broadcast_f64x4(0, a);
5550         assert_eq_m512d(r, _mm512_setzero_pd());
5551         let r = _mm512_maskz_broadcast_f64x4(0b00001111, a);
5552         let e = _mm512_set_pd(0., 0., 0., 0., 17., 18., 19., 20.);
5553         assert_eq_m512d(r, e);
5554     }
5555
5556     #[simd_test(enable = "avx512f")]
5557     unsafe fn test_mm512_mask_blend_epi64() {
5558         let a = _mm512_set1_epi64(1);
5559         let b = _mm512_set1_epi64(2);
5560         let r = _mm512_mask_blend_epi64(0b11110000, a, b);
5561         let e = _mm512_set_epi64(2, 2, 2, 2, 1, 1, 1, 1);
5562         assert_eq_m512i(r, e);
5563     }
5564
5565     #[simd_test(enable = "avx512f")]
5566     unsafe fn test_mm512_mask_blend_pd() {
5567         let a = _mm512_set1_pd(1.);
5568         let b = _mm512_set1_pd(2.);
5569         let r = _mm512_mask_blend_pd(0b11110000, a, b);
5570         let e = _mm512_set_pd(2., 2., 2., 2., 1., 1., 1., 1.);
5571         assert_eq_m512d(r, e);
5572     }
5573
5574     #[simd_test(enable = "avx512f")]
5575     unsafe fn test_mm512_unpackhi_epi64() {
5576         let a = _mm512_set_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5577         let b = _mm512_set_epi64(17, 18, 19, 20, 21, 22, 23, 24);
5578         let r = _mm512_unpackhi_epi64(a, b);
5579         let e = _mm512_set_epi64(17, 1, 19, 3, 21, 5, 23, 7);
5580         assert_eq_m512i(r, e);
5581     }
5582
5583     #[simd_test(enable = "avx512f")]
5584     unsafe fn test_mm512_mask_unpackhi_epi64() {
5585         let a = _mm512_set_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5586         let b = _mm512_set_epi64(17, 18, 19, 20, 21, 22, 23, 24);
5587         let r = _mm512_mask_unpackhi_epi64(a, 0, a, b);
5588         assert_eq_m512i(r, a);
5589         let r = _mm512_mask_unpackhi_epi64(a, 0b11111111, a, b);
5590         let e = _mm512_set_epi64(17, 1, 19, 3, 21, 5, 23, 7);
5591         assert_eq_m512i(r, e);
5592     }
5593
5594     #[simd_test(enable = "avx512f")]
5595     unsafe fn test_mm512_maskz_unpackhi_epi64() {
5596         let a = _mm512_set_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5597         let b = _mm512_set_epi64(17, 18, 19, 20, 21, 22, 23, 24);
5598         let r = _mm512_maskz_unpackhi_epi64(0, a, b);
5599         assert_eq_m512i(r, _mm512_setzero_si512());
5600         let r = _mm512_maskz_unpackhi_epi64(0b00001111, a, b);
5601         let e = _mm512_set_epi64(0, 0, 0, 0, 21, 5, 23, 7);
5602         assert_eq_m512i(r, e);
5603     }
5604
5605     #[simd_test(enable = "avx512f")]
5606     unsafe fn test_mm512_unpackhi_pd() {
5607         let a = _mm512_set_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5608         let b = _mm512_set_pd(17., 18., 19., 20., 21., 22., 23., 24.);
5609         let r = _mm512_unpackhi_pd(a, b);
5610         let e = _mm512_set_pd(17., 1., 19., 3., 21., 5., 23., 7.);
5611         assert_eq_m512d(r, e);
5612     }
5613
5614     #[simd_test(enable = "avx512f")]
5615     unsafe fn test_mm512_mask_unpackhi_pd() {
5616         let a = _mm512_set_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5617         let b = _mm512_set_pd(17., 18., 19., 20., 21., 22., 23., 24.);
5618         let r = _mm512_mask_unpackhi_pd(a, 0, a, b);
5619         assert_eq_m512d(r, a);
5620         let r = _mm512_mask_unpackhi_pd(a, 0b11111111, a, b);
5621         let e = _mm512_set_pd(17., 1., 19., 3., 21., 5., 23., 7.);
5622         assert_eq_m512d(r, e);
5623     }
5624
5625     #[simd_test(enable = "avx512f")]
5626     unsafe fn test_mm512_maskz_unpackhi_pd() {
5627         let a = _mm512_set_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5628         let b = _mm512_set_pd(17., 18., 19., 20., 21., 22., 23., 24.);
5629         let r = _mm512_maskz_unpackhi_pd(0, a, b);
5630         assert_eq_m512d(r, _mm512_setzero_pd());
5631         let r = _mm512_maskz_unpackhi_pd(0b00001111, a, b);
5632         let e = _mm512_set_pd(0., 0., 0., 0., 21., 5., 23., 7.);
5633         assert_eq_m512d(r, e);
5634     }
5635
5636     #[simd_test(enable = "avx512f")]
5637     unsafe fn test_mm512_unpacklo_epi64() {
5638         let a = _mm512_set_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5639         let b = _mm512_set_epi64(17, 18, 19, 20, 21, 22, 23, 24);
5640         let r = _mm512_unpacklo_epi64(a, b);
5641         let e = _mm512_set_epi64(18, 2, 20, 4, 22, 6, 24, 8);
5642         assert_eq_m512i(r, e);
5643     }
5644
5645     #[simd_test(enable = "avx512f")]
5646     unsafe fn test_mm512_mask_unpacklo_epi64() {
5647         let a = _mm512_set_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5648         let b = _mm512_set_epi64(17, 18, 19, 20, 21, 22, 23, 24);
5649         let r = _mm512_mask_unpacklo_epi64(a, 0, a, b);
5650         assert_eq_m512i(r, a);
5651         let r = _mm512_mask_unpacklo_epi64(a, 0b11111111, a, b);
5652         let e = _mm512_set_epi64(18, 2, 20, 4, 22, 6, 24, 8);
5653         assert_eq_m512i(r, e);
5654     }
5655
5656     #[simd_test(enable = "avx512f")]
5657     unsafe fn test_mm512_maskz_unpacklo_epi64() {
5658         let a = _mm512_set_epi64(1, 2, 3, 4, 5, 6, 7, 8);
5659         let b = _mm512_set_epi64(17, 18, 19, 20, 21, 22, 23, 24);
5660         let r = _mm512_maskz_unpacklo_epi64(0, a, b);
5661         assert_eq_m512i(r, _mm512_setzero_si512());
5662         let r = _mm512_maskz_unpacklo_epi64(0b00001111, a, b);
5663         let e = _mm512_set_epi64(0, 0, 0, 0, 22, 6, 24, 8);
5664         assert_eq_m512i(r, e);
5665     }
5666
5667     #[simd_test(enable = "avx512f")]
5668     unsafe fn test_mm512_unpacklo_pd() {
5669         let a = _mm512_set_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5670         let b = _mm512_set_pd(17., 18., 19., 20., 21., 22., 23., 24.);
5671         let r = _mm512_unpacklo_pd(a, b);
5672         let e = _mm512_set_pd(18., 2., 20., 4., 22., 6., 24., 8.);
5673         assert_eq_m512d(r, e);
5674     }
5675
5676     #[simd_test(enable = "avx512f")]
5677     unsafe fn test_mm512_mask_unpacklo_pd() {
5678         let a = _mm512_set_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5679         let b = _mm512_set_pd(17., 18., 19., 20., 21., 22., 23., 24.);
5680         let r = _mm512_mask_unpacklo_pd(a, 0, a, b);
5681         assert_eq_m512d(r, a);
5682         let r = _mm512_mask_unpacklo_pd(a, 0b11111111, a, b);
5683         let e = _mm512_set_pd(18., 2., 20., 4., 22., 6., 24., 8.);
5684         assert_eq_m512d(r, e);
5685     }
5686
5687     #[simd_test(enable = "avx512f")]
5688     unsafe fn test_mm512_maskz_unpacklo_pd() {
5689         let a = _mm512_set_pd(1., 2., 3., 4., 5., 6., 7., 8.);
5690         let b = _mm512_set_pd(17., 18., 19., 20., 21., 22., 23., 24.);
5691         let r = _mm512_maskz_unpacklo_pd(0, a, b);
5692         assert_eq_m512d(r, _mm512_setzero_pd());
5693         let r = _mm512_maskz_unpacklo_pd(0b00001111, a, b);
5694         let e = _mm512_set_pd(0., 0., 0., 0., 22., 6., 24., 8.);
5695         assert_eq_m512d(r, e);
5696     }
5697
5698     #[simd_test(enable = "avx512f")]
5699     unsafe fn test_mm512_alignr_epi64() {
5700         let a = _mm512_set_epi64(8, 7, 6, 5, 4, 3, 2, 1);
5701         let b = _mm512_set_epi64(16, 15, 14, 13, 12, 11, 10, 9);
5702         let r = _mm512_alignr_epi64(a, b, 0);
5703         assert_eq_m512i(r, b);
5704         let r = _mm512_alignr_epi64(a, b, 8);
5705         assert_eq_m512i(r, b);
5706         let r = _mm512_alignr_epi64(a, b, 1);
5707         let e = _mm512_set_epi64(1, 16, 15, 14, 13, 12, 11, 10);
5708         assert_eq_m512i(r, e);
5709     }
5710
5711     #[simd_test(enable = "avx512f")]
5712     unsafe fn test_mm512_mask_alignr_epi64() {
5713         let a = _mm512_set_epi64(8, 7, 6, 5, 4, 3, 2, 1);
5714         let b = _mm512_set_epi64(16, 15, 14, 13, 12, 11, 10, 9);
5715         let r = _mm512_mask_alignr_epi64(a, 0, a, b, 1);
5716         assert_eq_m512i(r, a);
5717         let r = _mm512_mask_alignr_epi64(a, 0b11111111, a, b, 1);
5718         let e = _mm512_set_epi64(1, 16, 15, 14, 13, 12, 11, 10);
5719         assert_eq_m512i(r, e);
5720     }
5721
5722     #[simd_test(enable = "avx512f")]
5723     unsafe fn test_mm512_maskz_alignr_epi64() {
5724         let a = _mm512_set_epi64(8, 7, 6, 5, 4, 3, 2, 1);
5725         let b = _mm512_set_epi64(16, 15, 14, 13, 12, 11, 10, 9);
5726         let r = _mm512_maskz_alignr_epi64(0, a, b, 1);
5727         assert_eq_m512i(r, _mm512_setzero_si512());
5728         let r = _mm512_maskz_alignr_epi64(0b00001111, a, b, 1);
5729         let e = _mm512_set_epi64(0, 0, 0, 0, 13, 12, 11, 10);
5730         assert_eq_m512i(r, e);
5731     }
5732
5733     #[simd_test(enable = "avx512f")]
5734     unsafe fn test_mm512_and_epi64() {
5735         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5736         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5737         let r = _mm512_and_epi64(a, b);
5738         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5739         assert_eq_m512i(r, e);
5740     }
5741
5742     #[simd_test(enable = "avx512f")]
5743     unsafe fn test_mm512_mask_and_epi64() {
5744         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5745         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5746         let r = _mm512_mask_and_epi64(a, 0, a, b);
5747         let e = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5748         assert_eq_m512i(r, e);
5749
5750         let r = _mm512_mask_and_epi64(a, 0b01111111, a, b);
5751         let e = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5752         assert_eq_m512i(r, e);
5753     }
5754
5755     #[simd_test(enable = "avx512f")]
5756     unsafe fn test_mm512_maskz_and_epi64() {
5757         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5758         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5759         let r = _mm512_maskz_and_epi64(0, a, b);
5760         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 0);
5761         assert_eq_m512i(r, e);
5762
5763         let r = _mm512_maskz_and_epi64(0b00001111, a, b);
5764         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5765         assert_eq_m512i(r, e);
5766     }
5767
5768     #[simd_test(enable = "avx512f")]
5769     unsafe fn test_mm512_and_si512() {
5770         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5771         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5772         let r = _mm512_and_epi64(a, b);
5773         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5774         assert_eq_m512i(r, e);
5775     }
5776
5777     #[simd_test(enable = "avx512f")]
5778     unsafe fn test_mm512_or_epi64() {
5779         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5780         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5781         let r = _mm512_or_epi64(a, b);
5782         let e = _mm512_set_epi64(
5783             1 << 0 | 1 << 13 | 1 << 15,
5784             0,
5785             0,
5786             0,
5787             0,
5788             0,
5789             0,
5790             1 << 1 | 1 << 2 | 1 << 3,
5791         );
5792         assert_eq_m512i(r, e);
5793     }
5794
5795     #[simd_test(enable = "avx512f")]
5796     unsafe fn test_mm512_mask_or_epi64() {
5797         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5798         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5799         let r = _mm512_mask_or_epi64(a, 0, a, b);
5800         let e = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5801         assert_eq_m512i(r, e);
5802
5803         let r = _mm512_mask_or_epi64(a, 0b11111111, a, b);
5804         let e = _mm512_set_epi64(
5805             1 << 0 | 1 << 13 | 1 << 15,
5806             0,
5807             0,
5808             0,
5809             0,
5810             0,
5811             0,
5812             1 << 1 | 1 << 2 | 1 << 3,
5813         );
5814         assert_eq_m512i(r, e);
5815     }
5816
5817     #[simd_test(enable = "avx512f")]
5818     unsafe fn test_mm512_maskz_or_epi64() {
5819         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5820         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5821         let r = _mm512_maskz_or_epi64(0, a, b);
5822         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 0);
5823         assert_eq_m512i(r, e);
5824
5825         let r = _mm512_maskz_or_epi64(0b00001111, a, b);
5826         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5827         assert_eq_m512i(r, e);
5828     }
5829
5830     #[simd_test(enable = "avx512f")]
5831     unsafe fn test_mm512_or_si512() {
5832         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5833         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5834         let r = _mm512_or_epi64(a, b);
5835         let e = _mm512_set_epi64(
5836             1 << 0 | 1 << 13 | 1 << 15,
5837             0,
5838             0,
5839             0,
5840             0,
5841             0,
5842             0,
5843             1 << 1 | 1 << 2 | 1 << 3,
5844         );
5845         assert_eq_m512i(r, e);
5846     }
5847
5848     #[simd_test(enable = "avx512f")]
5849     unsafe fn test_mm512_xor_epi64() {
5850         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5851         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5852         let r = _mm512_xor_epi64(a, b);
5853         let e = _mm512_set_epi64(1 << 0 | 1 << 13 | 1 << 15, 0, 0, 0, 0, 0, 0, 0);
5854         assert_eq_m512i(r, e);
5855     }
5856
5857     #[simd_test(enable = "avx512f")]
5858     unsafe fn test_mm512_mask_xor_epi64() {
5859         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5860         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5861         let r = _mm512_mask_xor_epi64(a, 0, a, b);
5862         let e = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5863         assert_eq_m512i(r, e);
5864
5865         let r = _mm512_mask_xor_epi64(a, 0b11111111, a, b);
5866         let e = _mm512_set_epi64(1 << 0 | 1 << 13 | 1 << 15, 0, 0, 0, 0, 0, 0, 0);
5867         assert_eq_m512i(r, e);
5868     }
5869
5870     #[simd_test(enable = "avx512f")]
5871     unsafe fn test_mm512_maskz_xor_epi64() {
5872         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5873         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5874         let r = _mm512_maskz_xor_epi64(0, a, b);
5875         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 0);
5876         assert_eq_m512i(r, e);
5877
5878         let r = _mm512_maskz_xor_epi64(0b00001111, a, b);
5879         let e = _mm512_set_epi64(0, 0, 0, 0, 0, 0, 0, 0);
5880         assert_eq_m512i(r, e);
5881     }
5882
5883     #[simd_test(enable = "avx512f")]
5884     unsafe fn test_mm512_xor_si512() {
5885         let a = _mm512_set_epi64(1 << 0 | 1 << 15, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5886         let b = _mm512_set_epi64(1 << 13, 0, 0, 0, 0, 0, 0, 1 << 1 | 1 << 2 | 1 << 3);
5887         let r = _mm512_xor_epi64(a, b);
5888         let e = _mm512_set_epi64(1 << 0 | 1 << 13 | 1 << 15, 0, 0, 0, 0, 0, 0, 0);
5889         assert_eq_m512i(r, e);
5890     }
5891
5892     #[simd_test(enable = "avx512f")]
5893     unsafe fn test_mm512_andnot_epi64() {
5894         let a = _mm512_set1_epi64(0);
5895         let b = _mm512_set1_epi64(1 << 3 | 1 << 4);
5896         let r = _mm512_andnot_epi64(a, b);
5897         let e = _mm512_set1_epi64(1 << 3 | 1 << 4);
5898         assert_eq_m512i(r, e);
5899     }
5900
5901     #[simd_test(enable = "avx512f")]
5902     unsafe fn test_mm512_mask_andnot_epi64() {
5903         let a = _mm512_set1_epi64(1 << 1 | 1 << 2);
5904         let b = _mm512_set1_epi64(1 << 3 | 1 << 4);
5905         let r = _mm512_mask_andnot_epi64(a, 0, a, b);
5906         assert_eq_m512i(r, a);
5907
5908         let r = _mm512_mask_andnot_epi64(a, 0b11111111, a, b);
5909         let e = _mm512_set1_epi64(1 << 3 | 1 << 4);
5910         assert_eq_m512i(r, e);
5911     }
5912
5913     #[simd_test(enable = "avx512f")]
5914     unsafe fn test_mm512_maskz_andnot_epi64() {
5915         let a = _mm512_set1_epi64(1 << 1 | 1 << 2);
5916         let b = _mm512_set1_epi64(1 << 3 | 1 << 4);
5917         let r = _mm512_maskz_andnot_epi64(0, a, b);
5918         assert_eq_m512i(r, _mm512_setzero_si512());
5919
5920         let r = _mm512_maskz_andnot_epi64(0b00001111, a, b);
5921         let e = _mm512_set_epi64(
5922             0,
5923             0,
5924             0,
5925             0,
5926             1 << 3 | 1 << 4,
5927             1 << 3 | 1 << 4,
5928             1 << 3 | 1 << 4,
5929             1 << 3 | 1 << 4,
5930         );
5931         assert_eq_m512i(r, e);
5932     }
5933
5934     #[simd_test(enable = "avx512f")]
5935     unsafe fn test_mm512_andnot_si512() {
5936         let a = _mm512_set1_epi64(0);
5937         let b = _mm512_set1_epi64(1 << 3 | 1 << 4);
5938         let r = _mm512_andnot_si512(a, b);
5939         let e = _mm512_set1_epi64(1 << 3 | 1 << 4);
5940         assert_eq_m512i(r, e);
5941     }
5942
5943     #[simd_test(enable = "avx512f")]
5944     unsafe fn test_mm512_reduce_add_epi64() {
5945         let a = _mm512_set1_epi64(1);
5946         let e: i64 = _mm512_reduce_add_epi64(a);
5947         assert_eq!(8, e);
5948     }
5949
5950     #[simd_test(enable = "avx512f")]
5951     unsafe fn test_mm512_mask_reduce_add_epi64() {
5952         let a = _mm512_set1_epi64(1);
5953         let e: i64 = _mm512_mask_reduce_add_epi64(0b11110000, a);
5954         assert_eq!(4, e);
5955     }
5956
5957     #[simd_test(enable = "avx512f")]
5958     unsafe fn test_mm512_reduce_add_pd() {
5959         let a = _mm512_set1_pd(1.);
5960         let e: f64 = _mm512_reduce_add_pd(a);
5961         assert_eq!(8., e);
5962     }
5963
5964     #[simd_test(enable = "avx512f")]
5965     unsafe fn test_mm512_mask_reduce_add_pd() {
5966         let a = _mm512_set1_pd(1.);
5967         let e: f64 = _mm512_mask_reduce_add_pd(0b11110000, a);
5968         assert_eq!(4., e);
5969     }
5970
5971     #[simd_test(enable = "avx512f")]
5972     unsafe fn test_mm512_reduce_mul_epi64() {
5973         let a = _mm512_set1_epi64(2);
5974         let e: i64 = _mm512_reduce_mul_epi64(a);
5975         assert_eq!(256, e);
5976     }
5977
5978     #[simd_test(enable = "avx512f")]
5979     unsafe fn test_mm512_mask_reduce_mul_epi64() {
5980         let a = _mm512_set1_epi64(2);
5981         let e: i64 = _mm512_mask_reduce_mul_epi64(0b11110000, a);
5982         assert_eq!(16, e);
5983     }
5984
5985     #[simd_test(enable = "avx512f")]
5986     unsafe fn test_mm512_reduce_mul_pd() {
5987         let a = _mm512_set1_pd(2.);
5988         let e: f64 = _mm512_reduce_mul_pd(a);
5989         assert_eq!(256., e);
5990     }
5991
5992     #[simd_test(enable = "avx512f")]
5993     unsafe fn test_mm512_mask_reduce_mul_pd() {
5994         let a = _mm512_set1_pd(2.);
5995         let e: f64 = _mm512_mask_reduce_mul_pd(0b11110000, a);
5996         assert_eq!(16., e);
5997     }
5998
5999     #[simd_test(enable = "avx512f")]
6000     unsafe fn test_mm512_reduce_max_epi64() {
6001         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6002         let e: i64 = _mm512_reduce_max_epi64(a);
6003         assert_eq!(7, e);
6004     }
6005
6006     #[simd_test(enable = "avx512f")]
6007     unsafe fn test_mm512_mask_reduce_max_epi64() {
6008         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6009         let e: i64 = _mm512_mask_reduce_max_epi64(0b11110000, a);
6010         assert_eq!(3, e);
6011     }
6012
6013     #[simd_test(enable = "avx512f")]
6014     unsafe fn test_mm512_reduce_max_epu64() {
6015         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6016         let e: u64 = _mm512_reduce_max_epu64(a);
6017         assert_eq!(7, e);
6018     }
6019
6020     #[simd_test(enable = "avx512f")]
6021     unsafe fn test_mm512_mask_reduce_max_epu64() {
6022         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6023         let e: u64 = _mm512_mask_reduce_max_epu64(0b11110000, a);
6024         assert_eq!(3, e);
6025     }
6026
6027     #[simd_test(enable = "avx512f")]
6028     unsafe fn test_mm512_reduce_max_pd() {
6029         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6030         let e: f64 = _mm512_reduce_max_pd(a);
6031         assert_eq!(7., e);
6032     }
6033
6034     #[simd_test(enable = "avx512f")]
6035     unsafe fn test_mm512_mask_reduce_max_pd() {
6036         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6037         let e: f64 = _mm512_mask_reduce_max_pd(0b11110000, a);
6038         assert_eq!(3., e);
6039     }
6040
6041     #[simd_test(enable = "avx512f")]
6042     unsafe fn test_mm512_reduce_min_epi64() {
6043         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6044         let e: i64 = _mm512_reduce_min_epi64(a);
6045         assert_eq!(0, e);
6046     }
6047
6048     #[simd_test(enable = "avx512f")]
6049     unsafe fn test_mm512_mask_reduce_min_epi64() {
6050         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6051         let e: i64 = _mm512_mask_reduce_min_epi64(0b11110000, a);
6052         assert_eq!(0, e);
6053     }
6054
6055     #[simd_test(enable = "avx512f")]
6056     unsafe fn test_mm512_reduce_min_epu64() {
6057         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6058         let e: u64 = _mm512_reduce_min_epu64(a);
6059         assert_eq!(0, e);
6060     }
6061
6062     #[simd_test(enable = "avx512f")]
6063     unsafe fn test_mm512_mask_reduce_min_epu64() {
6064         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6065         let e: u64 = _mm512_mask_reduce_min_epu64(0b11110000, a);
6066         assert_eq!(0, e);
6067     }
6068
6069     #[simd_test(enable = "avx512f")]
6070     unsafe fn test_mm512_reduce_min_pd() {
6071         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6072         let e: f64 = _mm512_reduce_min_pd(a);
6073         assert_eq!(0., e);
6074     }
6075
6076     #[simd_test(enable = "avx512f")]
6077     unsafe fn test_mm512_mask_reduce_min_pd() {
6078         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6079         let e: f64 = _mm512_mask_reduce_min_pd(0b11110000, a);
6080         assert_eq!(0., e);
6081     }
6082
6083     #[simd_test(enable = "avx512f")]
6084     unsafe fn test_mm512_reduce_and_epi64() {
6085         let a = _mm512_set_epi64(1, 1, 1, 1, 2, 2, 2, 2);
6086         let e: i64 = _mm512_reduce_and_epi64(a);
6087         assert_eq!(0, e);
6088     }
6089
6090     #[simd_test(enable = "avx512f")]
6091     unsafe fn test_mm512_mask_reduce_and_epi64() {
6092         let a = _mm512_set_epi64(1, 1, 1, 1, 2, 2, 2, 2);
6093         let e: i64 = _mm512_mask_reduce_and_epi64(0b11110000, a);
6094         assert_eq!(1, e);
6095     }
6096
6097     #[simd_test(enable = "avx512f")]
6098     unsafe fn test_mm512_reduce_or_epi64() {
6099         let a = _mm512_set_epi64(1, 1, 1, 1, 2, 2, 2, 2);
6100         let e: i64 = _mm512_reduce_or_epi64(a);
6101         assert_eq!(3, e);
6102     }
6103
6104     #[simd_test(enable = "avx512f")]
6105     unsafe fn test_mm512_mask_reduce_or_epi64() {
6106         let a = _mm512_set_epi64(1, 1, 1, 1, 2, 2, 2, 2);
6107         let e: i64 = _mm512_mask_reduce_or_epi64(0b11110000, a);
6108         assert_eq!(1, e);
6109     }
6110
6111     #[simd_test(enable = "avx512f")]
6112     unsafe fn test_mm512_extractf64x4_pd() {
6113         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
6114         let r = _mm512_extractf64x4_pd(a, 0x1);
6115         let e = _mm256_setr_pd(5., 6., 7., 8.);
6116         assert_eq_m256d(r, e);
6117     }
6118
6119     #[simd_test(enable = "avx512f")]
6120     unsafe fn test_mm512_mask_extractf64x4_pd() {
6121         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
6122         let src = _mm256_set1_pd(100.);
6123         let r = _mm512_mask_extractf64x4_pd(src, 0, a, 0x1);
6124         assert_eq_m256d(r, src);
6125         let r = _mm512_mask_extractf64x4_pd(src, 0b11111111, a, 0x1);
6126         let e = _mm256_setr_pd(5., 6., 7., 8.);
6127         assert_eq_m256d(r, e);
6128     }
6129
6130     #[simd_test(enable = "avx512f")]
6131     unsafe fn test_mm512_maskz_extractf64x4_pd() {
6132         let a = _mm512_setr_pd(1., 2., 3., 4., 5., 6., 7., 8.);
6133         let r = _mm512_maskz_extractf64x4_pd(0, a, 0x1);
6134         assert_eq_m256d(r, _mm256_setzero_pd());
6135         let r = _mm512_maskz_extractf64x4_pd(0b00000001, a, 0x1);
6136         let e = _mm256_setr_pd(5., 0., 0., 0.);
6137         assert_eq_m256d(r, e);
6138     }
6139
6140     #[simd_test(enable = "avx512f")]
6141     unsafe fn test_mm512_extracti64x4_epi64() {
6142         let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
6143         let r = _mm512_extracti64x4_epi64(a, 0x1);
6144         let e = _mm256_setr_epi64x(5, 6, 7, 8);
6145         assert_eq_m256i(r, e);
6146     }
6147
6148     #[simd_test(enable = "avx512f")]
6149     unsafe fn test_mm512_mask_extracti64x4_epi64() {
6150         let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
6151         let src = _mm256_set1_epi64x(100);
6152         let r = _mm512_mask_extracti64x4_epi64(src, 0, a, 0x1);
6153         assert_eq_m256i(r, src);
6154         let r = _mm512_mask_extracti64x4_epi64(src, 0b11111111, a, 0x1);
6155         let e = _mm256_setr_epi64x(5, 6, 7, 8);
6156         assert_eq_m256i(r, e);
6157     }
6158
6159     #[simd_test(enable = "avx512f")]
6160     unsafe fn test_mm512_maskz_extracti64x4_epi64() {
6161         let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
6162         let r = _mm512_maskz_extracti64x4_epi64(0, a, 0x1);
6163         assert_eq_m256i(r, _mm256_setzero_si256());
6164         let r = _mm512_maskz_extracti64x4_epi64(0b00000001, a, 0x1);
6165         let e = _mm256_setr_epi64x(5, 0, 0, 0);
6166         assert_eq_m256i(r, e);
6167     }
6168
6169     #[simd_test(enable = "avx512f")]
6170     unsafe fn test_mm512_mask_compress_epi64() {
6171         let src = _mm512_set1_epi64(200);
6172         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6173         let r = _mm512_mask_compress_epi64(src, 0b01010101, a);
6174         let e = _mm512_set_epi64(200, 200, 200, 200, 1, 3, 5, 7);
6175         assert_eq_m512i(r, e);
6176     }
6177
6178     #[simd_test(enable = "avx512f")]
6179     unsafe fn test_mm512_maskz_compress_epi64() {
6180         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6181         let r = _mm512_maskz_compress_epi64(0b01010101, a);
6182         let e = _mm512_set_epi64(0, 0, 0, 0, 1, 3, 5, 7);
6183         assert_eq_m512i(r, e);
6184     }
6185
6186     #[simd_test(enable = "avx512f")]
6187     unsafe fn test_mm512_mask_compress_pd() {
6188         let src = _mm512_set1_pd(200.);
6189         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6190         let r = _mm512_mask_compress_pd(src, 0b01010101, a);
6191         let e = _mm512_set_pd(200., 200., 200., 200., 1., 3., 5., 7.);
6192         assert_eq_m512d(r, e);
6193     }
6194
6195     #[simd_test(enable = "avx512f")]
6196     unsafe fn test_mm512_maskz_compress_pd() {
6197         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6198         let r = _mm512_maskz_compress_pd(0b01010101, a);
6199         let e = _mm512_set_pd(0., 0., 0., 0., 1., 3., 5., 7.);
6200         assert_eq_m512d(r, e);
6201     }
6202
6203     #[simd_test(enable = "avx512f")]
6204     unsafe fn test_mm512_mask_expand_epi64() {
6205         let src = _mm512_set1_epi64(200);
6206         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6207         let r = _mm512_mask_expand_epi64(src, 0b01010101, a);
6208         let e = _mm512_set_epi64(200, 4, 200, 5, 200, 6, 200, 7);
6209         assert_eq_m512i(r, e);
6210     }
6211
6212     #[simd_test(enable = "avx512f")]
6213     unsafe fn test_mm512_maskz_expand_epi64() {
6214         let a = _mm512_set_epi64(0, 1, 2, 3, 4, 5, 6, 7);
6215         let r = _mm512_maskz_expand_epi64(0b01010101, a);
6216         let e = _mm512_set_epi64(0, 4, 0, 5, 0, 6, 0, 7);
6217         assert_eq_m512i(r, e);
6218     }
6219
6220     #[simd_test(enable = "avx512f")]
6221     unsafe fn test_mm512_mask_expand_pd() {
6222         let src = _mm512_set1_pd(200.);
6223         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6224         let r = _mm512_mask_expand_pd(src, 0b01010101, a);
6225         let e = _mm512_set_pd(200., 4., 200., 5., 200., 6., 200., 7.);
6226         assert_eq_m512d(r, e);
6227     }
6228
6229     #[simd_test(enable = "avx512f")]
6230     unsafe fn test_mm512_maskz_expand_pd() {
6231         let a = _mm512_set_pd(0., 1., 2., 3., 4., 5., 6., 7.);
6232         let r = _mm512_maskz_expand_pd(0b01010101, a);
6233         let e = _mm512_set_pd(0., 4., 0., 5., 0., 6., 0., 7.);
6234         assert_eq_m512d(r, e);
6235     }
6236
6237     #[simd_test(enable = "avx512f")]
6238     unsafe fn test_mm512_loadu_epi64() {
6239         let a = &[4, 3, 2, 5, -8, -9, -64, -50];
6240         let p = a.as_ptr();
6241         let r = _mm512_loadu_epi64(black_box(p));
6242         let e = _mm512_setr_epi64(4, 3, 2, 5, -8, -9, -64, -50);
6243         assert_eq_m512i(r, e);
6244     }
6245
6246     #[simd_test(enable = "avx512f")]
6247     unsafe fn test_mm512_storeu_epi64() {
6248         let a = _mm512_set1_epi64(9);
6249         let mut r = _mm512_set1_epi64(0);
6250         _mm512_storeu_epi64(&mut r as *mut _ as *mut i64, a);
6251         assert_eq_m512i(r, a);
6252     }
6253
6254     #[simd_test(enable = "avx512f")]
6255     unsafe fn test_mm512_load_epi64() {
6256         #[repr(align(64))]
6257         struct Align {
6258             data: [i64; 8], // 64 bytes
6259         }
6260         let a = Align {
6261             data: [4, 3, 2, 5, -8, -9, -64, -50],
6262         };
6263         let p = (a.data).as_ptr();
6264         let r = _mm512_load_epi64(black_box(p));
6265         let e = _mm512_setr_epi64(4, 3, 2, 5, -8, -9, -64, -50);
6266         assert_eq_m512i(r, e);
6267     }
6268
6269     #[simd_test(enable = "avx512f")]
6270     unsafe fn test_mm512_store_epi64() {
6271         let a = _mm512_set1_epi64(9);
6272         let mut r = _mm512_set1_epi64(0);
6273         _mm512_store_epi64(&mut r as *mut _ as *mut i64, a);
6274         assert_eq_m512i(r, a);
6275     }
6276
6277     #[simd_test(enable = "avx512f")]
6278     unsafe fn test_mm512_load_pd() {
6279         #[repr(align(64))]
6280         struct Align {
6281             data: [f64; 8], // 64 bytes
6282         }
6283         let a = Align {
6284             data: [4., 3., 2., 5., -8., -9., -64., -50.],
6285         };
6286         let p = (a.data).as_ptr();
6287         let r = _mm512_load_pd(black_box(p));
6288         let e = _mm512_setr_pd(4., 3., 2., 5., -8., -9., -64., -50.);
6289         assert_eq_m512d(r, e);
6290     }
6291
6292     #[simd_test(enable = "avx512f")]
6293     unsafe fn test_mm512_store_pd() {
6294         let a = _mm512_set1_pd(9.);
6295         let mut r = _mm512_undefined_pd();
6296         _mm512_store_pd(&mut r as *mut _ as *mut f64, a);
6297         assert_eq_m512d(r, a);
6298     }
6299
6300     #[simd_test(enable = "avx512f")]
6301     unsafe fn test_mm512_test_epi64_mask() {
6302         let a = _mm512_set1_epi64(1 << 0);
6303         let b = _mm512_set1_epi64(1 << 0 | 1 << 1);
6304         let r = _mm512_test_epi64_mask(a, b);
6305         let e: __mmask8 = 0b11111111;
6306         assert_eq!(r, e);
6307     }
6308
6309     #[simd_test(enable = "avx512f")]
6310     unsafe fn test_mm512_mask_test_epi64_mask() {
6311         let a = _mm512_set1_epi64(1 << 0);
6312         let b = _mm512_set1_epi64(1 << 0 | 1 << 1);
6313         let r = _mm512_mask_test_epi64_mask(0, a, b);
6314         assert_eq!(r, 0);
6315         let r = _mm512_mask_test_epi64_mask(0b11111111, a, b);
6316         let e: __mmask8 = 0b11111111;
6317         assert_eq!(r, e);
6318     }
6319
6320     #[simd_test(enable = "avx512f")]
6321     unsafe fn test_mm512_testn_epi64_mask() {
6322         let a = _mm512_set1_epi64(1 << 0);
6323         let b = _mm512_set1_epi64(1 << 0 | 1 << 1);
6324         let r = _mm512_testn_epi64_mask(a, b);
6325         let e: __mmask8 = 0b00000000;
6326         assert_eq!(r, e);
6327     }
6328
6329     #[simd_test(enable = "avx512f")]
6330     unsafe fn test_mm512_mask_testn_epi64_mask() {
6331         let a = _mm512_set1_epi64(1 << 0);
6332         let b = _mm512_set1_epi64(1 << 1);
6333         let r = _mm512_mask_testn_epi64_mask(0, a, b);
6334         assert_eq!(r, 0);
6335         let r = _mm512_mask_testn_epi64_mask(0b11111111, a, b);
6336         let e: __mmask8 = 0b11111111;
6337         assert_eq!(r, e);
6338     }
6339
6340     #[simd_test(enable = "avx512f")]
6341     unsafe fn test_mm512_stream_pd() {
6342         #[repr(align(64))]
6343         struct Memory {
6344             pub data: [f64; 8],
6345         }
6346         let a = _mm512_set1_pd(7.0);
6347         let mut mem = Memory { data: [-1.0; 8] };
6348
6349         _mm512_stream_pd(&mut mem.data[0] as *mut f64, a);
6350         for i in 0..8 {
6351             assert_eq!(mem.data[i], get_m512d(a, i));
6352         }
6353     }
6354
6355     #[simd_test(enable = "avx512f")]
6356     unsafe fn test_mm512_stream_si512() {
6357         #[repr(align(64))]
6358         struct Memory {
6359             pub data: [i64; 8],
6360         }
6361         let a = _mm512_set1_epi64(7);
6362         let mut mem = Memory { data: [-1; 8] };
6363
6364         _mm512_stream_si512(&mut mem.data[0] as *mut i64, a);
6365         for i in 0..8 {
6366             assert_eq!(mem.data[i], get_m512i(a, i));
6367         }
6368     }
6369
6370     #[simd_test(enable = "avx512f")]
6371     unsafe fn test_mm512_mask_set1_epi64() {
6372         let src = _mm512_set1_epi64(2);
6373         let a: i64 = 11;
6374         let r = _mm512_mask_set1_epi64(src, 0, a);
6375         assert_eq_m512i(r, src);
6376         let r = _mm512_mask_set1_epi64(src, 0b11111111, a);
6377         let e = _mm512_set1_epi64(11);
6378         assert_eq_m512i(r, e);
6379     }
6380
6381     #[simd_test(enable = "avx512f")]
6382     unsafe fn test_mm512_maskz_set1_epi64() {
6383         let a: i64 = 11;
6384         let r = _mm512_maskz_set1_epi64(0, a);
6385         assert_eq_m512i(r, _mm512_setzero_si512());
6386         let r = _mm512_maskz_set1_epi64(0b11111111, a);
6387         let e = _mm512_set1_epi64(11);
6388         assert_eq_m512i(r, e);
6389     }
6390 }